A method for fabricating epitaxial structures of multi-junction GaAs solar cells and the epitaxial structure thereof.
By employing an asymmetric doping design and a compositionally graded tunnel junction in multi-junction GaAs solar cells, the voltage loss and light absorption problems at the tunnel junction are solved, improving the photoelectric conversion efficiency and current matching of the cell, and extending the device's lifetime.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SHANDONG INSPUR HUAGUANG OPTOELECTRONICS
- Filing Date
- 2026-03-17
- Publication Date
- 2026-06-30
AI Technical Summary
In existing multi-junction GaAs solar cells, the hole tunneling probability of the tunnel junction is low, which easily leads to the accumulation of space charge at the tunnel junction, resulting in voltage loss. Furthermore, the absorption of light by the tunnel junction material reduces the light intensity. Inappropriate selection of materials for the window layer and the back surface field layer can introduce free carrier absorption or parasitic resistance, affecting the performance of the cell.
The tunnel junction and composition gradient structure with asymmetric doping design are used. By making the doping concentration of the p-type aluminum gallium arsenide layer higher than that of the n-type aluminum gallium arsenide layer in the first tunnel junction layer, the hole tunneling barrier width is reduced by using the heavily doped p-type layer. In the transition transport layer, the design of gradually transitioning from n-type indium gallium phosphide to high indium composition n-type indium gallium phosphide is adopted to reduce interface mismatch dislocations and optimize the photoelectric conversion efficiency of each sub-cell.
This improves the photoelectric conversion efficiency of multi-junction GaAs solar cells, reduces the series resistance of the tunnel junction, reduces voltage loss, enhances current matching and device reliability, and extends minority carrier lifetime.
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Figure CN122318355A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of solar cell technology, specifically relating to a method for preparing a multi-junction GaAs solar cell epitaxial structure and the epitaxial structure thereof. Background Technology
[0002] In photovoltaic materials, III-V compound semiconductors, with their bandgap structure and excellent photoelectric properties, exhibit higher photoelectric conversion efficiency than conventional silicon-based cells. Gallium arsenide, as a representative of second-generation semiconductors, possesses high electron mobility, high temperature resistance, and radiation resistance.
[0003] In photovoltaic materials, tunneling junctions are crucial regions connecting upper and lower sub-cells. Their function is to facilitate the tunneling of majority carriers under reverse bias, preventing additional voltage drops. Typical tunneling junctions employ a symmetrically doped p++ / n++ structure. However, the effective mass of holes is usually greater than that of electrons, resulting in a lower hole tunneling probability. This leads to the accumulation of space charge at the tunneling junction, causing voltage losses. Furthermore, the absorption of light by the tunneling junction material reduces the light intensity reaching the lower cell.
[0004] The window layer and back surface field layer of photovoltaic materials are used to reduce surface and interface recombination. However, if the doping concentration and thickness of the AlInP window layer are not chosen appropriately, it can introduce free carrier absorption or parasitic resistance, thereby reducing cell performance. The barrier height of the back surface field layer needs to be precisely controlled. If it is too low, it cannot effectively block minority carriers; if it is too high, it may introduce additional series resistance. Summary of the Invention
[0005] This invention provides a method for fabricating epitaxial structures of multi-junction GaAs solar cells. The tunnel junction of this invention employs an asymmetric doping design, and the transition transport layer adopts a compositionally graded structure. The cells fabricated using this method exhibit higher photoelectric conversion efficiency, better current matching and stress management capabilities, reduced defect density, and improved device reliability.
[0006] The methods include: S1: An n-type aluminum indium phosphide interconnect layer and a first optical window layer are grown on a GaAs substrate using metal-organic vapor deposition. S2: A top cell layer is grown on the first optical window layer. The top cell layer adopts a nip-type indium gallium phosphide structure. A first back surface field layer is grown above the p-type region of the top cell layer. S3: A first tunneling junction layer is grown on the first back surface field layer. The first tunneling junction layer is composed of a p-type aluminum gallium arsenide layer and an n-type aluminum gallium arsenide layer, wherein the doping concentration of the p-type aluminum gallium arsenide layer is higher than that of the n-type aluminum gallium arsenide layer. S4: A second optical window layer and a middle cell layer are grown sequentially on the first tunnel junction layer. The middle cell layer adopts a nip-type gallium arsenide structure. A second back surface field layer is grown above the p-type region of the middle cell layer. The second back surface field layer is a p-type indium gallium phosphide layer. S5: A second tunneling junction layer is grown on the second back surface field layer. The second tunneling junction layer is composed of a p-type aluminum gallium arsenide layer and an n-type indium gallium phosphide layer. S6: A transition transport layer is grown on the second tunnel junction layer. The transition transport layer adopts a structure that gradually changes from n-type indium gallium phosphide to high-indium-content n-type indium gallium phosphide. S7: The third optical window layer, the bottom cell layer, the third back surface field layer, the p-type indium gallium interconnect layer, and the protective layer are grown sequentially on the transition transport layer to complete the fabrication of the flip-chip triple junction cell epitaxial structure including the top cell, the middle cell, and the bottom cell, wherein the bottom cell layer adopts a nip-type indium gallium arsenide structure.
[0007] According to another embodiment of this application, a multi-junction GaAs solar cell epitaxial structure is provided, the epitaxial structure including: a GaAs substrate, a first tunneling junction layer, a second tunneling junction layer, and a p-type indium gallium interconnect layer; The GaAs substrate is located at the bottom layer of the epitaxial structure; An n-type aluminum indium phosphide (AIP) bonding layer is disposed on a GaAs substrate; a first optical window layer is disposed on the n-type AIP bonding layer. The top cell absorption layer is disposed on the first optical window layer, including a first n-type region, a first intrinsic region and a first p-type region; the first back surface field layer is disposed above the first p-type region of the top cell absorption layer, and is a p-type aluminum gallium indium phosphide layer; The first tunnel junction layer is disposed on the first back surface field layer and consists of a lower p-type aluminum gallium arsenide layer and an upper n-type aluminum gallium arsenide layer; The second optical window layer is disposed on the first tunneling junction layer; The middle battery absorption layer is disposed on the second optical window layer, including a second n-type region, a second intrinsic region and a second p-type region; The second back surface field layer is disposed above the second p-type region of the middle cell absorption layer and is a p-type indium gallium phosphide layer. The second tunneling junction layer is disposed on the second back surface field layer and consists of a lower p-type aluminum gallium arsenide layer and an upper n-type indium gallium phosphide layer; the transition transport layer is disposed on the second tunneling junction layer; and the third optical window layer is disposed on the transition transport layer. The bottom cell absorption layer is set on the third optical window layer and adopts a nip-type indium gallium arsenide structure, including a third n-type region, a third intrinsic region and a third p-type region. The third back surface field layer is set above the third p-type region of the bottom cell absorption layer and is a p-type indium gallium arsenide layer. The p-type indium gallium interconnect layer is disposed on the third back surface field layer for connecting the back metal electrode; the protective layer is disposed on the p-type indium gallium interconnect layer.
[0008] As can be seen from the above technical solutions, the present invention has the following advantages: The method for fabricating epitaxial structures of multi-junction GaAs solar cells provided by this invention introduces a compositionally graded transition transport layer between the bottom cell and the middle cell. The transition transport layer gradually transitions from n-type indium gallium phosphide to high-indium-content n-type indium gallium phosphide. By continuously changing the composition, a smooth transition of the lattice constant is achieved, which effectively reduces the generation of interface mismatch dislocations, improves the crystal quality of the bottom cell, and extends the minority carrier lifetime.
[0009] To address the battery current matching problem, this invention designs the top, middle, and bottom cells using InGaP, GaAs, and InGaAs material systems respectively, with decreasing band gaps covering the solar spectrum from short-wavelength to long-wavelength. By adjusting the thickness and doping concentration of the intrinsic regions of each cell, this invention balances the photocurrent generated by the three cells, thereby improving the battery's fill factor and conversion efficiency.
[0010] This invention employs a higher doping concentration of the p-type aluminum gallium arsenide (AGaAs) layer than the n-type AGaAs layer in the first tunneling junction. The heavily doped p-type layer reduces the tunneling barrier width for holes, thereby increasing the hole tunneling probability. In the second tunneling junction, a combination of p-type AGaAs and n-type indium gallium phosphide (IGaphos) is used. By selecting an extremely thin layer thickness and a specific composition range, the light absorption of the tunneling junction itself is minimized, enhancing its ability to capture hot carriers. This invention reduces the series resistance of the tunneling junction, decreases voltage loss between sub-cells, and suppresses performance degradation at high temperatures.
[0011] This invention grows a first optical window layer above the top cell, a first back surface field layer above the p-region of the top cell, a second back surface field layer above the p-region of the middle cell, and a third back surface field layer below the bottom cell. All these layers use wide-bandgap materials with optimized doping concentrations to form an effective barrier for minority carriers, reducing the surface recombination rate of each sub-cell and improving open-circuit voltage and short-circuit current.
[0012] This invention employs a material system with a thermal expansion coefficient similar to that of the GaAs substrate in a multilayer structure, and meets the requirements for accumulated thermal stress by controlling the thickness and growth temperature of each layer. A gradient design in the transition transport layer causes dislocations to bend during the gradient process. The bottom cell adopts a nip structure, with the intrinsic region serving as the main absorption region, and the area with low dislocation density ensuring effective collection of photogenerated carriers. Attached Figure Description
[0013] To more clearly illustrate the technical solution of the present invention, the accompanying drawings used in the description will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0014] Figure 1 This is a schematic diagram of the epitaxial structure of a multijunction GaAs solar cell.
[0015] Figure 2 This is a flowchart illustrating the fabrication process of epitaxial structures for multi-junction GaAs solar cells. Detailed Implementation
[0016] The multi-junction GaAs solar cell epitaxial structure provided by this invention includes: a GaAs substrate, a first tunneling junction layer, a second tunneling junction layer, and a p-type indium gallium interconnect layer. The GaAs substrate is located at the bottom layer of the structure, serving as the growth substrate for the entire epitaxial structure.
[0017] An n-type aluminum indium phosphide (AIP) interconnect layer is disposed on the GaAs substrate and is a heavily doped layer. A first optical window layer is disposed on the n-type AIP interconnect layer and is a p-type AIP layer. A top-cell absorber layer is disposed on the first optical window layer and employs a nip-type indium gallium phosphide (IGaP) structure, specifically including a first n-type region, a first intrinsic region, and a first p-type region. A first back surface field layer is disposed above the first p-type region of the top-cell absorber layer and is a p-type AGaP layer with an aluminum composition of 0.26 to 0.32.
[0018] The first tunneling junction layer is disposed on the first back surface field layer and consists of a lower p-type aluminum gallium arsenide layer and an upper n-type aluminum gallium arsenide layer, wherein the doping concentration of the p-type layer is higher than that of the n-type layer.
[0019] The second optical window layer is disposed on the first tunnel junction layer. The mid-cell absorption layer is disposed on the second optical window layer and adopts a nip-type gallium arsenide structure, including a second n-type region, a second intrinsic region, and a second p-type region.
[0020] The second back surface field layer is disposed above the second p-type region of the middle cell absorption layer, and is a p-type indium gallium phosphide layer with an indium composition of 0.45 to 0.55.
[0021] The second tunneling junction layer is disposed on the second back surface field layer and consists of a lower p-type aluminum gallium arsenide layer and an upper n-type indium gallium phosphide layer.
[0022] The transition transport layer is disposed on the second tunnel junction layer and is an n-type indium gallium phosphide graded layer with the indium composition continuously increasing from bottom to top, eventually making the indium composition at the top reach 0.76 to 0.80.
[0023] The third optical window layer is disposed on the transition transport layer. The bottom cell absorption layer is disposed on the third optical window layer and adopts a nip-type indium gallium arsenide structure, specifically including a third n-type region, a third intrinsic region, and a third p-type region.
[0024] The third back surface field layer is disposed above the third p-type region of the bottom cell absorption layer. It is a p-type indium gallium arsenide layer with an indium composition of 0.24 to 0.30.
[0025] The p-type indium gallium (IGa) interconnect layer is disposed on the third back surface field layer. It is a heavily doped layer used for back metal electrode connections. The protective layer is disposed on the p-type IGa interconnect layer and is a p-type gallium arsenide (GaAs) layer, serving as the outermost cover.
[0026] As one embodiment of the present invention, combined with Figure 1 As shown, the GaAs substrate 101 supports an n-type aluminum indium phosphide (AIP) interconnect layer 102, which in turn supports a first optical window layer 103. The first optical window layer 103 is connected to the n-type region of the top battery absorption layer 104, and the intrinsic region inside the top battery absorption layer 104 is sandwiched between the n-type and p-type regions.
[0027] A first back surface field layer 105 is grown above the p-type region of the top cell absorption layer 104; the first back surface field layer 105 is directly bonded to the p-type aluminum gallium arsenide layer of the first tunnel junction layer 106, and the p-type aluminum gallium arsenide layer and the n-type aluminum gallium arsenide layer inside the first tunnel junction layer 106 form a heterojunction.
[0028] The n-type aluminum gallium arsenide layer of the first tunnel junction layer 106 supports the second optical window layer 107; the second optical window layer 107 connects to the n-type region of the intermediate cell absorption layer 108, which adopts a nip stacked structure; a second back surface field layer 109 is grown above the p-type region of the intermediate cell absorption layer 108.
[0029] The second back surface field layer 109 is connected to the p-type aluminum gallium arsenide layer of the second tunneling junction layer 110, and a transition transport layer 111 is grown above the n-type indium gallium phosphide layer of the second tunneling junction layer 110; the indium composition of the transition transport layer 111 varies in a gradient and is lattice-matched and connected to the third optical window layer 112.
[0030] The third optical window layer 112 connects to the n-type region of the bottom cell absorption layer 113. After the bottom cell absorption layer 113 completes the nip construction, a third back surface field layer 114 is grown above the p-type region. The third back surface field layer 114 supports a highly doped p-type indium gallium interconnect layer 115. A protective layer 116 covers the p-type indium gallium interconnect layer 115, forming a complete epitaxial stack.
[0031] The GaAs substrate of this invention provides a lattice template for crystal growth, serving as the starting basis for epitaxial growth. An n-type aluminum indium phosphide (AIP) interconnect layer acts as the bottom ohmic contact layer, reducing the contact resistance between the metal electrode and the semiconductor, thus achieving efficient current extraction. The first optical window layer has a high bandgap characteristic, allowing short-wavelength light to pass through into the active region of the top cell, reducing surface recombination. The top cell absorption layer utilizes a nip structure to establish a built-in electric field, primarily absorbing photons in the 660-680 nm wavelength band, generating electron-hole pairs for photoelectric conversion of high-energy photons.
[0032] The first back surface field layer achieves lattice matching with the upper and lower layers through a specific aluminum composition, forming a high barrier that reflects minority carriers back to the active region, reducing back recombination losses. The first tunneling junction layer utilizes heavy doping and asymmetric concentration distribution to achieve series connection between the top and middle cells through quantum tunneling, balancing the transport efficiency of holes and electrons and reducing series resistance.
[0033] The second optical window layer blocks carrier diffusion into the inactive region while allowing mid-wavelength light to pass through to the middle cell. The middle cell absorption layer, made of GaAs, primarily absorbs photons in the 860-880nm band, serving as an intermediate bandgap cell to absorb the spectrum not absorbed by the top cell. The second back surface field layer buffers the stress between the upper and lower layers by adjusting the indium composition, preventing dislocations caused by lattice mismatch from extending into the active region.
[0034] The second tunneling junction layer connects the middle cell and the bottom cell. Utilizing an extremely thin layer thickness and a specific AlGaAs / InGaP heterojunction design, it reduces voltage loss and optimizes heat capture capabilities, ensuring current matching between the sub-cells. The transition transport layer, through gradient changes in indium composition, gradually releases the internal stress caused by the large difference in lattice constants, trapping and annihilating through-dislocations, providing a low-dislocation-density growth substrate for the bottom cell. The third optical window layer protects the bottom cell surface, reduces surface state recombination, and allows long-wavelength light to enter the active region of the bottom cell.
[0035] The bottom cell absorption layer uses InGaAs material, primarily absorbing near-infrared light in the 0.9-1.3μm range for photoelectric conversion of low-energy photons, thus broadening the spectral response range. The third back surface field layer utilizes a large bandgap to form a back mirror, reflecting unabsorbed long-wavelength photons back to the bottom cell for secondary absorption, preventing electron overflow. The p-type indium gallium interconnect layer serves as the top heavily doped contact layer, i.e., the back side after flip-chip fabrication, facilitating subsequent metal electrode fabrication and current collection. A protective layer prevents oxidation and contamination of the internal sensitive semiconductor layer by the external environment, protecting the integrity of the epitaxial surface.
[0036] As a method for fabricating epitaxial structures for multi-junction GaAs solar cells, pin structures are designed in multi-junction solar cells to increase the probability of photons being absorbed in the active layer, thereby increasing the number of electron-hole pairs ejected by the built-in electric field and improving photoelectric conversion efficiency. The bandgap of the multi-junction cell is designed to be a gradient absorption type, with the bandgap varying from 1.84 to 1.41 to 1 eV at equal intervals.
[0037] The tunneling junction of this invention is designed to be extremely thin (8-10 nm) and highly doped, which increases the probability of hole-electron tunneling, increases the lifetime of photogenerated carriers, and improves photocurrent density and photoelectric efficiency.
[0038] The transition transport layer of this invention is designed as follows: Gradually become This reduces defects and dangling dislocations in the transition layer, enhances the movement and diffusion of photogenerated carriers, and effectively improves the light absorption rate of the battery.
[0039] This invention uses a chip manufacturing process to remove the GaAs substrate from the epitaxial wafer, deposit an anti-reflection layer, and form electrodes on the front and back electrode layers. With low series resistance, it can obtain high-efficiency solar cells ranging from 660nm to 1.3μm.
[0040] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0041] Please see Figure 1 The diagram shows a flowchart of a method for fabricating a multi-junction GaAs solar cell epitaxial structure in a specific embodiment. The method includes: S1: A highly doped n-type aluminum indium phosphide interconnect layer and a first optical window layer are grown on a GaAs substrate using metal-organic vapor deposition to form a bottom contact interface for subsequent top cell growth.
[0042] In some embodiments, a wafer with a crystal orientation of 100 and a doping concentration of 1×10¹ is provided. 8 cm - A ³ n-type GaAs substrate is placed in an MOCVD reaction chamber. The chamber temperature is raised to 680-720℃, and the pressure is adjusted to 130-160 mbar. A highly doped n-type aluminum indium phosphide (AIP) interconnect layer is grown using trimethylaluminum, trimethylindium, and phosphine as precursors and silane as the n-type dopant source. The highly doped design of the n-type AIP interconnect layer reduces the contact resistance with the metal electrode, enabling efficient current extraction.
[0043] Optionally, the aluminum-indium molar ratio is fixed at 0.5:0.5, and the doping concentration is controlled at 6×10¹. 9 cm - ³, with a thickness of 80-100nm. After the connecting layer is grown, the cavity temperature is kept constant, and the doping source is switched to carbon tetrabromide (p-type). The p-type aluminum indium phosphide first optical window layer has a high band gap, which can reduce the absorption of visible light in sunlight and allow more photons to penetrate to the subsequent top cell layer.
[0044] Furthermore, by adjusting the precursor flow rate, a p-type aluminum indium phosphide (AIPT) first optical window layer was grown, maintaining the aluminum-indium molar ratio at 0.5:0.5 and the doping concentration at 3×10¹. 8 cm - ³, growth rate 0.15-0.2 nm / s, thickness 50-70 nm. A complete bottom contact interface is formed on the GaAs substrate.
[0045] S2: A top cell layer is grown on the first optical window layer formed in step S1. The top cell layer adopts a nip-type indium gallium phosphide structure, wherein the intrinsic region is undoped to construct a built-in electric field. A first back surface field layer is grown above the p-type region of the top cell layer. The aluminum composition of the first back surface field layer is configured to be 0.26 to 0.32 to match the lattice constant.
[0046] In some embodiments, on the first optical window layer formed in S1, the MOCVD cavity temperature is maintained at 670-710°C and the pressure at 120-150 mbar. Using trimethylgallium, trimethylindium, and phosphine as precursors, and silane as the n-type doping source, an n-type indium gallium phosphorus layer of the top solar cell is first grown. The indium composition is controlled at 0.48-0.55, and the doping concentration is 5 × 10¹. 8 cm - ³, growth rate 0.12-0.18 nm / s.
[0047] Furthermore, the doping source is turned off, and an undoped intrinsic indium gallium phosphorus sublayer is grown with the same indium composition as the n-type sublayer and a thickness of 10-30 nm.
[0048] Furthermore, after the intrinsic sublayer growth is completed, the doping source is switched to carbon tetrabromide to grow a p-type indium gallium phosphorus sublayer. The indium composition is the same as the previous two layers, and the doping concentration is 4 × 10¹. 8 cm - ³, with a growth rate of 0.12-0.18 nm / s and a thickness of 0.25-0.3 μm, forming a complete nip-type top cell layer.
[0049] Furthermore, keeping the cavity parameters constant, the flow ratio of trimethylaluminum to trimethylgallium was adjusted to control the aluminum composition at 0.26-0.32, thus growing p-(Al) x Ga 1-xThe first back surface field layer is 0.5In0.5P with a doping concentration of 4×10¹. 8 cm - ³, with a thickness of 30-50 nm. Here, lattice matching with the indium gallium phosphide material of the top cell layer can be achieved, and the band gap is higher than that of the top cell layer, forming a high barrier that reflects photogenerated electrons back to the n-type region of the top cell, reducing electron recombination on the back side.
[0050] The top cell layer adopts a nip structure. The doping of the n-type and p-type sublayers forms a built-in electric field. The intrinsic region is undoped to reduce carrier recombination centers, enabling photogenerated electrons and holes to separate rapidly under the action of the built-in electric field.
[0051] S3: A first tunneling junction layer is grown on the first back surface field layer formed in step S2. The first tunneling junction layer is composed of a p-type aluminum gallium arsenide layer and an n-type aluminum gallium arsenide layer, wherein the doping concentration of the p-type aluminum gallium arsenide layer is higher than that of the n-type aluminum gallium arsenide layer, so as to reduce the hole crossing energy barrier and balance the current between sub-cells.
[0052] S4: A second optical window layer and a middle cell layer are sequentially grown on the first tunnel junction layer formed in step S3. The middle cell layer adopts a nip-type gallium arsenide structure, and a second back surface field layer is grown above the p-type region of the middle cell layer. The second back surface field layer is a p-type indium gallium phosphide layer, and its indium composition is configured to be 0.45 to 0.55 to achieve stress transition with the underlying material.
[0053] In some embodiments, on the first tunneling junction layer formed in S3, an n-type aluminum gallium arsenide second optical window layer is grown using trimethylaluminum, trimethylgallium, and arsine as precursors and silane as the n-type dopant source. The aluminum composition is controlled at 0.05-0.1, and the doping concentration is 3×10¹. 8 cm - The growth rate is 0.15-0.2 nm / s, and the thickness is 40-60 nm. Here, the second optical window layer uses n-type aluminum gallium arsenide material. The low aluminum composition design makes its bandgap close to that of the gallium arsenide in the middle cell layer, which can reduce light absorption loss and allow photons not absorbed by the top cell to penetrate to the middle cell layer.
[0054] Furthermore, the precursors were adjusted to use trimethylgallium and arsenide as the main precursors, and silane as the n-type dopant source. The n-type gallium arsenide sublayer of the growing cell layer had a doping concentration of 4 × 10¹. 8 cm - ³, growth rate 0.12-0.18 nm / s, thickness 0.15-0.2 μm.
[0055] Furthermore, the doping source was turned off, and an undoped intrinsic gallium arsenide sublayer was grown at a growth rate of 0.1-0.15 nm / s with a thickness of 10-30 nm. Then, the doping source was switched to carbon tetrabromide to grow a p-type gallium arsenide sublayer with a doping concentration of 3 × 10¹. 8 cm - ³, with a growth rate of 0.12-0.18 nm / s and a thickness of 0.25-0.3 μm, forming a nip-type intermediate cell layer.
[0056] Furthermore, the precursors were adjusted to trimethylgallium, trimethylindium, and phosphine, with carbon tetrabromide as the p-type dopant source. The indium composition was controlled at 0.45-0.55, and a p-type indium gallium phosphide second back surface field layer was grown with a doping concentration of 3-5 × 10¹. 8 cm - ³, growth rate 0.1-0.15 nm / s, thickness 30-50 nm.
[0057] The second back surface field layer here is a p-type indium gallium phosphide (IGaP). The design with an indium composition of 0.45-0.55 enables stress transition with the gallium arsenide (GaAs) layer in the middle cell. Its band gap is higher than that of the middle cell, forming a high barrier and reducing electron recombination on the back side.
[0058] S5: A second tunneling junction layer is grown on the second back surface field layer formed in step S4. The second tunneling junction layer is composed of a p-type aluminum gallium arsenide layer and an n-type indium gallium phosphide layer. The extremely thin layer thickness and specific composition range are used to reduce the battery conversion efficiency loss and increase the heat capture capability.
[0059] S6: A transition transport layer is grown on the second tunnel junction layer formed in step S5. The transition transport layer adopts a structure that gradually changes from n-type indium gallium phosphide to high indium composition n-type indium gallium phosphide to eliminate the internal stress caused by lattice mismatch during the epitaxial growth of the heterojunction and reduce the defect density.
[0060] S7: On the transition transport layer formed in step S6, a third optical window layer, a bottom cell layer, a third back surface field layer, a highly doped p-type indium gallium interconnect layer, and a protective layer are grown sequentially. The bottom cell layer adopts a nip-type indium gallium arsenide structure, thereby completing the fabrication of a flip-chip triple junction cell epitaxial structure including a top cell, a middle cell, and a bottom cell.
[0061] In some embodiments, on the transition transport layer formed in S6, an n-type indium gallium phosphide third optical window layer is grown using trimethylgallium, trimethylindium, and phosphine as precursors and silane as the n-type dopant source. The indium composition is controlled at 0.76-0.80, and the doping concentration is 3×10¹. 8 cm - ³, growth rate 0.15-0.2 nm / s, thickness 40-60 nm.
[0062] Furthermore, the precursor was adjusted to trimethylgallium, trimethylindium, and arsenane, with silane as the n-type dopant source. An n-type indium gallium arsenide sublayer was grown as the bottom cell layer, with the indium composition controlled at 0.31-0.41 and the doping concentration at 4×10¹. 8 cm - ³, growth rate 0.12-0.18 nm / s, thickness 0.15-0.2 μm.
[0063] Furthermore, the doping source was turned off, and an undoped intrinsic indium gallium arsenide sublayer with a thickness of 10-30 nm was grown. Then, the doping source was switched to carbon tetrabromide to grow a p-type indium gallium arsenide sublayer with a doping concentration of 3 × 10¹. 8 cm - ³, with a growth rate of 0.12-0.18 nm / s and a thickness of 0.25-0.3 μm, forming a nip-type bottom cell layer.
[0064] Furthermore, the indium composition was adjusted to 0.24-0.30 to grow a p-type indium gallium arsenide third back surface field layer with a doping concentration of 8 × 10¹. 8 cm - The growth rate is 0.1-0.15 nm / s, and the thickness is 30-50 nm. Then, a highly doped p-type indium gallium interconnect layer is grown with a doping concentration of 7 × 10¹⁸. 9 cm - ³, with a thickness of 80-100 nm. The high doping concentration and specific indium composition design of the third back surface field layer here can form a high barrier, reduce electron recombination, and improve light absorption efficiency.
[0065] Furthermore, using trimethylgallium and arsine as precursors and carbon tetrabromide as the p-type dopant source, a p-type GaAs protective layer was grown with a doping concentration of 2 × 10¹. 8 cm - The growth rate is 0.15-0.2 nm / s, and the thickness is 40-60 nm, completing the fabrication of the entire flip-chip triple-junction cell epitaxial structure. The p-type indium gallium interconnect layer is used to connect with the back metal electrode, reducing contact resistance; the p-type GaAs protective layer prevents damage to the cell structure from subsequent processes, improving cell stability.
[0066] In one embodiment of the present invention, based on step S3, the following is a possible embodiment and its specific implementation will be described in a non-limiting manner. S3 specifically includes the following steps: S31: On the surface of the first back surface field layer, trimethylgallium, trimethylaluminum, and arsine are introduced as the main reaction source, and magnesium bis(oxocero) vapor is introduced as the p-type doping source; the reaction chamber pressure is controlled at 40-60 Torr, the growth temperature is set at 680-700℃, and the deposition thickness is set to 3.5 nm to 4.5 nm for a p-type aluminum gallium arsenide layer; the diethylmagnesium flow rate is monitored and adjusted in real time to keep the magnesium doped hole concentration stably maintained at 4.8 × 10¹. 9 cm - ³ to 5.2 × 10¹ 9 cm - In the ³ range, the background carbon concentration is controlled at 1×10¹. 7 cm - ³The following measures are taken to ensure crystal quality.
[0067] In some embodiments, a gas partial pressure control model is established within the MOCVD reaction chamber. The gas partial pressure control model includes a precursor delivery module, a surface adsorption reaction module, and a dopant incorporation efficiency calculation module.
[0068] Furthermore, the input variable is the molar flow rate F of magnesium dicerocene. MgCp2 Total pressure P in the reaction chamber total and growth temperature T growth The output variable is the actual hole concentration N of the p-type aluminum gallium arsenide layer. A According to the pre-calibrated doping efficiency curve Where η is the doping activation coefficient under temperature and pressure coupling, and V growth Where is the growth rate, and Area is the effective area of the substrate.
[0069] Optionally, carrier concentration data fed back by the in-situ Hall effect test probe is collected every preset time interval. If the measured value deviates from the target center value by 5.0 × 10⁻⁶, the carrier concentration data is considered. 19 cm -3 If the deviation exceeds ±2%, the opening of the magnesia-dicyclopentadiene flow valve is automatically corrected. This approach does not rely on trial and error but rather on dynamic adjustment based on real-time physical parameter feedback, ensuring that the p-type layer maintains its degenerate semiconductor characteristics even at extremely thin thicknesses, with the Fermi level extending deep into the valence band.
[0070] S32: Maintain a continuous flow of arsine to sustain the arsenic partial pressure in the reaction chamber. While keeping the reaction chamber temperature constant at 680-700℃, continue to introduce trimethylgallium, along with trimethylaluminum and silane. By adjusting the flow rate ratio of trimethylaluminum to trimethylgallium, control the aluminum composition within the range of 0.3-0.4 to grow an n-type aluminum gallium arsenide layer with a thickness of 3.5 nm to 4.5 nm. Here, 0.3-0.4 represents the mole fraction of aluminum atoms.
[0071] By adjusting the silane flow rate, the electron concentration of the n-type layer was set at (1.8-2.2)×10¹. 9 cm - ³, thus forming an asymmetric distribution with a doping concentration ratio of approximately 2.5:1 with the underlying p-type layer to optimize hole tunneling efficiency.
[0072] In some embodiments, the synergistic variation of the silicon doping flux FSiH4 and the aluminum composition xAl in the n-type layer is controlled. A target electron concentration N is set. D 2.0×10 19 cm -3 Based on the solid solubility limit formula of silicon in aluminum gallium arsenide Where N0 is the maximum solid solubility of silicon in GaAs, and β is the aluminum component suppression coefficient. The control system determines the aluminum component x based on the real-time set value. Al (0.02≤xAl≤0.05), calculate the maximum allowable silicon flow rate limit to prevent overdoping from causing silicon atoms to occupy gallium sites and form acceptor compensation.
[0073] Furthermore, during growth, the aluminum composition linearly and gradually changes from 0.05 at the interface to 0.02 at the surface, while the silicon flux increases nonlinearly to maintain a constant electron concentration. The final structure satisfies N A / N D The ratio is approximately 2.5. This ratio is obtained by solving the optimal solution of the coupled one-dimensional Poisson equation and Schrödinger equation system to ensure that the electric field distribution at the interface is in the hole tunneling.
[0074] S33: After completing the n-type layer growth, the introduction of trimethylaluminum, trimethylgallium, and silane is stopped, while maintaining the arsine and hydrogen atmosphere, and an in-situ short-time annealing process is performed. The temperature is gradually reduced from 690℃ to 640℃ to eliminate point defects at the interface and activate the dopant, avoiding excessive impurity interdiffusion to maintain the steepness of the interface and ensure that the tunnel junction has the lowest specific contact resistance.
[0075] S34: After annealing, increase the flow rate of high-purity hydrogen to purge residual byproducts in the reaction chamber, and stabilize the substrate temperature to 640°C at a controllable cooling rate of 3-5°C / s to prepare for the growth of the intermediate cell layer and complete the preparation of the first tunnel junction layer. The structure generated in this step serves as the lattice transition substrate for the subsequent epitaxial growth of the intermediate cell.
[0076] In some embodiments, immediately after annealing, the arsine is shut off, and high-purity hydrogen gas at a flow rate of 5 standard liters / minute is introduced to purge the chamber, thereby removing organometallic byproducts and unreacted dopant molecules adsorbed on the surface.
[0077] Furthermore, a linear cooling program is initiated, exponentially decreasing the heating block power to precisely lower the substrate temperature from 640℃ to the mid-cell growth initiation temperature of 640℃ at a rate of 10℃ / s. During this process, a slight positive pressure is maintained in the reaction chamber to prevent backflow of external air. After temperature stabilization, the system automatically verifies the deviation between thermocouple readings and optical pyrometer readings. If the deviation meets the requirements, the precursor valve of the mid-cell layer is allowed to open. This ensures an atomically smooth transition from the tunnel junction to the mid-cell. This seamless growth strategy guarantees accurate stoichiometry at the heterostructure interface.
[0078] In one embodiment of the present invention, based on step S5, the following is a possible embodiment and its specific implementation will be described in a non-limiting manner. S5 specifically includes the following steps: S51: Design and growth of p-type aluminum gallium arsenide layers with specific strain gradients.
[0079] In some embodiments, the target aluminum composition f is set to 0.28 to 0.34 on the second back surface field layer.
[0080] Furthermore, a segmented flow programming method was adopted to control the gas phase molar fraction of trimethylaluminum to decrease linearly along the thickness direction during the growth process, with a decreasing gradient of 0.015 to 0.025 per nanometer.
[0081] At a growth temperature of 640°C to 660°C, trimethylgallium, arsine, and magnesium pyrocene are introduced to deposit a total thickness of 3.0 nm to 4.0 nm.
[0082] Furthermore, by synchronously adjusting the magnesia-diceromagnesia flow rate, the net acceptor concentration ([Mg]-[Si]) of the p-type layer was made to exhibit a low-high-low distribution along the growth direction, with the concentration reaching a peak of 4 × 10¹ in the 1 nm thickness region of the middle layer. 9 cm - ³ to 6×10¹ 9 cm - ³, the concentration drops to 1×10¹ within a 1-nanometer thickness region near the upper and lower interfaces. 9 cm - ³ to 2×10¹ 9 cm - ³.
[0083] It can be seen that the bandgap variation affects the position of the valence band peak Ev(z), thereby altering the shape of the potential barrier faced by holes. A decreasing aluminum composition means that the barrier height gradually decreases from the lower interface to the upper interface, providing a ramp rather than a high wall for hole tunneling, effectively reducing the average tunneling barrier. From a strain perspective, the lattice constant of AlGaAs is slightly smaller than that of GaAs, and the p-type layer is grown on the back field layer of the GaAs-based mid-cell, therefore its intrinsic strain is tensile.
[0084] S52: Design and growth of n-type indium gallium phosphide layers with compensated strain and composition gradient.
[0085] In some embodiments, on the p-type aluminum gallium arsenide layer formed in S51, the target indium composition g is set to 0.46 to 0.52. The gas phase molar fraction of trimethylindium is controlled to correspond to composition g at the start of growth and increases linearly along the thickness direction during growth, with an increment gradient of 0.02 to 0.03 per nanometer (based on indium composition).
[0086] Furthermore, at a growth temperature of 680°C to 700°C, trimethylgallium, phosphine, and silane were introduced, resulting in a total deposition thickness of 5.0 nm to 6.0 nm. By programmatically controlling the silane flow rate, the net donor concentration of this n-type layer was made to monotonically increase along the growth direction, starting from approximately 5 × 10¹⁰ at the lower interface. 8 cm - ³ Increase to approximately 2×10¹ at the top interface 9 cm - ³.
[0087] Specifically, an n-type InGaP layer is grown that precisely matches the strain and band structure of the p-type layer of S51. The indium composition g increases linearly along the growth direction (z' axis), i.e., g(z') = gbottom + β*z', where β is the increasing gradient.
[0088] Furthermore, the lattice constant of InGaP increases with increasing indium content. When grown on AlGaAs with a smaller lattice constant, the initial higher indium content (0.46-0.52) results in the InGaP layer itself being subjected to tensile strain.
[0089] Furthermore, by designing an incrementing g(z'), this tensile strain can be actively and linearly increased. This precisely matches the intention of the AlGaAs layer designed in S51, which tends towards compressive strain in the upper part, and the two work together to achieve the macroscopic strain equilibrium to be calculated in S53.
[0090] Furthermore, the monotonically increasing doping concentration design is based on different considerations: starting with moderate doping at the lower interface is beneficial for forming a smooth transition with the low doping at the upper interface of the p-type layer, reducing impurity interdiffusion; as growth progresses, the doping concentration increases linearly to the upper interface, which provides a good highly doped contact interface for the subsequent gradient transition transport layer, reducing contact resistance.
[0091] S53: Calculate and verify the strain equilibrium state and carrier tunneling probability.
[0092] In some embodiments, based on the aluminum and indium composition gradient functions f(z) and g(z') set in S51 and S52, and the dependence of the material's elastic constants, lattice constants, and composition, the average strain ε of the bilayer structure within the growth plane is calculated. xx By solving the Poisson equation, we ensure that the strain equilibrium condition is satisfied:
[0093] Specifically, the sum of the integral values of the strain in the x-direction of the p-type and n-type layers is calculated by optimizing the material composition distribution and growth parameters. For example, in tunnel junction design, asymmetric doping and nonlinear composition distribution are used to make the strain accumulation of the heavily doped p-type layer and the lightly doped n-type layer cancel each other out.
[0094] By combining an elasticity model, curvature sensor, and high-energy electron diffraction, growth parameters are adjusted in real time to maintain strain balance.
[0095] It should be noted that the strain balance calculation takes into account the average lattice matching and also calculates the total strain energy generated by the entire junction region on the substrate through integration, requiring it to approach zero. This is a more stringent global mechanical stability criterion.
[0096] Furthermore, the calculation involves the functional relationship between the material's elastic constant Cij and the composition. The calculation of carrier tunneling probabilities Te and Th is more complex, requiring consideration of the position-dependent potential energy profile V(z) jointly determined by the non-uniform compositions f(z) and g(z') described in S51 and S52, and the non-uniform doping NA(z) and ND(z'). This necessitates numerically solving the one-dimensional Schrödinger equation or employing a more accurate transfer matrix method. The optimization objective Th / Te≈1 directly addresses the current matching requirement of multi-junction cells, ensuring that the electron flow generated by the middle cell and the hole flow generated by the bottom cell can pass through the junction without loss. This embodiment constructs a virtual process performance prediction model, iteratively adjusting the gradient parameters (α, β) and doping distribution parameters in S51 / S52 until both strain balance and tunneling probability matching constraints are simultaneously satisfied, thereby outputting an optimal growth formula.
[0097] S54: Perform variable-temperature two-step growth and in-situ stress monitoring calibration.
[0098] In some embodiments, the growth of the p-type aluminum gallium arsenide layer described in S51 is completed at 650°C. After growth, the reaction chamber temperature is uniformly increased to 690°C within 30 seconds under pure arsine protection. Then, the growth of the n-type indium gallium phosphide layer described in S52 is performed at 690°C.
[0099] Furthermore, during the n-type layer growth process, a high-sensitivity thin-film stress sensor mounted on the back of the substrate tray is used to monitor the stress change curve σ(t) within the growth surface in real time. The measured stress change rate dσ / dt is compared with the theoretical stress evolution curve corresponding to the ideal composition gradient, which is pre-calculated in S53. When the actual dσ / dt deviates from the theoretical value by more than 15% within a continuous 2-nanometer thickness, the flow rate setpoint of trimethylindium is finely adjusted to bring the actual stress evolution trajectory back within the theoretical envelope, thereby completing the fabrication of the second tunneling junction layer.
[0100] In some embodiments, variable-temperature growth is based on epitaxial kinetic optimization of different material systems. Growth of AlGaAs at lower temperatures helps control the distribution of Al because Al has low mobility, and low temperatures reduce its segregation. In contrast, InGaP growth requires higher temperatures to ensure efficient phosphine cleavage and good In atom migration, resulting in a smooth surface and accurate compositional control.
[0101] Furthermore, the working principle of in-situ stress feedback control connects macroscopic measurement with microscopic structure. The evolution of thin film stress σ(t) is a comprehensive reflection of its instantaneous growth rate, composition, and the relaxation state of the grown portion. The theoretical stress evolution curve is calculated based on S53, assuming that each component is precisely incorporated according to the preset functions f(z) and g(z') and there is no relaxation.
[0102] In actual processes, even minor perturbations in gas-phase transport, boundary layer diffusion, and surface adsorption / desorption kinetics can cause the actual component distribution to deviate from the design. This deviation is immediately reflected in the stress evolution curve. By establishing a feedback control law that corrects for stress deviation in gas-phase composition, when a stress deviation is detected, the relevant parameters of the gas-phase composition are adjusted according to the pre-established feedback control law. This causes the stress to change in the expected direction, gradually reducing the stress deviation and ensuring that the stress state during material growth meets the design requirements, thereby improving the quality and performance of the final product. In this way, the system can compensate for these process perturbations online, ensuring that the final structure approximates the optimal design calculated by S53 as closely as possible.
[0103] In one embodiment of the present invention, based on step S6, the following is a possible embodiment and its specific implementation will be described in a non-limiting manner. S6 specifically includes the following steps: S61: Generate the growth formula for the transition transport layer based on the finite element model of elasticity.
[0104] Before growing the transition transport layer, a three-dimensional elastic mechanical finite element model is established. The input parameters of the model include: the final lattice constant asub of the lower second tunneling junction layer n-type InGaP, the lattice constant atarget of the upper target layer, i.e., the subsequent third optical window layer, and the preset total thickness Dtotal of the transition layer.
[0105] The model's geometry is discretized into N thin-layer elements along the growth direction (z-axis). Using Vegard's law and the material's elastic stiffness tensor Cij, the model aims to minimize the integral ∫Uelastic(z)dz of the elastic energy density Uelastic throughout the entire transition layer region, thus solving for the optimal In component distribution function In(z) for each element along the z-direction.
[0106] Furthermore, the solution process iterates using the gradient descent method, ultimately outputting a nonlinear, S-shaped distribution function of the In component.
[0107] in: As the bottom indium component, take . : Target layer indium composition, take . Total thickness of the transition layer. Shape factor: controls the steepness of the S-curve. . : Current growth position, value range is .
[0108] The model calculates the minimum critical thickness hc(z) required to achieve full strain relaxation for each In(z) value, and generates a segmented growth rate formula vgrowth(z) based on this, automatically reducing the growth rate by 30%-50% near the critical thickness.
[0109] The present invention provides a specific implementation of S61, which includes the following steps: S611: Establish axisymmetric or three-dimensional finite element geometric models for InGaP gradient buffer layers; based on Vegard's law and bending coefficient, construct nonlinear mapping relationships between In composition x and lattice constant a(x), elastic modulus E(x) and Poisson's ratio ν(x); for high indium composition regions, introduce temperature correction coefficients to compensate for softening effects under high-temperature growth.
[0110] Furthermore, the boundary conditions are set as follows: the bottom of the model is constrained by displacement to simulate substrate support, periodic boundary conditions are applied laterally to eliminate edge effects, and the top is set as a free surface.
[0111] S612: Perform nonlinear iterative calculations that take into account stress relaxation effects.
[0112] Set the initial In component linear or stepwise gradually varying distribution function xinitial(z) as the input model. In the iterative calculation: Thermo-mechanical coupling calculation: Based on the current temperature field and composition distribution, calculate the intrinsic strain and thermal mismatch strain of each layer caused by lattice mismatch.
[0113] A constitutive model incorporating the kinematic hardening rule is used for finite element analysis. When the equivalent stress σ at a certain interface layer... eq Exceeding the critical yield stress determined by the MB model At that time, a virtual plastic strain increment was introduced at the interface to numerically simulate the stress relaxation caused by mismatched dislocation slip.
[0114] Set convergence criteria: Iteratively update the stress field until the residual elastic stress in the structure is lower than the critical value and the plastic strain distribution tends to stabilize, and obtain the current stress-strain equilibrium state and the predicted residual stress distribution cloud map.
[0115] S613: Define the optimization objective function J:
[0116] Where, σ residual This refers to the residual stress after growth and cooling. For the peak stress at the critical interface, N violation The number of layers exceeding the critical thickness criterion is statistically analyzed, with wi as a weighting factor. Sequential quadratic programming (SQP) or a genetic algorithm is used to iteratively optimize the In component distribution curve x(z). In each iteration, the S612 mechanical model is invoked to evaluate the stress state under the current gradient strategy.
[0117] Furthermore, by adjusting the slope (dx / dz) and curvature of the gradient region, a balance is found between growth time cost and stress relaxation sufficiency, generating a nonlinear S-shaped or parabolic optimal component distribution curve to ensure that strain can be released smoothly throughout the entire buffer layer thickness, avoiding local stress concentration that could lead to cracks or high-density penetrating dislocations.
[0118] The optimized component gradient process formulation is output, and the depth locations where stress gradient changes drastically are marked as key areas of concern for in-situ stress monitoring during subsequent growth, guiding the fine-tuning of the actual process.
[0119] As can be seen, a finite element mechanical model of the InGaP gradient buffer layer is first constructed. Based on Vegard's law and the bending coefficient, a nonlinear relationship is established between the indium composition and the lattice constant, elastic modulus, and Poisson's ratio. A temperature correction coefficient is added in the high-indium composition region to match the material characteristics of high-temperature growth. Simulation conditions of bottom constraint, lateral periodic boundary, and top freedom are set. The Matthews-Blakeslee critical thickness model is used to replace fictitious parameters as the criterion for stress relaxation. An initial gradient distribution of indium composition is input into the model, and thermo-coupling elastoplastic iterative calculations are performed. The structural response is solved using the kinematic hardening rule. When the interface stress exceeds the critical yield stress, the stress release process caused by dislocation slip is simulated through plastic strain increments, iterating until the residual stress and plastic strain distributions stabilize. An optimization objective function is constructed using residual stress, interface peak stress, and the number of non-compliant layers at the critical thickness. The gradient slope and curvature of the indium composition are repeatedly adjusted through numerical optimization algorithms to obtain the optimal nonlinear composition curve that can smoothly release strain energy. Finally, a gas flow formula that can be used in actual production is output, and monitoring locations with drastic stress changes are marked. Here, the optimization target constructed by integrating multiple dimensions of indicators can control the stress distribution inside the structure and avoid epitaxial layer cracking caused by local stress concentration. The final output process formula can be directly applied to MOCVD equipment, and the marked key monitoring areas can provide clear direction for fine-tuning the actual growth process, improving the yield and operational stability of the epitaxial structure.
[0120] S62: Perform initial strain relaxation growth based on a superlattice template.
[0121] Instead of directly initiating continuous gradient growth on the second tunnel junction layer, a superlattice buffer template is first grown. This template consists of 10 to 15 short-period superlattices, each period comprising two layers: the first layer is InGaP with a constant low indium composition (In=0.46-0.48) and a thickness of 2 nm.
[0122] Further up, the second layer is InGaP with a constant high indium composition (In = 0.50-0.52) and a thickness of 2 nm. All layers are n-type doped, with the doping concentration maintained at 1 × 10⁻⁶. 18 cm -3 During template growth, the reaction chamber pressure was set to 100 Torr, and the growth temperature was 580°C. These low-temperature, high-pressure growth conditions aimed to suppress surface migration of In atoms and promote dislocation nucleation and confinement at the superlattice interface. The total thickness of the template was controlled at 40-60 nm.
[0123] It should be noted that the values of In = 0.46-0.48 and In = 0.50-0.52 were chosen to introduce a small but periodic strain field within the template. The low temperature of 580°C suppresses the surface mobility of In atoms, resulting in a rougher growth surface at the atomic scale. This is precisely what facilitates the induction of uniform, high-density dislocation nucleation at the superlattice interface, where the strain period changes. The high-pressure environment increases the mean free path of gaseous molecules and reduces the boundary layer thickness, making gas transport more diffusion-controlled and contributing to a more uniform composition and thickness.
[0124] S63: Controlled nonlinear component gradient growth based on S61 formulation with in-situ monitoring.
[0125] On the superlattice template completed in S62, the growth temperature was increased to 620°C and the pressure was reduced to 50 Torr. According to the In(z) function and vgrowth(z) method calculated in S61, the gas phase molar ratio of trimethylindium (TMIn) and trimethylgallium (TMGa) was configured through the mass flow controller of the MOCVD system to achieve an S-shaped curve gradient of the In composition.
[0126] Furthermore, the input flow rate of the total Group III source (TMIn+TMGa) is dynamically adjusted according to the vgrowth(z) function to control the growth rate.
[0127] In some embodiments, the realization of the S-type component gradient In(z) relies on the precise gas distribution of the MOCVD system. Based on a preset In(z) function, it is converted into a TMIn molar flow rate setpoint FTMIn(t) that varies with time t.
[0128] Furthermore, since the growth rate v also changes, the relationship between time t and growth thickness z is as follows: Surface roughness information can be retrieved by measuring the specular reflectance attenuation at different wavelengths or the intensity of scattered light at specific angles. The PSD curve, on the other hand, performs a Fourier transform on the surface height undulations to obtain the power distribution of roughness at different spatial frequencies. During gradient layer growth, the deterioration of surface morphology is reflected in the increase of the RMS value and the appearance of specific frequency peaks in the PSD curve. Therefore, these optical signals are sensitive indicators of crystal quality, strain state, and growth mode.
[0129] S64: Perform dynamic feedback and growth parameter correction based on in-situ monitoring data.
[0130] Establish a real-time data processing and control module. This module receives real-time RMS values and PSD curves measured by the in-situ laser scattering instrument in the S63.
[0131] Furthermore, a predefined surface morphology envelope is established, which defines thresholds for the amplitudes of specific frequency components in the RMS and PSD at different growth stages. Once the real-time monitored R(t) value exceeds 15% of the upper limit of the current growth stage threshold, or the PSD curve exceeds the threshold at a spatial frequency of 1-10 μm... -1 The appearance of sharp peaks within the range indicates the formation of periodic roughness or dislocation outcrops, triggering a correction process.
[0132] Furthermore, the growth rate (vgrowth) is instantaneously reduced by 20%; the molar ratio of TMIn to TMGa is fine-tuned to temporarily reduce the current target In composition by 0.02-0.03, i.e., a return to lattice matching. After maintaining this corrected state for a preset growth time, the surface signal is re-evaluated. If the signal returns to within the envelope, the gradient is restored according to the original S61 formulation; if it does not recover, this corrective cycle is continued up to 3 times; otherwise, growth is stopped and an alarm is triggered. Here, it is ensured that the entire gradient process is always constrained by a smooth surface morphology.
[0133] In some embodiments, one possible implementation is as follows: S641: During the growth of the transition layer, the root mean square roughness value and power spectral density curve of the grown surface are collected in real time using an in-situ laser scattering instrument and compared with the preset allowable surface morphology envelope. The envelope sets the root mean square roughness threshold and the amplitude threshold of specific frequency components in the power spectral density according to the average indium composition corresponding to different growth stages.
[0134] S642: When the detected root mean square roughness value exceeds 15% of the upper limit of the current growth stage threshold, or when the power spectral density curve shows a sharp peak in the spatial frequency range of 1 to 10 micrometers negative first power, the correction program is immediately triggered, the growth rate is instantly reduced by 20%, and the molar ratio of trimethylindium to trimethylgallium is finely adjusted to bring the current target indium composition back to the lattice matching direction by 0.02 to 0.03, and this corrected state is maintained to grow a thickness of 5 nanometers.
[0135] S643: After completing the 5nm corrected growth, re-evaluate the surface morphology signal. If the root mean square roughness value and power spectral density curve return to the allowable surface morphology envelope, resume the component gradient growth according to the original formulation; if they still do not return, repeat the correction procedure up to three times, otherwise stop the growth and issue an alarm.
[0136] S65: Perform high-temperature annealing and surface reconstruction at the end of the gradient layer stage.
[0137] Once the total thickness Dtotal, as defined in the S61 formulation, is reached and the In composition reaches the target value Intarget (0.76-0.80), the flow of TMI and TMGa is stopped. Under a phosphine and hydrogen atmosphere, the substrate temperature is rapidly increased from 620°C to 720°C within 30 seconds and held at this high temperature for 90 seconds. Subsequently, the temperature is slowly reduced at a rate of 5°C / s to the growth initiation temperature of the subsequent third optical window layer. Throughout the annealing process, a high V / III ratio (>200) of the phosphine is maintained to prevent surface decomposition. This high-temperature holding phase, without the growth of any material, provides sufficient atomic kinetic energy to release the confined strain energy that may have been introduced during S63-S64 through atomic rearrangement. This promotes the migration and annihilation of point defects accumulated near dislocation lines, ultimately resulting in a smooth, high-quality transition transport layer surface that matches the lattice constant of the target upper layer.
[0138] In some embodiments, the high-temperature annealing of S65 is equivalent to performing an annealing treatment on the crystal structure, bringing the material structure closer to its equilibrium state. This further reduces the penetration dislocation density, as the high temperature promotes dislocation climb and mutual annihilation. It also passivates the electrical activity of defects and reduces non-radiative recombination centers. Finally, it yields an atomically smooth and stoichiometrically accurate surface, ensuring the high-quality epitaxial growth of the third optical window layer and the bottom cell layer.
[0139] Furthermore, as a refinement and extension of the specific implementation methods of the above embodiments, the present invention provides another implementation method, which includes: Employing a nip structure increases the probability of photons being absorbed in the active layer. The built-in electric field also enhances the number of electron-hole pairs, allowing the solar cell to utilize a wider range of solar wavelengths for absorption. The top electrode material is nip-type In. a Ga 1-a P, where 0.48 ≤ a ≤0.55, i-In x Ga 1-x The first cell is made of undoped P-type GaAs with a thickness of 10-30 nm and a band gap of 1.82-1.88 eV, with a main absorption wavelength range of 660-680 nm. The second cell is made of undoped i-GaAs with a thickness of 10-30 nm and a band gap of 1.42-1.43 eV, with a main absorption wavelength range of 860-880 nm. The third cell is made of undoped i-GaAs with a thickness of 10-30 nm and a band gap of 1.42-1.43 eV, with a main absorption wavelength range of 860-880 nm. The fourth cell is made of undoped In-type GaAs. b Ga 1-b As, where 0.31≤ b ≤0.41, i-In b Ga 1-bAs is undoped, with a thickness of 10-30 nm and a band gap range of 1.0-1.1 eV, its dominant absorption wavelength is 0.9-1.3 μm. The n-region in the battery is usually heavily doped, so the lifetime Le of minority carrier electrons in the p-region will be very short. h Photogenerated electrons and holes outside the length can easily recombine and disappear, so the thickness of the n-region is controlled within <0.2μm. The lifetime of minority carrier holes in the p-region is long, and its thickness is controlled above >0.2μm, forming high-efficiency absorption of long-wave visible light and near-infrared light. This part of the light reaches the ground with high intensity and abundant source. Tunneling junction layer: Each sub-cell is connected by a graded buffer layer, and the graded buffer layer is connected to each sub-cell by a tunneling junction. The tunneling junction is mismatched with the graded buffer layers on both sides, resulting in dislocation concentration at the interface on both sides. Through-dislocations can be twisted, redirected, or annihilated in this layer, reducing the extension of through-dislocations into the active region of the PN junction and balancing the stress on both sides to a certain extent, effectively reducing the dislocation density in the PN junction region; the first tunneling junction adopts p-Al d Ga 1-d As, 0.31≤ d ≤0.41; n-Al e Ga 1-e As, 0.02≤ e ≤0.05; This is mainly to balance the lattice matching of GaAs in mid-cell batteries, serving as a transition lattice with a thickness of 8-10 nm, where electrons are confined to a very thin layer, greatly increasing the probability of them crossing the interface through quantum effects, thus making them easier to transport. Electrons have a smaller effective mass than holes and migrate faster, while holes migrate slower and are less likely to cross the interface. The p-type doping concentration is designed to be 5 × 10⁻⁶. 19 cm -3 Higher than 2×10 of n-type 19 cm -3 This reduces the height of the hole crossing barrier, improves the efficiency of hole transport, and enables the current between interconnected sub-cells to reach a balance, thereby improving the efficiency of solar cells. The second tunnel connection adopts p-Al f Ga 1-f As, 0.28≤ f ≤0.34; n-In g Ga 1-g P, 0.46≤ g ≤0.52; the thickness is in the range of 8-10nm, which is extremely thin. This is mainly to take into account the matching and stress transition with the GaAs lattice of the middle cell, so that the current between the interconnected sub-cells can reach a balance.
[0140] Back surface field layer: Considering that the materials connecting the upper and lower layers are InGaP and AlGaAs, the first back surface layer is selected with lattice matching p-(Al)0.28 Ga 0.72 ) 0.5 In 0.5 P, second back layer p-In k Ga 1-k P, 0.44≤ k ≤0.48; indicating p-doping with a concentration of 3-5×10⁻⁵. 18 cm -3 The third back surface field layer p-In m Ga 1-m As is p-doped, 0.24 ≤ m ≤0.28; its concentration is 8×10 18 cm -3 Located on the p-side of the sub-cell, its band gap is larger than that of the cell material. It acts as a shield against reflections from the back of the cell and forms a high barrier that reflects electrons back into the n-region, effectively improving the cell's light absorption rate.
[0141] Transition Transport Layer: Transition transport layer 110 adopts n-In 0.46 Ga 0.54 P gradually changes to n-In n Ga 1-n P, 0.76≤ n ≤0.8; In practical solar cell operation, internal and external forces need to be balanced. Internal forces include electric field force, carrier concentration gradient force, and thermal diffusion force. External forces include mechanical stress, temperature changes, and light intensity. Internal stress affects defect density, carrier lifetime, and mobility in the crystal; if the stress is too high or uneven, it may lead to a decrease in solar cell efficiency or a shortened lifetime. During the growth of the heterojunction epitaxial layer, internal stress is mainly caused by lattice mismatch, resulting in an unbalanced structure where the upper layer is heavier and the lower layer is lighter, forming dangling dislocations. Reducing defects in the transition layer and improving the movement and diffusion of photogenerated carriers can effectively improve the light absorption rate of the cell.
[0142] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.
[0143] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims
1. A method for fabricating an epitaxial structure of a multi-junction GaAs solar cell, characterized in that the method... include: S1: An n-type aluminum indium phosphide interconnect layer and a first optical window layer are grown on a GaAs substrate using metal-organic vapor deposition. S2: A top cell layer is grown on the first optical window layer. The top cell layer adopts a nip-type indium gallium phosphide structure. A first back surface field layer is grown above the p-type region of the top cell layer. S3: A first tunneling junction layer is grown on the first back surface field layer. The first tunneling junction layer is composed of a p-type aluminum gallium arsenide layer and an n-type aluminum gallium arsenide layer, wherein the doping concentration of the p-type aluminum gallium arsenide layer is higher than that of the n-type aluminum gallium arsenide layer. S4: A second optical window layer and a middle cell layer are grown sequentially on the first tunnel junction layer. The middle cell layer adopts a nip-type gallium arsenide structure. A second back surface field layer is grown above the p-type region of the middle cell layer. The second back surface field layer is a p-type indium gallium phosphide layer. S5: A second tunneling junction layer is grown on the second back surface field layer. The second tunneling junction layer is composed of a p-type aluminum gallium arsenide layer and an n-type indium gallium phosphide layer. S6: A transition transport layer is grown on the second tunnel junction layer. The transition transport layer adopts a structure that gradually changes from n-type indium gallium phosphide to high-indium-content n-type indium gallium phosphide. S7: The third optical window layer, the bottom cell layer, the third back surface field layer, the p-type indium gallium interconnect layer, and the protective layer are grown sequentially on the transition transport layer to complete the fabrication of the flip-chip triple junction cell epitaxial structure including the top cell, the middle cell, and the bottom cell, wherein the bottom cell layer adopts a nip-type indium gallium arsenide structure.
2. The method for fabricating a multi-junction GaAs solar cell epitaxial structure according to claim 1, characterized in that, S3 specifically includes the following steps: S31: On the surface of the first back surface field layer, trimethylgallium, trimethylaluminum, and arsine are introduced as the main reaction source, and magnesium bis(oxocero) vapor is introduced as the p-type doping source; the reaction chamber pressure is controlled at 40-60 Torr, the growth temperature is set at 680-700℃, and the deposition thickness is set to 3.5 nm to 4.5 nm for a p-type aluminum gallium arsenide layer; the diethylmagnesium flow rate is monitored and adjusted in real time to keep the magnesium doped hole concentration stably maintained at 4.8 × 10¹. 9 cm - ³ to 5.2 × 10¹ 9 cm - In the ³ range, the background carbon concentration is controlled at 1×10¹. 7 cm - ³below; S32: Maintain the continuous flow of arsine to keep the partial pressure of arsenic in the reaction chamber. While keeping the temperature of the reaction chamber constant at 680-700℃, continue to flow in trimethylgallium, and also introduce trimethylaluminum and silane. By adjusting the flow ratio of trimethylaluminum to trimethylgallium, control the aluminum composition within the range of 0.3-0.4 to grow an n-type aluminum gallium arsenide layer with a thickness of 3.5 nm to 4.5 nm. By adjusting the silane flow rate, the electron concentration of the n-type layer was set at (1.8-2.2)×10¹. 9 cm - ³, thus forming an asymmetric distribution with a doping concentration ratio of approximately 2.5:1 with the underlying p-type layer; S33: After completing the n-type layer growth, stop the introduction of trimethylaluminum, trimethylgallium and silane, retain the arsine and hydrogen atmosphere, and perform in-situ short-time annealing; gradually reduce the temperature from 690℃ to 640℃, and use heat treatment to eliminate point defects at the interface and activate the dopant; S34: After annealing, hydrogen gas is used to purge the residual byproducts in the reaction chamber. The substrate temperature is stabilized at 640°C at a controllable cooling rate of 3-5°C / s to prepare for the growth of the intermediate cell layer and complete the preparation of the first tunnel junction layer.
3. The method for fabricating a multi-junction GaAs solar cell epitaxial structure according to claim 1, characterized in that, S5 specifically includes the following steps: S51: On the second back surface field layer, the molar fraction of trimethylaluminum vapor phase is linearly reduced along the thickness direction by segmented flow programming, and a p-type aluminum gallium arsenide layer is grown at 640℃ to 660℃. Simultaneously, the flow rate of magnesia pyrocene is adjusted to make the net acceptor concentration distributed as high in the middle and low at the upper and lower interfaces. S52: On a p-type aluminum gallium arsenide layer, the indium composition increases along the thickness by linearly increasing the molar fraction of trimethyl indium vapor phase, and an n-type indium gallium phosphide layer is grown at 680°C to 700°C. The net donor concentration increases monotonically from the lower interface to the upper interface by controlling the silane flow rate. S53: Calculate the average strain of the bilayer structure based on the aluminum composition gradient function f(z) in S51 and the indium composition gradient function g(z) in S52, so that the absolute value of the integral strain of the p-type layer and the n-type layer does not exceed 0.1%, and obtain the electron tunneling probability Te and hole tunneling probability Th by solving the Schrödinger equation based on the Wentzel-Kramers-Brillouin approximation. Constrain the Th / Te ratio to the range of 0.8 to 1.2 by iteratively adjusting the doping distribution parameters in S51 and S52. S54: After completing the growth of the p-type aluminum gallium arsenide layer at 650℃, the temperature of the reaction chamber is uniformly increased to 690℃ under the protection of pure arsenic to grow the n-type indium gallium phosphide layer. During the growth process, the stress change rate dσ / dt is monitored using a thin-film stress sensor. When the measured dσ / dt deviates from the theoretical value by more than 15% within a continuous 2-nanometer thickness, the trimethylindium flow rate setpoint is finely adjusted to bring the stress evolution trajectory back into the theoretical envelope.
4. The method for fabricating the epitaxial structure of a multi-junction GaAs solar cell according to claim 3, characterized in that, S52 specifically includes the following steps: S521: Set the initial indium composition to 0.46 to 0.52 on the p-type aluminum gallium arsenide layer, and begin depositing the n-type indium gallium phosphide layer at a growth temperature of 680°C to 700°C by introducing trimethylgallium, trimethylindium, phosphine, and silane, and achieve a net donor concentration of 5 × 10¹ in the bottom region. 8 cm - ³; S522: During the growth of n-type indium gallium phosphide layers, the molar fraction of trimethyl indium vapor phase is linearly increased in a gradient of 0.02 to 0.03 per nanometer, so that the indium composition increases continuously from the initial value along the thickness direction. The net donor concentration is synchronously and monotonically increased by controlling the silane flow rate. S523: Continue growing the n-type indium gallium phosphate layer until the total thickness reaches 5.0 nm to 6.0 nm, increasing the indium composition at the top of the layer to a final value in the range of 0.46 to 0.52, and achieving a net donor concentration of 2 × 10¹ at the interface of the n-type indium gallium phosphate layer. 9 cm - ³, complete the fabrication of an n-type layer that is strain-complementary to the p-type aluminum gallium arsenide layer.
5. The method for fabricating a multi-junction GaAs solar cell epitaxial structure according to claim 1, characterized in that, S6 specifically includes the following steps: S61: Establish a three-dimensional elastic mechanics finite element model. With the lattice constant of the lower second tunnel junction layer, the lattice constant of the upper target layer, and the total thickness of the transition layer as inputs, the transition layer is discretized into multiple thin-layer units. The nonlinear S-shaped distribution function of the indium composition is obtained by minimizing the elastic energy density integral. A segmented growth rate formula is generated according to the critical thickness at each position. S62: After completing the S61 formulation, a superlattice template consisting of alternating stacks of low-indium-content InGaP layers and high-indium-content InGaP layers for 10 to 15 cycles is grown on the second tunnel junction layer, with the total thickness of the superlattice template controlled at 40 to 60 nanometers. S63: On the superlattice template grown in S62, the growth temperature is raised to 620℃ and the pressure is reduced to 50 Torr. According to the indium composition S-type distribution function and segmented growth rate formula calculated in S61, the indium composition is gradually changed by adjusting the gas phase molar ratio of trimethylindium to trimethylgallium. The root mean square roughness and power spectral density of the grown surface are monitored by a multi-wavelength laser scattering instrument. S64: During the gradient growth process of S63, the real-time measured root mean square roughness value and power spectral density curve are compared with the preset allowable surface morphology envelope. When the root mean square roughness value exceeds the upper limit of the threshold by 15% or the power spectral density shows a sharp peak in a specific spatial frequency range, the growth rate is reduced by 20% and the target indium composition is adjusted back by 0.02 to 0.
03. After maintaining the corrected state and growing for 5 nanometers, the surface morphology is re-evaluated. S65: After the gradient growth in S64 is completed, the introduction of trimethylindium and trimethylgallium is stopped. The substrate temperature is rapidly raised to 720°C in a phosphine and hydrogen atmosphere and held for a preset time. Then, it is cooled down at a rate of 5°C / s to the growth start temperature of the subsequent third optical window layer to complete the fabrication of the transition transport layer.
6. The method for fabricating a multi-junction GaAs solar cell epitaxial structure according to claim 5, characterized in that, S61 specifically includes the following steps: S611: Construct a multi-layer structure elastoplastic mechanical simulation model and initialize material parameters. Based on Vegard's law and bending coefficient, establish a nonlinear mapping relationship between indium composition and lattice constant and elastic modulus. Set bottom constraints and periodic boundary conditions, and introduce the Matthews-Blakeslee critical thickness model as a stress relaxation triggering criterion. S612: Perform nonlinear iterative calculations considering stress relaxation effects, obtain the intrinsic strain and thermal mismatch strain of each layer through thermo-mechanical coupling analysis, adopt an elastoplastic constitutive model with kinematic hardening law, introduce plastic strain increments to simulate mismatch dislocation slip when the interface equivalent stress exceeds the critical yield stress, iteratively update the stress field until the residual elastic stress is lower than the critical value and the plastic strain distribution converges. S613: Define an optimization objective function with components including the square integral of residual stress, the peak stress at the interface, and the number of layers exceeding the critical thickness criterion. Use sequential quadratic programming or genetic algorithm to iteratively correct the indium composition distribution curve, adjust the slope and curvature of the gradient region to balance stress release and growth efficiency, generate a nonlinear composition gradient process formulation, and mark the high stress gradient region.
7. The method for fabricating a multi-junction GaAs solar cell epitaxial structure according to claim 5, characterized in that, S63 specifically includes the following steps: S631: Increase the growth temperature to 620℃ and reduce the pressure to 50 Torr to prepare for the nonlinear compositional gradient growth of the transition transport layer on the superlattice template; S632: Based on the indium composition distribution function and growth rate function generated in S61, the S-shaped curve of the indium composition is gradually changed by configuring the gas phase molar ratio of trimethylindium to trimethylgallium, and the growth rate is controlled by adjusting the total group III source input flow rate according to the growth rate function. S633: During the growth process, the root mean square roughness and power spectral density of the growth surface are monitored using a multi-wavelength laser scattering instrument.
8. The method for fabricating a multi-junction GaAs solar cell epitaxial structure according to claim 5, characterized in that, S64 specifically includes the following steps: S641: During the growth of the transition layer, the root mean square roughness value and power spectral density curve of the grown surface are collected in real time using an in-situ laser scattering instrument and compared with the preset allowable surface morphology envelope. S642: When the detected root mean square roughness value exceeds 15% of the upper limit of the current growth stage threshold, or when the power spectral density curve shows a sharp peak in the spatial frequency range of 1 to 10 micrometers negative first power, a correction procedure is triggered, which instantly reduces the growth rate by 20% and finely adjusts the molar ratio of trimethylindium to trimethylgallium to bring the current target indium composition back to the lattice matching direction by 0.02 to 0.03, maintaining the corrected growth thickness.
9. The method for fabricating a multi-junction GaAs solar cell epitaxial structure according to claim 8, characterized in that, After completing the corrected growth, re-evaluate the surface morphology signal. If the root mean square roughness value and power spectral density curve return to the allowable surface morphology envelope, resume the component gradient growth according to the original formulation. If they still do not return, repeat the correction procedure up to three times. Otherwise, stop the growth and issue an alarm.
10. An epitaxial structure for a multi-junction GaAs solar cell, characterized in that, The epitaxial structure is prepared based on the method described in any one of claims 1 to 9; The epitaxial structure includes: a GaAs substrate, a first tunneling junction layer, a second tunneling junction layer, and a p-type indium gallium interconnect layer; The GaAs substrate is located at the bottom layer of the epitaxial structure; An n-type aluminum indium phosphide (AIP) bonding layer is disposed on a GaAs substrate; a first optical window layer is disposed on the n-type AIP bonding layer. The top cell absorption layer is disposed on the first optical window layer, including a first n-type region, a first intrinsic region and a first p-type region; the first back surface field layer is disposed above the first p-type region of the top cell absorption layer, and is a p-type aluminum gallium indium phosphide layer; The first tunnel junction layer is disposed on the first back surface field layer and consists of a lower p-type aluminum gallium arsenide layer and an upper n-type aluminum gallium arsenide layer; The second optical window layer is disposed on the first tunneling junction layer; The middle battery absorption layer is disposed on the second optical window layer, including a second n-type region, a second intrinsic region and a second p-type region; The second back surface field layer is disposed above the second p-type region of the middle cell absorption layer and is a p-type indium gallium phosphide layer. The second tunneling junction layer is disposed on the second back surface field layer and consists of a lower p-type aluminum gallium arsenide layer and an upper n-type indium gallium phosphide layer; the transition transport layer is disposed on the second tunneling junction layer; and the third optical window layer is disposed on the transition transport layer. The bottom cell absorption layer is set on the third optical window layer and adopts a nip-type indium gallium arsenide structure, including a third n-type region, a third intrinsic region and a third p-type region. The third back surface field layer is set above the third p-type region of the bottom cell absorption layer and is a p-type indium gallium arsenide layer. The p-type indium gallium interconnect layer is disposed on the third back surface field layer for connecting the back metal electrode; the protective layer is disposed on the p-type indium gallium interconnect layer.