Wafer edge collapse size measurement method and device, storage medium and computer equipment

Abstract

The application relates to the technical field of wafer defect measurement, and specifically discloses a wafer edge collapse size measurement method and device, a storage medium and computer equipment, the method comprising the following steps: obtaining a wafer image to be detected, detecting an edge collapse region of the wafer image to be detected, outputting an edge collapse defect region, and detecting a wafer region of the wafer image to be detected, and outputting a wafer contour; extracting a local contour segment corresponding to the edge collapse defect region from the wafer contour; determining a reference line based on a straight line where the local contour segment is located, measuring a maximum width in the edge collapse defect region and parallel to the reference line as a defect width along the wafer edge direction, and measuring a maximum depth in the edge collapse defect region and perpendicular to the reference line as a defect depth along the wafer radial direction. The application strictly aligns the measurement reference with the physical definition of manual wafer edge measurement through the local contour segment, aligns the automatic detection result with the rechecking result of the quality inspection personnel, and avoids systematic deviation caused by inconsistent measurement directions.

Description

Technical Field

[0001] This application relates to the field of wafer defect measurement technology, and in particular to a method and apparatus for measuring the dimensions of wafer edge breakage, a storage medium, and a computer device. Background Technology

[0002] Wafers are the fundamental material for manufacturing semiconductor chips, and their edge quality directly affects the yield of subsequent photolithography, dicing, and packaging processes. During wafer production, edge chipping defects are prone to occur due to processes such as dicing and grinding. Accurately measuring the size of edge chipping defects is of great significance for defect level determination, process optimization, and product shipment quality control.

[0003] Currently, the industry mainly uses manual microscopic measurement or image-processing-based automated optical inspection (AOI) systems to determine the size of chipping defects. While manually measuring the actual tangential span and radial depth of the chipping defect along the wafer edge is intuitive, it is inefficient and has poor repeatability. Existing AOI systems typically directly calculate the minimum bounding rectangle or principal axis direction of the detected chipped area. The actual output is the geometric length and width of the chipped area itself, rather than the actual tangential span and radial depth along the wafer edge. This leads to a systematic deviation between the algorithm output and the manually verified values, affecting the accuracy of chipping grade classification.

[0004] Although existing image processing and deep learning algorithms can quickly and automatically locate chipped areas and have obvious advantages such as non-contact and repeatability, how to keep the automatically measured chipped defect size consistent with the physical definition of manual measurement along the wafer edge remains a technical problem that urgently needs to be solved in chipped size measurement. Summary of the Invention

[0005] In view of this, this application provides a method and apparatus for measuring the dimensions of wafer edge chipping, a storage medium, and a computer device. Compared with traditional methods that directly calculate the minimum bounding rectangle of the chipping defect area and output its own geometric length and width as the defect width and defect depth, this application uses local contour segments to ensure that the measurement benchmark is strictly aligned with the physical definition of manual measurement along the wafer edge. This makes the automatic detection results highly consistent with the re-inspection results of quality inspectors, avoids systematic deviations caused by inconsistent measurement directions, significantly improves the accuracy of edge chipping classification and the reliability of production yield statistics, and the algorithm is simple to implement and has high computational efficiency, making it suitable for industrial online inspection environments.

[0006] According to one aspect of this application, a method for measuring the dimensions of wafer edge chipping is provided, comprising: Acquire an image of the wafer to be inspected, perform edge chipping region detection on the image of the wafer to be inspected, output the edge chipping defect region, and perform wafer region detection on the image of the wafer to be inspected, output the wafer outline; Extract the local contour fragment corresponding to the chipped edge defect region from the wafer contour; A baseline is determined based on the straight line containing the local contour segment. The maximum width parallel to the baseline in the chipped edge defect region is measured as the defect width along the wafer edge direction, and the maximum depth perpendicular to the baseline is measured as the defect depth along the wafer radial direction.

[0007] According to another aspect of this application, a wafer chipping dimension measuring device is provided, comprising: The image acquisition module is used to acquire an image of the wafer to be inspected, perform edge chipping region detection on the image of the wafer to be inspected, output the edge chipping defect region, and perform wafer region detection on the image of the wafer to be inspected, output the wafer outline. The fragment extraction module is used to extract local contour fragments corresponding to the chipped edge defect area from the wafer contour; The measurement module is used to determine a baseline based on the straight line where the local contour segment is located, measure the maximum width parallel to the baseline in the chipped edge defect region as the defect width along the wafer edge direction, and the maximum depth perpendicular to the baseline as the defect depth along the wafer radial direction.

[0008] According to another aspect of this application, a storage medium is provided that stores a computer program thereon, which, when executed by a processor, implements the above-described wafer chipping dimension measurement method.

[0009] According to another aspect of this application, a computer device is provided, including a storage medium, a processor, and a computer program stored on the storage medium and executable on the processor, wherein the processor executes the program to implement the above-described wafer chipping dimension measurement method.

[0010] By utilizing the above technical solutions, this application provides a wafer edge chipping dimension measurement method and apparatus, storage medium, and computer equipment. Compared to traditional methods that directly calculate the minimum bounding rectangle of the chipping defect area and output its own geometric length and width as the defect width and depth, this application uses local contour segments to ensure that the measurement benchmark is strictly aligned with the physical definition of manual measurement along the wafer edge. This ensures that the automatic detection results are highly consistent with the re-inspection results of quality inspectors, avoiding systematic deviations caused by inconsistent measurement directions. It significantly improves the accuracy of edge chipping classification and the reliability of production yield statistics. At the same time, the algorithm is simple to implement, has high computational efficiency, and is suitable for industrial online inspection environments.

[0011] The above description is only an overview of the technical solution of this application. In order to better understand the technical means of this application and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this application more obvious and understandable, specific embodiments of this application are given below. Attached Figure Description

[0012] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings: Figure 1 A schematic flowchart of a wafer chipping dimension measurement method provided in an embodiment of this application is shown; Figure 2 This illustration shows a schematic diagram of a wafer profile and chipping defect region provided in an embodiment of this application; Figure 3 This illustration shows a schematic diagram of a chipped edge defect area and its corresponding local contour segment before synchronous rotation, according to an embodiment of this application. Figure 4 This illustration shows a schematic diagram of a chipped edge defect area and its corresponding local contour segment after synchronous rotation, according to an embodiment of this application. Figure 5 This illustration shows a schematic diagram of a wafer chipping dimension measuring device provided in an embodiment of this application; Figure 6 A schematic diagram of the device structure of a computer device provided in an embodiment of this application is shown. Detailed Implementation

[0013] The present application will be described in detail below with reference to the accompanying drawings and embodiments. It should be noted that, unless otherwise specified, the embodiments and features described in the embodiments of the present application can be combined with each other.

[0014] This embodiment provides a method for measuring the dimensions of wafer edge chipping, such as... Figure 1 As shown, the method includes: Step 101: Obtain the wafer image to be inspected, perform edge chipping region detection on the wafer image to be inspected, output the edge chipping defect region, and perform wafer region detection on the wafer image to be inspected, output the wafer outline.

[0015] Step 102: Extract the local contour segment corresponding to the chipped edge defect area from the wafer contour.

[0016] Step 103: Determine a baseline based on the straight line where the local contour segment is located, measure the maximum width parallel to the baseline in the chipped edge defect region as the defect width along the wafer edge direction, and the maximum depth perpendicular to the baseline as the defect depth along the wafer radial direction.

[0017] This application provides a method for measuring the dimensions of wafer edge chipping. First, a high-resolution image of the wafer to be inspected is acquired, and edge chipping region detection and wafer region detection are performed on the image respectively. Edge chipping region detection can mark all suspected edge chipping pixel sets in the image based on image segmentation or deep learning models, and the output is the edge chipping defect region, that is, the location of irregular shapes such as breakage or missing corners on the wafer edge. Simultaneously, wafer region detection can use threshold segmentation, edge extraction and other algorithms to identify the overall outline of the wafer from the same image, and the output is the wafer outline, which is a closed, roughly circular boundary line. These two detections can be performed in parallel or sequentially, and can be implemented using existing methods. Figure 2 The diagram shows a wafer profile and chipping defect region provided in an embodiment of this application.

[0018] Next, based on the obtained chipping defect region, a local contour segment corresponding to the chipping defect region is extracted from the wafer profile. Since chipping usually occurs at the edge of the wafer, the chipping defect region can be closely attached to the wafer profile. Specifically, the chipping defect region can be expanded outward through a morphological dilation operation, ensuring that the expanded region intersects with the wafer profile. Then, the intersection of the expanded region and the wafer profile is calculated, and the contour line of the intersection is extracted as a local contour segment. This contour line is precisely the small segment of the wafer edge to which the chipping defect is attached, with a length of only a few millimeters or even shorter, so it can be approximated as a straight line. This local contour segment represents the local orientation of the wafer edge at the location of the chipping.

[0019] Furthermore, a baseline is determined based on the straight line containing the local contour segment. Using this baseline as a reference direction, the maximum width of the chipping defect area in the direction parallel to the baseline and the maximum depth in the direction perpendicular to the baseline are measured. Since the actual size of chipping is typically defined with the width as the tangent direction of the wafer edge (i.e., along the wafer circumference) and the depth as the direction perpendicular to the edge (i.e., radially towards the center), determining the baseline based on the straight line containing the local contour segment is equivalent to simulating the direction of a ruler along the wafer edge during manual measurement. Subsequently, the entire chipping defect area is swept along the direction of the baseline to find the longest projected distance in that direction, which is recorded as the defect width; then, the area is swept again along the direction perpendicular to the baseline to find the longest projected distance in that direction, which is recorded as the defect depth. These two values ​​correspond to the actual circumferential extension length of the wafer chipping and the severity of the chipping towards the center, respectively. The defect width along the wafer edge and the defect depth along the wafer radial direction obtained through the above measurements can be directly used for subsequent chipping level assessment and process feedback.

[0020] By applying the technical solution of this embodiment, compared with the traditional method of directly calculating the minimum bounding rectangle of the chipping defect area and outputting its own geometric length and width as the defect width and defect depth, this application uses local contour segments to make the measurement benchmark strictly aligned with the physical definition of manual measurement along the wafer edge. This ensures that the automatic detection results are highly consistent with the re-inspection results of quality inspectors, avoids systematic deviations caused by inconsistent measurement directions, significantly improves the accuracy of chipping classification and the reliability of production yield statistics. At the same time, the algorithm is simple to implement, has high computational efficiency, and is suitable for industrial online inspection environments.

[0021] Optionally, in this embodiment of the application, step 103 includes: The chipped edge defect area and the corresponding local contour segment are synchronously rotated and transformed so that the angle between the straight line containing the local contour segment and the horizontal direction is zero, thus obtaining the corrected chipped edge defect area and local contour segment. Using the horizontal direction as a baseline, the maximum width parallel to the baseline in the corrected chipping defect region is measured as the defect width along the wafer edge direction, and the maximum depth perpendicular to the baseline is measured as the defect depth along the wafer radial direction.

[0022] In this embodiment, firstly, a synchronous rotation transformation is performed on the original chipped edge defect region and its corresponding local contour segment. The goal is to make the angle between the line containing the local contour segment and the horizontal direction zero. The local contour segment is a small edge extracted from the wafer contour, and its direction is typically at an arbitrary angle θ to the horizontal direction. Rotation transformation is a geometric operation that rotates the pixels in the image by angle θ around a selected rotation center (e.g., the center of the chipped edge defect region or the midpoint of the local contour segment). Synchronous rotation means that the chipped edge defect region and the local contour segment rotate simultaneously as a whole. After rotation, the local contour segment changes from tilted to completely horizontal (i.e., the angle with the horizontal direction is zero), while the relative position and internal morphology of the chipped edge defect region remain unchanged. After this transformation, the originally complex orientation reference problem is simplified to the horizontal direction, creating a unified coordinate reference system for subsequent measurements. The two types of data obtained at this point are called the corrected chipped edge defect region and the corrected local contour segment, respectively. Figure 3 The diagram illustrates a chipped edge defect region and its corresponding local contour segment before synchronous rotation, as provided in an embodiment of this application. Figure 4 The diagram shows a schematic of a chipped edge defect area and its corresponding local contour segment after synchronous rotation, according to an embodiment of this application.

[0023] After rotation correction, the horizontal direction is directly used as the baseline. The horizontal direction can be the fixed x-axis in the image coordinate system. Since the straight line containing the local contour segment has already been aligned to the horizontal through rotation transformation, the horizontal direction now precisely represents the tangent direction of the wafer edge at the chipped defect. In other words, the direction along the wafer edge during manual measurement, after rotation transformation, coincides with the x-axis of the image. This greatly facilitates subsequent dimension extraction. There is no need to consider oblique measurements at arbitrary angles; calculations only need to be performed in the standard horizontal and vertical directions, thus avoiding complex geometric projection calculations.

[0024] Finally, the maximum width of the corrected chipping defect region parallel to the baseline (i.e., in the horizontal direction) is measured and taken as the defect width along the wafer edge direction; at the same time, the maximum depth of the corrected chipping defect region perpendicular to the baseline (i.e., in the vertical direction) is measured and taken as the defect depth along the wafer radial direction.

[0025] This embodiment of the application transforms "arbitrary direction baseline measurement" into a simple horizontal / vertical direction measurement by synchronously rotating the chipped defect region and local contour segment to the horizontal direction, resulting in high computational efficiency and ease of programming implementation. Simultaneously, rotation correction ensures that the measurement results are completely consistent with the physical definition of manual measurement along the wafer edge, eliminating projection errors caused by directional tilt, and further improving the accuracy and automation of chipped dimension measurement.

[0026] Optionally, in this embodiment, the "synchronous rotation transformation of the chipped edge defect area and the corresponding local contour segment" includes: obtaining the angle between the straight line containing the local contour segment and the horizontal direction; using the center of the chipped edge defect area or the midpoint of the local contour segment as the rotation center, constructing an affine transformation matrix for two-dimensional rotation transformation based on the angle; for each pixel in the chipped edge defect area and the local contour segment, calculating the new coordinates of the pixel based on the original coordinates of the pixel, the affine transformation matrix, and the rotation center; and generating the corrected chipped edge defect area and local contour segment based on the new coordinates of each pixel.

[0027] In this embodiment, firstly, the angle between the straight line containing the local contour segment and the horizontal direction is obtained. The local contour segment is a small edge extracted from the wafer contour. Since the wafer edge can be approximated as a straight line at a microscopic level, the local contour segment can be fitted into a straight line using methods such as least squares or Hough transform, and the angle between this straight line and the horizontal axis (x-axis) in the image coordinate system is calculated. This angle value represents the degree of inclination of the wafer edge where the chipping defect is located relative to the horizontal direction, and is a key parameter for subsequent rotation transformation, determining how much rotation is needed to straighten the edge.

[0028] Next, a rotation center can be selected, and an affine transformation matrix for the two-dimensional rotation transformation can be constructed based on the obtained angle. The rotation center can be selected as the center point of the chipped edge defect region (i.e., the geometric centroid of the chipped edge morphology) or the midpoint of a local contour segment, the purpose of which is to ensure that the chipped edge defect region does not move out of the effective range of the image after rotation. The affine transformation matrix is ​​a mathematical tool used to describe the geometric transformation of an image. For a two-dimensional rotation transformation, this matrix is ​​composed of the cosine and sine values ​​of the rotation angle, and when applied to a pixel, it can realize the function of rotating around a specified center by any angle. By constructing the affine transformation matrix using the sine and cosine values ​​of the angle, the direction and magnitude of the rotation are determined.

[0029] Next, for each pixel within the chipped edge defect area and the local contour segment, the new coordinates of each pixel after rotation are calculated based on its original coordinates, the aforementioned affine transformation matrix, and the rotation center. Specifically, first, the rotation center coordinates are subtracted from the original pixel coordinates to translate the rotation center back to the origin; then, the translated coordinates are multiplied by the affine transformation matrix to obtain temporary coordinates after rotation; finally, the rotation center coordinates are added back to obtain the final new coordinates. This process ensures that all pixels rotate around the same rotation center by the same angle, thus maintaining the relative positional relationship between the chipped edge defect area and the local contour segment.

[0030] Finally, the new coordinates of all pixels are recombined into a complete image region, generating the corrected chipping defect region and the corrected local contour segment. In the corrected chipping defect region, the originally tilted chipping shape has been straightened, and its long axis is roughly parallel to the horizontal direction; the corrected local contour segment can be approximated as a horizontal line segment. These two corrected data provide standardized input for subsequent baseline determination and dimensional measurement, simplifying the measurement task that originally required complex directional calculations into a simple projection in the horizontal / vertical direction.

[0031] This embodiment of the application, by first calculating the included angle, then constructing the affine transformation matrix, and finally performing pixel-by-pixel coordinate transformation, can accurately rotate the chipped edge defect area and local contour fragment to the horizontal direction simultaneously. Furthermore, the rotation center can be flexibly selected to avoid image shift. This method is simple to implement, has high computational accuracy, and maintains the geometric relationship between the two after rotation. This lays a reliable foundation for subsequent width and depth measurements based on the horizontal direction, significantly improving the automation level and consistency of chipped edge dimension measurement.

[0032] In an embodiment of this application, optionally, the step of "using the horizontal direction as a reference line, measuring the maximum width parallel to the reference line in the corrected chipping defect region as the defect width along the wafer edge direction, and the maximum depth perpendicular to the reference line as the defect depth along the wafer radial direction" includes: determining the minimum circumscribed rectangle of the corrected chipping defect region, wherein the sides of the minimum circumscribed rectangle are parallel to the horizontal and vertical directions respectively; taking the length of the horizontal side of the minimum circumscribed rectangle as the defect width along the wafer edge direction, and taking the length of the vertical side as the defect depth along the wafer radial direction.

[0033] In this embodiment, firstly, the minimum bounding rectangle of the corrected chipping defect region is determined. The corrected chipping defect region is obtained after rotation transformation, and its shape has been straightened. At this point, the horizontal span of the chipping corresponds to the tangential length along the wafer edge, and the vertical span corresponds to the radial depth. To accurately extract these two spans, the minimum rectangle that can completely enclose the region can be calculated, and it is mandatory that the four sides of this rectangle are parallel to the horizontal (x-axis) and vertical (y-axis) directions of the image, respectively. This rectangle is called the minimum bounding rectangle. It is different from the bounding rectangle that can be arbitrarily rotated because the rotated coordinate system has aligned the measurement direction with the coordinate axes. Therefore, the rectangle is equivalent to the rectangle aligned with the chipping edge direction, and its width is the maximum horizontal span, and its height is the maximum vertical span.

[0034] Subsequently, the length of the horizontal side of the aforementioned minimum bounding rectangle is directly taken as the defect width along the wafer edge, and the length of the vertical side is directly taken as the defect depth along the wafer radial direction. Since the horizontal direction in the corrected chipping defect region corresponds exactly to the tangent direction of the original wafer edge (after rotation and alignment), the length of the horizontal side is the actual extension dimension of the chipping edge along the wafer circumference, i.e., the width measured manually. Similarly, the vertical direction corresponds to the normal (radial) direction of the original wafer edge, and the length of the vertical side is the maximum distance the chipping edge sinks from the edge towards the center, i.e., the depth measured manually. This mapping relationship requires no additional scaling or projection calculations, making it simple and convenient.

[0035] This application's embodiments transform the measurement of complex irregular area dimensions into a simple extraction of rectangular side lengths, which is highly efficient and easy to program. Furthermore, since the sides of the smallest bounding rectangle are strictly parallel to the horizontal and vertical directions, interpolation errors caused by tilted rectangles are avoided. The measurement results exhibit good stability and repeatability, fully meeting the dual requirements of speed and accuracy for industrial online inspection, and ensuring strict consistency between automatic measurement values ​​and manual edge-measurement values.

[0036] Optionally, in this embodiment of the application, step 103 includes: A baseline is constructed using the straight line containing the local contour segment, and an outer rectangle with sides parallel to the baseline is constructed for the chipped edge defect area. The length of the side of the circumscribed rectangle parallel to the baseline is taken as the defect width along the wafer edge direction, and the length of the side perpendicular to the baseline is taken as the defect depth along the wafer radial direction.

[0037] This embodiment provides an alternative method for determining defect depth and width. First, the straight line containing the local contour segment is directly constructed as a baseline. The local contour segment is a small edge extracted from the wafer profile and approximated as a straight line using a line fitting method (such as least squares). This line represents the tangent direction of the wafer edge at the location of the chipping defect. This straight line itself is used as the baseline for subsequent measurements without any rotation or coordinate transformation. This baseline reflects the direction along the wafer edge during manual measurement, providing a directional basis for the orientation of the subsequent circumscribed rectangle.

[0038] Next, a circumscribed rectangle can be constructed that completely encloses the entire chipping defect area, and one side of the rectangle is required to be parallel to the aforementioned baseline. Since one side of the rectangle is forced to be parallel to the baseline, the orientation of the rectangle is entirely determined by the orientation of the baseline, without needing to minimize the area. This circumscribed rectangle is essentially equivalent to using the projected length of the chipping defect area along the baseline direction and its projected length in the vertical direction as the length and width of the rectangle, thus accurately capturing the actual extension range of the chipping defect along the wafer edge and the radial indentation depth.

[0039] Finally, the length of the side parallel to the baseline in the circumscribed rectangle is directly taken as the defect width along the wafer edge direction, while the length of the side perpendicular to the baseline is directly taken as the defect depth along the wafer radial direction. Since the baseline direction is consistent with the tangent direction of the wafer edge at the chipped edge, the length of the parallel side truly reflects the actual coverage length of the chipped edge in the wafer circumference direction (i.e., the width measured manually); at the same time, the length of the perpendicular side is consistent with the wafer radial direction (pointing towards the center), and its length represents the maximum distance the chipped edge indents from the edge (i.e., the depth measured manually). This direct correspondence requires no additional rotation transformation or coordinate projection, and its physical meaning is clear and self-evident.

[0040] This application avoids rotation transformation operations, eliminating the need for image pixel update calculations. Therefore, it requires less computation, executes faster, and avoids image blurring or jagged edges caused by rotation. By directly constructing an circumscribed rectangle with sides parallel to the baseline in the original coordinate system, measurement results identical to those obtained using the rotation transformation method can be obtained with minimal computational cost. This is particularly suitable for online detection scenarios with extremely high real-time requirements and relatively regular edge morphology, providing a flexible technical option for different application environments.

[0041] Optionally, in this embodiment of the application, step 102 includes: The chipped edge defect area is expanded to obtain the expanded chipped edge area; The expanded chipped area is intersected with the wafer outline, and the outline of the intersecting part is extracted as the local outline segment.

[0042] In this embodiment, the chipped edge defect region is first dilated to obtain the dilated chipped edge region. Dilation is a basic operation in digital image morphology. It involves sliding a predefined structuring element (such as a circular or square pixel template) across the chipped edge defect region, setting all pixels within the structuring element's coverage area as foreground (i.e., belonging to the chipped edge defect region), thereby expanding the boundary of the original chipped edge defect region outward. The main purpose of this operation is that, since chipped edge detection algorithms may detect tiny gaps between the chipped edge defect region and the actual wafer edge due to image noise or edge blurring, direct intersection may not yield an effective contour. By sufficiently dilating the chipped edge defect region and actively expanding its range, it can be ensured that the dilated region inevitably intersects with the wafer contour, thus creating conditions for subsequent extraction of local contour fragments. The dilated chipped edge region is significantly larger in size than the original chipped edge defect region, but its overall shape and positional information are still preserved.

[0043] Next, the expanded chipped edge region is intersected with the wafer outline, and the contour of the intersection is extracted as a local contour segment. The intersection operation calculates the logical AND of two binary image regions, retaining pixels that simultaneously belong to both the expanded chipped edge region and the wafer outline. Since the expanded region is large enough, it will have at least one or more consecutive intersection points with the wafer outline. These intersection points precisely constitute the small segment of the wafer edge to which the chipped edge defect is attached. Continuous contour segments are extracted from these intersection points, forming the local contour segment. This segment accurately reflects the local geometry of the wafer edge where the chipping occurs; it is typically a small arc with minimal curvature, which can be approximated as a straight line for subsequent baseline determination.

[0044] This application's embodiments address the issue of potential misalignment between chipped edge defect areas and wafer contours due to detection accuracy issues or image noise by actively expanding the chipped edge region. This ensures stable extraction of local contour segments and significantly improves the algorithm's robustness. Furthermore, this method directly utilizes morphological dilation and set intersection operations, eliminating the need for complex boundary tracking or distance calculations. It is simple to implement, computationally efficient, and can quickly and accurately locate the wafer edge segments corresponding to the chipped edge defect region, providing a reliable data foundation for subsequent high-precision chipped edge size measurement based on the local contour direction.

[0045] In this embodiment of the application, optionally, after the step of "intersecting the expanded chipped edge region with the wafer contour and extracting the contour of the intersecting part as the local contour segment", the method further includes: identifying the wafer edge morphology where the chipped edge defect region is located based on the local contour segment, wherein the wafer edge morphology is one of a smooth arc morphology, a slightly curved morphology, and a curvature abrupt change morphology; selecting an expansion parameter corresponding to the wafer edge morphology, wherein the expansion parameter for the smooth arc morphology, the expansion parameter for the slightly curved morphology, and the expansion parameter for the curvature abrupt change morphology decreases sequentially; re-expanding the chipped edge defect region using the expansion parameter to obtain a target expanded region; intersecting the target expanded region with the wafer contour and extracting the contour of the intersecting part to update the local contour segment.

[0046] In this embodiment, firstly, based on the initially extracted local contour segments, the wafer edge morphology of the chipping defect region is identified. This morphology is categorized into three types: smooth arc morphology, slight bending morphology, and abrupt curvature morphology. A local contour segment is a small edge extracted from the wafer contour. By calculating the degree of change in curvature or tangent angle at each point on this segment, a curvature sequence or angle sequence can be obtained. Analyzing the variance or range of this sequence allows for the determination of the wafer edge's bending characteristics. Smooth arc morphology corresponds to regions with very gentle curvature changes (e.g., normal arcs on the wafer far from the notch), slight bending morphology corresponds to regions with some curvature change but still continuous bending, while abrupt curvature morphology corresponds to regions where the local contour direction undergoes a sharp turn (usually appearing near wafer notches or flat edges). This morphology identification provides a basis for subsequent adaptive adjustment of expansion parameters.

[0047] Furthermore, based on the identified wafer edge morphology, corresponding expansion parameters are selected. The expansion parameter is largest for smooth arc morphologies, smallest for abrupt curvature morphologies, and falls between the two for slightly curved morphologies. The expansion parameter refers to the size of the structural element in the morphological expansion operation (such as the radius of a circular structural element or the side length of a square structural element). For smooth arc morphologies, since the wafer edge is very straight at this location, a larger expansion parameter ensures reliable intersection of the expanded region with the wafer contour without introducing other interference. For slightly curved morphologies, a moderate expansion parameter is used to avoid excessive expansion leading to intersections with multiple contour segments. For abrupt curvature morphologies (such as those near notches), where the edge direction changes drastically, a smaller expansion parameter must be used to prevent the expanded region from crossing the notch and extracting discontinuous local contour fragments. This parameter selection strategy achieves dynamic matching between the degree of expansion and local geometric features.

[0048] Finally, using the selected expansion parameters, the original chipping defect area is re-expanded to obtain the target expansion area. This target expansion area is then intersected with the wafer contour again, and the contour of the intersecting portion is extracted to update the original local contour segment. The first extracted local contour segment is only used for wafer edge morphology recognition and expansion parameter selection, while the second extraction is performed under optimal expansion parameters. Therefore, the updated local contour segment more accurately fits the actual wafer edge to which the chipping defect is attached, especially effectively avoiding the introduction of interfering contours near the notch due to excessive expansion in areas of abrupt curvature change. The updated local contour segment will be used for subsequent baseline determination and chipping size measurement.

[0049] This application's embodiments identify wafer edge morphology through initially extracted local contour segments and automatically select the most suitable expansion parameters for secondary extraction based on the morphology, significantly improving the accuracy and robustness of local contour segment extraction. Particularly for chipping defects near wafer notches or flat edges, smaller expansion parameters prevent local contour segments from crossing abrupt change regions, avoiding distortion of the baseline direction; while for smooth arc regions, larger expansion parameters ensure stable intersection. This adaptive strategy requires no manual parameter adjustment and can adapt to the geometric characteristics of different types of wafer edges, thus laying a more reliable local contour foundation for accurate measurement of chipping dimensions.

[0050] Optionally, in this embodiment, step 103, "determining a baseline based on the straight line where the local contour segment is located," includes: calculating the number of pixels in the local contour segment; if the number of pixels is less than a first preset threshold, skipping the step of determining the baseline based on the straight line where the local contour segment is located, and marking the chipping defect as an unmeasurable micro-chipping defect, wherein the first preset threshold is determined based on the camera pixel equivalent and the minimum measurable physical size of the chipping defect; if the number of pixels is greater than or equal to a second preset threshold, determining the baseline based on the straight line where the local contour segment is located; if the number of pixels is greater than or equal to the first preset threshold and less than the second preset threshold, determining the wafer edge morphology where the chipping defect area is located, and when the wafer edge morphology is a curvature abrupt change morphology, using a wafer-wide circular arc fitting method to obtain the wafer edge tangent direction corresponding to the chipping defect area, and determining the baseline based on the straight line where the tangent direction is located; when the wafer edge morphology is not a curvature abrupt change morphology, determining the baseline based on the straight line where the local contour segment is located.

[0051] In this embodiment, firstly, the number of pixels in a local contour segment is calculated. A local contour segment is a small edge extracted from the wafer contour, and its pixel count reflects the actual length of the segment. This value is crucial for subsequent judgment because when the chipping defect is extremely small or close to the image edge, the extracted local contour segment may only contain a few pixels. In such cases, statistical information is insufficient to reliably determine the baseline. By quantifying the number of pixels in this segment, the measurability of the chipping defect can be pre-assessed, allowing for the selection of the most suitable baseline determination strategy for different situations.

[0052] If the number of pixels is less than a first preset threshold, the step of determining the baseline based on the straight line containing the local contour segment can be skipped, and the chipping defect can be marked as an unmeasurable minor chipping defect. The first preset threshold can be an empirical value determined based on the camera pixel equivalent (i.e., the actual physical size corresponding to each pixel) and the minimum measurable physical size of the chipping defect. If the actual size of the chipping defect is already lower than the effective resolution of the detection system, any directional fitting or size measurement will produce a large error. In this case, complex calculations are no longer performed; instead, it is directly marked as "unmeasurable minor chipping defect." This avoids erroneous output and ensures that subsequent chipping defect level determination can classify such minor defects into the lowest level, conforming to the conventional processing method of industrial inspection.

[0053] If the number of pixels is greater than or equal to the second preset threshold, then the baseline can be directly determined based on the straight line containing the local contour segment. Here, the second preset threshold can be an empirical value greater than the first preset threshold, used to distinguish whether the local contour segment is long enough and located in a normal wafer edge region. When the number of pixels is sufficient, it indicates that the segment corresponds to a long and stable arc on the wafer edge, with a gentle curvature change. A reliable baseline can be obtained directly from the straight line containing the local contour segment without additional processing. This direct method requires minimal computation and is suitable for most common edge chipping situations.

[0054] If the number of pixels is greater than or equal to the first preset threshold and less than the second preset threshold, the wafer edge morphology (smooth arc, slight curvature, or abrupt curvature) of the chipping defect area can be determined first. When the determination result is an abrupt curvature, it indicates that the chipping is close to a wafer notch or flat edge. In this case, the local contour segment itself may not be able to give the correct straight line due to the interference of the notch. Therefore, the whole wafer arc fitting method is used to perform least-squares circle fitting on the complete wafer contour to obtain a standard circle. Then, based on the projection point of the geometric center point of the chipping defect area on the standard circle, the tangent direction of the wafer edge corresponding to the chipping defect area is calculated, and the straight line containing this tangent direction is used as the baseline. When the wafer edge morphology is not an abrupt curvature, the baseline is still determined based on the straight line containing the local contour segment. This hierarchical processing strategy ensures that an accurate measurement baseline can be obtained regardless of whether the chipping is located near a smooth arc or a notch.

[0055] This application's embodiments categorize the reliability of local contour segments into three intervals—low, medium, and high—by introducing two preset thresholds. Different strategies are employed for each interval, such as directly labeling them as unmeasurable micro-chipping, directly determining the baseline, or fitting the entire circle. This avoids unreliable measurements caused by excessively small local contour segments and solves the problem of baseline distortion due to proximity to notches. This method fully considers various edge scenarios that may occur in industrial inspection, automatically selecting the optimal processing path without manual intervention. It significantly improves the robustness and accuracy of the chipping size measurement system under complex wafer edge conditions, effectively ensuring the stability and reliability of the inspection results.

[0056] In this embodiment of the application, optionally, the wafer edge morphology where the chipped edge defect region is located is determined based on the following method: calculating the curvature of each point on the local contour segment to obtain a curvature sequence, and determining the wafer edge morphology where the chipped edge defect region is located based on the range or variance of the curvature sequence; or, calculating the target angle of each point on the local contour segment to obtain an angle sequence, and determining the wafer edge morphology where the chipped edge defect region is located based on the range or variance of the angle sequence, wherein the target angle is a normal angle or a tangent angle.

[0057] In this embodiment, the wafer edge morphology can be determined in the following two ways.

[0058] The first method involves calculating the curvature of each point on the local contour segment to obtain a curvature sequence. Then, the wafer edge morphology where the chipping defect area is located is determined based on the range or variance of this curvature sequence. Curvature is a geometric quantity describing the degree of curvature of a curve. For a point on the wafer edge, a larger curvature indicates a more severe curvature at that point. Each pixel on the local contour segment can have a curvature value calculated using methods such as numerical difference or circle fitting. The curvatures of all points form a curvature sequence. The range is the difference between the maximum and minimum values ​​in the sequence, while the variance measures the dispersion of each curvature value relative to the average. When the local contour segment is located in a smooth arc region, the curvatures at each point are very close, and both the range and variance are small. When located in a slightly curved region, the curvature will change to some extent, and the range and variance will be at a moderate level. When located in a region with abrupt curvature changes (such as near a wafer notch), the curvature will change drastically over a short distance, and the range and variance will increase significantly. By comparing the range or variance with one or more preset thresholds, the current wafer edge morphology can be automatically classified into three types: smooth arc morphology, slightly curved morphology, or curvature abrupt change morphology.

[0059] The second method involves calculating the target angles at each point on the local contour segment to obtain an angle sequence. The wafer edge morphology is then determined based on the range or variance of this angle sequence. The target angles can be normal angles or tangent angles. The normal angle is the angle between the normal (perpendicular to the tangent) at a point on the edge contour and the horizontal direction, while the tangent angle is the angle between the tangent at that point and the horizontal direction. They differ by 90 degrees but reflect the same trend in edge direction change. Similar to curvature, the tangent angle or normal angle of each pixel on the local contour segment is calculated sequentially to form an angle sequence. For smooth arc regions, the edge direction changes uniformly and slowly, resulting in a small range and variance in the angle sequence. For slightly curved regions, the angle changes moderately, resulting in a medium range and variance. For regions with abrupt curvature changes (such as notches), the edge direction suddenly reverses, causing a sharp jump in the angle sequence, significantly increasing the range and variance. By statistically analyzing these dispersion indicators and comparing them with thresholds, the wafer edge morphology of the current local contour segment can also be accurately identified.

[0060] The curvature sequence-based method in this application directly reflects the physical nature of the wafer edge curvature, is sensitive to curvature changes, and is suitable for scenarios requiring precise differentiation between slight curvature and abrupt curvature changes. The angle sequence-based method is simpler to calculate and equally effective in detecting directional jumps. Both methods can achieve quantitative judgment using simple statistics such as range or variance, without requiring complex curve fitting or machine learning models, resulting in high computational efficiency and ease of deployment in industrial inspection systems. Furthermore, both methods can be flexibly selected or used to verify each other based on actual application scenarios, providing a reliable morphological classification basis for subsequent adaptive expansion parameter selection or baseline determination strategies, further enhancing the adaptability and robustness of this method.

[0061] Optionally, in this embodiment, the step of "using a wafer-wide circular arc fitting method to obtain the wafer edge tangent direction corresponding to the chipping defect region" includes: performing least-squares circle fitting on all pixels on the wafer contour to obtain the center coordinates and radius of a standard circle; calculating the geometric center point of the chipping defect region, and determining the projection point of the geometric center point on the standard circle based on the center coordinates and radius; and calculating the tangent direction at the projection point based on the center coordinates and the projection point, as the wafer edge tangent direction corresponding to the chipping defect region.

[0062] In this embodiment, firstly, least-squares circle fitting is performed on all pixels on the wafer contour to obtain the center coordinates and radius of a standard circle. The wafer contour is the complete outer edge extracted from the image of the wafer to be inspected. Ideally, it should be a standard circle, but due to slight deformation, notches, or detection noise in the wafer itself, the actual contour is not a perfect arc. Least-squares circle fitting is a mathematical optimization method that finds a circle that minimizes the sum of the squares of the distances from all contour points to that circle, thus obtaining a standard circle that best represents the overall shape of the wafer, including the center coordinates and radius. This fitting process fully utilizes the global information of the entire wafer contour and is insensitive to local defects (such as chipped edges or notches). Therefore, the fitted standard circle can smooth out local disturbances such as notches, restore the ideal arc shape that the wafer should have, and provide a reliable reference for subsequently obtaining the tangent direction of the wafer edge near the notch.

[0063] Next, the geometric center point of the chipped defect region is calculated, and its projection onto a standard circle is determined based on the center coordinates and radius. The geometric center point of the chipped defect region can be the average of the coordinates of all pixels in the region (centroid), which is roughly located at the centroid of the chipped morphology and generally does not fall exactly on the wafer edge. To obtain the wafer edge tangent direction corresponding to the chipped center, the geometric center point can be projected radially onto the circumference of the standard circle. Specifically, a ray can be drawn from the center of the circle through the geometric center point; the intersection of this ray and the standard circle is the projection point. Since the center and radius of the standard circle are known, the coordinates of the projection point can be accurately calculated using analytical geometry. This is because although the actual location of the chipped defect region is close to the wafer edge, its geometric center point may deviate from the edge due to the irregularity of the chipped morphology. Radial projection can map this point back onto the ideal circumference, thus obtaining the wafer edge reference point at the location of the chipped edge.

[0064] Furthermore, based on the center coordinates and the projection point, the tangent direction at the projection point can be calculated, and this tangent direction can be used as the wafer edge tangent direction corresponding to the chipping defect region. In plane geometry, the tangent direction at any point on a circle is perpendicular to the radius direction passing through that point. Therefore, given the center coordinates and the projection point coordinates, the radius vector (projection point minus center) can be calculated first, and then the tangent direction vector can be obtained by rotating the radius vector by 90 degrees. Since the projection point is obtained by projecting the geometric center of the chipping defect region radially, this tangent direction accurately represents the ideal wafer edge tangent direction corresponding to the center position of the chipping defect region, avoiding directional distortion caused by local notches or noise. This method is particularly suitable when the chipping is close to a wafer notch, and the local contour segment may be disturbed by the notch, making it impossible to correctly determine the straight line it belongs to.

[0065] This application embodiment utilizes global information of the entire wafer profile for circle fitting, effectively smoothing out local disturbances such as notches and chipped edges, restoring the ideal geometry of the wafer. This allows for stable and accurate wafer edge tangent directions even when local profile segments are unreliable (e.g., near notch areas). This method is insensitive to local outliers and exhibits greater robustness. It is particularly suitable for edge scenarios where chipped defects are located near wafer notches or flat edges, which are difficult to handle with traditional methods. This significantly expands the applicability of this method, ensuring reliable chipped edge size measurement benchmarks under various wafer edge conditions.

[0066] Optionally, in an embodiment of this application, when there are multiple chipping defect regions in the wafer image to be inspected, the method further includes: counting the number of chipping defect regions in the wafer image to be inspected, and the defect width and defect depth corresponding to each chipping defect region; and determining the chipping level of the wafer to be inspected based on the number, and the defect width and defect depth corresponding to each chipping defect region.

[0067] In this embodiment, when multiple chipping defect regions exist in the wafer image to be inspected, the total number of chipping defect regions in the image, as well as the defect width and defect depth corresponding to each chipping defect region, can be counted. Specifically, all identified chipping defect regions can be sequentially traversed, the total number of chipping defect regions can be recorded, and the defect width and defect depth of each chipping defect region can be stored in the corresponding data list. This statistical operation establishes the basic dataset required for subsequent chipping level determination.

[0068] Next, based on the statistically obtained number of chipping defect regions, as well as the defect width and depth of each region, the chipping level of the wafer under inspection is comprehensively determined. The chipping level can be a multi-dimensional comprehensive evaluation index. For example, multiple level threshold ranges can be set: when the number of chipped defects is zero, it is directly judged as no defects; when the number is small and all defect widths and depths are less than the first threshold, it is judged as a slight level; when the number is large or any defect width or depth exceeds the second threshold, it is judged as a severe level. This approach considers both the size of the most severe chipping defect and the density of chipping defects, thus reflecting the overall edge quality of the wafer under inspection more comprehensively and scientifically.

[0069] This application's embodiments not only consider the dimensions of each chipping defect area but also introduce statistical information on the number of chipped areas, making the chipping level determination more comprehensive and refined. This avoids the quality risks caused by overlooking multiple minor defects based solely on a single maximum size. Furthermore, this method provides a flexible level assessment strategy for different application scenarios, adapting to different industry standards or customer requirements, thus enhancing its adaptability and practicality.

[0070] Furthermore, embodiments of this application can statistically determine the maximum defect width and maximum defect depth from multiple chipping defect regions, and output these two extreme values, along with detailed information such as the number of chipping defect regions and the location of each chipping defect, to a display interface or production management system for real-time viewing or offline analysis by staff. By intuitively presenting the quantitative indicators of the most severe chipping, operators can quickly grasp the key quality issues of the wafer, facilitating manual review, process traceability, or quality rating, thereby further improving the interpretability and engineering applicability of the test results.

[0071] Furthermore, as Figure 1 In a specific implementation of the method, this application provides a wafer chipping dimensional measurement device, such as... Figure 5 As shown, the device includes: The image acquisition module is used to acquire an image of the wafer to be inspected, perform edge chipping region detection on the image of the wafer to be inspected, output the edge chipping defect region, and perform wafer region detection on the image of the wafer to be inspected, output the wafer outline. The fragment extraction module is used to extract local contour fragments corresponding to the chipped edge defect area from the wafer contour; The measurement module is used to determine a baseline based on the straight line where the local contour segment is located, measure the maximum width parallel to the baseline in the chipped edge defect region as the defect width along the wafer edge direction, and the maximum depth perpendicular to the baseline as the defect depth along the wafer radial direction.

[0072] Optionally, the measurement module is used for: The chipped edge defect area and the corresponding local contour segment are synchronously rotated and transformed so that the angle between the straight line containing the local contour segment and the horizontal direction is zero, thus obtaining the corrected chipped edge defect area and local contour segment. Using the horizontal direction as a baseline, the maximum width parallel to the baseline in the corrected chipping defect region is measured as the defect width along the wafer edge direction, and the maximum depth perpendicular to the baseline is measured as the defect depth along the wafer radial direction.

[0073] Optionally, the measurement module is further configured to: Obtain the angle between the straight line containing the local contour segment and the horizontal direction; Using the center of the chipped edge defect area or the midpoint of the local contour segment as the rotation center, construct an affine transformation matrix for two-dimensional rotation transformation based on the included angle; For each pixel in the chipped edge defect area and the local contour segment, calculate the new coordinates of the pixel based on the original coordinates of the pixel, the affine transformation matrix, and the rotation center. Based on the new coordinates of each pixel, the corrected chipped edge defect area and local contour fragment are generated.

[0074] Optionally, the measurement module is further configured to: Determine the minimum bounding rectangle of the corrected chipping defect region, wherein the sides of the minimum bounding rectangle are parallel to the horizontal and vertical directions, respectively; The length of the horizontal side in the minimum circumscribed rectangle is taken as the defect width along the wafer edge direction, and the length of the vertical side is taken as the defect depth along the wafer radial direction.

[0075] Optionally, the measurement module is further configured to: A baseline is constructed using the straight line containing the local contour segment, and an outer rectangle with sides parallel to the baseline is constructed for the chipped edge defect area. The length of the side of the circumscribed rectangle parallel to the baseline is taken as the defect width along the wafer edge direction, and the length of the side perpendicular to the baseline is taken as the defect depth along the wafer radial direction.

[0076] Optionally, the fragment extraction module is used to: The chipped edge defect area is expanded to obtain the expanded chipped edge area; The expanded chipped area is intersected with the wafer outline, and the outline of the intersecting part is extracted as the local outline segment.

[0077] Optionally, the device further includes an expansion parameter selection module; the expansion parameter selection module is used for: The process involves intersecting the expanded chipped edge region with the wafer contour, extracting the contour of the intersecting part as the local contour segment, and then identifying the wafer edge morphology where the chipped edge defect region is located based on the local contour segment. The wafer edge morphology is one of a smooth arc morphology, a slightly curved morphology, and a curvature abrupt change morphology. The expansion parameters for the corresponding wafer edge shape are selected according to the wafer edge shape, wherein the expansion parameters for the smooth arc shape, the slight bending shape, and the curvature abrupt change shape decrease in sequence. The chipped edge defect area is re-expanded using the expansion parameters to obtain the target expansion area. The target expansion area is then intersected with the wafer contour, and the contour of the intersecting part is extracted to update the local contour segment.

[0078] Optionally, the measurement module is further configured to: Calculate the number of pixels in the local contour segment; If the number of pixels is less than the first preset threshold, the step of determining the baseline based on the straight line where the local contour segment is located is skipped, and the edge chipping defect is marked as an unmeasurable micro edge chipping, wherein the first preset threshold is determined based on the camera pixel equivalent and the minimum measurable physical size of the edge chipping. If the number of pixels is greater than or equal to the second preset threshold, then a baseline is determined based on the straight line where the local contour segment is located; If the number of pixels is greater than or equal to the first preset threshold and less than the second preset threshold, the wafer edge morphology where the chipped edge defect area is located is determined. When the wafer edge morphology is a curvature abrupt change, the wafer-wide arc fitting method is used to obtain the wafer edge tangent direction corresponding to the chipped edge defect area. A baseline is determined based on the straight line where the tangent direction is located. When the wafer edge morphology is not a curvature abrupt change, a baseline is determined based on the straight line where the local contour segment is located.

[0079] Optionally, the expansion parameter selection module is further configured to: The curvature of each point on the local contour segment is calculated to obtain a curvature sequence. Based on the range or variance of the curvature sequence, the wafer edge morphology where the chipped edge defect region is located is determined; or, The target angles of each point on the local contour segment are calculated to obtain an angle sequence. Based on the range or variance of the angle sequence, the wafer edge morphology of the chipped edge defect region is determined. The target angle is either a normal angle or a tangent angle.

[0080] Optionally, the measurement module is further configured to: The center coordinates and radius of the standard circle are obtained by performing least-squares circle fitting on all pixels on the wafer outline. Calculate the geometric center point of the chipped edge defect area, and determine the projection point of the geometric center point on the standard circle based on the center coordinates and radius; Based on the center coordinates and the projection point, the tangent direction at the projection point is calculated and used as the wafer edge tangent direction corresponding to the chipping defect region.

[0081] Optionally, the device further includes a chipping level determination module; the chipping level determination module is used for: When there are multiple chipped edge defect areas in the wafer image to be inspected, the number of chipped edge defect areas in the wafer image to be inspected, as well as the defect width and defect depth corresponding to each chipped edge defect area, are counted. Based on the quantity, and the defect width and defect depth corresponding to each chipping defect area, the chipping grade of the wafer to be inspected is determined.

[0082] It should be noted that other corresponding descriptions of the functional units involved in the wafer edge chipping dimensional measurement device provided in this application embodiment can be found in the following references. Figures 1 to 4 The corresponding descriptions in the method will not be repeated here.

[0083] This application also provides a computer device, which may specifically be a personal computer, a server, a network device, etc. Figure 6As shown, the computer device includes a bus, a processor, memory, and a communication interface, and may also include an input / output interface and a display device. The processor provides computing and control capabilities. The memory includes a non-volatile storage medium and internal memory. The non-volatile storage medium stores an operating system, computer programs, and a database. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage medium. The database stores location information. The network interface allows communication with external terminals via a network connection. When the computer program is executed by the processor, it implements the steps in the various method embodiments.

[0084] Those skilled in the art will understand that Figure 6 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0085] In one embodiment, a computer-readable storage medium is provided, which may be non-volatile or volatile, having stored thereon a computer program that, when executed by a processor, implements the steps in the above method embodiments.

[0086] In one embodiment, a computer program product is provided, including a computer program that, when executed by a processor, implements the steps in the above method embodiments.

[0087] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties.

[0088] Those skilled in the art will understand that all or part of the processes in the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium. When executed, the computer program can include the processes of the embodiments described above. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, etc., and are not limited to these.

[0089] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0090] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A method for measuring the dimensions of wafer edge chipping, characterized in that, include: Acquire an image of the wafer to be inspected, perform edge chipping region detection on the image of the wafer to be inspected, output the edge chipping defect region, and perform wafer region detection on the image of the wafer to be inspected, output the wafer outline; Extract the local contour fragment corresponding to the chipped edge defect region from the wafer contour; A baseline is determined based on the straight line containing the local contour segment. The maximum width parallel to the baseline in the chipped edge defect region is measured as the defect width along the wafer edge direction, and the maximum depth perpendicular to the baseline is measured as the defect depth along the wafer radial direction.

2. The method according to claim 1, characterized in that, The process of determining a baseline based on the straight line containing the local contour segment, measuring the maximum width parallel to the baseline in the chipped edge defect region as the defect width along the wafer edge direction, and the maximum depth perpendicular to the baseline as the defect depth along the wafer radial direction, includes: The chipped edge defect area and the corresponding local contour segment are synchronously rotated and transformed so that the angle between the straight line containing the local contour segment and the horizontal direction is zero, thus obtaining the corrected chipped edge defect area and local contour segment. Using the horizontal direction as a baseline, the maximum width parallel to the baseline in the corrected chipping defect region is measured as the defect width along the wafer edge direction, and the maximum depth perpendicular to the baseline is measured as the defect depth along the wafer radial direction.

3. The method according to claim 2, characterized in that, The synchronous rotation transformation of the chipped edge defect area and the corresponding local contour segment includes: Obtain the angle between the straight line containing the local contour segment and the horizontal direction; Using the center of the chipped edge defect area or the midpoint of the local contour segment as the rotation center, construct an affine transformation matrix for two-dimensional rotation transformation based on the included angle; For each pixel in the chipped edge defect area and the local contour segment, calculate the new coordinates of the pixel based on the original coordinates of the pixel, the affine transformation matrix, and the rotation center. Based on the new coordinates of each pixel, the corrected chipping defect area and local contour fragment are generated; The method of using the horizontal direction as a baseline, measuring the maximum width parallel to the baseline in the corrected chipping defect region as the defect width along the wafer edge direction, and the maximum depth perpendicular to the baseline as the defect depth along the wafer radial direction, includes: Determine the minimum bounding rectangle of the corrected chipping defect region, wherein the sides of the minimum bounding rectangle are parallel to the horizontal and vertical directions, respectively; The length of the horizontal side in the minimum circumscribed rectangle is taken as the defect width along the wafer edge direction, and the length of the vertical side is taken as the defect depth along the wafer radial direction.

4. The method according to claim 1, characterized in that, The process of determining a baseline based on the straight line containing the local contour segment, measuring the maximum width parallel to the baseline in the chipped edge defect region as the defect width along the wafer edge direction, and the maximum depth perpendicular to the baseline as the defect depth along the wafer radial direction, includes: A baseline is constructed using the straight line containing the local contour segment, and an outer rectangle with sides parallel to the baseline is constructed for the chipped edge defect area. The length of the side of the circumscribed rectangle parallel to the baseline is taken as the defect width along the wafer edge direction, and the length of the side perpendicular to the baseline is taken as the defect depth along the wafer radial direction.

5. The method according to claim 1, characterized in that, Extracting the local contour segment corresponding to the chipped edge defect region from the wafer contour includes: The chipped edge defect area is expanded to obtain the expanded chipped edge area; The expanded chipped area is intersected with the wafer outline, and the outline of the intersecting part is extracted as the local outline segment. Accordingly, after performing the intersection operation between the expanded chipped edge region and the wafer contour, and extracting the contour of the intersecting portion as the local contour segment, the method further includes: The wafer edge morphology of the chipped edge defect region is identified based on the local contour segment, wherein the wafer edge morphology is one of a smooth arc morphology, a slightly curved morphology, and a curvature abrupt change morphology; The expansion parameters for the corresponding wafer edge shape are selected according to the wafer edge shape, wherein the expansion parameters for the smooth arc shape, the slight bending shape, and the curvature abrupt change shape decrease in sequence. The chipped edge defect area is re-expanded using the expansion parameters to obtain the target expansion area. The target expansion area is then intersected with the wafer contour, and the contour of the intersecting part is extracted to update the local contour segment.

6. The method according to claim 1, characterized in that, The determination of the baseline based on the straight line containing the local contour segment includes: Calculate the number of pixels in the local contour segment; If the number of pixels is less than the first preset threshold, the step of determining the baseline based on the straight line where the local contour segment is located is skipped, and the edge chipping defect is marked as an unmeasurable micro edge chipping, wherein the first preset threshold is determined based on the camera pixel equivalent and the minimum measurable physical size of the edge chipping. If the number of pixels is greater than or equal to the second preset threshold, then a baseline is determined based on the straight line where the local contour segment is located; If the number of pixels is greater than or equal to the first preset threshold and less than the second preset threshold, the wafer edge shape where the chipped edge defect area is located is determined. When the wafer edge shape is a curvature abrupt change shape, the wafer overall arc fitting method is used to obtain the wafer edge tangent direction corresponding to the chipped edge defect area. The baseline is determined based on the straight line where the tangent direction is located. When the wafer edge shape is not a curvature abrupt change shape, the baseline is determined based on the straight line where the local contour segment is located. The method of using a whole-wafer circular arc fitting to obtain the wafer edge tangent direction corresponding to the chipping defect region includes: The center coordinates and radius of the standard circle are obtained by performing least-squares circle fitting on all pixels on the wafer outline. Calculate the geometric center point of the chipped edge defect area, and determine the projection point of the geometric center point on the standard circle based on the center coordinates and radius; Based on the center coordinates and the projection point, the tangent direction at the projection point is calculated and used as the wafer edge tangent direction corresponding to the chipping defect region.

7. The method according to claim 5 or 6, characterized in that, The wafer edge morphology where the chipped defect region is located is determined based on the following method: The curvature of each point on the local contour segment is calculated to obtain a curvature sequence. Based on the range or variance of the curvature sequence, the wafer edge morphology where the chipped edge defect region is located is determined; or, The target angles of each point on the local contour segment are calculated to obtain an angle sequence. Based on the range or variance of the angle sequence, the wafer edge morphology of the chipped edge defect region is determined. The target angle is either a normal angle or a tangent angle.

8. A wafer chipping dimension measuring device, characterized in that, include: The image acquisition module is used to acquire an image of the wafer to be inspected, perform edge chipping region detection on the image of the wafer to be inspected, output the edge chipping defect region, and perform wafer region detection on the image of the wafer to be inspected, output the wafer outline. The fragment extraction module is used to extract local contour fragments corresponding to the chipped edge defect area from the wafer contour; The measurement module is used to determine a baseline based on the straight line where the local contour segment is located, measure the maximum width parallel to the baseline in the chipped edge defect region as the defect width along the wafer edge direction, and the maximum depth perpendicular to the baseline as the defect depth along the wafer radial direction.

9. A storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the method of any one of claims 1 to 7.

10. A computer device, comprising a storage medium, a processor, and a computer program stored on the storage medium and executable on the processor, characterized in that, When the processor executes the computer program, it implements the method of any one of claims 1 to 7.

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