Diaphragm and method of manufacturing the same
By forming trenches on a silicon substrate and removing the oxide layer, a smooth, rounded wrinkled structure is created, which solves the problems of stress concentration and charge accumulation caused by the sharp corners of the diaphragm, and improves the mechanical performance and reliability of the MEMS microphone.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SEMICON MFG ELECTRONICS (SHAOXING) CORP
- Filing Date
- 2026-04-02
- Publication Date
- 2026-07-07
Smart Images
Figure CN122349078A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor technology, and more specifically to a diaphragm and a method for its fabrication. Background Technology
[0002] A MEMS (Micro-Electro-Mechanical System) microphone is a miniature sensor that converts sound signals into electrical signals. It uses a diaphragm and a backplate to form a parallel-plate capacitor. Sound waves drive the diaphragm to vibrate, changing the distance between the plates to achieve sound-to-electricity conversion. Its core performance depends on the mechanical stability of the diaphragm and the uniformity of charge between the plates. By creating a diaphragm with pleats, diaphragm stiffness can be reduced, improving sensitivity.
[0003] In related technologies, diaphragms with wrinkles are typically formed through the following steps: first, a silicon substrate is etched to form shallow trenches on the silicon substrate; then, a thermal oxide layer is formed on the silicon substrate and in the shallow trenches; and finally, a diaphragm is formed on the thermal oxide layer. Diaphragms formed through these steps will have sharp corners at the wrinkle locations, leading to stress concentration, increased susceptibility to cracking, and reliability issues. Furthermore, charge tends to accumulate at the sharp corners of the diaphragm wrinkles, causing parameter drift and reliability degradation in MEMS microphones.
[0004] Therefore, improvements are needed to at least partially address the aforementioned problems. Summary of the Invention
[0005] The summary section introduces a series of simplified concepts, which will be further explained in detail in the detailed description section. The summary section of this invention is not intended to limit the key features and essential technical features of the claimed technical solution, nor is it intended to determine the scope of protection of the claimed technical solution.
[0006] To at least partially solve the above-mentioned problems, according to a first aspect of the present invention, a method for preparing a diaphragm is provided, comprising: Provide silicon substrates; Trenches are formed on the silicon substrate; An oxide layer is formed on the upper surface of the silicon substrate and the inner wall of the trench through a thermal oxidation process; Remove the oxide layer; A dielectric layer is formed on the upper surface of the silicon substrate and in the trenches by a deposition process; A diaphragm is formed on the dielectric layer through a deposition process.
[0007] For example, the trench is formed by an isotropic dry etching process or a wet etching process.
[0008] For example, the oxide layer is removed by a wet etching process.
[0009] For example, the thickness of the oxide layer is greater than or equal to the depth of the trench; The thickness of the dielectric layer is greater than or equal to the depth of the trench.
[0010] For example, the depth of the trench is 0.3μm-1.5μm; The thickness of the oxide layer is 1μm-2μm; The thickness of the dielectric layer is 1μm-2μm.
[0011] For example, the grooves are annular and there are multiple grooves, which are arranged coaxially at intervals.
[0012] For example, the distance between adjacent trenches is equal.
[0013] For example, the dielectric layer is a silicon dioxide layer; The diaphragm is a polycrystalline silicon layer.
[0014] For example, the deposition process is a CVD process.
[0015] According to a second aspect of the present invention, a diaphragm is provided, the diaphragm being prepared by the preparation method described above.
[0016] According to the diaphragm and its preparation method of the present invention, after forming trenches on a silicon substrate, an oxide layer is first formed by thermal oxidation, and then the oxide layer is removed. This makes the corners of the trenches rounded and smooth, so that the dielectric layer and diaphragm formed by subsequent deposition processes have rounded and smooth wrinkled structures at the trench locations, rather than sharp corners. This effectively reduces the local stress value of the diaphragm, avoids stress concentration, reduces the probability of local deformation and diaphragm breakage, and improves the mechanical properties and reliability of the diaphragm. On the other hand, the rounded and smooth wrinkled structure can effectively reduce the phenomenon of local charge accumulation, and reduce parameter drift and reliability degradation caused by charge accumulation. Attached Figure Description
[0017] The following figures are included as part of this application for understanding the application. The figures illustrate embodiments of the application and their descriptions, serving to explain the apparatus and principles of the application. In the figures, Figure 1 This is a schematic diagram of a diaphragm with pleats in related technologies; Figure 2 This is a schematic flowchart of a method for preparing a diaphragm according to an embodiment of this application; Figures 3A-3F This is a cross-sectional schematic diagram of the structure corresponding to each step of the diaphragm fabrication method according to an embodiment of this application.
[0018] Explanation of reference numerals in the attached figures: 10 - Silicon substrate, 20 - Thermal oxide layer, 30 - Diaphragm; 100 - Silicon substrate, 110 - Trench, 200 - Oxide layer, 300 - Dielectric layer, 400 - Diaphragm. Detailed Implementation
[0019] The following description provides numerous specific details to offer a more thorough understanding of this application. However, it will be apparent to those skilled in the art that this application can be practiced without one or more of these details. In other instances, certain technical features well-known in the art have not been described to avoid confusion with this application.
[0020] It should be understood that this application can be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Rather, providing these embodiments will make the disclosure thorough and complete, and will fully convey the scope of this application to those skilled in the art. In the drawings, for clarity, the dimensions and relative dimensions of layers and regions may be exaggerated. The same reference numerals denote the same elements throughout.
[0021] It should be understood that although the terms first, second, third, etc., may be used to describe various elements, components, areas, layers, and / or parts, these elements, components, areas, layers, and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, area, layer, or part from another element, component, area, layer, or part. Therefore, without departing from the teachings of this application, the first element, component, area, layer, or part discussed below may be referred to as the second element, component, area, layer, or part.
[0022] Spatial relation terms such as "below," "under," "below," "under," "above," and "above" are used here for convenience to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms are intended to also include different orientations of devices in use and operation.
[0023] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of this application. When used herein, the singular forms “a,” “an,” and “the” are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising” and / or “including,” when used in this specification, identify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups. When used herein, the term “and / or” includes any and all combinations of the associated listed items.
[0024] Embodiments of the invention are described herein with reference to cross-sectional views that serve as schematic diagrams of preferred embodiments (and intermediate structures) of this application. Thus, variations in the shown shape are contemplated due to, for example, manufacturing techniques and / or tolerances. Therefore, embodiments of this application should not be limited to the specific shapes shown herein, but include shape deviations due to, for example, manufacturing processes. Consequently, the figures are substantially schematic, and their shapes are not intended to show the actual shape of the device and are not intended to limit the scope of this application.
[0025] See attached document Figure 1 A method for fabricating a wrinkled diaphragm 30 in related technologies is described. This method includes the following steps: First, a silicon substrate 10 is etched to form shallow trenches on the silicon substrate 10, thereby making the surface of the silicon substrate 10 uneven; then, a thermal oxide layer 20 is formed on the silicon substrate 10 and in the shallow trenches; then, a diaphragm 30 is formed on the thermal oxide layer 20. Since the silicon substrate 10 after forming the shallow trenches is uneven, both the thermal oxide layer 20 and the diaphragm 30 formed thereon have wrinkles, that is, a wrinkled diaphragm 30 is formed, and subsequently, a MEMS microphone can be fabricated based on this diaphragm 30. The diaphragm 30 formed through the above steps has wrinkles at the wrinkle locations (i.e.... Figure 1 A sharp corner will be generated at point A, which will cause stress concentration. During long-term vibration of the diaphragm 30, cracks will easily be generated and propagated, thereby reducing mechanical reliability and service life. In addition, the sharp corner is prone to charge accumulation, causing parameter drift and reliability degradation of MEMS microphones with this diaphragm 30.
[0026] See attached document Figure 2 A method for preparing a diaphragm according to an embodiment of this application will be described by way of example. The preparation method includes the following steps: S10: Provides a silicon substrate; S20: Forming trenches on a silicon substrate; S30: An oxide layer is formed on the upper surface of the silicon substrate and the inner wall of the trench through a thermal oxidation process; S40: Removes the oxide layer; S50: A dielectric layer is formed on the upper surface and in the trenches of a silicon substrate through a deposition process; S60: A diaphragm is formed on a dielectric layer through a deposition process.
[0027] According to the diaphragm fabrication method of this application embodiment, after forming trenches on a silicon substrate, an oxide layer is first formed through a thermal oxidation process, and then the oxide layer is removed. This makes the corners of the trenches rounded and smooth, so that the dielectric layer and diaphragm formed by the subsequent deposition process have a rounded and smooth wrinkled structure at the trench position, rather than sharp corners. This effectively reduces the local stress value of the diaphragm, avoids stress concentration, reduces the probability of local deformation and diaphragm breakage, and improves the mechanical performance and reliability of the diaphragm. On the other hand, the rounded and smooth wrinkled structure can effectively reduce the phenomenon of local charge accumulation, and reduce parameter drift and reliability degradation caused by charge accumulation.
[0028] The following is a reference to the appendix. Figures 3A-3F The method for preparing a diaphragm 400 according to an embodiment of this application (i.e., steps S10-S60 described above) will be described in detail.
[0029] In step S10, see Appendix Figure 3A A silicon substrate 100 is provided. It should be noted that the silicon substrate 100 mentioned here can be a substrate formed entirely of silicon, or a substrate with a silicon layer as the top layer, in which trenches 110 are subsequently formed.
[0030] In step S20, see Appendix Figure 3B A trench 110 is formed on the silicon substrate 100. The depth of the trench 110 is less than the thickness of the silicon substrate 100 (or the thickness of the uppermost silicon layer of the silicon substrate 100).
[0031] For example, in this embodiment, the grooves 110 are annular and there are multiple grooves 110, which are coaxially spaced (i.e., spaced around the same central axis). That is, from a top view, all the grooves 110 are annular and spaced around the same center. By setting multiple annular grooves 110 arranged coaxially, the final diaphragm 400 can have multiple folds (the cross-sectional view of the diaphragm 400 is wavy). This effectively reduces the stiffness of the diaphragm 400, improving its mechanical properties, and allows the diaphragm 400 to have a larger effective area within the same size, providing a higher signal-to-noise ratio (SNR). For example, the spacing between adjacent grooves 110 is equal, allowing the multiple folds of the final diaphragm 400 to be more evenly distributed, resulting in a more uniform stress distribution and improved mechanical properties and service life.
[0032] In some other embodiments, the groove 110 may be annular and there may be only one.
[0033] For example, in this embodiment, the trench 110 is formed by an isotropic dry etching process. That is, in step S20, a patterned mask layer is first formed on the silicon substrate 100; then, using the mask layer as a mask, the silicon substrate 100 is etched by an isotropic dry etching process to form the trench 110 on the silicon substrate 100; then, the mask layer is removed. For example, the dry etching process can be a pure vapor phase chemical etching process or a plasma etching process, etc. By using an isotropic dry etching process, a trench 110 with certain sidewalls can be formed, that is, the sidewalls of the trench 110 can have a certain curvature, so that the angle between the bottom wall and the sidewall of the trench 110 can be rounded by subsequent steps S30 and S40.
[0034] In some other embodiments, the trench 110 can also be formed by a wet etching process. The wet etching process is low-cost and requires simple equipment. It can not only form trenches 110 with certain sidewall cutouts, but also form relatively smooth trench walls (reducing their surface roughness).
[0035] In step S30, see Appendix Figure 3C An oxide layer 200, which is a silicon dioxide layer, is formed on the upper surface of the silicon substrate 100 and the inner wall of the trench 110 through a thermal oxidation process. Thermal oxidation is a core process in semiconductor manufacturing that uses high temperatures to react silicon with oxygen or water vapor to form a silicon dioxide thin film. Examples include dry oxidation, wet oxidation, or water vapor oxidation. During the thermal oxidation process, the oxidation rate is determined by the diffusion rate of the oxidant in SiO2 and the reaction rate at the Si / SiO2 interface. A more abundant oxidant supply results in a faster oxidation rate. Due to the different oxidation rates (i.e., non-uniform silicon consumption) at the mid-plane and angled positions of the bottom and sidewalls of the trench 110, the formed oxide layer 200 will ultimately have a rounded outer contour at the angled positions of the bottom and sidewalls of the trench 110.
[0036] For example, in this embodiment, the thickness of the oxide layer 200 is greater than or equal to the depth of the trench 110. By controlling the thickness of the formed oxide layer 200 to be greater than or equal to the depth of the trench 110, the oxide layer 200 can have a larger radius arc-shaped outer contour at the angle between the bottom wall and the sidewall of the trench 110. This allows for the complete oxidation and consumption of surface damage and micro-defects caused by dry etching. After the oxide layer 200 is subsequently removed, the exposed silicon surface not only has smooth arcs with large radii at the corners, but the roughness of the sidewalls and bottom wall of the entire trench 110 is also significantly reduced, achieving overall smoothness of the entire inner wall of the trench 110. For example, in this embodiment, the depth of the trench 110 can be 0.3 μm-1.5 μm, and the thickness of the oxide layer 200 can be 1 μm-2 μm.
[0037] In step S40, see Appendix Figure 3D Remove the oxide layer 200. Since the formed oxide layer 200 has an arc-shaped outer contour at the angle between the bottom wall and the side wall of the trench 110, after removing the oxide layer 200, the angle between the bottom wall and the side wall of the trench 110 is arc-shaped.
[0038] For example, in this embodiment, the oxide layer 200 is removed by a wet etching process. For instance, a wet etching solution such as HF (hydrofluoric acid) / BOE (buffered oxide etchant) is used to remove the oxide layer 200. Wet etching has extremely high etching selectivity, which will not damage the rounded silicon substrate 100. On the other hand, the microflow of the etching solution will have a slight homogenizing effect on the residual micro-defects, further reducing the surface roughness and making the arc at the corner smoother and more rounded.
[0039] In some other embodiments, an isotropic dry etching process can also be used to remove the oxide layer 200.
[0040] In step S50, see Appendix Figure 3E A dielectric layer 300 is formed on the upper surface of the silicon substrate 100 and in the trench 110 through a deposition process. For example, this deposition process can be a CVD (Chemical Vapor Deposition) process, and the dielectric layer 300 can be a silicon dioxide layer. Since the angle between the bottom wall and sidewalls of the trench 110 is rounded after the oxide layer 200 is removed, the dielectric layer 300 formed in step S50 will form smooth, rounded wrinkles at the edges of the trench 110.
[0041] For example, in this embodiment, the deposition process is PECVD (Plasma-Enhanced Chemical Vapor Deposition), which uses tetraethyl orthosilicate (TEOS) as a precursor to deposit a silicon dioxide thin film on the upper surface of the silicon substrate 100 and in the trench 110. PECVD process has good coverage uniformity for complex morphologies and can achieve precise thickness control.
[0042] For example, the thickness of the dielectric layer 300 is greater than or equal to the depth of the trench 110. By setting the thickness of the dielectric layer 300 within the aforementioned range, its wrinkles can have a better morphology and be more rounded and smooth, so that the diaphragm 400 subsequently formed thereon can have a more rounded and smooth wrinkled structure. For example, in this embodiment, the thickness of the dielectric layer 300 is 1μm-2μm.
[0043] In step S60, see Appendix Figure 3F A diaphragm 400 is formed on the dielectric layer 300 using a deposition process. For example, this deposition process can be a CVD process, and the diaphragm 400 can be a polycrystalline silicon layer. Since the dielectric layer 300 forms smooth, rounded wrinkles at the edges of the trench 110, the diaphragm 400 formed on the dielectric layer 300 also has smooth, rounded wrinkles (rather than sharp corners) at the trench 110. This effectively reduces the local stress value of the diaphragm 400, avoids stress concentration, reduces the probability of local deformation and rupture of the diaphragm 400, and improves the mechanical properties and reliability of the diaphragm 400. Furthermore, the smooth, rounded wrinkle structure effectively reduces local charge accumulation, minimizing parameter drift and reliability degradation caused by charge accumulation.
[0044] Subsequently, a MEMS microphone can be fabricated based on this diaphragm 400. The specific process is well known to those skilled in the art and will not be elaborated here. The MEMS microphone fabricated based on this diaphragm 400 can achieve significant improvements in reliability and sensitivity.
[0045] This application also provides a diaphragm, namely a diaphragm with a pleated structure, which is prepared by the preparation method described above.
[0046] Although exemplary embodiments have been described herein with reference to the accompanying drawings, it should be understood that the above exemplary embodiments are merely illustrative and are not intended to limit the scope of this application. Various changes and modifications can be made therein by those skilled in the art without departing from the scope and spirit of this application. All such changes and modifications are intended to be included within the scope of this application as claimed in the appended claims.
[0047] Numerous specific details are set forth in the specification provided herein. However, it will be understood that embodiments of this application may be practiced without these specific details. In some instances, well-known methods, structures, and techniques have not been shown in detail so as not to obscure the understanding of this specification.
[0048] Similarly, it should be understood that, in order to streamline this application and aid in understanding one or more of the various inventive aspects, features of this application may sometimes be grouped together in a single embodiment, figure, or description thereof in the description of exemplary embodiments of this application. However, this approach should not be construed as reflecting an intention that the claimed application requires more features than are expressly recited in each claim. Rather, as reflected in the corresponding claims, its inventive point lies in solving the corresponding technical problem with features fewer than all features of a single disclosed embodiment. Therefore, the claims following the detailed description are hereby expressly incorporated into that detailed description, wherein each claim itself is a separate embodiment of this application.
[0049] Those skilled in the art will understand that, apart from the mutual exclusion of features, all features disclosed in this specification (including the accompanying claims, abstract, and drawings) and all processes or units of any method or apparatus so disclosed can be combined in any combination. Unless otherwise expressly stated, each feature disclosed in this specification (including the accompanying claims, abstract, and drawings) may be replaced by an alternative feature serving the same, equivalent, or similar purpose.
[0050] Furthermore, those skilled in the art will understand that although some embodiments described herein include certain features but not others included in other embodiments, combinations of features from different embodiments are intended to be within the scope of this application and form different embodiments. For example, in the claims, any one of the claimed embodiments can be used in any combination.
[0051] It should be noted that the above embodiments are illustrative of this application and not restrictive of this application, and that those skilled in the art can devise alternative embodiments without departing from the scope of the appended claims.
Claims
1. A method for preparing a diaphragm, characterized in that, include: Provide silicon substrates; Trenches are formed on the silicon substrate; An oxide layer is formed on the upper surface of the silicon substrate and the inner wall of the trench through a thermal oxidation process; Remove the oxide layer; A dielectric layer is formed on the upper surface of the silicon substrate and in the trenches by a deposition process; A diaphragm is formed on the dielectric layer through a deposition process.
2. The preparation method according to claim 1, characterized in that, The trenches are formed by isotropic dry etching or wet etching processes.
3. The preparation method according to claim 1, characterized in that, The oxide layer was removed by a wet etching process.
4. The preparation method according to claim 1, characterized in that, The thickness of the oxide layer is greater than or equal to the depth of the trench; The thickness of the dielectric layer is greater than or equal to the depth of the trench.
5. The preparation method according to claim 4, characterized in that, The depth of the trench is 0.3μm-1.5μm; The thickness of the oxide layer is 1μm-2μm; The thickness of the dielectric layer is 1μm-2μm.
6. The preparation method according to claim 1, characterized in that, The grooves are annular and there are multiple grooves, which are arranged coaxially at intervals.
7. The preparation method according to claim 6, characterized in that, The distance between adjacent trenches is equal.
8. The preparation method according to claim 1, characterized in that, The dielectric layer is a silicon dioxide layer; The diaphragm is a polycrystalline silicon layer.
9. The preparation method according to claim 1, characterized in that, The deposition process is a CVD process.
10. A diaphragm, characterized in that, The diaphragm is prepared by the preparation method according to any one of claims 1-9.