A frequency conversion circuit structure with double-sided integrated schottky diode and a preparation method thereof

Abstract

This invention discloses a frequency converter circuit structure and its fabrication method for a double-sided integrated Schottky diode, relating to the field of terahertz high-frequency devices and integrated circuit fabrication technology. The structure includes a first Schottky die, a second Schottky die, and a suspended microstrip metal circuit layer. Both dies have a front side that forms a Schottky junction. The first Schottky die is positioned with the suspended microstrip metal circuit layer attached to its first back side, and the second Schottky die is positioned with the suspended microstrip metal circuit layer attached to its second back side. The two dies are mirror-symmetrical about the suspended microstrip metal circuit layer. This allows for a "back-to-back" stacking of the two Schottky dies through three-dimensional integration, increasing the number of Schottky junctions without significantly increasing the two-dimensional area of ​​the circuit. This effectively improves the power handling capability and integration density of the frequency converter circuit, while optimizing energy coupling efficiency, making it particularly suitable for high-power frequency doubling sources in the terahertz band.

Description

Technical Field

[0001] This invention belongs to the field of terahertz high-frequency device and integrated circuit fabrication technology, specifically relating to a frequency conversion circuit structure of a double-sided integrated Schottky diode and its fabrication method. Background Technology

[0002] Terahertz (THz) waves typically refer to electromagnetic waves with frequencies ranging from 0.1 THz to 10 THz, falling between microwaves and infrared light. As a result, they possess unique physical characteristics, including high resolution, large communication bandwidth, strong penetration capability, and low photon energy. Consequently, they have extremely important academic value and practical prospects in fields such as wireless communication, radar detection, biomedical imaging, and radio astronomy.

[0003] Currently, terahertz transceiver systems typically employ a superheterodyne architecture, with core functional modules including frequency multipliers, mixers, amplifiers, and filters. Among these key components, the Schottky Barrier Diode (SBD, hereinafter referred to as Schottky diode or Schottky die) has become the most widely used core device in the field of terahertz frequency conversion technology due to its advantages such as simple structure, low noise, small parasitic parameters, high operating frequency, good stability, and ability to operate at room temperature. However, the application of existing Schottky diodes in the terahertz frequency band still faces several technical bottlenecks, mainly reflected in the following points (1) to (3).

[0004] (1) Limited power capacity of a single Schottky diode: The power handling and heat dissipation capabilities of a single Schottky diode are limited by the materials and device structure, and there is an upper limit to the saturation power. As the operating frequency increases to the submillimeter wave or even terahertz band, the circuit size shrinks dramatically, and the power handling and heat dissipation capabilities of small-sized Schottky diodes decrease significantly, making it difficult to meet the high power output requirements. (2) Inherent limitations of the material system: The mainstream material systems for fabricating Schottky diodes include GaAs and GaN. GaAs has the advantage of high electron mobility, which can effectively reduce parasitic resistance, making it particularly suitable for high-frequency inverter circuits. However, its narrow bandgap and low thermal conductivity limit its power capacity, especially in the frequency band above 500 GHz, where power handling and thermal management capabilities are further degraded. Conversely, GaN has excellent power handling potential due to its high breakdown field strength and high thermal conductivity. However, its relatively low electron mobility significantly reduces its inverter efficiency in the high-frequency band, weakening its high power advantage. In addition, the limitations of tolerating power and / or efficiency also restrict the final power output performance.

[0005] (3) Traditional power combining schemes have limitations: multi-channel and spatial power combining actually uses multiple Schottky diode chips, which significantly increases the effective two-dimensional area of ​​the chip and the volume of the frequency multiplier module. That is, the output power is increased at the expense of integration. At the same time, the method of connecting multiple Schottky diodes in series or parallel on the plane to form a diode chain is limited by the terahertz wavelength. There is a large phase difference between diodes that are far apart, and the electromagnetic field distribution between multiple chips is uneven, which leads to the failure of on-chip power combining. Therefore, there is always an upper limit to the number of junctions that can be added in a single plane.

[0006] In summary, how to improve the power handling capability of Schottky diodes while maintaining high integration and optimizing energy coupling efficiency has become a key issue that urgently needs to be addressed in the development of terahertz solid-state source technology. Summary of the Invention

[0007] The purpose of this invention is to provide a frequency conversion circuit structure and fabrication method for a double-sided integrated Schottky diode, in order to solve the problems of limited single-tube power capacity, inherent limitations of material systems, and / or the fact that traditional power combining schemes sacrifice integration when applied in the terahertz frequency band.

[0008] To achieve the above objectives, the present invention adopts the following technical solution: In a first aspect, a frequency converter circuit structure with a double-sided integrated Schottky diode is provided, including a first Schottky die, a second Schottky die and a suspended microstrip metal circuit layer, wherein the first Schottky die has a first front side and a first back side, the second Schottky die has a second front side and a second back side, and Schottky junctions are formed on the first front side and the second front side respectively. The first Schottky die is disposed with the first back side attached to one side of the suspended microstrip metal circuit layer, and the second Schottky die is disposed with the second back side attached to the other side of the suspended microstrip metal circuit layer, and the first Schottky die and the second Schottky die are mirror-symmetrical about the suspended microstrip metal circuit layer.

[0009] Based on the above-mentioned invention, a novel integrated frequency converter circuit scheme is provided that integrates more Schottky junctions through a three-dimensional method. This scheme includes a first Schottky die, a second Schottky die, and a suspended microstrip metal circuit layer. The first Schottky die has a first front side and a first back side, and the second Schottky die has a second front side and a second back side. Schottky junctions are formed on the first and second front sides respectively. The first Schottky die is positioned with the suspended microstrip metal circuit layer attached to the side of its first back side, and the second Schottky die is positioned with the suspended microstrip metal circuit layer attached to the other side of its second back side. The two Schottky dies are mirror-symmetrical about the suspended microstrip metal circuit layer. This allows for a "back-to-back" stacking of two Schottky dies through three-dimensional integration, increasing the number of Schottky junctions without significantly increasing the two-dimensional area of ​​the circuit. This effectively improves the power handling capability and integration of the frequency converter circuit, while optimizing energy coupling efficiency. It is particularly suitable for high-power frequency doubling sources in the terahertz band, facilitating practical application and promotion.

[0010] In one possible design, both the first Schottky die and the second Schottky die include a substrate layer, a heavily doped semiconductor layer, and a lightly doped semiconductor layer stacked sequentially from the back side to the front side, wherein the lightly doped semiconductor layer participates in the formation of the Schottky junction.

[0011] In one possible design, the suspended microstrip metal circuit layer is in ohmic contact with the heavily doped semiconductor layer through a first metal via penetrating the substrate layer.

[0012] In one possible design, the suspended microstrip metal circuit layer is electrically connected to the cathode metal pad or anode metal pad of the target die via a second metal via that passes sequentially through the substrate layer, the heavily doped semiconductor layer, and the lightly doped semiconductor layer, wherein the target die refers to the first Schottky die or the second Schottky die.

[0013] In one possible design, the substrate layer, the heavily doped semiconductor layer, and the lightly doped semiconductor layer each satisfy the following characteristics: The substrate layer is made of semi-insulating GaAs, semi-insulating GaN, SiC or sapphire. The heavily doped semiconductor layer has a doping concentration greater than 1×10⁻⁶. 18 Each n+ GaAs or n+ GaN per cubic centimeter, with a thickness of 0.5 μm to 5 μm; The lightly doped semiconductor layer has a doping concentration of 1×10⁻⁶. 16 ~1×10 per cubic centimeter 18 Each n-GaAs or n-GaN per cubic centimeter has a thickness of 50 nm to 1 μm.

[0014] In one possible design, the first Schottky die and the second Schottky die are both Schottky dies having a single junction or at least two junctions connected in series and / or parallel in a plane.

[0015] In one possible design, the suspended microstrip metal circuit layer includes a plurality of local circuit elements, wherein the plurality of local circuit elements include at least one of an input probe, an output probe, a filter, an impedance matching line, and a beam lead.

[0016] In one possible design, the first back side of the first Schottky die and the second back side of the second Schottky die are bonded together by an interlayer bonding method, and the suspended microstrip metal circuit layer is located between the first Schottky die and the second Schottky die.

[0017] Secondly, a method for fabricating a frequency converter circuit structure with a double-sided integrated Schottky diode as described in the first aspect is provided, comprising the following steps: Schottky devices are fabricated on the front side of the first wafer to form a first Schottky die, and Schottky devices are fabricated on the front side of the second wafer to form a second Schottky die. The back side of the first wafer is thinned to obtain a first thinned wafer, and the back side of the second wafer is thinned to obtain a second thinned wafer. Metal vias belonging to the first Schottky die are formed on the back side of the first thinned wafer, and metal vias belonging to the second Schottky die are formed on the back side of the second thinned wafer. Suspended microstrip metal circuit layers electrically connected to the metal vias are fabricated on the back side of the first thinned wafer and the back side of the second thinned wafer, respectively. The back side of the first Schottky die and the back side of the second Schottky die are fixed together by a bonding process, and the first Schottky die and the second Schottky die are mirror-symmetrical about the suspended microstrip metal circuit layer.

[0018] In one possible design, a metal via belonging to the first Schottky die is formed on the back side of the first thinned wafer, and a metal via belonging to the second Schottky die is formed on the back side of the second thinned wafer, including: First, a dry etching process or a wet etching process is used to remove the substrate layer corresponding to the location of the first via on the back side of the target thinned wafer until the heavily doped semiconductor layer corresponding to the location of the first via is exposed, forming the first via. Then, metal is deposited in the first via to form a first metal via belonging to the target Schottky die and ohmically contacting the heavily doped semiconductor layer. The target thinned wafer refers to either the first thinned wafer or the second thinned wafer. When the target thinned wafer refers to the first thinned wafer, the target Schottky die refers to the first Schottky die. When the target thinned wafer refers to the second thinned wafer, the target Schottky die refers to the second Schottky die. And / or, firstly, using a dry etching process or a wet etching process, the substrate layer, heavily doped semiconductor layer, and lightly doped semiconductor layer corresponding to the location of the second via to be formed are removed on the back side of the target thinned wafer until the cathode metal pad or anode metal pad corresponding to the location of the second via to be formed is exposed, forming the second via. Then, metal is deposited in the second via to form a second metal via belonging to the target Schottky die and electrically connected to the cathode metal pad or the anode metal pad. The target thinned wafer refers to the first thinned wafer or the second thinned wafer. When the target thinned wafer refers to the first thinned wafer, the target Schottky die refers to the first Schottky die. When the target thinned wafer refers to the second thinned wafer, the target Schottky die refers to the second Schottky die. And / or, firstly, using a dry etching process or a wet etching process, remove the lightly doped and heavily doped semiconductor layers corresponding to the location of the third via on the front side of the target thinned wafer until the substrate layer corresponding to the location of the third via is exposed. Then, using a dry etching process or a wet etching process, remove the substrate layer corresponding to the location of the second via on the back side of the target thinned wafer until the cathode or anode metal pad corresponding to the location of the second via is exposed, forming the second via. Finally, deposit [material] within the second via. Metal is used to form a second metal via that belongs to the target Schottky die and is electrically connected to the cathode metal pad or the anode metal pad. The target thinned wafer refers to the first thinned wafer or the second thinned wafer. When the target thinned wafer refers to the first thinned wafer, the target Schottky die refers to the first Schottky die. When the target thinned wafer refers to the second thinned wafer, the target Schottky die refers to the second Schottky die. The third via location to be formed covers the second via location to be formed.

[0019] In one possible design, the bonding process employs an intermediate layer bonding method.

[0020] The beneficial effects of the above scheme are: (1) This invention provides a new integrated frequency converter circuit scheme that integrates more Schottky junctions through a three-dimensional method, which includes a first Schottky die, a second Schottky die and a suspended microstrip metal circuit layer. The first Schottky die has a first front side and a first back side, and the second Schottky die has a second front side and a second back side. Schottky junctions are formed on the first front side and the second front side respectively. The first Schottky die is set with the suspended microstrip metal circuit layer attached to the side of the first back side, and the second Schottky die is set with the suspended microstrip metal circuit layer attached to the other side of the second back side. The two Schottky dies are mirror symmetrical about the suspended microstrip metal circuit layer. In this way, the two Schottky dies can be stacked back to back through a three-dimensional integration method, which increases the number of Schottky junctions without significantly increasing the two-dimensional area of ​​the circuit. This effectively improves the power processing capability and integration of the frequency converter circuit, while optimizing the energy coupling efficiency. It is particularly suitable for high-power frequency doubling sources in the terahertz band. (2) It can also break the dependence on material system, so that it is no longer limited to mainstream materials such as GaAs and GaN, and can improve the input power and energy coupling efficiency of waveguide to diode pre-stage drive, and ultimately achieve higher output power, which is convenient for practical application and promotion. Attached Figure Description

[0021] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0022] Figure 1 This is a cross-sectional view of the frequency conversion circuit structure of the double-sided integrated Schottky diode provided in the embodiment of this application.

[0023] Figure 2 This is a schematic cross-sectional view of the structure of the Schottky die provided in the embodiments of this application, showing the stacked layers from the back to the front.

[0024] Figure 3 Example diagrams showing the results of finite element simulation of the frequency converter circuit structure provided in this application embodiment.

[0025] Figure 4 This is a cross-sectional view of a first variant of the frequency conversion circuit structure of the double-sided integrated Schottky diode provided in the embodiments of this application.

[0026] Figure 5This is a cross-sectional view of a second variant of the frequency conversion circuit structure of the double-sided integrated Schottky diode provided in the embodiments of this application.

[0027] Figure 6 This is a cross-sectional view of a third variant of the frequency conversion circuit structure of the double-sided integrated Schottky diode provided in the embodiments of this application.

[0028] Figure 7 This is a cross-sectional view of a fourth variant of the frequency conversion circuit structure of the double-sided integrated Schottky diode provided in the embodiments of this application.

[0029] Figure 8 This is a schematic diagram illustrating the multi-step fabrication process of the frequency conversion circuit structure of the double-sided integrated Schottky diode provided in the embodiments of this application.

[0030] In the above figures: 1-First Schottky die; 2-Second Schottky die; 3-Suspended microstrip metal circuit layer; 100-Substrate layer; 200-Heavily doped semiconductor layer; 300-Lightly doped semiconductor layer; 401-First metal via; 402-Second metal via. Detailed Implementation

[0031] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the present invention will be briefly introduced below in conjunction with the accompanying drawings and descriptions of the embodiments or the prior art. Obviously, the following description of the structure of the accompanying drawings is only some embodiments of the present invention. For those skilled in the art, other embodiments can be obtained based on these embodiments without creative effort. It should be noted that the description of these embodiments is for the purpose of helping to understand the present invention, but does not constitute a limitation of the present invention.

[0032] It should be understood that although the terms "first" and "second", etc., may be used herein to describe various objects, these objects should not be limited by these terms. These terms are only used to distinguish one object from another. For example, the first object may be referred to as the second object, and similarly, the second object may be referred to as the first object, without departing from the scope of the exemplary embodiments of the invention.

[0033] It should be understood that the term "and / or" that may appear in this document is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can mean: A exists alone, B exists alone, or A and B exist simultaneously. Another example is A, B and / or C, which can mean that any one of A, B, and C or any combination thereof exists. The term " / and" that may appear in this document describes another relationship between related objects, indicating that two relationships can exist. For example, A / and B can mean: A exists alone or A and B exist simultaneously. In addition, the character " / " that may appear in this document generally indicates that the related objects before and after it are in an "or" relationship.

[0034] Example 1 like Figures 1-2 As shown, the frequency conversion circuit structure of the double-sided integrated Schottky diode provided in this embodiment includes, but is not limited to, a first Schottky die 1, a second Schottky die 2, and a suspended microstrip metal circuit layer 3. The first Schottky die 1 has a first front side and a first back side, and the second Schottky die 2 has a second front side and a second back side. Schottky junctions are formed on the first front side and the second front side, respectively. The first Schottky die 1 is arranged such that one side of the suspended microstrip metal circuit layer 3 is attached to the first back side, and the second Schottky die 2 is arranged such that the other side of the suspended microstrip metal circuit layer 3 is attached to the second back side, and the first Schottky die 1 and the second Schottky die 2 are mirror-symmetrical about the suspended microstrip metal circuit layer 3.

[0035] like Figures 1-2 As shown, in the specific structure of the frequency converter circuit of the double-sided integrated Schottky diode, the first Schottky die 1 and the second Schottky die 2 respectively adopt existing Schottky diode structures. They can both be Schottky dies with a single junction (since the first Schottky die 1 and the second Schottky die 2 need to be mirror-symmetrical about the suspended microstrip metal circuit layer 3, the two dies need to be "both"), or they can both be Schottky dies with at least two junctions (e.g., 2 to 128 junctions, typically 4 or 8 junctions) connected in series and / or parallel in the plane; specifically, as Figure 2As shown, both the first Schottky die 1 and the second Schottky die 2 include a substrate layer 100, a heavily doped semiconductor layer 200, and a lightly doped semiconductor layer 300 stacked sequentially from the back side to the front side, wherein the lightly doped semiconductor layer 300 participates in the formation of the Schottky junction. The suspended microstrip metal circuit layer 3 is used to form an integrated circuit connection relationship based on the first Schottky die 1 and the second Schottky die 2, specifically including, but not limited to, multiple local circuit elements, wherein the multiple local circuit elements include, but are not limited to, at least one of the following: input probe, output probe, filter, impedance matching line, and Beam lead. To ensure good electrical connection between the suspended microstrip metal circuit layer 3 and the first Schottky die 1 and the second Schottky die 2, preferably, the suspended microstrip metal circuit layer 3 is in 0-ohm contact with the heavily doped semiconductor layer 200 through a first metal via 401 penetrating the substrate layer 100, and the suspended microstrip metal circuit layer 3 is electrically connected to the cathode metal pad or anode metal pad of the target die through a second metal via 402 penetrating the substrate layer 100, the heavily doped semiconductor layer 200 and the lightly doped semiconductor layer 300 in sequence, wherein the target die refers to the first Schottky die 1 or the second Schottky die 2.

[0036] Based on the above frequency converter circuit structure, it can be seen that the number of Schottky junctions can be doubled through three-dimensional integration, and the following results were obtained through finite element simulation: Figure 3 As shown, the simulated peak output power of the double-sided SBD scheme is significantly higher than that of the single-sided SBD scheme. Furthermore, the increase in simulated peak output power also increases significantly with the increase in the average drive power of a single junction. Additionally, the energy conversion efficiency of the waveguide (TE10 mode)-diode (quasi-TEM mode) or suspended microstrip metal circuit (quasi-TEM mode)-diode (quasi-TEM mode) can be precisely controlled by adjusting the thickness of the doped semiconductor layer after thinning. (This effect is due to the increased number of Schottky junctions, which allows for higher power handling capacity under the same thermal tolerance.) Therefore, without significantly increasing the two-dimensional area of ​​the circuit, more Schottky junctions can be integrated through three-dimensional integration, improving the power handling capacity of the frequency converter. Simultaneously, it reduces the risk of energy leakage or loss in complex waveguide structures, which is beneficial for the miniaturization of transceiver systems. Furthermore, the frequency converter circuit structure with double-sided integrated Schottky diodes is particularly suitable for high-power frequency doubling sources in the terahertz band.

[0037] Because the power handling capability of the aforementioned frequency converter circuit structure is effectively improved, it also eliminates the dependence on material systems, freeing it from being limited to mainstream materials such as GaAs and GaN. Of course, to further improve the power handling capability of the aforementioned frequency converter circuit structure, in this embodiment, the substrate layer 100, the heavily doped semiconductor layer 200, and the lightly doped semiconductor layer 300 preferably satisfy the following characteristics: the substrate layer 100 is made of semi-insulating GaAs, semi-insulating GaN, SiC, or sapphire; the heavily doped semiconductor layer 200 uses a doping concentration greater than 1×10⁻⁶. 18 The lightly doped semiconductor layer 300 has n+GaAs or n+GaN per cubic centimeter and a thickness of 0.5 μm to 5 μm; the lightly doped semiconductor layer 300 has a doping concentration of 1 × 10⁻⁶. 16 ~1×10 per cubic centimeter 18 Each n-GaAs or n-GaN layer has a density of 50 nm to 1 μm per cubic centimeter. Furthermore, the first back side of the first Schottky die 1 and the second back side of the second Schottky die 2 are preferably bonded together via an interlayer bonding method, with the suspended microstrip metal circuit layer 3 located between the first Schottky die 1 and the second Schottky die 2; and the frequency conversion circuit structure of the double-sided integrated Schottky diode, in addition to the above... Figure 1 In addition to the above, other methods may also be used, but are not limited to, such as Figures 4-7 The four variant example structures are shown.

[0038] In summary, the frequency converter circuit structure using the double-sided integrated Schottky diode provided in this embodiment has the following technical advantages: (1) This embodiment provides a new integrated frequency converter circuit scheme that integrates more Schottky junctions through a three-dimensional method, which includes a first Schottky die, a second Schottky die and a suspended microstrip metal circuit layer. The first Schottky die has a first front side and a first back side, and the second Schottky die has a second front side and a second back side. Schottky junctions are formed on the first front side and the second front side respectively. The first Schottky die is set with the suspended microstrip metal circuit layer attached to one side of the first back side, and the second Schottky die is set with the suspended microstrip metal circuit layer attached to the other side of the second back side. The two Schottky dies are mirror symmetrical about the suspended microstrip metal circuit layer. In this way, the two Schottky dies can be stacked back to back through a three-dimensional integration method, which increases the number of Schottky junctions without significantly increasing the two-dimensional area of ​​the circuit. This effectively improves the power processing capability and integration of the frequency converter circuit, while optimizing the energy coupling efficiency. It is particularly suitable for high-power frequency doubling sources in the terahertz band. (2) It can also break the dependence on material system, so that it is no longer limited to mainstream materials such as GaAs and GaN, and can improve the input power and energy coupling efficiency of waveguide to diode pre-stage drive, and ultimately achieve higher output power, which is convenient for practical application and promotion.

[0039] Example 2 Based on the technical solution of Embodiment 1, this embodiment also provides a process method for fabricating the frequency conversion circuit structure of the double-sided integrated Schottky diode described in Embodiment 1, such as... Figure 8 As shown, the process method includes, but is not limited to, the following steps S1 to S5.

[0040] S1. A Schottky device is fabricated on the front side of the first wafer to form a first Schottky die, and a Schottky device is fabricated on the front side of the second wafer to form a second Schottky die.

[0041] In step S1, the fabrication process of the Schottky device is a prior art, such as completing the fabrication of the front Schottky structure through steps such as ohmic metal evaporation, Schottky metal evaporation, dielectric layer passivation, mesa isolation, and air bridge fabrication.

[0042] S2. Thin the back side of the first wafer to obtain a first thinned wafer, and thin the back side of the second wafer to obtain a second thinned wafer.

[0043] In step S2, as Figure 5 As shown, the substrate layer is thinned, which can be achieved through processes such as dry etching or wet etching.

[0044] S3. A metal via belonging to the first Schottky die is formed on the back side of the first thinned wafer, and a metal via belonging to the second Schottky die is formed on the back side of the second thinned wafer.

[0045] In step S3, the metal via refers to a via filled with metal, which may include, but is not limited to, the first metal via 401 and the second metal via 402 described in Embodiment 1. Specifically, metal vias belonging to the first Schottky die are formed on the back side of the first thinned wafer, and metal vias belonging to the second Schottky die are formed on the back side of the second thinned wafer, including but not limited to: firstly, by using a dry etching process or a wet etching process, removing the substrate layer corresponding to the location of the first via on the back side of the target thinned wafer until the heavily doped semiconductor layer corresponding to the location of the first via is exposed, forming the first via; then, depositing metal in the first via to form the first metal via belonging to the target Schottky die and ohmically contacting the heavily doped semiconductor layer; and firstly... Using dry etching or wet etching processes, the substrate layer, heavily doped semiconductor layer, and lightly doped semiconductor layer corresponding to the location of the second via are removed from the back side of the target thinned wafer until the cathode metal pad or anode metal pad corresponding to the location of the second via is exposed, forming the second via. Metal is then deposited within the second via to form a second metal via belonging to the target Schottky die and electrically connected to the cathode metal pad or anode metal pad. The target thinned wafer refers to either the first thinned wafer or the second thinned wafer. When the target thinned wafer refers to the first thinned wafer, the target Schottky die refers to the first Schottky die; and when the target thinned wafer refers to the second thinned wafer, the target Schottky die refers to the second Schottky die. Additionally, regarding... Figure 4 The variant structure shown can also be obtained, but is not limited to, in the following manner: First, by using a dry etching process or a wet etching process, the lightly doped semiconductor layer and the heavily doped semiconductor layer corresponding to the location of the third via to be formed are removed on the front side of the target thinned wafer until the substrate layer corresponding to the location of the third via to be formed is exposed. Then, by using a dry etching process or a wet etching process, the substrate layer corresponding to the location of the second via to be formed is removed on the back side of the target thinned wafer until the cathode metal pad or anode metal pad corresponding to the location of the second via to be formed is exposed, forming... The second via is then deposited with metal to form a second metal via that belongs to the target Schottky die and is electrically connected to the cathode metal pad or the anode metal pad. The target thinned wafer refers to either the first thinned wafer or the second thinned wafer. When the target thinned wafer refers to the first thinned wafer, the target Schottky die refers to the first Schottky die. When the target thinned wafer refers to the second thinned wafer, the target Schottky die refers to the second Schottky die. The location of the third via to be formed covers the location of the second via to be formed.

[0046] S4. Suspended microstrip metal circuit layers electrically connected to the metal vias are fabricated on the back side of the first thinned wafer and the back side of the second thinned wafer, respectively.

[0047] S5. The back side of the first Schottky die and the back side of the second Schottky die are fixed together by a bonding process, and the first Schottky die and the second Schottky die are mirror-symmetrical about the suspended microstrip metal circuit layer.

[0048] In step S5, the bonding process may, but is not limited to, using an intermediate layer bonding method. Furthermore, before bonding, the first Schottky die and the second Schottky die must be aligned back-to-back to ensure that they are strictly mirror-symmetrical about the suspended microstrip metal circuit layer.

[0049] The technical details and effects of this embodiment can be derived conventionally by referring to the technical details and effects of Embodiment 1, and will not be repeated here.

[0050] Finally, it should be noted that the above description is merely a preferred embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A frequency converter circuit structure with a double-sided integrated Schottky diode, characterized in that, It includes a first Schottky die (1), a second Schottky die (2) and a suspended microstrip metal circuit layer (3), wherein the first Schottky die (1) has a first front side and a first back side, the second Schottky die (2) has a second front side and a second back side, and a Schottky junction is formed on the first front side and the second front side respectively; The first Schottky die (1) is arranged such that the first back side is attached to one side of the suspended microstrip metal circuit layer (3), and the second Schottky die (2) is arranged such that the second back side is attached to the other side of the suspended microstrip metal circuit layer (3), and the first Schottky die (1) and the second Schottky die (2) are mirror-symmetrical about the suspended microstrip metal circuit layer (3).

2. The frequency converter circuit structure as described in claim 1, characterized in that, Both the first Schottky die (1) and the second Schottky die (2) include a substrate layer (100), a heavily doped semiconductor layer (200) and a lightly doped semiconductor layer (300) stacked sequentially from the back to the front, wherein the lightly doped semiconductor layer (300) participates in the formation of the Schottky junction.

3. The frequency converter circuit structure as described in claim 2, characterized in that, The suspended microstrip metal circuit layer (3) is in ohmic contact with the heavily doped semiconductor layer (200) through a first metal via (401) penetrating the substrate layer (100); And / or, the suspended microstrip metal circuit layer (3) is electrically connected to the cathode metal pad or anode metal pad of the target die through a second metal via (402) that passes through the substrate layer (100), the heavily doped semiconductor layer (200) and the lightly doped semiconductor layer (300) in sequence, wherein the target die refers to the first Schottky die (1) or the second Schottky die (2).

4. The frequency converter circuit structure as described in claim 2, characterized in that, The substrate layer (100), the heavily doped semiconductor layer (200), and the lightly doped semiconductor layer (300) respectively satisfy the following characteristics: The substrate layer (100) is made of semi-insulating GaAs, semi-insulating GaN, SiC or sapphire. The heavily doped semiconductor layer (200) has a doping concentration greater than 1×10⁻⁶. 18 Each n+ GaAs or n+ GaN per cubic centimeter, with a thickness of 0.5 μm to 5 μm; The lightly doped semiconductor layer (300) has a doping concentration of 1×10⁻⁶. 16 ~1×10 per cubic centimeter 18 Each n-GaAs or n-GaN per cubic centimeter has a thickness of 50 nm to 1 μm.

5. The frequency converter circuit structure as described in claim 1, characterized in that, The first Schottky die (1) and the second Schottky die (2) are both Schottky dies having a single junction or at least two junctions connected in series and / or in parallel in a plane.

6. The frequency converter circuit structure as described in claim 1, characterized in that, The suspended microstrip metal circuit layer (3) includes multiple local circuit elements, wherein the multiple local circuit elements include at least one of an input probe, an output probe, a filter, an impedance matching line, and a beam lead.

7. The frequency converter circuit structure as described in claim 1, characterized in that, The first back side of the first Schottky die (1) is fixed together with the second back side of the second Schottky die (2) by an intermediate layer bonding method, and the suspended microstrip metal circuit layer (3) is located between the first Schottky die (1) and the second Schottky die (2).

8. A method for fabricating a frequency conversion circuit structure of a double-sided integrated Schottky diode as described in any one of claims 1-7, characterized in that, The steps are as follows: Schottky devices are fabricated on the front side of the first wafer to form a first Schottky die, and Schottky devices are fabricated on the front side of the second wafer to form a second Schottky die. The back side of the first wafer is thinned to obtain a first thinned wafer, and the back side of the second wafer is thinned to obtain a second thinned wafer. Metal vias belonging to the first Schottky die are formed on the back side of the first thinned wafer, and metal vias belonging to the second Schottky die are formed on the back side of the second thinned wafer. Suspended microstrip metal circuit layers electrically connected to the metal vias are fabricated on the back side of the first thinned wafer and the back side of the second thinned wafer, respectively. The back side of the first Schottky die and the back side of the second Schottky die are fixed together by a bonding process, and the first Schottky die and the second Schottky die are mirror-symmetrical about the suspended microstrip metal circuit layer.

9. A manufacturing method as described in claim 8, characterized in that, The process includes fabricating metal vias belonging to the first Schottky die on the back side of the first thinned wafer and fabricating metal vias belonging to the second Schottky die on the back side of the second thinned wafer, comprising: First, a dry etching process or a wet etching process is used to remove the substrate layer corresponding to the location of the first via on the back side of the target thinned wafer until the heavily doped semiconductor layer corresponding to the location of the first via is exposed, forming the first via. Then, metal is deposited in the first via to form a first metal via belonging to the target Schottky die and ohmically contacting the heavily doped semiconductor layer. The target thinned wafer refers to either the first thinned wafer or the second thinned wafer. When the target thinned wafer refers to the first thinned wafer, the target Schottky die refers to the first Schottky die. When the target thinned wafer refers to the second thinned wafer, the target Schottky die refers to the second Schottky die. And / or, firstly, using a dry etching process or a wet etching process, the substrate layer, heavily doped semiconductor layer, and lightly doped semiconductor layer corresponding to the location of the second via to be formed are removed on the back side of the target thinned wafer until the cathode metal pad or anode metal pad corresponding to the location of the second via to be formed is exposed, forming the second via. Then, metal is deposited in the second via to form a second metal via belonging to the target Schottky die and electrically connected to the cathode metal pad or the anode metal pad. The target thinned wafer refers to the first thinned wafer or the second thinned wafer. When the target thinned wafer refers to the first thinned wafer, the target Schottky die refers to the first Schottky die. When the target thinned wafer refers to the second thinned wafer, the target Schottky die refers to the second Schottky die. And / or, firstly, using a dry etching process or a wet etching process, remove the lightly doped and heavily doped semiconductor layers corresponding to the location of the third via on the front side of the target thinned wafer until the substrate layer corresponding to the location of the third via is exposed. Then, using a dry etching process or a wet etching process, remove the substrate layer corresponding to the location of the second via on the back side of the target thinned wafer until the cathode or anode metal pad corresponding to the location of the second via is exposed, forming the second via. Finally, deposit [material] within the second via. Metal is used to form a second metal via that belongs to the target Schottky die and is electrically connected to the cathode metal pad or the anode metal pad. The target thinned wafer refers to the first thinned wafer or the second thinned wafer. When the target thinned wafer refers to the first thinned wafer, the target Schottky die refers to the first Schottky die. When the target thinned wafer refers to the second thinned wafer, the target Schottky die refers to the second Schottky die. The third via location to be formed covers the second via location to be formed.

10. A manufacturing method as described in claim 8, characterized in that, The bonding process employs an intermediate layer bonding method.

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