Surface treatment method and apparatus for semiconductor wafer

Abstract

The application provides a surface treatment method and device for a semiconductor wafer, the surface treatment method comprising: selecting a treatment fluid according to the difference between the initial haze value and the target haze value of the surface of the semiconductor wafer to be treated; and applying the selected treatment fluid to the surface to adjust the micro-roughness of the surface so that the actual haze value of the surface is adjusted to the target haze value. By dynamically selecting a cleaning medium combination and accurately adjusting process parameters, a quantitative correlation between haze and parameters can be established, bidirectional and controllable adjustment of haze can be realized, the low haze requirement of advanced process devices can be met, and controlled high haze with suitable gettering function can be provided for power devices, and process consistency between batches can be improved.

Description

Technical Field

[0001] This application relates to the field of semiconductor materials technology, and in particular to surface treatment methods and apparatus for semiconductor wafers. Background Technology

[0002] In advanced semiconductor manufacturing processes, the cleanliness and micro-flatness of the wafer surface are key indicators affecting device yield. Wafer surface haze, as an important parameter characterizing surface micro-roughness and light scattering intensity, exhibits significantly different control requirements depending on the device type.

[0003] However, single-wafer cleaning processes in related technologies typically follow standardized cleaning logic, with their technical objectives mainly limited to single-dimensional particle removal or haze reduction. The process formulations of these technologies often fix the flow rate, concentration, and processing sequence of chemical solutions, lacking mechanisms for bidirectional, quantitative adjustment to meet the specific haze requirements of different devices. This fails to meet the demands of further advanced processes for refined and differentiated control of wafer surface quality. The fixed configuration of process parameters limits the adaptability of cleaning processes to diverse surface quality requirements.

[0004] Therefore, developing a processing method that can precisely control the haze value of the wafer surface according to target requirements has become a technical problem that urgently needs to be solved in this field. Summary of the Invention

[0005] This application provides a surface treatment method and apparatus for semiconductor wafers, aiming to solve the technical problem in related technologies that single-wafer cleaning processes cannot achieve bidirectional and precise control of wafer surface haze according to specific process requirements.

[0006] The technical solution of this application is implemented as follows: In a first aspect, embodiments of this application provide a surface treatment method for a semiconductor wafer, the surface treatment method comprising: The processing fluid is selected based on the difference between the initial haze value and the target haze value on the surface of the semiconductor wafer to be processed; The selected processing fluid is applied to the surface to adjust its micro-roughness, thereby adjusting the actual haze value of the surface to the target haze value.

[0007] In some examples, the treatment fluid is selected from at least one of hydrofluoric acid-based solutions, ozone-containing liquids, and deionized water.

[0008] In some examples, where the differences indicated a need to increase the actual haze value of the surface, the selected treatment fluids were hydrofluoric acid-based solutions and ozone-containing liquids; When the difference indicated the need to suppress the increase in the actual haze value of the surface, the selected treatment fluids were hydrofluoric acid-based solutions and deionized water.

[0009] In some examples, the hydrofluoric acid-based solution is an aqueous solution of hydrofluoric acid (DHF), and the ozone-containing liquid is an aqueous solution of ozone (O3W); and When the difference indicates a need to increase the actual haze value of the semiconductor wafer surface, applying a selected processing fluid to the surface includes: The oxide layer on the surface is removed by applying an aqueous solution of hydrofluoric acid to the surface, thereby making the surface hydrophobic. By applying an aqueous solution of ozone to a hydrophobic surface, the surface is oxidized to increase its micro-roughness, thereby adjusting the actual haze value of the surface to the target haze value.

[0010] In some examples, the step of applying the selected processing fluid to the semiconductor wafer further includes: The flow rate of the treatment fluid applied to the surface is adjusted based on the difference between the initial haze value and the target haze value.

[0011] In some examples, the steps for regulating fluid flow rate include: When ozone-containing liquid is selected as the treatment fluid and a high target haze value is required, the flow rate of the ozone-containing liquid and / or hydrofluoric acid-based solution is set as the first flow rate value. When selecting an ozone-containing liquid as the treatment fluid and requiring a low target haze value, the flow rate of the ozone-containing liquid and / or hydrofluoric acid-based solution is set as the second flow rate value. The first flow rate value is less than the second flow rate value.

[0012] In some examples, the steps for adjusting the micro-roughness of the surface of a semiconductor wafer include: Perform at least one cleaning cycle, which includes alternating application of chemical etching solution and oxidizing solution; The number of times the cleaning cycle is repeated is determined based on the differences, with the number of repetitions being increased to increase the actual haze value of the surface.

[0013] In some examples, the initial haze value is the initial haze value measured after chemical mechanical polishing of the semiconductor wafer and before surface treatment, and it ranges from 0.037 ppm to 0.042 ppm.

[0014] In some examples, the target haze value is set according to the metal getter capability requirements of the semiconductor wafer, and the target haze value is positively correlated with the metal getter capability.

[0015] Secondly, embodiments of this application also provide a surface treatment apparatus for a semiconductor wafer, comprising: The supply unit is configured to selectively supply various processing fluids, including hydrofluoric acid-based solutions, ozone-containing liquids, and deionized water, to the surface of a semiconductor wafer; and The controller communicates with the supply unit. The controller is configured to perform the following operations: Obtain the initial haze value and the preset target haze value of the semiconductor wafer; Calculate the difference between the initial haze value and the target haze value; Based on the difference, a specific processing fluid and its application sequence are selected from the supply unit; and The control supply unit applies a selected processing fluid to the semiconductor wafer to adjust the surface micro-roughness to a target haze value.

[0016] This application provides a surface treatment method and apparatus for semiconductor wafers. The method obtains the initial haze value of the wafer surface and the target haze value set by the process, calculates the difference between the two, and dynamically selects an appropriate processing fluid to be applied to the wafer surface based on this difference. This allows for the directional and precise adjustment of the surface's micro-roughness to ensure the actual haze value meets the target requirements. This surface treatment method overcomes the limitations of traditional cleaning processes, which often rely on fixed formulations and can only unidirectionally reduce haze. It establishes an active control mechanism guided by the final surface morphology indicators, achieving bidirectional, quantitative, and controllable adjustment of wafer surface haze. This allows the same treatment method to flexibly adapt to the requirements of advanced process logic chips for extreme flatness and power devices for specific roughness to enhance gettering capabilities, significantly improving process adaptability, yield, and device reliability. Attached Figure Description

[0017] Figure 1 This is a schematic structural diagram of a surface treatment apparatus for semiconductor wafers provided in an embodiment of this application.

[0018] Figure 2 A functional block diagram of the controller provided in the embodiments of this application.

[0019] Figure 3 A flowchart illustrating a surface treatment method for a semiconductor wafer provided in an embodiment of this application.

[0020] Figure 4 A flowchart of a surface treatment method for a semiconductor wafer provided in another embodiment of this application.

[0021] Figure 5 This is a haze scan image of the semiconductor wafer surface after being processed by the surface treatment method of the semiconductor wafer in Embodiment 1 of this application.

[0022] Figure 6This is a surface haze scan of a semiconductor wafer after hydrofluoric acid cleaning, where only the edge region is exposed to an ozone-containing liquid.

[0023] Figure 7 This is a haze scan image of the semiconductor wafer surface after being processed by the surface treatment method of the semiconductor wafer in Embodiment 6 of this application. Detailed Implementation

[0024] To make the objectives, technical solutions, and beneficial effects of this application clearer and more explicit, the following detailed description of this application will be provided in conjunction with the accompanying drawings.

[0025] In actual semiconductor device manufacturing scenarios, different types of devices have significantly different requirements for wafer surface haze. It is not that the lower the haze value, the better, but rather that the core functional requirements of the device need to be accurately adapted.

[0026] From the perspective of device type, advanced process devices such as logic chips and memory chips have strict "low-level" requirements for wafer surface haze. This is because the photolithography process for these devices requires stringent mask alignment accuracy, and subsequent thin film deposition also relies on a uniform surface condition; high haze generates background scattering noise, interfering with the signal-to-noise ratio of defect detection equipment, making it difficult to accurately detect minute defects. At the same time, excessively high surface roughness will cause uneven growth thickness of the gate oxide layer, leading to local electric field concentration, which in turn reduces the breakdown voltage of the gate oxide layer, affecting the structural integrity and operational stability of the device.

[0027] Conversely, power semiconductors and specialized devices, such as insulated-gate bipolar transistors (IGBTs), require a moderate level of surface micro-roughness, i.e., controlled high haze. This induced high haze can form physical getter centers on or near the wafer surface. Since the solubility of metallic impurities such as copper, iron, and nickel at silicon lattice distortion sites is higher than at intact lattices, these getter centers can effectively capture free metallic impurities in bulk silicon, purify the active region of the device, and ultimately significantly improve the device's anti-interference capability and long-term reliability, especially suitable for applications requiring internal getter technology.

[0028] However, existing single-wafer cleaning methods have significant limitations: they generally employ fixed process formulations, and once cleaning parameters such as chemical concentration, spray flow rate, processing time, and processing sequence are set, it is difficult to dynamically adjust them based on the immediate state of the incoming wafer. The core problem is that existing technologies lack a mechanism that can achieve bidirectional, quantitative adjustment between reducing and increasing haze based on the initial state of the wafer and the final target requirements. Either they relentlessly pursue surface planarization, resulting in insufficient gettering capability for power devices; or they employ harsh etching methods to achieve gettering, introducing uncontrollable deep wafer damage. Furthermore, existing processes have not established precise correlation models between cleaning fluid dynamics parameters, such as flow rate and surface haze changes, leading to poor batch-to-batch process stability and making it difficult to meet the stringent consistency requirements of large-scale industrial production.

[0029] Further analysis of the technical background and physical mechanisms reveals that wafer surface haze is not a single-dimensional defect. Its causes can be divided into two categories: one is native haze originating from the upstream polishing process, and the other is induced haze originating from the cleaning or heat treatment process. Although single-wafer cleaning machines perform excellently in particle removal efficiency, the drawbacks of traditional cleaning strategies are particularly prominent when handling wafers with specific haze requirements. Specifically, they fail to establish a quantitative mapping relationship between process parameters and haze values. For example, indiscriminately using alternating strong oxidizing and strong etching solutions to achieve ultimate cleanliness may unintentionally lead to the accumulation of surface micro-roughness, causing the haze value to exceed the tolerance limit of the logic chip. Furthermore, in scenarios where haze is needed for gettering, excessive planarization during cleaning weakens the wafer's resistance to metal contamination. This simplistic approach essentially stems from the lack of refined control over the micro-reconstruction mechanism of chemical fluid surfaces in current technologies, making it unable to adapt to the differentiated haze requirements of different devices.

[0030] In view of this, embodiments of this application provide a surface treatment method and apparatus for semiconductor wafers, which can establish a quantitative correlation between haze and parameters by dynamically selecting cleaning media combinations and precisely adjusting process parameters, thereby achieving bidirectional and controllable adjustment of haze. This not only meets the low haze requirements of advanced process devices, but also provides controlled high haze for power devices with adaptable gettering functions, while improving batch-to-batch process consistency.

[0031] The technical solution of this application will be further described in detail below with reference to specific embodiments.

[0032] Please see Figure 1 , Figure 1A schematic structural diagram of a surface treatment apparatus 100 for semiconductor wafers provided in an embodiment of this application is shown. This surface treatment apparatus 100 can be a monolithic wet cleaning device used for precision surface treatment of silicon wafers, silicon carbide wafers, or other compound semiconductor wafers with a size of 300 mm (i.e., 12 inches) or larger. The apparatus is designed with a focus on precise control of fluid delivery and compatibility with various chemical media.

[0033] The surface treatment apparatus 100 mainly includes a process chamber 110, a rotary chuck 120, a supply unit 130, a fluid jetting arm 140, and a controller 150.

[0034] The process chamber 110 defines a closed or semi-closed processing space to isolate the external environment and prevent chemical splashing. Considering the corrosive nature of the hydrofluoric acid used in the cleaning process, the inner wall of the process chamber 110 is typically made of corrosion-resistant materials such as polytetrafluoroethylene (PTFE) or perfluoroalkoxyalkane (PFA). A drain port and an exhaust port are located at the bottom of the process chamber 110. The drain port connects to the plant's acidic wastewater treatment system, while the exhaust port connects to the ventilation system to remove volatile acid gases and ozone, ensuring a safe operating environment.

[0035] A rotary chuck 120 is located at the center of the process chamber 110 and is used to hold the semiconductor wafer W to be processed. The holding method can be vacuum adsorption, using vacuum channels on the chuck surface to adsorb the back side of the wafer; or edge clamping, using mechanical jaws on the edge of the chuck to hold the wafer edge to avoid contact with the back side of the wafer. The rotary chuck 120 is connected to a servo motor below, which can drive the semiconductor wafer W to rotate at a preset speed under the command of the controller 150. The centrifugal force generated by the rotation is the key driving force for the processing fluid to spread and be ejected from the wafer surface. The speed control accuracy is typically within ±1 revolution per minute, and the speed range covers 10 revolutions per minute to 3000 revolutions per minute to meet the needs of different process steps, such as low-speed coating and high-speed spin drying.

[0036] The supply unit 130 is the core component of the surface treatment apparatus 100, configured to store, dispense, and deliver various treatment fluids. In this embodiment, the supply unit 130 includes at least three independent fluid sources: The first fluid source is a hydrofluoric acid-based solution source 131. This source is used to store or prepare hydrofluoric acid-based solutions online. In this embodiment, the solution is, for example, an aqueous solution of hydrofluoric acid, which can also be referred to as dilute hydrofluoric acid, i.e., DHF. Its concentration ratio, i.e., the volume ratio of hydrofluoric acid to water, can be from 1:50 to 1:500, for example, 1:100. DHF can be used to etch and remove oxide layers on the silicon surface, including native oxide layers and chemical oxide layers, and to form a hydrophobic hydrogen passivated surface. The hydrofluoric acid-based solution source 131 is typically equipped with a concentration monitor to ensure the stability of the output concentration.

[0037] The second fluid source is an ozone-containing liquid source 132. This source is used to prepare an ozone-containing liquid. In this embodiment, the liquid is, for example, ozonated water, or O3W. Ozone water is prepared by dissolving high-purity ozone gas in deionized water. The ozone concentration can be controlled between 5 ppm and 50 ppm, for example, 20 ppm to 30 ppm. O3W has extremely strong oxidizing power and is used to remove organic pollutants and regrow the chemically oxidized layer. The ozone-containing liquid source 132 typically includes a gas-liquid mixer and an ozone generator, which can adjust the dissolved ozone concentration in real time.

[0038] The third fluid source is deionized water source 133. This source provides ultrapure water, i.e., UPW. Its resistivity is typically greater than 18 megohm-cm to ensure that no ionic contamination is introduced. Deionized water is mainly used to rinse the wafer surface between different chemical steps to remove residual chemicals, or as a buffer medium to participate in the conditioning of the surface state.

[0039] The supply unit 130 also includes a series of precision flow control valves and pneumatic valves (not shown). The flow control valves may be, for example, mass flow controllers (MFCs) or high-precision needle valves. These valves are electrically connected to the controller 150 and can precisely adjust the output flow rate of each fluid according to instructions. In this application, flow rate adjustment is crucial for mist control, and its adjustment range typically covers 0.5 liters per minute to 5.0 liters per minute. For example, in a high flow mode, the flow rate can be set to 1.8 liters per minute; while in a low flow mode, the flow rate can be set to 1.0 liters per minute.

[0040] A fluid jet arm 140 is movably disposed above a rotary chuck 120. One or more nozzles 141 are provided at the end of the fluid jet arm 140. The nozzles 141 are connected to a supply unit 130 via corrosion-resistant conduits. The fluid jet arm 140 is driven by a stepper motor or a servo motor and can perform a scanning motion, i.e., oscillating from the wafer center to the edge, to ensure uniform fluid coverage of the entire wafer surface. In some embodiments, coaxial dual-fluid nozzles or multi-nozzle arrays can be used to achieve instantaneous switching or mixed spraying of different fluids. The height and angle of the nozzles are also adjustable to optimize the hydrodynamic characteristics of the fluid impacting the wafer surface.

[0041] The controller 150 is the brain of the entire device, typically composed of a high-performance industrial computer (IPC), a programmable logic controller (PLC), or an embedded microprocessor. The controller 150 communicates with the rotary chuck 120, the supply unit 130, the fluid injection arm 140, and possibly integrated online monitoring sensors via an industrial bus. The controller 150 internally stores a control program for executing the surface treatment method of this application. This control program includes a library of preset recipes for different haze requirements and possesses real-time data processing and logical judgment capabilities.

[0042] Please see Figure 2 , Figure 2 The functional logic architecture of controller 150 is illustrated. To achieve controllable adjustment of wafer surface haze, controller 150 is configured to include the following functional modules: The data acquisition module 151 is responsible for acquiring the initial state data and process target data of the wafer to be processed. The initial haze value is the surface haze level of the wafer before entering the cleaning process. For example, this value can come from upstream chemical mechanical polishing (CMP) and post-processing inspection data. This data can be automatically transmitted to the cleaning machine through the factory's production management system (MES). For standard polished silicon wafers, the initial haze value is typically between 0.037 ppm and 0.042 ppm. The target haze value is the expected value set according to the process requirements of the final device. For example, for power devices that require gettering using haze, the target value may be set to 0.050 ppm or higher; while for logic devices, the target value may be set close to or lower than the initial value.

[0043] The difference calculation module 152 is used to calculate the difference between the initial haze value and the target haze value. This module not only calculates the magnitude of the value, but also determines the direction of the difference, i.e., a positive increase, a negative increase, or zero maintenance. The difference value is the basis for subsequent decisions. For example, a positive difference value with a large absolute value means that the roughness needs to be significantly increased; a difference value close to zero or negative means that the surface smoothness needs to be maintained or improved.

[0044] The strategy selection module 153 is the core decision-making unit of this embodiment. The strategy selection module 153 can have a built-in preset process database or algorithm model, and intelligently selects the optimal cleaning formula based on the output of the difference calculation module 152. If the difference indicates a need to significantly increase fog density, the strategy selection module 153 will select a fog-enhancing formula. If the difference indicates a need to maintain or reduce fog density, the strategy selection module 153 will select a maintenance formula. Furthermore, the strategy selection module 153 will further determine the fluid flow parameters and the number of cycles based on the specific magnitude of the difference. For example, a larger difference may lead to a lower flow rate or more cycles, based on the counterintuitive principle found in this application that low flow rate leads to high fog density.

[0045] The execution control module 154 converts the recipe parameters generated by the strategy selection module 153 into specific hardware control signals. It drives the supply unit 130 to open the corresponding valves, sets the fluid flow rate, adjusts the rotation speed of the rotary chuck 120 to control the rotation of the wafer, and controls the movement of the fluid injection arm 140 to move it to the designated position for injection.

[0046] Please see Figure 3 , Figure 3 The overall flow of a surface treatment method for semiconductor wafers provided in an embodiment of this application is illustrated. This surface treatment method may include steps S101 to S102.

[0047] In step S101, a processing fluid is selected based on the difference between the initial haze value and the target haze value on the surface of the semiconductor wafer to be processed.

[0048] In step S102, a selected processing fluid is applied to the surface of the semiconductor wafer to adjust the surface micro-roughness so that the actual haze value of the surface is adjusted to the target haze value.

[0049] This surface treatment is not just a single cleaning step, but a closed-loop control process that includes measurement, decision-making, and execution.

[0050] In some embodiments of this application, the surface treatment method can be further divided into steps S301 to S306. The surface treatment method will be described in detail below based on this embodiment.

[0051] Step S301 involves obtaining the initial haze value and the target haze value. In the semiconductor manufacturing process, wafer W is sent to the surface treatment apparatus 100 after chemical mechanical polishing. At this time, the initial haze value of the wafer can be obtained through integrated online inspection equipment, such as a laser scattering instrument, or by reading data from the wafer's production management system. Simultaneously, based on the product batch type to which the wafer belongs, such as logic products or power products, the corresponding target haze value is retrieved from the recipe database.

[0052] Step S302 involves calculating the difference and selecting a processing fluid sequence. Controller 150 compares the initial haze value with the target haze value. If the difference indicates a need to significantly increase the actual haze value on the surface, for example, if the target value is much higher than 0.042 ppm, then it is classified as Case A, i.e., increased haze requirement, and proceeds to step S303. If the difference indicates a need to suppress the increase in the actual haze value on the surface, for example, if the target value is maintained at around 0.040 ppm, then it is classified as Case B, i.e., maintained or reduced haze requirement, and proceeds to step S304.

[0053] Step S303 involves executing the first processing sequence, namely the fogging mode. This sequence aims to induce surface roughening by utilizing the direct alternation of dilute hydrofluoric acid and ozone water. The specific sub-steps are as follows: The first step is DHF etching. Dilute hydrofluoric acid is sprayed onto the rotating wafer surface. The dilute hydrofluoric acid rapidly removes the native oxide layer on the wafer surface. As the oxide layer disappears, the silicon surface is passivated by hydrogen atoms, transforming into a hydrophobic state. This step resets the surface state, exposing the silicon lattice. At this point, the contact angle on the wafer surface increases significantly, and the water film rapidly breaks down and is ejected from the surface.

[0054] The second step, O3W oxidation, is then performed. Ozone water is sprayed directly onto the hydrophobic wafer surface. Note that a deionized water rinsing step is not inserted during this process, or only a very short transition is performed, to ensure direct contact between the ozone water and the hydrophobic surface. When high-concentration ozone water comes into contact with the hydrophobic hydrogen-passivated surface, a vigorous oxidation reaction occurs. Due to the volume expansion caused by the insertion of oxygen atoms, and because the oxidation reaction is limited by the distribution of nucleation sites, microscale protrusions and depressions form on the surface, significantly increasing haze.

[0055] In this step, this application introduces a novel flow control strategy. According to the research in this application, in the DHF plus O3W sequence, a lower fluid flow rate actually leads to a higher haze increase. Therefore, if a significant increase in haze is required, the controller 150 will control the supply unit 130 to output ozone water and dilute hydrofluoric acid at a second flow rate value, i.e., a lower flow rate, such as 1.0 liters per minute. The physical mechanism may be that at low flow rates, the boundary layer of the fluid on the wafer surface is thicker, or the removal rate of reaction products is slower, leading to a micromasking effect or differential oxidation in the micro-regions, thereby exacerbating the peak-valley height difference on the surface.

[0056] Step S304 involves executing the second processing sequence, also known as the hold-through mode. This sequence aims to clean the surface while preserving its original flatness as much as possible. The specific sub-steps are as follows: Similarly, the first step is DHF etching, which uses dilute hydrofluoric acid to remove the oxide layer and form a hydrophobic surface.

[0057] Then, the second step, DIW buffer rinsing, is performed. Before using ozone water, deionized water is sprayed onto the wafer surface. Deionized water rinsing physically removes residual fluoride ions and reaction byproducts, while the interaction between deionized water and the hydrogen passivated surface is extremely weak, preventing drastic chemical reconstruction. The deionized water layer forms a liquid film buffer layer on the wafer surface.

[0058] The third step, O3W oxidation, is then performed. Ozone water is then sprayed. At this point, due to the presence of the deionized water film, ozone molecules in the ozone water must diffuse through the water layer to reach the silicon surface. This reduces the instantaneous intensity of the oxidation reaction, resulting in a more uniform and dense oxide layer growth, thus avoiding stress-induced roughening and maintaining a low haze value.

[0059] In this step, to achieve extremely low haze, controller 150 typically controls supply unit 130 to output fluids at a first flow rate value, i.e., a higher flow rate, such as 1.8 liters per minute. High flow rates help to quickly remove particles and impurities and provide a uniform chemical supply, promoting surface homogenization.

[0060] Step S305 is a loop control. Both steps S303 and S304 can be repeated as a cleaning loop. The controller 150 determines the number of loops based on the magnitude of the difference. For example, if a single loop can increase the haze by 0.005 ppm, and the target is to increase it by 0.015 ppm, the controller will be set to repeat the loop 3 times.

[0061] Step S306 is post-processing and drying. After completing the predetermined chemical processing sequence, a final deionized water rinse is usually performed, and the wafer is dried using spin drying or isopropanol-assisted drying technology to complete the entire processing flow.

[0062] To verify the effectiveness and technical effect of the method provided in the embodiments of this application, a series of comparative experiments were conducted. The experimental subject was a 300 mm silicon wafer after chemical mechanical polishing, with an initial haze value ranging from 0.037 ppm to 0.042 ppm. The experiments were carried out in a single-wafer cleaning machine, using a dilute hydrofluoric acid concentration of 1:100 and an ozone water concentration of 20 ppm.

[0063] Table 1 shows the test results of the final haze values ​​under different treatment conditions.

[0064]

[0065] In-depth analysis of the above data leads to the following conclusions: First, regarding the effect of intervening deionized water, i.e., the maintenance mechanism, we compared Examples 1 and 6. Both used treatment times of 30s / 25s and a flow rate of 1.8 LPM. Example 1 used a sequence of hydrofluoric acid (HF) followed by deionized water (DIW) and then ozone water (O3W), resulting in a final haze of 0.039 ppm to 0.041 ppm, almost identical to the initial value (approximately 0.037~0.042 ppm). This demonstrates that intervening deionized water as a buffer between dilute hydrofluoric acid and ozone water effectively suppresses surface roughening and maintains haze. Example 6, using a sequence of hydrofluoric acid (HF) followed directly by ozone water (O3W), resulted in a final haze increase to 0.050 ppm to 0.054 ppm. This verifies that direct contact between the hydrophobic surface after hydrofluoric acid removal of the oxide layer and ozone water is the key mechanism leading to the increased haze.

[0066] Secondly, regarding the flow rate effect, compare Examples 6 and 7. The chemical steps in both are identical (DIW->HF->O3W), and the processing times for each step are also identical (30s / 25s / 30s), differing only in the flow rate parameter. Example 6 used a high flow rate of 1.8 liters per minute (LPM), resulting in a final haze of 0.050 ppm to 0.054 ppm. Example 7 used a low flow rate of 1.0 liters per minute (LPM), increasing the final haze to 0.053 ppm to 0.057 ppm. The experimental results show that, under the same chemical processing time, a lower flow rate actually leads to higher haze. This is a valuable finding, meaning that the haze increment can be fine-tuned simply by adjusting the physical parameter (flow rate) without changing the chemical formulation.

[0067] Finally, regarding the cycling effect and sequence combination, the comparative example, which involved multiple alternating treatments with hydrofluoric acid and ozone water, resulted in the highest haze, reaching 0.060 ppm. This indicates that repeated oxide layer growth and etching processes accumulate surface damage. Although Examples 3 and 4 also involved multiple switching processes, the increase in haze was significantly less than that of the comparative example due to the intervening of deionized water. This further confirms the buffering effect of deionized water and the contribution of the number of cycles to haze accumulation.

[0068] To visually demonstrate the impact of different processing sequences on the wafer surface, please refer to [link / reference]. Figures 5 to 7 . Figure 5 The image shows a haze scan of the wafer surface after processing with Example 1, i.e., cleaning with DHF followed by DIW. It can be seen that the haze distribution on the wafer surface is uniform and the overall value is low. The central area is darker in color, representing a low haze state. Figure 6 The example demonstrates the use of ozone water only in the edge region after DHF cleaning. A distinct bright ring appears at the wafer edge, indicating that direct contact between the ozone water and the hydrophobic surface leads to a local increase in haze. Figure 7 The image shows a haze scan of the wafer surface after processing with Example 6, i.e., after DHF cleaning and direct O3W treatment, and... Figure 5 In comparison, its overall brightness increased significantly, indicating that the micro-roughness of the entire surface increased, that is, the haze level increased significantly.

[0069] According to some embodiments of this disclosure, the target haze value can be set according to the metal gettering capability requirements of the semiconductor wafer, and the target haze value is positively correlated with the metal gettering capability.

[0070] To further verify that the surface treatment method provided in this application can set a target haze value and achieve precise adjustment according to the metal getter capability requirements of semiconductor wafers, a quantitative gradient relationship between haze value and getter capability was established. Experimental and theoretical analysis show that the higher the induced haze, i.e., micro-roughness, of the wafer surface, the larger its specific surface area, the more physical getter centers it can provide, and thus the stronger the metal getter capability. Based on this, this application constructs a three-level control strategy for different device requirements.

[0071] The first level is for low getter requirements, primarily targeting logic chips manufactured using advanced processes of 14nm and below. These devices have extremely high requirements for surface flatness and mainly rely on bulk silicon gettering; therefore, the target haze value is set to be less than or equal to 0.040ppm, close to the native haze level. To achieve this target value, the controller uses a "hold mode" formulation, which involves a sequence of cleaning with dilute hydrofluoric acid followed by insertion into a deionized water buffer and then ozone water treatment (DHF-DIW-O3W), coupled with a high fluid flow rate of 1.8 liters per minute, to minimize surface roughening.

[0072] The second level is for medium getter requirements, primarily targeting standard power MOSFETs or analog chips. These devices require moderate surface getter capabilities to capture metallic impurities such as copper and iron introduced during the process, preventing their diffusion into the active area, but without introducing excessive surface damage. Therefore, the target haze value is set between 0.050 ppm and 0.052 ppm. To achieve this target value, the controller activates a "mild fogging mode," which alters the chemical sequence, using dilute hydrofluoric acid cleaning followed by direct ozone water treatment (DHF-O3W) to remove the water film buffer and increase roughness through instantaneous oxidation. Crucially, a high fluid flow rate of 1.8 liters per minute is maintained at this level. The rapid boundary layer renewal at high flow rates limits the intensity of the oxidation reaction, thus achieving a moderate haze enhancement.

[0073] The third level is for high gettering requirements, primarily targeting IGBTs or automotive electronic power devices. These devices operate under harsh conditions and are extremely sensitive to defects caused by metallic impurities, requiring exceptionally strong surface physical gettering capabilities. Therefore, the target haze value is set to be greater than or equal to 0.055 ppm. To achieve this target value, the controller activates a "powerful fogging mode," which, based on the dilute hydrofluoric acid-to-ozone water (DHF-O3W) sequence, further utilizes the flow nonlinearity effect discovered in this application to significantly reduce the fluid flow rate to 1.0 liters per minute. This low-flow-rate environment exacerbates the masking effect and differential oxidation in the micro-regions, thereby inducing the highest micro-roughness and achieving the maximum metal gettering capability. Through the settings of these three gradients, the positive correlation between the target haze value and metal gettering capability is clearly demonstrated, and the feasibility of achieving full-range coverage through sequence combination and coordinated adjustment of flow parameters is verified.

[0074] In summary, the semiconductor wafer surface treatment method provided in this application overcomes the limitations of traditional single-wafer cleaning processes, which can only perform subtraction (removing contaminants) and endow the equipment with the ability to perform additive (controllably increasing roughness). By flexibly combining three basic fluids—dilute hydrofluoric acid, deionized water, and ozone water—and cleverly utilizing the nonlinear effect of the fluid flow rate, a full-range, high-precision coverage of the wafer surface haze value is achieved. This technical solution is not only scientifically sound and logically rigorous, but also requires no complex modifications to the hardware structure of existing single-wafer cleaning machines; it can be implemented simply through software upgrades and formula optimization, demonstrating extremely high promotional value and economic benefits.

[0075] It should be noted that the technical solutions described in this application can be combined arbitrarily without conflict.

[0076] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A surface treatment method for a semiconductor wafer, characterized in that, The surface treatment method includes: The processing fluid is selected based on the difference between the initial haze value and the target haze value on the surface of the semiconductor wafer to be processed; The selected processing fluid is applied to the surface to adjust the surface's micro-roughness, such that the surface's actual haze value is adjusted to the target haze value.

2. The surface treatment method for semiconductor wafers according to claim 1, characterized in that, The treatment fluid is selected from at least one of hydrofluoric acid-based solutions, ozone-containing liquids, and deionized water.

3. The surface treatment method for semiconductor wafers according to claim 2, characterized in that, When the difference indicates a need to increase the actual haze value of the surface, the selected treatment fluids are the hydrofluoric acid-based solution and the ozone-containing liquid; When the difference indicates a need to suppress the increase in the actual haze value of the surface, the selected treatment fluids are the hydrofluoric acid-based solution and the deionized water.

4. The surface treatment method for a semiconductor wafer according to claim 2 or 3, characterized in that, The hydrofluoric acid-based solution is an aqueous solution of hydrofluoric acid, and the ozone-containing liquid is an aqueous solution of ozone; and In cases where the difference indicates a need to increase the actual haze value of the semiconductor wafer's surface, applying the selected processing fluid to the surface includes: The oxide layer on the surface is removed by applying an aqueous solution of hydrofluoric acid to the surface, thereby making the surface hydrophobic. By applying an aqueous solution of ozone to the hydrophobic surface, the surface is oxidized to increase its micro-roughness, thereby adjusting the actual haze value of the surface to the target haze value.

5. The surface treatment method for semiconductor wafers according to claim 2, characterized in that, The step of applying the selected processing fluid to the semiconductor wafer further includes: The flow rate of the processing fluid applied to the surface is adjusted according to the difference between the initial haze value and the target haze value.

6. The surface treatment method for semiconductor wafers according to claim 5, characterized in that, The step of adjusting the fluid flow rate includes: When an ozone-containing liquid is selected as the treatment fluid and a high target haze value is required, the flow rate of the ozone-containing liquid and / or the hydrofluoric acid-based solution is set to a first flow rate value. When selecting an ozone-containing liquid as the treatment fluid and requiring a low target haze value, the flow rate of the ozone-containing liquid and / or the hydrofluoric acid-based solution is set to a second flow rate value. Wherein, the first flow rate value is less than the second flow rate value.

7. The surface treatment method for semiconductor wafers according to claim 1, characterized in that, The step of adjusting the micro-roughness of the surface of the semiconductor wafer includes: Perform at least one cleaning cycle, the cleaning cycle comprising alternating application of chemical etching solution and oxidizing solution; The number of repetitions of the cleaning cycle is determined based on the difference, wherein increasing the number of repetitions increases the actual haze value of the surface.

8. The surface treatment method for a semiconductor wafer according to claim 1, characterized in that, The initial haze value is the initial haze value measured after chemical mechanical polishing of the semiconductor wafer and before the surface treatment, and its range is between 0.037 ppm and 0.042 ppm.

9. The surface treatment method for a semiconductor wafer according to claim 8, characterized in that, The target haze value is set according to the metal gettering capability requirements of the semiconductor wafer, and the target haze value is positively correlated with the metal gettering capability.

10. A surface treatment apparatus for a semiconductor wafer, characterized in that, include: The supply unit is configured to selectively supply various processing fluids, including hydrofluoric acid-based solutions, ozone-containing liquids, and deionized water, to the surface of the semiconductor wafer. as well as The controller is communicatively connected to the supply unit. The controller is configured to perform the following operations: Obtain the initial haze value and the preset target haze value of the semiconductor wafer; Calculate the difference between the initial haze value and the target haze value; Based on the difference, a specific processing fluid and its application sequence are selected from the supply unit; and The supply unit is controlled to apply a selected processing fluid to the semiconductor wafer to adjust the micro-roughness of the surface to the target haze value.

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