Segment code liquid crystal screen automatic test method and system

Abstract

This invention provides an automated testing method and system for segment LCD screens. The method includes: establishing a data path between a test platform and the device under test (DUT), wherein the data path establishment strategy is adaptively selected based on the architecture of the DUT; pre-establishing a video memory mapping configuration file and test cases, and loading them onto the test platform; establishing a frame synchronization mechanism when the test platform receives video memory data from the DUT; detecting whether the DUT has physical faults or electrical connection anomalies, and generating physical test results; translating the segment codes of the test cases into bit arrays based on the video memory mapping configuration file, and comparing them with the actual arrays obtained by parsing the actually received video memory data; and generating a corresponding diagnostic report based on the comparison results and the physical test results.

Description

Technical Field

[0001] This invention relates to the field of LCD screen testing technology, and in particular to an automated testing method and system for segment LCD screens. Background Technology

[0002] Segment LCD screens are widely used in instruments and meters (such as multimeters, electricity meters, water meters, and blood pressure monitors) due to their advantages of low cost, simple driving, and clear display. In automated production testing, it is necessary to verify whether the LCD screen illuminates or extinguishes specific segments as expected under various input conditions. Traditional testing solutions often use image acquisition cards or industrial cameras to capture physical images of the LCD screen, and then use OCR (Optical Character Recognition) or image template matching algorithms to identify the displayed content.

[0003] However, the testing methods in the above-mentioned existing technologies may have the following inherent defects: susceptible to ambient light interference: changes in lighting, reflections, shadows, etc. seriously affect the recognition accuracy; sensitive to focus and distortion: camera position, lens distortion, fingerprints or scratches on the screen surface may lead to misjudgment; high customization cost: different models of segment code screens have different layouts, requiring retraining or reconfiguration of recognition templates. Summary of the Invention

[0004] To address the problems existing in the prior art, embodiments of the present invention provide an automated testing method and system for segment LCD screens.

[0005] Firstly, embodiments of this specification provide an automated testing method for segment LCD screens, the method comprising:

[0006] Establish a data path between the test platform and the device under test, wherein the strategy for establishing the data path is adaptively selected based on the architecture of the device under test;

[0007] A pre-built video memory mapping configuration file and test cases are loaded into the test platform;

[0008] When the test platform receives the video memory data of the device under test, a frame synchronization mechanism is established. The synchronization strategy of the frame synchronization mechanism is adaptively adjusted based on the architecture of the device under test.

[0009] The test device is used to detect whether there are physical faults or abnormal electrical connections in the device under test, and generates physical test results.

[0010] Based on the aforementioned video memory mapping configuration file, the segment code of the test cases is translated into a bit array and compared with the actual array obtained by parsing the actual received video memory data. Based on the comparison results and physical detection results, a corresponding diagnostic report is generated.

[0011] Secondly, embodiments of this specification provide an automated testing system for segment LCD screens, the system comprising:

[0012] The connection module is used to establish a data path between the test platform and the device under test. The strategy for establishing the data path is adaptively selected based on the architecture of the device under test.

[0013] A pre-built module is used to pre-build video memory mapping configuration files and test cases, and load them into the test platform;

[0014] The frame synchronization module is used to establish a frame synchronization mechanism when the test platform receives the video memory data of the device under test. The synchronization strategy of the frame synchronization mechanism is adaptively adjusted based on the architecture of the device under test.

[0015] The physical detection module is used to detect whether the device under test has physical faults or abnormal electrical connections, and to generate physical detection results;

[0016] The comparison module is used to translate the segment code of the test cases into a bit array based on the video memory mapping configuration file, and compare it with the actual array obtained by parsing the actual received video memory data. Based on the comparison results and physical detection results, a corresponding diagnostic report is generated.

[0017] Thirdly, embodiments of this specification provide an electronic device, including a processor and a memory;

[0018] The processor is connected to the memory;

[0019] The memory is used to store executable program code;

[0020] The processor runs a program corresponding to the executable program code stored in the memory to perform the methods described in one or more embodiments.

[0021] Fourthly, embodiments of this specification provide a non-transitory computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the steps of the above-described automated testing method for segment LCD screens.

[0022] In view of the above, the beneficial effects of the technical solutions provided by some embodiments of this specification include at least the following:

[0023] In one or more embodiments of this specification, a data path is established between the test platform and the device under test (DUT). The data path establishment strategy is adaptively selected based on the architecture of the DUT. A memory mapping configuration file and test cases are pre-established and loaded onto the test platform. When the test platform receives memory data from the DUT, a frame synchronization mechanism is established. The synchronization strategy of the frame synchronization mechanism is adaptively adjusted based on the architecture of the DUT. Physical faults and electrical connection anomalies in the DUT are detected, and physical detection results are generated. Based on the memory mapping configuration file, the segment codes of the test cases are translated into bit arrays and compared with the actual arrays obtained by parsing the actually received memory data. Based on the comparison results and the physical detection results, a corresponding diagnostic report is generated. This solution eliminates the need for OCR / image processing: no camera, lens, or light source is required, and no image recognition algorithm is needed, greatly reducing system cost and complexity. It directly verifies the original data of the driver layer, unaffected by any optical factors (dust, fingerprints, angle, lighting), achieving logical-level determinism. The communication cycle can be synchronized with the memory refresh cycle (milliseconds to seconds), enabling synchronous comparison without delay. Only the mapping table needs to be modified to adapt to different types of segment code screens, making it highly versatile. Attached Figure Description

[0024] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0025] Figure 1 This is a flowchart of an automated testing method for segment LCD screens provided in one embodiment of this specification.

[0026] Figure 2 This is a schematic diagram of the structure of an automated testing system for segment LCD screens provided in one embodiment of this specification.

[0027] Figure 3 This is a schematic diagram of the structure of an electronic device provided in one embodiment of this specification. Detailed Implementation

[0028] The subject matter described herein will now be discussed with reference to exemplary embodiments. It should be understood that these embodiments are discussed merely to enable those skilled in the art to better understand and implement the subject matter described herein, and are not intended to limit the scope, applicability, or examples set forth in the claims. The function and arrangement of the elements discussed may be changed without departing from the scope of this specification. Various processes or components may be omitted, substituted, or added as needed in the various examples. For example, the described methods may be performed in a different order than described, and steps may be added, omitted, or combined. Furthermore, features described in some examples may be combined in other examples.

[0029] As used herein, the term "comprising" and its variations are open terms meaning "including but not limited to". The term "based on" means "at least partially based on". The terms "one embodiment" and "an embodiment" mean "at least one embodiment". The term "another embodiment" means "at least one other embodiment". The terms "first", "second", etc., may refer to different or the same objects. Other definitions, whether explicit or implicit, may be included below. Unless explicitly indicated by the context, the definition of a term shall remain consistent throughout the specification.

[0030] Please see Figure 1 , Figure 1 This document presents an overall flowchart of an automated testing method for segment LCD screens, as provided in an embodiment of this specification. The device driver model includes an application service layer, a driver interface layer, and a peripheral layer.

[0031] like Figure 1 As shown, the automated testing method for segment LCD screens includes at least the following steps:

[0032] Step S102: Establish a data path between the test platform and the device under test. The strategy for establishing the data path is adaptively selected based on the architecture of the device under test.

[0033] Specifically, a data path is established between the test platform and the device under test (e.g., an embedded device with a segmented LCD screen, such as a smart meter). This allows for real-time acquisition of the raw bitstream data from the LCD screen's memory buffer without modifying or only slightly modifying the device under test's firmware. The strategy for establishing this data path can be adaptively selected based on the architecture differences of the device under test. This includes:

[0034] Bus monitoring mode. When the LCD screen is driven via a serial bus (such as SPI), a logic analysis front-end can be connected to the bus data and clock lines to passively acquire memory update data frames sent from the master control chip to the driver chip as a slave device. In this mode, no modifications to the firmware of the device under test are required, and the capture node is located at the physical link layer between the master controller and the screen driver, achieving non-intrusive data acquisition.

[0035] Debug interface read mode. When the LCD screen is directly driven by I / O, or when data monitoring via the bus is not possible, the standard debug interface provided by the chip can be used to access the memory address space mapped to the video memory through debug probes. This mode requires the debug interface enable bit to be retained in the test firmware, but no additional code is required.

[0036] Minimalist proxy reporting mode. (When the above two methods cannot be used) Directly input the minimized data to export a macro. This macro contains instructions to package the starting address and length of the video memory and report it after receiving the corresponding query instruction through the physical communication port.

[0037] In addition, during the above data transmission, communication can be carried out through any one or more digital communication protocols, including but not limited to: wired methods (RS-232, RS-485, TTL serial port, CAN, Ethernet, USB, I²C, SPI, etc.), wireless methods (Bluetooth, Wi-Fi, ZigBee, LoRa, radio frequency (RF), etc.), and isolation methods (optocoupler, magnetic coupling, capacitive isolation, etc.).

[0038] Step S104: Pre-create the video memory mapping configuration file and test cases, and load them into the test platform.

[0039] Specifically, a pre-established video memory mapping configuration file is created, in which each bit of the video memory corresponds to a physical segment code. The file structure of the video memory mapping configuration file can include parameters such as: the mapping table file header contains the protocol version number, total video memory bit width, nominal refresh cycle value, byte order definition (big-endian / little-endian), and an optional CRC checksum. Each record in the main body contains: bit sequence number, corresponding byte offset, segment code category (e.g., "segment tube", "icon", "unit symbol"), segment code sub-item (e.g., "thousands A segment", "battery icon", "kPa symbol"), and the normalized layout coordinates of that segment code on the virtual screen.

[0040] Additionally, test cases can be pre-built. Each test case is a set of expected test definitions independent of the mapping table. Each test case specifies a test condition identifier and uses the segment code alias defined in the mapping table as the basic unit, indicating the on / off state of each segment code under that condition. For example, test case 0001, with the condition of normal rated voltage mode, expects the thousands digit A segment to be 1, the battery icon to be 0, etc. The test case file can include multiple test cases, covering various scenarios such as normal display, all on, all off, and specific segment blinking.

[0041] When loading the video memory mapping configuration file, the test platform can verify that all bit numbers are continuous and free from errors such as omissions, repetitions, or exceeding boundaries. After successful verification, based on the segment code classification and layout coordinate information carried in the video memory mapping configuration file, it adaptively generates a virtual segment code screen graphical interface equivalent to the physical screen layout for manual review and mapping table verification.

[0042] Step S106: When the test platform receives the video memory data of the device under test, a frame synchronization mechanism is established. The synchronization strategy of the frame synchronization mechanism is adaptively adjusted based on the architecture of the device under test.

[0043] Specifically, during the continuous reception of video memory data from the device under test by the test platform, a frame synchronization mechanism is established to ensure that each read data corresponds to a complete and stable display frame, thereby preventing data from crossing refresh boundaries and the occurrence of interleaved intermediate states of old and new bits. The synchronization strategies during the synchronization process include:

[0044] For the bus monitoring mode described above, a hardware trigger flag is determined to indicate the completion of a frame memory update transmission. This flag could be, for example, the rising edge of the SPI chip select signal transitioning from low to high, or the bus release edge when a stop bit appears on the I²C bus. Upon detecting the corresponding edge, the currently received complete data frame is locked, and the data packet with the corresponding frame number is identified.

[0045] For the aforementioned debug interface read mode and simplified proxy reporting mode, a corresponding global flag is set at the end of the corresponding firmware memory refresh function after data is sent to the driver register or a refresh I / O operation is performed to indicate that the data is ready. The test platform can poll the flag or use a terminal method to detect it. When the flag is valid, a memory read is initiated, and the flag is retrieved after the read. This ensures that the test platform can only be detected after the memory snapshot is completed.

[0046] In addition, each data frame uploaded to the test platform includes, but is not limited to: a monotonically increasing frame sequence number, a local timestamp at the time of frame capture, and a CRC checksum covering all data. The test platform can perform sequence number continuity checks and CRC checks on consecutive frames. If the sequence numbers are not consecutive or the CRC does not match, a transmission error can be determined. If the time interval between adjacent frames exceeds a preset period, a synchronization loss alarm is triggered.

[0047] Step S108: Detect whether the device under test has physical faults or abnormal electrical connections, and generate physical test results.

[0048] Specifically, before performing logical comparison of video memory data, coverage blind spots caused by physical screen failures and electrical connection abnormalities are eliminated. The logic for eliminating these physical screen failures and electrical connection abnormalities is as follows:

[0049] In bus monitoring mode, the frequency of level transitions on the data and clock lines can be continuously monitored. If no valid transition edge is detected within consecutive memory refresh cycles, it can be determined that the physical connection is interrupted or the driver chip is powered off, directly identifying a physical link disconnection fault and terminating the current test cycle.

[0050] Alternatively, the analog-to-digital converter (ADC) channel on the device under test can be used, or an analog multiplexer sampling circuit can be integrated on it, to perform instantaneous voltage sampling at fixed test points (such as the LCD drive voltage Vlcd output terminal and the backlight LED power supply terminal). If the sampled value exceeds the preset normal operating serial port, it can be determined that the drive voltage is abnormal. Furthermore, if the backlight voltage is normal but the bus data remains constant without flipping, it can be determined that the LCD driver is faulty or that there is a short circuit / open circuit inside the screen.

[0051] Step S110: Based on the memory mapping configuration file, the segment code of the test case is translated into a bit array and compared with the actual array obtained by parsing the actual received memory data. Based on the comparison result and the physical detection result, a corresponding diagnostic report is generated.

[0052] Specifically, after performing frame synchronization verification and physical-level diagnostics, based on the definition of the current test case, the segment code aliases in the test case are translated into an expected bit array of the same length as the video memory using the video memory mapping configuration file. The actual video memory data frame, after being confirmed as valid by frame synchronization verification, is imported into the corresponding segment code mapping parsing module for state reconstruction, obtaining the actual array. The reconstructed result is then compared with the expected bit array to generate a corresponding diagnostic report. This includes:

[0053] Based on the current memory mapping configuration file, a bit array of the same length as the video memory is generated. This array can be generated statically bit-by-bit or configured by field. Then, the actual received bit data frames are XORed with the expected array in the expected state. Bits with an XOR result of 0 represent a consistent state, while bits with a result of 1 represent a deviation. A field is considered successful only if all bits match; otherwise, the entire field is marked as failed.

[0054] Additionally, when the comparison fails, the fault can be classified by combining the physical level diagnostic results from step S108, including:

[0055] If the physical pre-diagnosis is abnormal and the difference bits show a large area of ​​all zeros or all random bits, it can be diagnosed as a physical link or screen failure.

[0056] If the physical pre-diagnosis is normal but a specific segment code field continues to mismatch, it can be diagnosed as an abnormality in the driving logic or pin configuration corresponding to that segment code.

[0057] If the physical pre-diagnosis is normal but the difference bits are randomly scattered, after ruling out frame synchronization issues, it can be diagnosed that the video memory has been accidentally rewritten, which is suspected to be a firmware logic conflict.

[0058] Based on the diagnostic results, the testing platform can generate a structured record that includes the overall conclusion of pass / fail, the bit sequence number and segment code meaning of the specific difference bits, the frame timestamp, the physical pre-diagnosis status, and fault diagnosis suggestions, and push it to the production execution system (MES) or local database for archiving.

[0059] This invention provides an automated testing method for segment-coded LCD screens. The method establishes a data path between a test platform and the device under test (DUT), with the data path establishment strategy adaptively selected based on the DUT's architecture. A pre-built memory mapping configuration file and test cases are loaded onto the test platform. When the test platform receives memory data from the DUT, a frame synchronization mechanism is established, with the synchronization strategy adaptively adjusted based on the DUT's architecture. The method detects physical faults and electrical connection anomalies in the DUT, generating physical detection results. Based on the memory mapping configuration file, the segment codes of the test cases are translated into bit arrays, and compared with the actual arrays obtained by parsing the received memory data. Based on the comparison results and the physical detection results, a corresponding diagnostic report is generated. The above solution eliminates the need for OCR / image processing: no camera, lens, or light source is required, and no image recognition algorithm is needed, greatly reducing system cost and complexity; it directly verifies the original data of the driver layer, unaffected by any optical factors (dust, fingerprints, angle, lighting), achieving logical-level determinism; the communication cycle can be synchronized with the video memory refresh cycle (milliseconds to seconds), enabling synchronous comparison without delay; and it can adapt to different types of segment code screens simply by modifying the mapping table, making it highly versatile.

[0060] Please refer to the following. Figure 2 , Figure 2 A schematic diagram of an automated testing system for segment LCD screens provided in an embodiment of this specification is shown. It should be noted that... Figure 2 The segment LCD screen automated testing system shown is used to execute this manual. Figure 1 The methods shown in the embodiments are illustrated for ease of explanation, showing only the parts related to the embodiments of this specification. For specific technical details not disclosed, please refer to this specification. Figure 1 The example shown.

[0061] like Figure 2 As shown, the automated testing system for segment LCD screens can include at least:

[0062] The connection module S202 is used to establish a data path between the test platform and the device under test. The strategy for establishing the data path is adaptively selected based on the architecture of the device under test.

[0063] The pre-establishment module S204 is used to pre-establish the video memory mapping configuration file and test cases, and load them into the test platform;

[0064] The frame synchronization module S206 is used to establish a frame synchronization mechanism when the test platform receives the video memory data of the device under test. The synchronization strategy of the frame synchronization mechanism is adaptively adjusted based on the architecture of the device under test.

[0065] The physical detection module S208 is used to detect whether the device under test has physical faults or abnormal electrical connections, and generate physical detection results;

[0066] The comparison module S210 is used to translate the segment code of the test case into a bit array based on the video memory mapping configuration file, and compare it with the actual array obtained by parsing the actual received video memory data. Based on the comparison result and the physical detection result, a corresponding diagnostic report is generated.

[0067] In another embodiment, an automated testing system for segment LCD screens further includes:

[0068] The bus monitoring module is used to establish a bus monitoring mode, connect the bus data line and clock line, and obtain the memory update data frame sent by the active chip when the device under test is driven by a serial bus.

[0069] The debug interface reading module is used to establish a debug interface reading mode when the device under test is an I / O direct drive, and access the memory space mapped by the video memory through the chip's standard debug interface;

[0070] The proxy reporting module is used to establish a simplified proxy reporting mode, input data export macro to the device under test, the data export macro packages the starting address and length of the video memory, and reports to the test platform through the physical communication port after receiving the corresponding query command.

[0071] In another embodiment, an automated testing system for segment LCD screens further includes:

[0072] The hardware trigger flag module is used to preset a hardware trigger flag indicating the completion of a single frame video memory update transmission when the data path establishment strategy is bus monitoring mode, and to lock the current complete data frame after the hardware trigger flag is detected.

[0073] The flag module is used to set a corresponding flag at the end of the corresponding fixed video memory refresh function after the data transmission enters the driver register or the refresh IO operation is performed when the data path establishment strategy is debug interface reading mode or simplified agent reporting mode. The test platform polls or detects the flag and deletes the flag after it is read.

[0074] Those skilled in the art will clearly understand that the technical solutions of the embodiments in this specification can be implemented by means of software and / or hardware. In this specification, "unit" and "module" refer to software and / or hardware capable of independently performing or cooperating with other components to perform a specific function. The hardware may be, for example, a Field-Programmable Gate Array (FPGA), an Integrated Circuit (IC), etc.

[0075] Each processing unit and / or module in the embodiments of this specification can be implemented by an analog circuit that implements the functions described in the embodiments of this specification, or by software that executes the functions described in the embodiments of this specification.

[0076] See Figure 3 It shows a schematic diagram of the structure of an electronic device according to an embodiment of this specification, which can be used to implement... Figure 1 The method in the illustrated embodiment. (As shown) Figure 3 As shown, the electronic device 300 may include: at least one central processing unit 301, at least one network interface 304, user interface 303, memory 305, and at least one communication bus 302.

[0077] The communication bus 302 is used to enable communication between these components.

[0078] The user interface 303 may include a display screen and a camera. Optionally, the user interface 303 may also include a standard wired interface and a wireless interface.

[0079] The network interface 304 may optionally include a standard wired interface or a wireless interface (such as a Wi-Fi interface).

[0080] The processor 301 may include one or more processing cores. The processor 301 connects to various parts within the electronic device 300 using various interfaces and lines, and performs various functions and processes data by running or executing instructions, programs, code sets, or instruction sets stored in the memory 305, and by calling data stored in the memory 305. Optionally, the processor 301 may be implemented using at least one hardware form of Digital Signal Processing (DSP), Field-Programmable Gate Array (FPGA), or Programmable Logic Array (PLA). The processor 301 may integrate one or a combination of several of the following: a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), and a modem. The CPU primarily handles the operating system, user interface, and applications; the GPU is responsible for rendering and drawing the content required for display on the screen; and the modem handles wireless communication. It is understood that the modem may also not be integrated into the processor 301 and may be implemented as a separate chip.

[0081] The memory 305 may include random access memory (RAM) or read-only memory. Optionally, the memory 305 may include a non-transitory computer-readable storage medium. The memory 305 can be used to store instructions, programs, code, code sets, or instruction sets. The memory 305 may include a program storage area and a data storage area, wherein the program storage area may store instructions for implementing an operating system, instructions for at least one function (such as touch function, sound playback function, image playback function, etc.), instructions for implementing the above-described method embodiments, etc.; the data storage area may store data involved in the above-described method embodiments, etc. Optionally, the memory 305 may also be at least one storage system located remotely from the aforementioned processor 301. Figure 3 As shown, the memory 305, which serves as a computer storage medium, may include an operating system, a network communication module, a user interface module, and program instructions.

[0082] exist Figure 3 In the illustrated electronic device 300, the user interface 303 is mainly used to provide an input interface for the user and to acquire user input data; while the processor 301 can be used to call the image-based interactive application stored in the memory 305 and specifically perform the following operations:

[0083] Establish a data path between the test platform and the device under test, wherein the strategy for establishing the data path is adaptively selected based on the architecture of the device under test;

[0084] A pre-built video memory mapping configuration file and test cases are loaded into the test platform;

[0085] When the test platform receives the video memory data of the device under test, a frame synchronization mechanism is established. The synchronization strategy of the frame synchronization mechanism is adaptively adjusted based on the architecture of the device under test.

[0086] The test device is used to detect whether there are physical faults or abnormal electrical connections in the device under test, and generates physical test results.

[0087] Based on the aforementioned video memory mapping configuration file, the segment code of the test cases is translated into a bit array and compared with the actual array obtained by parsing the actual received video memory data. Based on the comparison results and physical detection results, a corresponding diagnostic report is generated.

[0088] As an optional embodiment of this specification, the data path establishment strategy is adaptively selected based on the architecture of the device under test, including:

[0089] When the device under test is driven by a serial bus, a bus listening mode is established, the bus data line and clock line are connected, and the memory update data frame sent by the active chip is obtained.

[0090] When the device under test is an I / O direct drive, a debug interface read mode is established to access the memory space mapped by the video memory through the chip's standard debug interface;

[0091] Alternatively, a simplified proxy reporting mode can be established, in which the input data export macro is sent to the device under test. The data export macro packages the starting address and length of the video memory and reports it to the test platform through the physical communication port after receiving the corresponding query command.

[0092] As an optional embodiment of this specification, the step of establishing a frame synchronization mechanism when the test platform receives the video memory data of the device under test includes:

[0093] When the data path establishment strategy is bus monitoring mode, a hardware trigger flag for the completion of single-frame video memory update transmission is preset, and after the hardware trigger flag is detected, the current complete data frame is locked.

[0094] When the data path establishment strategy is debug interface reading mode or simplified agent reporting mode, after the data is transmitted into the driver register or a refresh IO operation is performed, a corresponding flag bit is set at the end of the corresponding fixed video memory refresh function, so that the test platform can poll or detect the flag bit, and delete the flag bit after it is read.

[0095] As an optional embodiment of this specification, the method further includes:

[0096] The data frames transmitted to the test platform through the frame synchronization mechanism include: a monotonically increasing frame sequence number, a local timestamp of the frame capture time, and a CRC checksum overlaying the data.

[0097] As an optional embodiment of this specification, the step of detecting whether the device under test has physical faults and electrical connection abnormalities, and generating physical detection results, includes:

[0098] Monitor the level switching frequency of the data line and clock line, and determine whether there is a physical fault based on the effective transition edges within the video memory refresh cycle;

[0099] The instantaneous voltage sampling at a fixed test point is detected, and the presence of any electrical connection abnormality is determined based on the instantaneous voltage sampling.

[0100] This specification also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the above-described method. The computer-readable storage medium may include, but is not limited to, any type of disk, including floppy disks, optical disks, DVDs, CD-ROMs, microdrives, as well as magneto-optical disks, ROMs, RAMs, EPROMs, EEPROMs, DRAMs, VRAMs, flash memory devices, magnetic cards or optical cards, nanosystems (including molecular memory ICs), or any type of medium or device suitable for storing instructions and / or data.

[0101] It should be noted that, for the sake of simplicity, the foregoing method embodiments are all described as a series of actions. However, those skilled in the art should understand that this specification is not limited to the described order of actions, as some steps may be performed in other orders or simultaneously according to this specification. Furthermore, those skilled in the art should also understand that the embodiments described in this specification are preferred embodiments, and the actions and modules involved are not necessarily essential to this specification.

[0102] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0103] In the embodiments provided in this specification, it should be understood that the disclosed system can be implemented in other ways. For example, the system embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some service interface; the indirect coupling or communication connection between systems or units may be electrical or other forms.

[0104] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0105] Furthermore, the functional units in the various embodiments of this specification can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0106] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage device (CMD). Based on this understanding, the technical solution of this specification, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a memory and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this specification. The aforementioned memory includes various media capable of storing program code, such as USB flash drives, read-only memory (ROM), random access memory (RAM), portable hard drives, magnetic disks, or optical disks.

[0107] Those skilled in the art will understand that all or part of the steps in the various methods of the above embodiments can be implemented by a program instructing related hardware. The program can be stored in a computer-readable storage medium, which may include: a flash drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, etc.

[0108] The foregoing has described specific embodiments of this specification. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recited in the claims may be performed in a different order than that shown in the embodiments and may still achieve the desired result. Furthermore, the processes depicted in the drawings do not necessarily require the specific or sequential order shown to achieve the desired result. In some embodiments, multitasking and parallel processing are possible or may be advantageous.

Claims

1. An automated testing method for segment LCD screens, characterized in that, The method includes: Establish a data path between the test platform and the device under test, wherein the strategy for establishing the data path is adaptively selected based on the architecture of the device under test; A pre-built video memory mapping configuration file and test cases are loaded into the test platform; When the test platform receives the video memory data of the device under test, a frame synchronization mechanism is established. The synchronization strategy of the frame synchronization mechanism is adaptively adjusted based on the architecture of the device under test. The test device is used to detect whether there are physical faults or abnormal electrical connections in the device under test, and generates physical test results. Based on the aforementioned video memory mapping configuration file, the segment code of the test cases is translated into a bit array and compared with the actual array obtained by parsing the actual received video memory data. Based on the comparison results and physical detection results, a corresponding diagnostic report is generated.

2. The automated testing method for segment LCD screens according to claim 1, characterized in that, The data path establishment strategy is adaptively selected based on the architecture of the device under test, including: When the device under test is driven by a serial bus, a bus listening mode is established, the bus data line and clock line are connected, and the memory update data frame sent by the active chip is obtained. When the device under test is an I / O direct drive, a debug interface read mode is established to access the memory space mapped by the video memory through the chip's standard debug interface; Alternatively, a simplified proxy reporting mode can be established, in which the input data export macro is sent to the device under test. The data export macro packages the starting address and length of the video memory and reports it to the test platform through the physical communication port after receiving the corresponding query command.

3. The automated testing method for segment LCD screens according to claim 2, characterized in that, When the test platform receives the video memory data of the device under test, a frame synchronization mechanism is established, including: When the data path establishment strategy is bus monitoring mode, a hardware trigger flag for the completion of single-frame video memory update transmission is preset, and after the hardware trigger flag is detected, the current complete data frame is locked. When the data path establishment strategy is debug interface reading mode or simplified agent reporting mode, after the data is transmitted into the driver register or a refresh IO operation is performed, a corresponding flag bit is set at the end of the corresponding fixed video memory refresh function, so that the test platform can poll or detect the flag bit, and delete the flag bit after it is read.

4. The automated testing method for segment LCD screens according to claim 3, characterized in that, The method further includes: The data frames transmitted to the test platform through the frame synchronization mechanism include: a monotonically increasing frame sequence number, a local timestamp of the frame capture time, and a CRC checksum overlaying the data.

5. The automated testing method for segment LCD screens according to claim 1, characterized in that, The detection of whether the device under test has physical faults and electrical connection abnormalities generates physical detection results, including: Monitor the level switching frequency of the data line and clock line, and determine whether there is a physical fault based on the effective transition edges within the video memory refresh cycle; The instantaneous voltage sampling at a fixed test point is detected, and the presence of any electrical connection abnormality is determined based on the instantaneous voltage sampling.

6. An automated testing system for segment LCD screens, characterized in that, The system includes: The connection module is used to establish a data path between the test platform and the device under test. The strategy for establishing the data path is adaptively selected based on the architecture of the device under test. A pre-built module is used to pre-build video memory mapping configuration files and test cases, and load them into the test platform; The frame synchronization module is used to establish a frame synchronization mechanism when the test platform receives the video memory data of the device under test. The synchronization strategy of the frame synchronization mechanism is adaptively adjusted based on the architecture of the device under test. The physical detection module is used to detect whether the device under test has physical faults or abnormal electrical connections, and to generate physical detection results; The comparison module is used to translate the segment code of the test cases into a bit array based on the video memory mapping configuration file, and compare it with the actual array obtained by parsing the actual received video memory data. Based on the comparison results and physical detection results, a corresponding diagnostic report is generated.

7. The automated testing system for segment LCD screens according to claim 6, characterized in that, The system also includes; The bus monitoring module is used to establish a bus monitoring mode, connect the bus data line and clock line, and obtain the memory update data frame sent by the active chip when the device under test is driven by a serial bus. The debug interface reading module is used to establish a debug interface reading mode when the device under test is an I / O direct drive, and access the memory space mapped by the video memory through the chip's standard debug interface; The proxy reporting module is used to establish a simplified proxy reporting mode, input data export macro to the device under test, the data export macro packages the starting address and length of the video memory, and reports to the test platform through the physical communication port after receiving the corresponding query command.

8. The automated testing system for segment LCD screens according to claim 7, characterized in that, The system also includes; The hardware trigger flag module is used to preset a hardware trigger flag indicating the completion of a single frame video memory update transmission when the data path establishment strategy is bus monitoring mode, and to lock the current complete data frame after the hardware trigger flag is detected. The flag module is used to set a corresponding flag at the end of the corresponding fixed video memory refresh function after the data transmission enters the driver register or the refresh IO operation is performed when the data path establishment strategy is debug interface reading mode or simplified agent reporting mode. The test platform polls or detects the flag and deletes the flag after it is read.

9. An electronic device, comprising a processor and a memory; The processor is connected to the memory; The memory is used to store executable program code; The processor runs a program corresponding to the executable program code by reading the executable program code stored in the memory, in order to perform the method as described in any one of claims 1-5.

10. A computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the method as described in any one of claims 1-5.

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