Universal unified DAG six-layer integrated AI full-stack computing architecture method

Abstract

The application discloses a kind of six-layer integrated AI full-stack computing architecture methods of global uniform DAG, this method is refined layer by layer, resource binding and hardware mapping under different granularity by same logic DAG, solve the problem that task semantics is lost in layer-by-layer transmission, high-order dependence is difficult to accurately express, execution state cannot be structured back, abnormal recovery depends on overall retry, checkpoint reference is easy to be suspended, security SLA cannot be conducted across layer.The scheme realizes the lossless transmission of task semantics, dependency relationship, resource constraint, priority, SLA, security policy, exception strategy and global optimization target in six-layer architecture, and the structured back of bottom execution state to top layer, supports the high-concurrency, high-reliability operation of multi-agent system in large-scale, multi-department, multi-business scenario.

Description

Technical Field

[0001] This invention belongs to the technical field of artificial intelligence algorithms, specifically relating to a six-layer integrated AI full-stack computing architecture method based on a globally unified DAG. Background Technology

[0002] With the deployment of large-scale modeling and intelligent agent technologies in enterprise scenarios, enterprise applications are gradually evolving from single question-and-answer model calls to complex task execution systems involving a large number of intelligent agents. Within an enterprise, the same technology stack often needs to simultaneously support multiple types of intelligent agents, including customer service agents, sales agents, R&D agents, financial agents, operations and maintenance agents, knowledge management agents, workflow approval agents, and data analysis agents. These agents do not operate in isolation but share enterprise knowledge bases, business databases, model services, tool services, permission systems, workflow systems, and underlying GPU, NPU, CPU, storage, and network resources.

[0003] In such enterprise-level multi-agent applications, numerous agent tasks are generated concurrently, with data dependencies, business dependencies, permission dependencies, model dependencies, and resource dependencies existing between different agents. For example, a customer issue handling process may simultaneously trigger a knowledge retrieval agent, a contract analysis agent, a pricing agent, an approval agent, and a work order agent; a research and development task may simultaneously invoke a code analysis agent, a document generation agent, a testing agent, and a deployment agent. These tasks require unified modeling, scheduling, execution, and feedback on the same AI technology stack and the same set of underlying hardware resources.

[0004] Therefore, enterprise-level multi-agent systems are no longer simply about calling a large model or a single agent; they require solving the problem of coordinated scheduling of multiple agents, models, services, data sources, and hardware resources within the same execution architecture. Without a unified architecture, each agent will generate its own task flow, call its own models and tools, and consume its own hardware resources. This leads to fragmented task representations, severe resource contention, difficulty in decentralizing permission constraints, inability to uniformly report execution status, and reliance on manual intervention for anomaly recovery. Ultimately, this makes it difficult to support the concurrent operation of agents across large-scale, multi-departmental, and multi-business scenarios within an enterprise.

[0005] Existing artificial intelligence systems typically employ a layered, modular approach. The upper layer describes tasks using natural language, API calls, business processes, workflow configurations, or multi-agent orchestration; the middle layer executes tasks through model services, retrieval services, database services, tool services, and business services; and further down, through model computation graphs, operator graphs, runtime schedulers, distributed communication libraries, and hardware drivers, tasks are translated into specific actions on GPUs, NPUs, CPUs, DMA channels, network queues, storage I / O, or other hardware units.

[0006] In this type of technical solution, each layer often has incompatible data structures and execution models. The task layer uses natural language, scripts, state machines, or workflow graphs; the agent layer uses tool call chains, task queues, or service orchestration graphs; the service layer uses service registries, RPC calls, model routing tables, or retrieval links; the operator layer uses computation graphs, operator IRs, tensor dependencies, and memory plans; the scheduling layer uses task queues, priority queues, device scheduling tables, or resource allocators; and the hardware layer uses execution flows, queues, events, instructions, memory addresses, and device handles. Inter-layer connections primarily rely on interface calls, format conversions, and local protocol connections.

[0007] While existing full-stack AI systems can perform general tasks, in complex AI systems, multi-agent collaboration, multi-model hybrid deployment, distributed training or inference, heterogeneous hardware execution, and high-reliability operation scenarios, issues arise due to fragmented data structures at each layer, lack of high-order dependency expression, significant differences in lifecycles, scattered exception handling, and imperfect checkpoint mechanisms. These issues lead to problems such as the loss of task semantics during layer-by-layer transmission, the inability to return execution status in a structured manner, the need for overall retrying of exception recovery dependencies, and the inability to propagate safety SLAs across layers. Summary of the Invention

[0008] This invention provides a six-layer integrated AI full-stack computing architecture method based on a globally unified DAG to solve the aforementioned technical problems. Specifically, the technical solution adopted is as follows: A six-layer integrated AI full-stack computing architecture method with a globally unified DAG includes the following steps: S1. The top-level task decision layer receives enterprise-level multi-agent task input, generates the top-level task DAG and DAG version number, creates sharded storage and writes it to the columnar node table, compresses the adjacency edge table and attribute pool, and generates the initial constraint signature. S2. Identify ordinary and higher-order dependencies in the top-level task DAG. Generate a hyperedge convergence node H by using hyperedge nodeization for higher-order dependencies. Initialize the necessary condition bitmap, dependency satisfaction bitmap, failure bitmap, state, one-time release flag and trigger expression of H. S3. Perform legality verification on the top-level task DAG. After the verification is passed, the top-level task decision layer maps down through the agent task DAG layer, service execution DAG layer, operator super DAG layer, and distributed scheduling layer to the hardware execution layer. Each mapping is written by the computing system to the cross-layer mapping, generating or inheriting constraint signatures, and updating the ancestor cache. S4. During execution, status events are added to the event log. When the preceding node is completed, the dependency satisfaction bitmap of H is updated through atomic bitmap operations. After H meets the triggering conditions, a ready event is published to the successor node of H through a one-time release flag. S5. If an exception occurs during execution, the hardware execution layer is traced upwards to the top-level task decision layer through cross-layer mapping to locate the top-level task node. Starting from the exception node, the explosion radius BFS is executed to determine the affected subgraph and checkpoint boundary. A patch DAG version is generated and the patch entry node and patch merge node are remounted back to the original DAG using versioned edge redirection. S6. Read the lightweight checkpoints, parse the input and output references in the checkpoints through lifecycle management, and after confirming the data is valid, merge the execution results of each layer from the hardware execution layer to the agent task DAG layer into the top-level task decision layer.

[0009] Furthermore, the sharded storage is sharded according to tenant, task, DAG version, level, and execution partition. Each shard internally consists of a columnar node table, a compressed adjacency edge table, an attribute pool, a mapping index, and an event log. The columnar node table stores node identifier, level identifier, node type, status, version number, parent node reference, first outgoing edge reference, first incoming edge reference, attribute offset, constraint signature reference, and checkpoint reference. The compressed adjacency edge table stores edge identifier, source node, target node, edge type, flag bit, attribute offset, next outgoing edge reference, and next incoming edge reference.

[0010] Furthermore, the internal structure of the super-edge aggregation node H is maintained by the computing system, including the preceding node array, the succeeding node array, the necessary condition bitmap, the optional condition bitmap, the dependency satisfaction bitmap, the failure bitmap, the state, the release flag, the trigger expression, the resource aggregation rule, the security verification rule, the SLA verification rule, the exception policy, the timeout time and the version number; the state of H is managed by the computing system, and includes at least the waiting state, the partially satisfied state, the ready state, the released state, the blocked state, the failed state, the recovering state, and the archived state.

[0011] Furthermore, when H processes the completion event of the preceding node, it first performs deduplication based on the event identifier. The method includes: finding the position of the preceding node in the preceding node set based on the preceding node identifier, and setting the corresponding position in the dependency satisfaction bitmap to satisfied through atomic bitmap operations; if the bit has already been satisfied, the completion event is determined to be a duplicate event and the processing is terminated; if there is no necessary failure, it is determined whether the dependency satisfaction bitmap has covered the necessary condition bitmap, and further execution of trigger expression, resource rules, security rules and service quality rules verification is performed; after all are satisfied, the H node state is switched to ready through atomic comparison exchange, and the ready event is published to the successor node of H by releasing the flag once.

[0012] Furthermore, the constraint signature includes: fixed-length, variable-length segments, and a digest field; Write the magic number, structure version number, source level, and target level to a fixed length; Variable-length writes include strong dependency set, weak dependency set, eliminated pseudo-dependency set, resource cap, SLA budget, security label, necessary permissions, model version range, data version range, exception policy, checkpoint policy, and target vector; The digest field is obtained by normalizing and sorting the set fields in the variable-length data, then concatenating the fields other than the digest in the fixed-length data with the normalized variable-length data, and finally calculating the cryptographic hash function.

[0013] Furthermore, the SLA budget verification calculates the critical path based on the subgraph structure, including: if the parent node is expanded into a subgraph, the child node has an execution budget, and the edges have communication or scheduling overhead, then the calculated critical path of the subgraph is equal to the sum of the budgets of the longest dependent path; the critical path plus the reserved margin is required to be less than or equal to the parent node's SLA deadline; for large model inference nodes, the child node budget is calculated using the planned budget upper limit, according to the input length, maximum number of generated tokens, model configuration, and target hardware throughput.

[0014] Furthermore, the methods for generating patch DAGs include: Determine the input and output boundaries. The input boundaries are the upstream nodes or checkpoint nodes that are required but still valid in the affected subgraph. The output boundaries are the downstream nodes that need to be reconnected after the affected subgraph is restored. A patch entry node is created to receive data and status from the input boundary. Alternate service nodes, alternative operator nodes, alternative resource binding nodes, and recovery checkpoint nodes are also created. Finally, a patch merge node is created to connect the patch results back to the subsequent paths of the original DAG. Patch DAG merging uses versioned edge redirection. In the new version, new edges are added from the input boundary to the patch entry node, and new edges are added from the patch merged to the successor node of the output boundary. The original affected edges are marked as visible in the old version but not in the new version in the version visibility table.

[0015] Furthermore, lifecycle management includes: object identifier, storage type, cluster identifier, host identifier, device identifier, device globally unique identifier, address or offset, data size, generation number, reference count, producer node, number of remaining consumers, fixed status, cross-domain fetch strategy, and verification digest. The generation number is assigned by the computing system to prevent dangling references caused by address reuse, to allow the same video memory address to be reused by the memory pool, and to assign a new generation number to a new data object. During checkpoint recovery, both the object identifier and generation number are verified. If the addresses are the same but the generation numbers are different, the old reference is deemed invalid.

[0016] Furthermore, the lifecycle management release is controlled by the computing system, which sequentially checks the reference count, the number of remaining consumers, the active checkpoint, the rollbackable version, and the fixed state. If the reference count is not zero, there are still consumers who have not completed, there are still active checkpoints, there are still rollbackable versions, or the data is in a fixed state, then the data is kept unreleased. Once all the above conditions are met, the corresponding host memory, video memory, remote cache, or object storage reference is released according to the storage type, device identifier, address or offset, and generation number, and the data handle is marked as released.

[0017] Furthermore, methods for computational systems to perform cross-layer security, authorization, and SLA lossless transfer include: When generating the task DAG, the top-level task decision layer writes the security domain, data category, permission label, access subject, model authorization scope, external interface permission, latency budget, reliability level, cost limit, and recovery level for each node or subgraph. This information is then written into the constraint signature and inherited layer by layer from the agent task DAG layer to the hardware execution layer. When selecting a service instance, the service execution DAG layer checks whether the service instance belongs to an allowed security domain. When expanding operators, the operator super DAG layer retains the data category and permission label. During scheduling, the distributed scheduling layer excludes devices and network paths that do not meet isolation requirements. During execution, the hardware execution layer ensures that hardware queues, memory areas, cache areas, and communication channels meet isolation requirements. If any layer fails to meet security or SLA constraints, a security or SLA conflict event is generated and returned to the top-level task decision layer.

[0018] Furthermore, the method for versioned edge redirection includes: storing the atomic current version number pointer and the visibility table of each version in the version root node; after completing the node, edge, mapping record, constraint signature and checkpoint verification in the invisible pre-commit version of the patch DAG, writing it into the commit record, and updating the current version number from v to v+1 through an atomic comparison swap operation; after the atomic comparison swap is successful, the newly entered scheduling thread and execution thread are guided by the computing system to read only the new version pointed to by the current version number, and execute according to the visible edge table of the new version; threads that already hold the old version v are allowed by the computing system to continue to complete the nodes that are allowed to be completed in the old snapshot, and their active reader count is used by the computing system to prevent the old version from being prematurely reclaimed.

[0019] Furthermore, the version compression of the DAG version number includes: nodes and edges still referenced by active execution threads, active checkpoints, or rollbackable versions; each version has an active reader count and rollback deadline maintained by the computing system; when the active reader count is zero, the rollback deadline has passed, the related data handle reference count is zero, and the task at the top-level task decision layer has been archived, the compressor is triggered to delete invisible edges and orphaned nodes of the old version; when it is required to retain execution evidence, the compressor is triggered to delete hot path indexes and runtime objects, and write node summaries, constraint signature summaries, mapping summaries, and event summaries to the archive snapshot.

[0020] Furthermore, the explosion radius BFS starts from the abnormal node and performs a bounded breadth-first search along the edges where the propagation result is incorrect or the state is blocked; the types of edges involved in the propagation are identified as data-dependent edges, triggering edges, recovery edges, and necessary dependent edges connecting super-edge convergence nodes; the search stops when a valid checkpoint barrier is encountered.

[0021] Furthermore, the search stops when a valid checkpoint barrier is encountered: the node or boundary subgraph has a recoverable checkpoint, and the checkpoint's input reference, version number, constraint signature, and security domain are still valid; the search stops when a node that has been completed and whose output has been stably consumed by subsequent nodes and does not depend on the output of abnormal nodes is encountered.

[0022] Furthermore, when the search encounters a super-edge convergence node, the dependency satisfaction bitmap of the H node is checked. If the abnormal node corresponds to a necessary bit, then H and its successors are included in the affected set; if the abnormal node corresponds to an optional bit and the triggering expression can still be satisfied, then H is determined to remain valid.

[0023] Furthermore, execution is traced upwards from the hardware execution layer to the top-level task decision layer through cross-layer mapping and ancestor caching, including: When an error occurs in a low-level hardware node, the shard storage where the hardware node is located is first located by the node identifier of the hardware node, and then the mapping record of the node is read from the mapping index. If the ancestor cache in the mapping record already contains the top-level task decision layer node, the task node of the top-level task decision layer is returned directly. Otherwise, starting from the current erroneous node, the search is performed layer by layer upward along the parent node relationship in the mapping record until the top-level task decision layer is reached.

[0024] Furthermore, the inclusion verification of permission tags is performed through bitmap operations, including: When the set of permissions required by the parent node is the parent node's necessary permission mask, and the permissions actually used by the child node are the child node's usage permission mask, then verifying that the bitwise AND operation between the child node's usage permission mask and the parent node's necessary permission mask equals the child node's usage permission mask indicates that the permissions used by the child node must not exceed the scope granted by the parent node. When the security label required by the parent node is the mask that the parent node must have, and the actual domain label of the child node is the child node domain mask, then the bitwise AND operation between the child node domain mask and the mask that the parent node must have is equal to the mask that the parent node must have. When the parent node's prohibited label is the parent node's prohibited mask, then the bitwise AND operation between the child node's field mask and the parent node's prohibited mask equals zero.

[0025] Furthermore, the legality verification includes: acyclicity verification, dependency integrity verification, resource satisfiability verification, security compliance verification, SLA budget verification, constraint signature verification, and checkpoint policy verification; after the verification is passed, the task DAG is mapped layer by layer according to the six-layer architecture.

[0026] Furthermore, the hardware execution layer manifests as an interaction interface between the hardware runtime or driver layer, converting scheduling results into calls to the CUDA runtime, GPU driver, NPU runtime, DMA driver, RDMA communication stack, storage driver, or other hardware runtime interfaces, including hardware streams, queues, events, kernel calls, DMA transfers, network communication, and storage I / O. By sending execution requests to the hardware runtime or driver layer and capturing the events, error codes, completion signals, and performance counters returned by it, a closed-loop association between the full-stack DAG and the underlying execution state is achieved.

[0027] Furthermore, the audit trail includes: DAG version, node status, mapping relationship, constraint signature, superedge node status, data handle lifecycle, abnormal events, patched DAG and final output; after the system execution is completed, the hardware execution results of the hardware execution layer, the operator results of the operator super DAG layer, the service results of the service execution DAG layer, and the agent results of the agent task DAG layer are successively merged into the top-level task decision layer.

[0028] The advantage of this invention also lies in the six-layer integrated AI full-stack computing architecture method of the global unified DAG provided. It replaces the traditional fragmented layered call stack with the same logical DAG at different granularities of layer-by-layer refinement, instantiation, resource binding and hardware mapping. It solves the technical problems in the prior art such as loss of task semantics in layer-by-layer transmission, difficulty in accurately expressing high-order dependencies, inability to return execution status in a structured way, overall retry for exception recovery, easy dangling of checkpoint references and inability to pass security SLA across layers.

[0029] This solution achieves lossless transmission of task semantics, dependencies, resource constraints, priorities, SLAs, security policies, exception policies, and global optimization goals in a six-layer architecture through sharded storage, hyperedge nodeization, cross-layer mapping, constraint signature inheritance layer by layer, patch DAG local recovery, lifecycle management, and versioned edge redirection. It also enables structured backhaul of the execution state from the lower layer to the upper layer and dynamic replanning, supporting the high-concurrency and high-reliability operation of enterprise-level multi-agent systems in large-scale, multi-department, and multi-business scenarios. Attached Figure Description

[0030] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0031] Figure 1 This is a schematic diagram of the six-layer integrated AI full-stack computing architecture method based on a globally unified DAG proposed in this application. Detailed Implementation

[0032] Embodiments of the present invention are described in detail below. Examples of these embodiments are illustrated in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain the present invention, and should not be construed as limiting the present invention.

[0033] In the description of this application, it should be noted that, unless otherwise specified and limited, the terms "installation", "connection" and "linkage" should be interpreted broadly, and can refer to mechanical or electrical connections, or internal connections between two components, or direct connections. "Up", "down", "left", "right", etc., are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may change.

[0034] like Figure 1 The diagram illustrates a six-layer integrated AI full-stack computing architecture method based on a globally unified DAG (Directed Acyclic Graph). This method is executed by a computing system comprising a six-layer architecture: a top-level task decision layer (Layer 0), an agent task DAG layer (Layer 1), a service execution DAG layer (Layer 2), an operator super DAG layer (Layer 3), a distributed scheduling layer (Layer 4), and a hardware execution layer (Layer 5). The method specifically includes the following steps: S1. The top-level task decision layer of the computing system receives enterprise-level multi-agent task input, generates the top-level task DAG and DAG version number, creates sharded storage (graph sharding) and writes it to the columnar node table, compressed adjacency edge table and attribute pool, and generates initial constraint signatures.

[0035] In existing technologies, each layer possesses incompatible data structures and execution models. The task layer uses natural language or workflow graphs, the agent layer uses tool call chains, the service layer uses RPC (Remote Procedure Call), the operator layer uses computation graphs, the scheduling layer uses task queues, and the hardware layer uses execution flow and device handles. Connections between layers rely on interface calls and format conversions, resulting in fragmented task representations and a lack of a unified task structure across the entire stack. This step establishes a unified data structure foundation across the six-layer architecture by generating a top-level task DAG and global version number from the task entry point, creating sharded storage for unified writing to a columnar node table, compressing an adjacency edge table, and an attribute pool. The generation of initial constraint signatures ensures that task semantics, SLA (Service Level Agreement), and security policies are structurally encapsulated from layer 0, enabling lossless transmission to subsequent layers and preventing task loss and reinterpretation during transformations at different layers.

[0036] S2, the computing system identifies ordinary and higher-order dependencies in the top-level task DAG, and generates a super-edge convergence node H by using super-edge nodeization for higher-order dependencies. The computing system initializes the necessary condition bitmap, dependency satisfaction bitmap, failure bitmap, state, one-time release flag and trigger expression of H.

[0037] Existing conventional DAG modeling methods struggle to accurately represent high-order dependencies. A single edge in a conventional DAG typically describes a simple dependency from a predecessor node to a successor node. However, in complex AI tasks, many relationships are not simple one-to-one dependencies. For example, an agent's task can only execute if it simultaneously satisfies model version, data permissions, knowledge base availability, GPU memory, network location, and security policies. Multiple model results collectively determine whether a successor task is initiated. If expressed using only multiple ordinary edges, the system easily loses the semantics of shared satisfaction, shared triggering, and shared failure handling. This step transforms high-order dependencies into explicit nodes H in a globally unified DAG through hyperedge nodeization, making previously unschedulable high-order composite logic a standard node in the DAG. The H node carries a necessary condition bitmap, a dependency satisfaction bitmap, a failure bitmap, a state machine, and a triggering expression, accurately expressing the semantics of multiple conditions being satisfied. Furthermore, atomic bitmaps and CAS state transitions ensure state consistency under high-concurrency completion events, avoiding duplicate triggering, missed triggering, and race conditions.

[0038] S3. The computing system performs a validity check on the top-level task DAG. After the check is passed, the top-level task decision layer of layer 0 maps down through layer 1 agent task DAG layer, layer 2 service execution DAG layer, layer 3 operator super DAG layer, layer 4 distributed scheduling layer to layer 5 hardware execution layer. Each mapping is written by the computing system to the mapping index for cross-layer mapping, generating or inheriting constraint signatures, and updating the ancestor cache.

[0039] Specifically, step S1 generates the initial constraint signature of the top-level task DAG at layer 0, while "generating or inheriting constraint signatures" in step S3 refers to the process where each lower-level child node / subgraph inherits the constraint signature from its parent node during the layer-by-layer mapping process, or generates a derived constraint signature when derivation changes occur such as service instantiation, resource binding, SLA budget decomposition, or hardware adaptation. In other words, generating or inheriting constraint signatures means that each time a mapping is written across layers by the computing system, lower-level nodes with unchanged constraints inherit the parent node's constraint signature; for lower-level nodes that have undergone resource binding, service instantiation, budget decomposition, or hardware adaptation, a derived constraint signature is generated based on the parent node's constraint signature, and the ancestor cache is updated.

[0040] In existing technologies, the data structures at each layer are incompatible. Inter-layer connections primarily rely on interface calls, format conversions, and local protocol connections. Upper-layer task objectives, business semantics, dependencies, resource requirements, priorities, SLAs, security policies, and exception policies are easily lost, simplified, or reinterpreted by lower layers during layer-by-layer transformation. Lower-level hardware execution actions often only know to execute a specific kernel, access a certain memory segment, or call a service, but cannot know the corresponding top-level task objectives and global constraints. This step, through a six-layer layer-by-layer mapping mechanism, refines, instantiates, binds resources, and maps the same globally unified DAG at different granularities, rather than using fragmented call stacks. Each mapping is written to a cross-layer mapping and generates or inherits constraint signatures, ensuring lossless transmission of task semantics, dependencies, resource constraints, priorities, SLAs, security policies, and exception policies between layers 0 to 5. Ancestor cache updates enable lower-level nodes to quickly locate top-level task nodes, achieving cross-layer tracing and avoiding the overhead of full graph traversal.

[0041] S4. During the execution process, the computing system adds status events to the event log. When the preceding node completes, the computing system updates the dependency satisfaction bitmap of H through atomic bitmap operations. After H meets the triggering conditions, the computing system publishes a ready event to the successor node of H through a one-time release flag.

[0042] Existing systems lack graph storage methods capable of spanning different lifecycles and granularities. The lifecycle of the top-level task graph may last for hours or days, while the lifecycle of the underlying operator graph and hardware events may only be in the milliseconds or even microseconds. Simply using a regular memory object to store the entire graph either cannot handle the massive number of underlying nodes or leads to memory fragmentation, lock contention, and GC jitter due to frequent node creation and destruction. Furthermore, in high-concurrency AI systems, the completion events of multiple preceding nodes may arrive simultaneously, making traditional locking mechanisms prone to contention and duplicate triggering. This step sequentially appends state events to the event log, avoiding lock contention and GC jitter caused by random modifications. Atomic bitmap operations ensure that multiple threads updating the dependency satisfaction bitmap of H simultaneously do not overwrite each other's results, guaranteeing state consistency under high-concurrency completion events. One-time release of the marker ensures that even if multiple threads discover that H satisfies the condition almost simultaneously, only one thread can send subsequent notifications, preventing duplicate triggering and race conditions, enabling the system to operate stably in high-concurrency scenarios.

[0043] S5. If an exception occurs during execution, the computing system traces back from the hardware execution layer at layer 5 to the top task decision layer at layer 0 through cross-layer mapping to locate the top task node. Starting from the exception node, it performs a BFS with an explosion radius to determine the affected subgraph and checkpoint boundaries. The computing system generates a patch DAG version and uses versioned edge redirection to mount the patch entry node and patch merge node back to the original DAG.

[0044] Existing monitoring and feedback mechanisms output the underlying state as logs, metrics, alarms, or trace data separately, rather than as part of the original task structure and transmitted back to the top layer. Information such as underlying execution latency, resource utilization, service failures, dependency blocking, hardware failures, and security denials cannot be accurately located to nodes and dependencies in the original task graph. Existing exception handling mechanisms are scattered across the gateway, task framework, model service, scheduler, and hardware runtime. Each layer has its own retry, timeout, circuit breaker, rollback, or migration strategies, but there is no unified exception abstraction or a cross-layer self-healing path based on the original task structure. Local failures can escalate into dependency blocking, service avalanches, or overall task failure. This step achieves cross-layer tracing from layer 5 to layer 0 through cross-layer mapping, enabling low-level hardware anomalies to be quickly located to top-level task nodes, avoiding full graph traversal. The explosion radius BFS accurately calculates the affected subgraph along data dependency edges, trigger edges, recovery edges, and necessary super-edge dependencies, stopping at effective checkpoint barriers to ensure that only the truly affected parts are replaced. Patch DAG versions and versioned edge redirection enable running graph topology changes to have explicit graph pruning and merging algorithms, which can replace only the affected subgraphs, maintain the execution results and constraint states of unaffected nodes, and support local recovery and lossless continuation, rather than overall retry.

[0045] The aforementioned checkpoint structure includes the DAG version number, node status, set of completed nodes, set of incomplete nodes, satisfied dependency bitmap, hyperedge convergence node trigger status, input data handle set, output data handle set, service instance identifier, resource binding information, iteration step number, random seed, external data version, constraint signature, and exception policy. For hyperedge convergence nodes, the checkpoint stores the dependency satisfaction bitmap, failure bitmap, one-time release flag, and status to ensure that subsequent nodes are not repeatedly released after recovery.

[0046] S6. The computing system reads the lightweight checkpoints, parses the input and output references in the checkpoints through the data handle lifecycle management, and verifies the data validity by verifying the object identifier, generation number, verification summary and constraint signature. After execution, the computing system merges the execution results of each layer from layer 5 to layer 1 into layer 0 to form the final task result and complete audit trail.

[0047] Existing checkpointing mechanisms are mostly centered on model state, service instance state, or container state, lacking lightweight checkpoints based on the global task DAG. If checkpoints only store input / output pointers without lifecycle management, dangling references will form after the underlying memory or GPU memory is released, and data validity cannot be guaranteed during recovery. Existing security and SLA control mechanisms typically remain at the entry gateway, service layer, or database permission layer, failing to propagate layer by layer along the task structure to the underlying operators and hardware execution. This step replaces raw pointers with lifecycle management, using object identifiers and generation numbers to prevent dangling references caused by address reuse. Even if the same GPU memory address is reused by the memory pool, the new data object obtains a new generation number, allowing the old reference to be determined as invalid during recovery. Verification digests and constraint signatures ensure data integrity and the continued validity of security policies after recovery. Layer-by-layer merging forms a complete audit trail, making the execution process fully traceable and meeting enterprise compliance requirements.

[0048] The aforementioned audit trail is generated by the computing system and includes: DAG version, node state, mapping relationship, constraint signature, hyperedge node state, data handle lifecycle, abnormal events, patched DAG, and final output. After system execution, the computing system merges the layer 5 hardware execution results, layer 3 operator results, layer 2 service results, and layer 1 agent results layer by layer into layer 0, forming the final task result and complete audit trail at layer 0. In existing technologies, monitoring data is usually output as an independent log, separated from the task structure, making it difficult to fully trace the task execution process. This solution treats the audit trail as an inherent component of the globally unified DAG, recording complete information from the DAG version to the final output, including node state changes, cross-layer mapping relationships, constraint signature inheritance, hyperedge node triggering, data handle lifecycle, abnormal event handling, and patched DAG application. After execution, the results from each layer are merged into layer 0, forming a unified final task result and complete audit trail. In this way, through structured audit trails and layer-by-layer merging mechanisms, the task execution process is fully traceable, meeting corporate compliance and audit requirements, supporting problem identification, performance optimization, and responsibility definition, while ensuring the accuracy and consistency of the final task results.

[0049] In summary, this invention constructs a six-layer integrated AI full-stack computing architecture based on a globally unified DAG. It replaces the traditional fragmented layered call stack with the same logical DAG refined, instantiated, resource-bound, and hardware-mapped at different granularities. This solves the technical problems in existing technologies, such as the loss of task semantics during layer-by-layer transmission, difficulty in accurately expressing higher-order dependencies, inability to structurally transmit execution states, reliance on overall retries for exception recovery, dangling checkpoint references, and the inability to propagate security SLAs across layers. Through sharded storage, hyperedge nodeization, cross-layer mapping, layer-by-layer inheritance of constraint signatures, patch DAG local recovery, lifecycle management, and versioned edge redirection, it achieves lossless transmission of task semantics, dependencies, resource constraints, priorities, SLAs, security policies, exception policies, and global optimization goals within the six-layer architecture. It also enables structured transmission and dynamic replanning of execution states from lower layers to higher layers, supporting high-concurrency and high-reliability operation of enterprise-level multi-agent systems in large-scale, multi-department, and multi-business scenarios.

[0050] As a specific solution, sharded storage is partitioned by the computing system according to tenant, task, DAG version, hierarchy, and execution partition. Each shard internally consists of a columnar node table, a compressed adjacency edge table, an attribute pool, a mapping index, and an event log. The columnar node table stores node identifier, hierarchy identifier, node type, state, version number, parent node reference, first outgoing edge reference, first incoming edge reference, attribute offset, constraint signature reference, and checkpoint reference. The compressed adjacency edge table stores edge identifier, source node, target node, edge type, flag, attribute offset, next-hop outgoing edge reference, and next incoming edge reference. The attribute pool stores variable-length attributes such as SLAs, permission tags, resource vectors, model versions, exception policies, and trigger expressions. The event log sequentially appends node state changes, hardware completion signals, exception events, patch DAG commits, and GC release records. This scheme uses multi-dimensional sharding for storage, allowing the top-level task graph and the bottom-level operator graph to be stored in different physical partitions according to their respective lifecycles and granular characteristics. Simultaneously, a unified NodeId and cross-layer mapping maintain logical consistency. Columnar node tables are suitable for high-frequency memory access, compressed adjacency edge tables save storage space, attribute pools store variable-length attributes, mapping indexes support cross-layer traceability, and event logs support fault recovery and auditing. In this way, through hierarchical sharding storage, the globally unified DAG can support multi-granularity nodes across business tasks, agents, services, operators, schedulers, and hardware actions, avoiding the scalability limitations of monolithic memory graphs while maintaining logical consistency and cross-layer traceability.

[0051] As a specific scheme, the internal structure of the hyperedge aggregation node H is maintained by the computing system, including the preceding node array, the succeeding node array, the necessary condition bitmap, the optional condition bitmap, the dependency satisfaction bitmap, the failure bitmap, the state, the release flag, the trigger expression, the resource aggregation rule, the security verification rule, the SLA verification rule, the exception policy, the timeout time and the version number; the state of H is managed by the computing system, and includes at least the WAITING state, the PARTIAL state, the READY state, the RELEASED state, the BLOCKED state, the FAILED state, the RECOVERING state, and the ARCHIVED state. Among them: WAITING indicates that no necessary preceding nodes have been completed yet; PARTIAL indicates that some preceding nodes have been completed but the triggering conditions have not yet been met; READY indicates that the necessary conditions have been met and security, resource, and SLA verifications have passed; RELEASED indicates that H has sent a release signal to the successor node once; BLOCKED indicates that the necessary conditions have not been met and there is a recoverable blockage, such as a temporary shortage of resources; FAILED indicates that the necessary conditions have failed or timed out and cannot be recovered according to the local policy; RECOVERING indicates that H is waiting for patch DAG or retry results; ARCHIVED indicates that H and its successor triggering process have been archived.

[0052] In this scheme, the H node serves as the standard node for high-order dependency semantics entering the DAG scheduling system. Its internal structure not only records the set relationships between predecessor and successor nodes, but also distinguishes different types of dependency strength through necessary and optional condition bitmaps. It records the state of concurrent completion events through dependency satisfaction and failure bitmaps, and ensures the atomicity of scheduling event publication through a state machine and release flags. Trigger expressions support flexible rules such as "at least several must be satisfied," "satisfy weight thresholds," and "satisfy the highest priority group." Resource aggregation rules, security verification rules, SLA verification rules, and exception policies enable the H node to handle complex admission conditions and recovery strategies. Timeouts prevent the H node from waiting indefinitely, and version numbers support concurrent updates of patch DAGs. Thus, through the complete internal structure of the H node, high-order dependencies with multiple inputs, outputs, resources, and constraints can maintain state consistency under high-concurrency completion events, avoiding duplicate triggers, missed triggers, and race conditions, while supporting flexible trigger conditions and exception recovery strategies.

[0053] Furthermore, when H processes the completion event of the preceding node, the computing system first performs deduplication based on the event identifier. The method includes: the computing system finds the position of the preceding node in the preceding node set based on the preceding node identifier, and sets the corresponding position in the dependency satisfaction bitmap to satisfied through atomic bitmap operations; if the bit has already been satisfied, the computing system determines that the completion event is a duplicate event and terminates the processing; if there is no necessary failure, the computing system determines whether the dependency satisfaction bitmap has covered the necessary condition bitmap, and further executes the verification of trigger expression, resource rules, security rules and service quality rules; after all are satisfied, the computing system switches the H node state to ready through atomic comparison exchange, and ensures that only one thread publishes the ready event to the successor node of H through a one-time release of the flag.

[0054] In high-concurrency AI systems, completion events from multiple preceding nodes may arrive at node H simultaneously, potentially leading to duplicate events due to network retransmission or retry mechanisms. This solution avoids duplicate processing by using event deduplication with event identifiers, ensures that multiple threads updating simultaneously do not overwrite each other's results through atomic bitmap operations, guarantees that all necessary preconditions are met by checking the overlap between dependency satisfaction bitmaps and necessary condition bitmaps, ensures the integrity of admission conditions through trigger expressions and various rule validations, and ensures that only one thread can publish the ready event of the successor node through atomic comparison swaps and one-time release of flags. This mechanism pushes the resolution of concurrency conflicts down to the H node, freeing the upper-level scheduler from concern with concurrency details. Thus, through atomic bitmaps and CAS state transition mechanisms, node H maintains state consistency even under high-concurrency completion events, avoiding duplicate triggers, missed triggers, and race conditions. Simultaneously, event deduplication and rule validation ensure the accuracy and completeness of scheduling decisions.

[0055] As a preferred approach, the constraint signature is generated by the computation system and includes: a fixed-length segment, several variable-length segments, and a digest field. The fixed-length segment is written by the computation system with the magic number, structure version number, source level, and target level. The variable-length segment is written by the computation system with the strong dependency set, weak dependency set, eliminated pseudo-dependency set, resource limit, SLA budget, security label, necessary permissions, model version range, data version range, anomaly policy, checkpoint policy, and target vector. The digest field is obtained by the computation system by normalizing and sorting the set fields in the variable-length segment, concatenating the fields in the fixed-length segment (excluding the digest) with the normalized variable-length segment, and then calculating the cryptographic hash function SHA256.

[0056] In existing technologies, security and SLA control mechanisms typically remain at the entry gateway, service layer, or database permission layer, failing to propagate layer by layer along the task structure to the underlying operators and hardware execution. Constraint signatures, as structured digests for cross-layer inheritance verification and conflict localization, achieve fast comparison through fixed length, preserve interpretable constraint content through variable length, and prevent lower-layer tampering or loss of constraints through SHA256 digests. The strong and weak dependency sets in the variable-length signature distinguish dependency strength, eliminating pseudo-dependency sets to prevent the reintroduction of human intervention at lower layers. Fields such as resource limits, SLA budgets, security labels, and necessary permissions make the constraint content computable, verifiable, and conflict-localizable. This solution, through structured constraint signatures, enables cross-layer constraint propagation with a computable, verifiable, and conflict-localizable implementation, preventing lower-layer execution from bypassing upper-layer restrictions or compromising the original compliance and service quality requirements of the task during local optimization.

[0057] Furthermore, the SLA budget verification is performed by the computing system based on the subgraph structure to calculate the critical path. If a parent node is expanded into a subgraph, the child node has an execution budget, and the edges have communication or scheduling overhead, then the computing system calculates that the critical path of the subgraph is equal to the sum of the budgets of the longest dependent paths. The computing system requires that the critical path plus the reserved margin be less than or equal to the parent node's SLA deadline. For large model inference nodes, the computing system calculates the child node budget using the planned budget upper limit, based on the input length, maximum number of generated tokens, model configuration, and target hardware throughput.

[0058] Traditional SLA verification uses a simple summation method, neglecting parallel branches in the subgraph, leading to overly conservative or overly aggressive budget estimates. This solution calculates the critical path based on the subgraph structure: for purely serial subgraphs, the critical path is the sum of the budgets of all child nodes and edge costs; for subgraphs with parallel branches, it is the budget of the longest dependent path, thus accurately reflecting the actual execution time. A margin is reserved to account for scheduling jitter, retries, and feedback overhead. For large model inference nodes, since execution time varies with input and output lengths, a conservative budget upper limit is used to avoid budget distortion caused by fixed constants. Thus, through critical path calculation and dynamic planning of the budget upper limit, SLA verification accurately reflects the actual execution time of the subgraph and adapts to variations in input length, generation length, and hardware throughput in large model inference scenarios, improving the schedulability of enterprise-level multi-agent tasks in large model inference scenarios.

[0059] As a preferred implementation, the patch DAG is generated by a computing system, and the generation method includes: Determine the input and output boundaries. The input boundaries are the upstream nodes or checkpoint nodes that are required but still valid in the affected subgraph. The output boundaries are the downstream nodes that need to be reconnected after the affected subgraph is restored. The computing system creates a patch entry node to receive data and status from the input boundary, creates alternative service nodes, alternative operator nodes, alternative resource binding nodes, and recovery checkpoint nodes, and finally creates a patch merge node to connect the patch results back to the subsequent paths of the original DAG. The patch DAG merging is performed by the computing system using versioned edge redirection. In the new version, new edges are added from the input boundary to the patch entry node, and new edges are added from the patch merged to the successor node of the output boundary. The original affected edges are marked as visible in the old version but not in the new version in the version visibility table.

[0060] Existing exception handling mechanisms typically involve overall retries or manual intervention, resulting in high recovery costs and wasted effective computations. This solution precisely defines input and output boundaries, ensuring the patched DAG contains only the nodes that truly need replacement, preserving the execution results of unaffected nodes. Patch entry nodes and patch merging nodes serve as explicit mounting points, enabling seamless integration of the patched DAG into the original DAG. Versioned edge redirection avoids race conditions caused by directly modifying pointers during runtime by marking edge visibility in the new version, rather than directly rewriting old node pointers, while retaining the original DAG version for auditing and rollback. Through precise boundary determination and versioned edge redirection, this solution provides explicit graph pruning and merging algorithms for in-run graph topology changes, enabling the replacement of only affected subgraphs while maintaining the execution results and constraint states of unaffected nodes. It supports partial recovery and lossless continuation, reducing exception recovery costs.

[0061] Furthermore, the aforementioned versioned edge redirection is implemented by the computing system through maintaining the version root node structure, including: storing the atomic current version number pointer and the visibility table of each version in the version root node; after the computing system completes the node, edge, mapping record, constraint signature and checkpoint verification in the invisible pre-commit version of the patch DAG, it writes the commit record and updates the current version number from v to v+1 through an atomic comparison swap operation; after the atomic comparison swap is successful, the newly entered scheduling thread and execution thread are guided by the computing system to read only the new version pointed to by the current version number and execute according to the visible edge table of the new version; threads that already hold the old version v are allowed by the computing system to continue to complete the nodes that are allowed to be completed in the old snapshot, and their active reader count is used by the computing system to prevent the old version from being prematurely reclaimed.

[0062] If the patch DAG is committed by directly rewriting the old node pointers, the currently executing old thread might access the partially updated topology, leading to data races and execution chaos. This solution uses a version root node structure and atomic CAS operations to transform version switching into a one-time atomic event. New threads immediately see the new version, while old threads continue to complete their tasks in the old snapshot. Active reader counting ensures that the old version is not reclaimed by the background compressor while still in use by threads. This mechanism achieves a smooth transition from "coexistence of old and new versions" to "safe reclamation of the old version." Therefore, through atomic version switching and active reader counting, the patch DAG commit is atomic, avoiding data races caused by partial switching states, while supporting a smooth transition and safe reclamation of old and new versions, ensuring the reliability and consistency of graph topology changes during operation.

[0063] Furthermore, version compression of the DAG version number is performed by the computing system, including nodes and edges still referenced by active execution threads, active checkpoints, or rollbackable versions; the computing system maintains an active reader count and a rollback deadline for each version; only when the active reader count is zero, the rollback deadline has passed, the related data handle reference count is zero, and the layer 0 task has been archived, the computing system triggers the compressor to delete invisible edges and orphaned nodes of the old version; if regulations, audits, or corporate policies require the retention of execution evidence, the computing system triggers the compressor to delete only hot path indexes and runtime objects, and writes node summaries, constraint signature summaries, mapping summaries, and event summaries to the archive snapshot.

[0064] High-frequency patching of DAGs can lead to unlimited growth of sharded storage and event logs, exhausting storage resources if not compressed. However, prematurely deleting old versions may cause active threads to crash, checkpoints to fail, or rollback to fail. This solution ensures the safety of version compression through a combination of four conditions: active reader count ensures no thread usage, rollback deadline ensures the rollback window has been exceeded, data handle reference count ensures no data dependencies, and layer 0 task archiving ensures the business lifecycle has ended. For regulatory or audit requirements, evidence is preserved through archived snapshots, while hot path indexes and runtime objects are released to save space. In this way, through multi-condition joint judgment and a tiered compression strategy, historical versions are merged, archived, and garbage collected, preventing high-frequency patching of DAGs from causing unlimited growth of sharded storage and event logs, while meeting regulatory and audit retention requirements and runtime security needs.

[0065] As a specific solution, lifecycle management is created by the computing system and includes object identifier, storage type, cluster identifier, host identifier, device identifier, globally unique device identifier, address or offset, data size, generation number, reference count, producer node, number of remaining consumers, fixed state, cross-domain fetch strategy, and verification digest. The generation number is assigned by the computing system to prevent dangling references caused by address reuse. Even if the same memory address is reused by the memory pool, the computing system assigns a new generation number to the new data object. During checkpoint recovery, the computing system simultaneously verifies the object identifier and generation number. If the address is the same but the generation number is different, the computing system determines that the old reference is invalid.

[0066] Existing checkpointing mechanisms, if they only save input / output pointers without lifecycle management, will result in dangling references after the underlying memory or video memory is released, making it impossible to guarantee data validity during recovery. Lifecycle management solves the dangling reference problem caused by address reuse through dual verification of object identifiers and generation numbers. Even if the same video memory address is reclaimed from the memory pool and reallocated to a new data object, the new data object will acquire a new generation number, and the reference in the old checkpoint will be deemed invalid due to the generation number mismatch. A five-level check mechanism, including reference counting, remaining consumer count, active checkpoints, rollbackable versions, and fixed states, ensures that data is not released while there are still users or when rollback is still possible. Therefore, through lifecycle management and generation number mechanisms, lightweight checkpoints can save input / output references without generating dangling pointers, reducing the overhead of full saving while ensuring data reference validity during recovery, and supporting cross-domain data management in multi-machine, multi-GPU environments.

[0067] Furthermore, the lifecycle management release is controlled by the computing system, which sequentially checks the reference count, the number of remaining consumers, the active checkpoint, the rollbackable version, and the fixed state. If the reference count is not zero, there are still consumers who have not completed, there are still active checkpoints, there are still rollbackable versions, or the data is in a fixed state, the computing system will keep the data from being released. Once all the above conditions are met, the computing system will release the corresponding host memory, video memory, remote cache, or object storage reference according to the storage type, device identifier, address or offset, and generation number, and mark the data handle as released.

[0068] In distributed multi-agent tasks, the same data object may be consumed by multiple nodes, referenced by checkpoints, depended on by rollback versions, or explicitly locked to prevent migration. Simply releasing data when the reference count reaches zero may lead to checkpoint failure or rollback failure. This solution uses a five-level check mechanism to ensure that data is released only after all usage scenarios have ended. The reference count reflects currently active users, the number of remaining consumers reflects planned users, active checkpoints reflect states that may be used for recovery, rollback versions reflect historical version dependencies, and locked states reflect explicit locking requirements. Only when all conditions are met is targeted release performed based on storage type and generation number. In other words, the five-level check mechanism ensures that data is not prematurely released when there are still users, checkpoints, or rollback requirements, avoiding checkpoint failure, rollback failure, and data contention, while supporting differentiated release strategies for different storage types.

[0069] As a preferred implementation, methods for a computing system to perform cross-layer security, authorization, and SLA lossless transfer include: When generating the task DAG at Layer 0, the system writes the security domain, data category, permission label, access subject, model authorization scope, external interface permission, latency budget, reliability level, cost limit, and recovery level for each node or subgraph. The computing system writes the above information into the constraint signature and inherits it layer by layer from Layer 1 to Layer 5. When selecting a service instance at Layer 2, the computing system checks whether the service instance belongs to an allowed security domain. When expanding operators at Layer 3, the computing system retains the data category and permission label. When scheduling at Layer 4, the computing system excludes devices and network paths that do not meet the isolation requirements. When executing at Layer 5, the computing system ensures that the hardware queue, memory area, cache area, and communication channel meet the isolation requirements. If any layer fails to meet the security or SLA constraints, the computing system generates a security or SLA conflict event and sends it back to Layer 0, instead of the lower layer automatically relaxing the constraints.

[0070] Existing security and SLA control mechanisms typically remain at the entry gateway, service layer, or database permission layer, failing to propagate layer by layer along the task structure to lower-level operators and hardware execution. This solution addresses this by writing information such as security domains, data categories, permission tags, latency budgets, and reliability levels into constraint signatures and inheriting them layer by layer from layer 1 to layer 5, ensuring that each layer's execution is within the constraints of the top layer. Each layer performs targeted verifications: layer 2 verifies the service instance security domain, layer 3 retains data categories and permission tags, layer 4 excludes devices that do not meet isolation requirements, and layer 5 ensures that hardware resources meet isolation requirements. If any layer fails to meet these requirements, a conflict event is generated and sent back to layer 0 for upper-layer decision-making, rather than the lower layer automatically relaxing constraints, preventing security policies from being bypassed by performance optimizations. Thus, through the layer-by-layer inheritance of constraint signatures and targeted verifications at each layer, data security domains, model authorization, service quality, latency budgets, cost limits, and reliability levels are implemented from layer 0 to layer 5, preventing lower-layer execution from bypassing upper-layer restrictions or compromising the original compliance and service quality requirements of the task during local optimizations.

[0071] Furthermore, the inclusion verification of permission tags is performed by the computing system through bitmap operations, specifically including: When the set of permissions required by the parent node is the parent node's necessary permission mask, and the permissions actually used by the child node are the child node's usage permission mask, the computing system verifies that the bitwise AND operation between the child node's usage permission mask and the parent node's necessary permission mask is equal to the child node's usage permission mask. This indicates that the permissions used by the child node must not exceed the scope granted by the parent node. When the security label required by the parent node is the mask that the parent node must possess, and the actual operating domain label of the child node is the child node domain mask, the computing system verifies that the bitwise AND operation between the child node domain mask and the mask that the parent node must possess equals the mask that the parent node must possess. When the label of the parent node is prohibited is the parent node prohibition mask, the computing system verifies that the bitwise AND operation between the child node field mask and the parent node prohibition mask is equal to zero.

[0072] The verification of permissions and security labels needs to be efficient and computationally efficient. This solution uses bitmap operations to encode the permission set and security labels into bitmasks, and quickly determines the inclusion relationship through bitwise AND operations. The first verification ensures that the permissions of the child node do not exceed the permissions granted by the parent node (subset relationship). The second verification ensures that the child node contains all the security labels required by the parent node (superset relationship). The third verification ensures that the child node does not contain any labels prohibited by the parent node (mutual exclusion relationship). The three verifications correspond to different set operations, covering the main scenarios of permission control. That is, during constraint signature verification, the system checks the constraint load of each child node one by one: First, it confirms that the permissions used by the child node do not exceed the scope of the parent node's authorization; it confirms that the child node's runtime domain contains the security labels required by the parent node and does not contain any security labels prohibited by the parent node. Then, it confirms that the model version and data version used by the child node are within the range allowed by the parent node; it confirms that the child node's exception policy is not weaker than the parent node's exception policy; and it confirms that the child node does not reintroduce pseudo-dependencies that the parent node has already eliminated. After completing the node-by-node verification, the system calculates the critical path budget for the subgraph, requiring that the critical path budget plus the reserved margin does not exceed the service quality deadline of the parent node, and that the aggregated cost of the subgraph does not exceed the cost limit of the parent node. Only after all verifications pass can the subgraph be allowed to enter the next layer of mapping or execution. In this way, efficient permission label inclusion verification is achieved through bitmap operations, making cross-layer permission control computable and verifiable. It also supports three types of verification rules: authorization scope, required labels, and prohibited labels, meeting the complex security requirements of enterprise-level multi-agent systems.

[0073] As a specific implementation scheme, the Explosion Radius Breadth-First Search (BFS) is a bounded breadth-first search performed by the computing system starting from an abnormal node and following the edges that will propagate errors or state blockages. The types of edges involved in the propagation are identified by the computing system as data-dependent edges, trigger edges, recovery edges, and necessary dependent edges connecting super-edge convergence nodes. The computing system stops the search when it encounters a valid checkpoint barrier.

[0074] Whether weak temporal edges are propagated is determined by the computing system based on the policy; if a weak temporal edge only represents the recommended order and the successor node does not consume the abnormal output, it is excluded from the scope of influence by the computing system; resource edges usually do not propagate data errors, but if a resource failure causes other nodes on the same resource to become unexecutable, it is included in the resource impact set by the computing system; security edges are included in the propagation by the computing system when permissions are invalidated or security domains change; the search is stopped by the computing system when a valid checkpoint barrier is encountered.

[0075] If an anomaly is blindly propagated across the entire graph, it will result in excessive patching of the DAG and redundant recovery costs. Insufficient propagation may lead to missed affected nodes, resulting in deadlocks or erroneous results. This scheme precisely controls the propagation range using bounded BFS, propagating only along edge types capable of propagating errors or blockages. Data dependency edges propagate data errors, triggering edge propagation state blockages, and recovery edges propagate recovery paths. Necessary dependency edges propagate through the common failure of nodes beyond the super-edge. Weak temporal edges, resource edges, and safety edges are propagated based on conditions to avoid over-propagation. Effective checkpoint barriers serve as stopping conditions, causing the search to terminate at recoverable boundaries. In this way, through bounded BFS and precise edge type propagation rules, the explosion radius calculation is neither missed nor redundant, ensuring that the patched DAG only includes truly affected nodes, reducing recovery costs, and preventing the propagation of deadlocks and erroneous results.

[0076] Furthermore, the search stops when it encounters a valid checkpoint barrier, specifically determined as follows: the node or boundary subgraph has a recoverable checkpoint, and the checkpoint's input reference, version number, constraint signature, and security domain are still valid; the search stops when it encounters a node that has been completed and whose output has been stably consumed by subsequent nodes and does not depend on the output of abnormal nodes.

[0077] The validity of checkpoint barriers in this scheme requires the simultaneous fulfillment of several conditions: the checkpoint itself exists, the input reference is not invalid, the version number is not expired, the constraint signature is not tampered with, and the security domain remains unchanged. If any condition is not met, the checkpoint cannot serve as a valid stopping barrier, and the search must continue to propagate downwards. Nodes that have been completed and whose outputs have been stably consumed are not affected by anomalies because their results have been subsequently used and no longer depend on the abnormal output. Therefore, they can serve as natural stopping boundaries. This dual stopping condition ensures that the search will neither terminate prematurely due to invalid checkpoints nor penetrate the already stable execution region. Thus, through strict checkpoint validity determination and the natural boundaries of completed nodes, the explosion radius BFS is ensured to stop at the correct location, guaranteeing both recovery integrity and avoiding unnecessary propagation, thereby improving the accuracy and efficiency of anomaly recovery.

[0078] Based on the above scheme, when the search encounters a super-edge aggregation node, the computing system checks the dependency satisfaction bitmap of the H node. If the abnormal node corresponds to the necessary bit, the computing system includes H and its successors into the influence set; if the abnormal node corresponds to the optional bit and the trigger expression can still be satisfied, the computing system determines that H remains valid.

[0079] The unique characteristic of the hyperedge convergence node lies in the fact that its preceding nodes are divided into necessary and optional categories, requiring differentiated handling during anomaly propagation. If the abnormal node is a necessary preceding node of H, then H will never satisfy the triggering condition and must be included in the affected set for replacement. If the abnormal node is an optional preceding node of H, and removing the node still satisfies the triggering expression (e.g., there are other optional preceding nodes that can satisfy the condition), then H can still enter the READY state without needing to be included in the affected set. This differentiated handling avoids over-propagation due to optional node failures, while also preventing deadlocks caused by missed propagation due to necessary node failures. In this way, through the differentiated handling of necessary and optional bits, and the secondary verification of the triggering expression, precise control of the explosion radius at the hyperedge convergence node is achieved, avoiding both over-propagation and under-propagation extremes, ensuring the minimization of the patch DAG and the smooth flow of the recovery path.

[0080] As a specific implementation method, the process traces upwards from the Layer 5 hardware execution layer to the Layer 0 top-level task decision layer (cross-layer tracing), and is executed by the computing system through cross-layer mapping and ancestor caching, specifically including: When an error occurs in a low-level hardware node, the computing system first locates the shard storage where the hardware node is located by using the node identifier, and then reads the mapping record of that node from the mapping index. If the ancestor cache in the mapping record already contains the layer 0 node, the computing system directly returns the layer 0 task node. Otherwise, the computing system starts from the current erroneous node and searches upwards layer by layer along the parent node relationship in the mapping record until it reaches layer 0. This process is executed by the computing system across a maximum of six layers and does not require scanning all operator nodes.

[0081] In existing technologies, when a low-level anomaly occurs, only logs or alarms are typically output, making it impossible to accurately pinpoint the top-level task node, leading to difficulties in troubleshooting. This solution achieves rapid cross-level tracing through cross-level mapping and ancestor caching. The ancestor cache stores direct references from the current node to the nearest ancestor node at each level. If the cache is valid, it can directly jump to the layer 0 task node within a constant time. If the cache is missing or the version is inconsistent, it traverses the parent node chain level by level, spanning a maximum of six levels. This process does not require scanning all operator nodes, avoiding uncontrollable traversal overhead when the number of low-level nodes is large. This solution, through cross-level mapping and ancestor caching, enables low-level hardware anomalies to be quickly traced upwards to the layer 0 task node, avoiding full graph traversal, achieving precise location and rapid response of the anomaly node, and supporting efficient troubleshooting in large-scale operator graph scenarios.

[0082] As a preferred implementation, the legality verification is performed by the computing system, specifically including: acyclic verification, dependency integrity verification, resource satisfiability verification, security compliance verification, SLA budget verification, constraint signature verification, and checkpoint strategy verification; after the verification is passed, the computing system maps the task DAG layer by layer according to the six-layer architecture.

[0083] In other words, before the six-layer mapping process, the legality of the top-level task DAG needs to be fully verified to prevent defective DAGs from entering the execution phase and causing system errors. The verification process includes: acyclicity verification to ensure the DAG has no circular dependencies; dependency integrity verification to ensure all dependencies are complete; resource satisfiability verification to ensure resource requirements are within system capabilities; security compliance verification to ensure compliance with enterprise security policies; SLA budget verification to ensure latency and cost targets are achievable; constraint signature verification to ensure correct signature format and content; and checkpoint strategy verification to ensure reasonable checkpoint configuration. Only after all verifications are passed can the layer-by-layer mapping phase begin. Through these seven legality verifications, defective DAG configurations are identified and eliminated before task execution, preventing runtime errors, resource shortages, security violations, and SLA breaches, thereby improving the reliability and predictability of system execution.

[0084] As a preferred implementation, the Layer 5 hardware execution layer is represented by the computing system as a hardware runtime or driver layer interaction interface. It converts scheduling results into calls to CUDA runtime, GPU driver, NPU runtime, DMA driver, RDMA communication stack, storage driver, or other hardware runtime interfaces, including hardware streams, queues, events, kernel calls, DMA transfers, network communication, and storage I / O. The computing system achieves a closed-loop association between the full-stack DAG and the underlying execution state by sending execution requests to the hardware runtime or driver layer and capturing the returned events, error codes, completion signals, and performance counters.

[0085] This invention is not limited to modifying the hardware circuitry itself, but rather achieves a closed-loop association between the full-stack DAG and the underlying execution state by sending execution requests to the hardware runtime or driver layer and capturing their return states. Layer 5 converts the scheduling results of Layer 4 into specific hardware runtime calls, including CUDA kernel startup, DMA transfer initiation, RDMA communication establishment, and memory I / O requests. Simultaneously, it captures hardware-returned events, error codes, completion signals, and performance counters, and transmits these states back to the upper layer via event logs and feedback_edge, enabling the top-level system to perceive the underlying execution state. This closed-loop association between the full-stack DAG and the underlying execution state, achieved through a hardware runtime interaction interface and state capture mechanism, allows underlying hardware actions to be traced back to the top-level task node, supports execution monitoring, performance analysis, and anomaly localization, while avoiding modifications to the hardware circuitry itself and maintaining compatibility with the existing hardware ecosystem.

[0086] The method of this invention is executed by a system and can adapt to complex multi-agent tasks, such as simultaneously triggering multiple agents to work collaboratively, including knowledge retrieval, contract analysis, pricing calculation, approval processes, and work order generation. The specific workflow is as follows: First, the top-level task decision layer (Layer 0) receives this task input. The system doesn't treat it as an isolated request; instead, it immediately generates a top-level task DAG (Directed Acyclic Graph) to describe the entire task's structure and dependencies. Each node and edge is assigned a globally unique NodeId, containing tenant information, DAG number, version number, layer, shard number, and local sequence number, ensuring unique identification regardless of the number of layers or devices involved. Simultaneously, the system creates a sharded storage, writing node information to a columnar node table, edge information to a compressed adjacency edge table, and variable-length attributes such as business objectives, SLA requirements, security domains, and exception policies to an attribute pool. An initial constraint signature is also generated, encapsulating security domains, data categories, permission tags, access subjects, model authorization scope, external interface permissions, latency budget, reliability level, cost cap, and recovery level.

[0087] Next, the system will carefully analyze the dependencies within this DAG. Some dependencies are simple, such as B can only be done after A is completed, which can be represented by a regular edge. However, there are many complex cases, such as a task of an agent that must simultaneously meet several conditions to execute: the model version must be correct, data permissions must be available, GPU memory must be sufficient, network location must be appropriate, and security policies must comply. Such relationships where multiple conditions are simultaneously satisfied cannot be represented by a single edge in a regular DAG, so the system will treat it as a hyperedge node, generating a hyperedge convergence node H. All preceding nodes are connected to H, and H is then connected to all successor nodes. H will maintain a necessary condition bitmap, an optional condition bitmap, a dependency satisfaction bitmap, a failure bitmap, a state machine, a one-time release flag, and a trigger expression, turning the semantics of "mutual satisfaction" into schedulable first-class citizens (standard nodes).

[0088] Before execution begins, the system performs a comprehensive validation check. This includes verifying the existence of cycles in the Directed Acyclic Graph (DAG), the completeness of dependencies, adequacy of resources, compliance with security policies, achievement of SLA / budget targets, correctness of constraint signature formats, and the rationality of checkpoint policy configurations. Only after all seven checks are passed can the task proceed to the next step.

[0089] Then the six-layer mapping process begins. Layer 0 refines the top-level task to Layer 1, becoming agent nodes, tool nodes, data preparation nodes, verification nodes, and collaboration nodes. Each mapping writes a cross-layer mapping, records parent-child relationships, inherits or generates constraint signatures, and updates the ancestor cache. The ancestor cache facilitates fast tracing; it pre-stores direct references from the current node to ancestors at each layer, allowing for direct jumps during tracing without having to trace upwards level by level.

[0090] Layer 1 then maps to Layer 2, binding the agent's tasks into specific services: model service, retrieval service, database service, knowledge service, business service, file service, and external interface service. When Layer 2 selects a service instance, it first checks whether the instance is within an allowed security domain; if not, it excludes it.

[0091] Layer 2 maps to Layer 3, expanding the service into operators, tensors, communication, data transformation, cache access, and I / O operations. When Layer 3 expands operators, it retains data classification and permission tags in the operator attributes, and security constraints are passed down.

[0092] Layer 3 maps to Layer 4, entering the distributed scheduling layer. Layer 4 determines which device to schedule to and which queue to place the device into based on dependencies, resource requirements, priorities, security domains, and SLA requirements in the DAG. Devices and network paths that do not meet isolation requirements are excluded.

[0093] Layer 4 maps to Layer 5, reaching the hardware execution layer. Layer 5 does not directly modify the hardware circuitry; instead, it uses the hardware runtime or driver layer interaction interface to translate scheduling results into calls to the CUDA runtime, GPU driver, NPU runtime, DMA driver, RDMA communication stack, memory driver, etc., including hardware streams, queues, events, kernel calls, DMA transfers, network communication, and memory I / O. Simultaneously, it captures hardware-returned events, error codes, completion signals, and performance counters, achieving a closed-loop association between the full-stack DAG and the underlying execution state.

[0094] During execution, the system continuously appends status events to the event log. The event log is written sequentially, avoiding lock contention and GC jitter caused by random modifications. When a preceding node completes, if the successor is a regular node, the dependency count is updated. If the successor is a super-edge convergence node H, the dependency satisfaction bitmap of H is updated through atomic bitmap operations. When H completes its processing, it first deduplicates based on the event identifier to prevent duplicate processing. Then, it finds the position of the preceding node in its own array and uses atomic operations to set the corresponding position in the dependency satisfaction bitmap. If this position has already been set, it indicates a duplicate event, and the process terminates directly. Next, it checks whether the preceding node failed; if so, it handles it according to the exception policy. Then, it checks whether the dependency satisfaction bitmap has covered the necessary condition bitmap. If it has, it further executes the trigger expression, resource rules, security rules, and service quality rules for verification. After all these are satisfied, the state of H is switched to READY through atomic comparison and swap, and then a one-time release of the flag ensures that only one thread can send a ready notification to the successor. In this way, even if multiple preceding nodes complete almost simultaneously or multiple threads simultaneously find that the conditions are met, duplicate triggering will not occur.

[0095] If an exception occurs during execution, such as a hardware node error, the system will not simply retry the entire task. Instead, it will first trace upwards through cross-layer mapping, from layer 5 all the way to the top-level task node in layer 0. During tracing, it first locates the shard storage where the erroneous node resides based on its NodeId, and then reads the mapping record in the cross-layer mapping. If the ancestor cache is valid, it jumps directly to the layer 0 task node; if the cache is missing or the version is inconsistent, it climbs up the parent node chain layer by layer, up to a maximum of six layers, without needing to scan all sub-operator nodes.

[0096] After finding the top-level task node, the system performs a radius-explosive broad-first search (BFS) starting from the anomalous node to calculate which nodes are truly affected. This search is bounded, only following edges that propagate errors or cause blockages: data dependency edges, trigger edges, recovery edges, and necessary dependency edges connecting to the super-edge convergence node. Weakly ordered edges are considered on a case-by-case basis; if it's just a recommended order and its successors don't consume the anomalous output, it's not included. Resource edges generally don't propagate data errors, but if a resource failure causes other nodes on the same resource to also fail, they are included. Security edges are included in the propagation when permissions are invalidated or the security domain changes. The search stops when it encounters a valid checkpoint barrier. This barrier requires the checkpoint itself to be recoverable, and the input reference, version number, constraint signature, and security domain to still be valid. If the search encounters a super-edge convergence node H, it checks whether the anomalous node corresponds to a necessary bit or an optional bit. If it's a necessary bit, H and its successors are included in the affected set; if it's an optional bit, and removing this node still satisfies the trigger expression, then H remains valid and doesn't need to be propagated.

[0097] Once the affected area is determined, the system begins generating a patched DAG. First, the input and output boundaries are defined. The input boundaries are the still-valid upstream nodes or checkpoint nodes that are still needed in the affected subgraph. The output boundaries are the downstream nodes that need to be reconnected after recovery. Then, a patch entry node is created to receive data and status from the input boundaries. Alternate service nodes, alternative operator nodes, alternative resource binding nodes, and recovery checkpoint nodes are created. Finally, a patch merge node is created to connect the patched results back to the subsequent paths of the original DAG.

[0098] The patch DAG doesn't directly modify the old pointers; instead, it uses versioned edge redirection. The system maintains a version root node, which stores the pointer to the current atomic version number and the visibility table for each version. The patch DAG first completes all checks in the invisible pre-commit, then writes it to the commit record, updating the version number from v to v+1 through an atomic comparison swap. This switch is atomic; newly arriving threads can only see the new version, while threads already holding the old version continue to complete their tasks in the old snapshot. The active reader count of the old version prevents it from being prematurely reclaimed; the compressor can only safely clean it up after all old threads have finished executing.

[0099] If recovery is needed, the system will read lightweight checkpoints. Checkpoints do not save all model weights and hardware states; they only save the minimum state required to restore DAG consistency. However, the input / output references in the checkpoints are not raw pointers, but rather lifecycle management data. Lifecycle management includes object identifier, storage type, cluster identifier, host identifier, device identifier, globally unique device identifier, address or offset, data size, generation number, reference count, producer node, number of remaining consumers, fixed state, cross-domain fetch strategy, and verification digest. The generation number is particularly important; it prevents dangling references caused by address reuse. Even if the same memory address is reclaimed from the memory pool and then allocated to new data, the new data will receive a new generation number, and references in the old checkpoint will be deemed invalid because the generation numbers do not match.

[0100] During recovery, the system simultaneously verifies the object identifier and generation number. If the data still exists and the generation number matches, it is directly reused. If the data has been dumped to object storage, it is reloaded based on the object identifier and offset. If the data is corrupted but there is a valid checkpoint upstream, the affected nodes are recalculated from upstream. If there is absolutely no recovery path, an unrecoverable exception event is generated and propagated back to layer 0.

[0101] Lifecycle management releases are also very cautious, checking reference counts, remaining consumer counts, active checkpoints, rollbackable versions, and pinned states in sequence. As long as something is still in use, there are still checkpoints that could lead to rollback, or it is explicitly pinned, it will not be released. Only after all conditions are met will the corresponding host memory, video memory, remote cache, or object storage references be released based on storage type, device identifier, address offset, and generation number.

[0102] After the task is completed, the system will merge the results from each layer into layer 0. The hardware execution results of layer 5, the operator results of layer 3, the service results of layer 2, and the agent results of layer 1 are summarized layer by layer upwards, finally forming the final task result and complete audit trail at layer 0. The audit trail includes the DAG version, node status, mapping relationship, constraint signature, hyperedge node status, data handle lifecycle, abnormal events, patched DAG, and final output. The entire process is complete and traceable.

[0103] Finally, the system compresses historical versions. Each version maintains an active reader count and a rollback deadline. The compressor only deletes invisible edges and orphaned nodes from older versions when the active reader count reaches zero, the rollback deadline has passed, the relevant lifecycle management reference count is zero, and the layer 0 task has been archived. If regulations or audits require the preservation of evidence, the compressor only deletes path indexes and runtime objects, writing node digests, constraint signature digests, mapping digests, and event digests to the archive snapshot, saving space while meeting compliance requirements.

[0104] Throughout the process, cross-layer security, permissions, and SLAs are consistently implemented. Constraints written by Layer 0 are inherited layer by layer from Layer 1 to Layer 5. Each layer has its own verification points: Layer 2 checks the service instance security domain, Layer 3 retains data categories and permission tags, Layer 4 excludes devices that do not meet isolation requirements, and Layer 5 ensures that hardware resources meet isolation requirements. If any layer finds that a constraint cannot be met, it will not automatically relax it; instead, it will generate a conflict event and send it back to Layer 0, which will then decide whether to wait, find a different solution, or refuse to execute. This ensures that security policies cannot be bypassed by performance optimizations, and that SLA requirements do not silently fail at lower layers.

[0105] The foregoing has shown and described the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the above embodiments do not limit the present invention in any way, and all technical solutions obtained by equivalent substitution or equivalent transformation fall within the protection scope of the present invention.

Claims

1. A six-layer integrated AI full-stack computing architecture method with a globally unified DAG, characterized in that, Includes the following steps: S1. The top-level task decision layer receives enterprise-level multi-agent task input, generates the top-level task DAG and DAG version number, creates sharded storage and writes it to the columnar node table, compresses the adjacency edge table and attribute pool, and generates the initial constraint signature. S2. Identify the ordinary dependencies and higher-order dependencies in the top-level task DAG, generate a hyperedge convergence node H for the higher-order dependencies using hyperedge nodeization, and initialize the necessary condition bitmap, dependency satisfaction bitmap, failure bitmap, state, one-time release flag and trigger expression of the H. S3. Perform a legality check on the top-level task DAG. After the check is passed, the top-level task decision layer maps down through the agent task DAG layer, service execution DAG layer, operator super DAG layer, and distributed scheduling layer to the hardware execution layer. Each mapping is written by the computing system to the cross-layer mapping, generating or inheriting constraint signatures, and updating the ancestor cache. S4. During execution, status events are added to the event log. When the preceding node is completed, the dependency satisfaction bitmap of H is updated through atomic bitmap operations. After H meets the triggering conditions, a ready event is published to the successor node of H through a one-time release flag. S5. If an exception occurs during execution, the hardware execution layer is traced upwards to the top-level task decision layer through the cross-layer mapping to locate the top-level task node. Starting from the exception node, the explosion radius BFS is executed to determine the affected subgraph and checkpoint boundary. A patch DAG version is generated and the patch entry node and patch merge node are mounted back to the original DAG using versioned edge redirection. S6. Read the lightweight checkpoints, parse the input and output references in the checkpoints through lifecycle management, and after confirming the data is valid, merge the execution results of each layer from the hardware execution layer to the agent task DAG layer into the top-level task decision layer to form an audit trail.

2. The six-layer integrated AI full-stack computing architecture method based on a globally unified DAG as described in claim 1, characterized in that, The sharded storage is divided into shards according to tenant, task, DAG version, level, and execution partition. Each shard internally consists of a columnar node table, a compressed adjacency edge table, an attribute pool, a mapping index, and an event log. The columnar node table stores node identifier, level identifier, node type, status, version number, parent node reference, first outgoing edge reference, first incoming edge reference, attribute offset, constraint signature reference, and checkpoint reference. The compressed adjacency edge table stores edge identifier, source node, target node, edge type, flag bit, attribute offset, next outgoing edge reference, and next incoming edge reference.

3. The six-layer integrated AI full-stack computing architecture method based on a globally unified DAG as described in claim 1, characterized in that, The internal structure of the hyperedge aggregation node H is maintained by the computing system, including a predecessor node array, a successor node array, a necessary condition bitmap, an optional condition bitmap, a dependency satisfaction bitmap, a failure bitmap, a state, a release flag, a trigger expression, resource aggregation rules, security verification rules, SLA verification rules, exception policies, timeout time, and version number. The state of H is managed by the computing system and includes at least a waiting state, a partially satisfied state, a ready state, a released state, a blocked state, a failed state, a recovering state, and an archived state.

4. The six-layer integrated AI full-stack computing architecture method with a globally unified DAG as described in claim 3, characterized in that, When the H node processes a preceding node completion event, it first performs deduplication based on the event identifier. The method includes: finding the preceding node's position in the preceding node set based on the preceding node identifier, and setting the corresponding position in the dependency satisfaction bitmap to satisfied through atomic bitmap operations; if the bit has already been satisfied, the completion event is determined to be a duplicate event and processing is terminated; if there is no necessary failure, it is determined whether the dependency satisfaction bitmap has covered the necessary condition bitmap, and further execution of trigger expression, resource rules, security rules, and service quality rules verification is performed; after all are satisfied, the H node state is switched to ready through atomic comparison and exchange, and a one-time release of the flag ensures that only one thread publishes a ready event to the successor node of the H node.

5. The six-layer integrated AI full-stack computing architecture method based on a globally unified DAG as described in claim 1, characterized in that, The constraint signature includes: fixed-length, variable-length segments, and a digest field; The fixed-length write includes the magic number, structure version number, source level, and target level; The variable-length write includes the strong dependency set, weak dependency set, eliminated pseudo-dependency set, resource limit, SLA budget, security label, necessary permissions, model version range, data version range, exception policy, checkpoint policy, and target vector. The digest field is obtained by normalizing and sorting the set fields in the variable-length data, and then concatenating the fields other than the digest in the fixed-length data with the normalized variable-length data and calculating the cryptographic hash function.

6. The six-layer integrated AI full-stack computing architecture method based on a globally unified DAG as described in claim 5, characterized in that, The SLA budget verification is based on the calculation of the critical path according to the subgraph structure, including: if the parent node is expanded into a subgraph, the child node has an execution budget, and the edges have communication or scheduling overhead, then the calculation of the critical path of the subgraph is equal to the sum of the budgets of the longest dependent path; it is required that the critical path plus the reserved margin is less than or equal to the parent node's SLA deadline; for large model inference nodes, the child node budget is calculated using the planned budget upper limit, according to the input length, the maximum number of generated tokens, the model configuration, and the target hardware throughput.

7. The six-layer integrated AI full-stack computing architecture method based on a globally unified DAG as described in claim 1, characterized in that, The method for generating the patch DAG includes: Determine the input and output boundaries. The input boundaries are the upstream nodes or checkpoint nodes that are required but still valid in the affected subgraph. The output boundaries are the downstream nodes that need to be reconnected after the affected subgraph is restored. Create a patch entry node to receive data and status from the input boundary, and create alternative service nodes, alternative operator nodes, alternative resource binding nodes, and recovery checkpoint nodes; A patch merge node is created to connect the patch results back to the subsequent paths of the original DAG; The patch DAG merging adopts versioned edge redirection. In the new version, an edge from the input boundary to the patch entry point is added, and an edge from the patch to the successor node of the output boundary is added. The original affected edges are marked as visible in the old version but not in the new version in the version visibility table.

8. The six-layer integrated AI full-stack computing architecture method based on a globally unified DAG as described in claim 1, characterized in that, The lifecycle management includes: object identifier, storage type, cluster identifier, host identifier, device identifier, globally unique device identifier, address or offset, data size, generation number, reference count, producer node, number of remaining consumers, fixed status, cross-domain fetch strategy, and verification digest. The generation number is assigned by the computing system to prevent address reuse from causing dangling references, to allow the same video memory address to be reused by the memory pool, and to assign a new generation number to a new data object. During checkpoint recovery, both the object identifier and generation number are verified. If the addresses are the same but the generation numbers are different, the old reference is deemed invalid.

9. The six-layer integrated AI full-stack computing architecture method based on a globally unified DAG as described in claim 8, characterized in that, The lifecycle management release is controlled by the computing system, which sequentially checks the reference count, remaining consumer count, active checkpoint, rollbackable version, and fixed state. If the reference count is not zero, there are still consumers who have not completed, there are still active checkpoints, there are still rollbackable versions, or the data is in a fixed state, the data is kept from being released. When all the above conditions are met, the corresponding host memory, video memory, remote cache, or object storage reference is released according to the storage type, device identifier, address or offset, and generation number, and the data handle is marked as released.

10. The six-layer integrated AI full-stack computing architecture method based on a globally unified DAG according to claim 1, characterized in that, The computing system performs cross-layer security, access control, and SLA lossless transfer, including the following methods: When generating the task DAG, the top-level task decision layer writes the security domain, data category, permission label, access subject, model authorization scope, external interface permission, latency budget, reliability level, cost limit, and recovery level for each node or subgraph. This information is written into the constraint signature and inherited layer by layer from the agent task DAG layer to the hardware execution layer. When selecting a service instance, the service execution DAG layer checks whether the service instance belongs to an allowed security domain. When expanding operators, the operator super DAG layer retains the data category and permission label. When scheduling, the distributed scheduling layer excludes devices and network paths that do not meet isolation requirements. When executing, the hardware execution layer ensures that hardware queues, memory areas, cache areas, and communication channels meet isolation requirements. If any layer fails to meet security or SLA constraints, a security or SLA conflict event is generated and sent back to the top-level task decision layer.

11. The six-layer integrated AI full-stack computing architecture method based on a globally unified DAG according to claim 7, characterized in that, The versioned edge redirection method includes: storing the current atomic version number pointer and the visibility table of each version in the version root node; after completing the node, edge, mapping record, constraint signature and checkpoint verification in the invisible pre-commit version, the patch DAG is written to the commit record, and the current version number is updated from v to v+1 through an atomic comparison swap operation; after the atomic comparison swap is successful, the newly entered scheduling thread and execution thread are guided by the computing system to read only the new version pointed to by the current version number, and execute according to the visible edge table of the new version; threads that already hold the old version v are allowed by the computing system to continue to complete the nodes that are allowed to be completed in the old snapshot, and their active reader count is used by the computing system to prevent the old version from being reclaimed in advance.

12. The six-layer integrated AI full-stack computing architecture method with a globally unified DAG as described in claim 11, characterized in that, The version compression of the DAG version number includes: nodes and edges still referenced by active execution threads, active checkpoints, or rollbackable versions; each version has an active reader count and rollback deadline maintained by the computing system; When the active reader count is zero, the rollback deadline has passed, the related data handle reference count is zero, and the task of the top-level task decision layer has been archived, the compressor is triggered to delete the invisible edges and orphaned nodes of the old version. When it is required to retain execution evidence, the compressor is triggered to delete hot path indexes and runtime objects, and write node digests, constraint signature digests, mapping digests, and event digests to the archive snapshot.

13. The six-layer integrated AI full-stack computing architecture method based on a globally unified DAG according to claim 1, characterized in that, The explosion radius BFS starts from the abnormal node and performs a bounded breadth-first search along the edges where the propagation result is incorrect or the state is blocked; the types of edges involved in the propagation are identified as data-dependent edges, trigger edges, recovery edges, and necessary dependent edges connecting the super-edge convergence nodes; the search stops when a valid checkpoint barrier is encountered.

14. The six-layer integrated AI full-stack computing architecture method based on a globally unified DAG according to claim 13, characterized in that, The search stops when it encounters a valid checkpoint barrier. This is determined by the following criteria: the node or boundary subgraph has a recoverable checkpoint, and the checkpoint's input reference, version number, constraint signature, and security domain are still valid. The search stops when it encounters a node that has been completed and whose output has been stably consumed by subsequent nodes and does not depend on the output of abnormal nodes.

15. The six-layer integrated AI full-stack computing architecture method based on a globally unified DAG as described in claim 13, characterized in that, When the search encounters the superedge aggregation node H, check the dependency satisfaction bitmap of the superedge aggregation node H. If the abnormal node corresponds to the necessary bit, then H and its successors are included in the affected set; if the abnormal node corresponds to the optional bit and the trigger expression can still be satisfied, then H is determined to remain valid.

16. The six-layer integrated AI full-stack computing architecture method based on a globally unified DAG according to claim 1, characterized in that, The process of tracing upwards from the hardware execution layer to the top-level task decision layer through the cross-layer mapping and the ancestor cache includes: When an error occurs in a low-level hardware node, the shard storage where the hardware node is located is first located by the node identifier of the hardware node, and then the mapping record of the node is read from the mapping index. If the ancestor cache in the mapping record already contains the top-level task decision layer node, the task node of the top-level task decision layer is directly returned. Otherwise, starting from the current erroneous node, the search is performed layer by layer upward along the parent node relationship in the mapping record until the top-level task decision layer is reached.

17. The six-layer integrated AI full-stack computing architecture method based on a globally unified DAG according to claim 10, characterized in that, The inclusion verification of the permission tag is performed through bitmap operations, including: When the set of permissions required by the parent node is the parent node's necessary permission mask, and the permissions actually used by the child node are the child node's usage permission mask, then verifying that the bitwise AND operation between the child node's usage permission mask and the parent node's necessary permission mask equals the child node's usage permission mask indicates that the permissions used by the child node must not exceed the scope granted by the parent node. When the security label required by the parent node is the mask that the parent node must have, and the actual domain label of the child node is the child node domain mask, then the bitwise AND operation between the child node domain mask and the mask that the parent node must have is equal to the mask that the parent node must have. When the parent node's prohibited label is the parent node's prohibited mask, then the bitwise AND operation between the child node's field mask and the parent node's prohibited mask equals zero.

18. The six-layer integrated AI full-stack computing architecture method based on a globally unified DAG according to claim 1, characterized in that, The legality verification includes: acyclicity verification, dependency integrity verification, resource satisfiability verification, security compliance verification, SLA budget verification, constraint signature verification, and checkpoint policy verification; after the verification is passed, the task DAG is mapped layer by layer according to the six-layer architecture.

19. The six-layer integrated AI full-stack computing architecture method based on a globally unified DAG according to claim 1, characterized in that, The hardware execution layer manifests as a hardware runtime or driver layer interaction interface, converting scheduling results into calls to CUDA runtime, GPU driver, NPU runtime, DMA driver, RDMA communication stack, storage driver, or other hardware runtime interfaces, including hardware streams, queues, events, kernel calls, DMA transfers, network communication, and storage I / O. By sending execution requests to the hardware runtime or driver layer and capturing the events, error codes, completion signals, and performance counters returned by it, a closed-loop association between the full-stack DAG and the underlying execution state is achieved.

20. The six-layer integrated AI full-stack computing architecture method based on a globally unified DAG according to claim 1, characterized in that, The audit trail includes: DAG version, node status, mapping relationship, constraint signature, superedge node status, data handle lifecycle, abnormal events, patched DAG, and final output; after the system execution is completed, the hardware execution results of the hardware execution layer, the operator results of the operator super DAG layer, the service results of the service execution DAG layer, and the agent results of the agent task DAG layer are successively merged into the top-level task decision layer.

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