Chip package structure, circuit board assembly, electronic device, substrate and manufacturing method

Abstract

The embodiment of the application discloses a kind of chip packaging structure, circuit board assembly, electronic equipment, substrate and manufacturing method, it is related to chip processing technical field, reduce the micro crack of existing glass core plate easily expand and cause the problem of reliability reduction of packaging glass substrate, easily appear reliability failure.The substrate includes core plate, first wiring layer and edge sealing structure. Wherein, the core plate has corner. First wiring layer is stacked and arranged on one side of the core plate.Edge sealing structure is wrapped in the part of side wall or all side walls on the corner of the core plate. In the cooling process after the first wiring layer is manufactured, the edge sealing structure can absorb the transverse shear force of the core plate caused by the contraction of the first wiring layer, so as to reduce the problem of cutting surface damage and internal hidden crack of glass core plate during cutting, improve the glass strength. In the subsequent packaging process or placement process, the edge sealing structure can also prevent the micro crack of the glass core plate at the cutting surface from continuing to expand, causing the problem of glass substrate fragmentation or delamination.

Description

Technical Field

[0001] This application relates to the field of chip processing technology, and in particular to a chip packaging structure, circuit board assembly, electronic device, substrate and manufacturing method. Background Technology

[0002] After the build-up layer fabrication is completed, the encapsulation glass substrate needs to be cooled to room temperature. Because the build-up material ABF (Ajinomoto build-up film) shrinks upon cooling, it exerts lateral shear force on the glass core. After cutting the encapsulation glass substrate, the glass core will suffer sectional damage and internal microcracks, significantly reducing its strength.

[0003] Furthermore, during subsequent packaging processes, the glass core is prone to collisions with the tooling, causing microcracks at the cut surfaces of the glass core to continue to propagate, potentially leading to glass cracking or glass chipping. Alternatively, during placement, these microcracks at the cut surfaces of the glass core can also continue to propagate, resulting in the "SeWaRe" phenomenon (i.e., glass substrate delamination). Therefore, the reliability of the packaging glass substrate decreases, making it susceptible to reliability failures. Summary of the Invention

[0004] This application provides a chip packaging structure, circuit board assembly, electronic device, substrate, and manufacturing method, which solves the problem that microcracks in existing glass substrates can easily propagate, leading to reduced reliability of the packaged glass substrate and easy reliability failure.

[0005] To achieve the above objectives, this application adopts the following technical solution:

[0006] In a first aspect, this application provides a substrate. This substrate can serve as a packaging substrate, an adapter board, or a circuit board, etc. The substrate may include a core board, a first wiring layer, and an edge sealing structure. The core board has a corner. The first wiring layer is stacked on one side of the core board. The edge sealing structure wraps around a portion or all of the sidewalls of the core board at the corner. The core board has two intersecting sidewalls at the corner. Therefore, the edge sealing structure may wrap around a portion or all of any one sidewall of the core board at the corner, or around a portion of both sidewalls of the core board at the corner, or around all of both sidewalls of the core board at the corner.

[0007] Compared to existing technologies, the substrate of this application, when used as a packaging substrate, has an edge-sealing structure wrapped around the sidewalls at the corners of the core board (such as a glass core board). This edge-sealing structure protects the sidewalls of the glass core board at the corners. During the cooling process after the first wiring layer is fabricated, the edge-sealing structure absorbs the lateral shear force exerted on the glass core board by the shrinkage of the first wiring layer and reduces the contact area between the cutting tool (laser or cutting blade, etc.) and the glass core board. Therefore, it reduces the problem of cut surface damage and internal microcracks in the glass core board during cutting, thereby improving the strength of the glass core board. Furthermore, during subsequent packaging processes or placement, the protection of the glass core board by the edge-sealing structure can also prevent the microcracks on the cut surface of the glass core board from continuing to propagate, thus preventing the glass core board from breaking or delaminating. Therefore, the substrate of this application has high reliability and is less prone to reliability failure when used as a packaging substrate.

[0008] Based on the above substrate structure, in some embodiments of this application, the corners of the core board have a chamfered structure. The edge sealing structure includes a chamfered covering portion, the shape of which is complementary to the shape of the chamfered structure. The chamfered covering portion can completely wrap the sidewalls of the core board at the chamfered structure. The chamfered structure of the core board can effectively alleviate stress concentration at the corner and form reliable corner protection.

[0009] It is understandable that the number of corners on the core board varies depending on its shape. Currently, most packaging substrates use rectangular flat core boards. Therefore, the core board can have four corners. The core board can also have more or fewer corners; this application does not impose any limitations on this.

[0010] In some embodiments, the core board has multiple corners. Correspondingly, the substrate includes multiple edge-sealing structures, each of which can be respectively wrapped around the sidewalls of the core board at each corner. This provides protection for all corners of the core board. It should be noted that there is a gap between adjacent edge-sealing structures. That is, a portion of the sidewall between two adjacent corners of the core board is not covered by the aforementioned edge-sealing structure.

[0011] It should be noted that, depending on the application scenario of the substrate, the other side of the core board may have different film layers. In some embodiments of this application, the substrate further includes a second wiring layer, which is stacked on the side of the core board opposite to the first wiring layer. A substrate with wiring layers on both sides of the core board can be applied to AI computing, mobile phones, computers, wearables, automotive, and other application scenarios.

[0012] The surface of the core board facing the first wiring layer is called the first surface, and the surface of the core board facing the second wiring layer is called the second surface. For a substrate with a first wiring layer and a second wiring layer, the edge sealing structure can completely cover the entire sidewall of the core board at the corner, or it can only cover the part of the sidewall of the core board near the first surface and the part of the sidewall near the second surface at the corner.

[0013] In some other embodiments of this application, the substrate further includes a molding compound layer, which is stacked on the side of the core board opposite to the first wiring layer. A substrate with a first wiring layer on one side and a molding compound layer on the other side can be applied to AI computing, mobile phones, computers, wearables, automotive applications, and other scenarios.

[0014] To ensure the protective effect of the edge sealing structure, in embodiments of this application, the edge sealing structure may include an insulating film layer, for example, an Ajinomoto deposited film. The edge sealing structure may also include a molding compound layer, such as a liquid epoxy molding compound. The edge sealing structure may also include an adhesive layer, such as polyimide adhesive or various underfill adhesives.

[0015] Secondly, this application also includes a chip packaging structure, comprising a chip and the substrate described in the first aspect. The chip is disposed on the substrate. Since the substrate in the chip packaging structure of this application is the same as the substrate structure described in the first aspect, and both can solve the same technical problem and achieve the same technical effect, further details are omitted here.

[0016] Thirdly, this application also includes a circuit board assembly, comprising a circuit board and a chip packaging structure as described in the second aspect, wherein the chip packaging structure is disposed on the circuit board. Since the chip packaging structure in the circuit board assembly of this application is the same as the chip packaging structure described in the second aspect above, and both can solve the same technical problem and achieve the same technical effect, further details are omitted here.

[0017] Fourthly, this application also includes a circuit board assembly, comprising a circuit board and a chip packaging structure, wherein the chip packaging structure is disposed on the circuit board. The circuit board uses the substrate described in the first aspect. Since the circuit board in the circuit board assembly of this application has the same structure as the substrate described in the first aspect, and both can solve the same technical problem and achieve the same technical effect, further details are omitted here.

[0018] Fifthly, this application also includes an electronic device comprising a controller and a circuit board assembly as described in the third or fourth aspect above, wherein the controller is electrically connected to the circuit board assembly. Since the circuit board assembly in the electronic device of this application has the same structure as the circuit board assembly described in the third or fourth aspect above, and both can solve the same technical problem and achieve the same technical effect, further details are omitted here.

[0019] Sixthly, this application also includes a method for manufacturing a substrate. The method includes the following steps:

[0020] Fabricate a substrate structure. The substrate structure includes a core board, a first wiring structure, and multiple edge sealing portions. The core board and the first wiring structure are stacked. The multiple edge sealing portions are at least spaced apart within the core board. That is, the multiple edge sealing portions can be located solely within the core board, or they can be located within both the core board and the first wiring structure.

[0021] The substrate structure is cut along its thickness direction at multiple edge-sealing portions to obtain multiple substrates including a first wiring layer, a core board, and an edge-sealing structure. The first wiring layer and the core board are stacked. The core board has corners, and the edge-sealing structure wraps around at least a portion of the sidewalls of the core board at the corners. Therefore, the substrate of the first aspect described above can be obtained by using the above-described manufacturing steps.

[0022] Based on the above method, in some embodiments of this application, the fabrication of the substrate structure specifically includes: forming a plurality of holes at intervals in a core board; forming a plurality of edge sealing portions within the plurality of holes; and stacking a first wiring structure on one side of the core board having the plurality of edge sealing portions to obtain the aforementioned substrate structure.

[0023] Based on the above steps, in some embodiments, forming multiple edge-sealing portions within multiple holes specifically includes: stacking a first edge-sealing film layer and a second edge-sealing film layer on both sides of the core board. A hot-pressing process is used to bond the first and second edge-sealing film layers, so that portions of the first and second edge-sealing film layers are embedded within multiple holes to form multiple edge-sealing portions. The remaining first and second edge-sealing film layers can serve as insulating filler material between the conductive structures of the core board.

[0024] Furthermore, in some other embodiments of this application, the fabrication of the substrate structure specifically includes: forming a first wiring structure layer on one side of a core board; stacking a molding compound on the other side of the core board; fabricating the first wiring structure layer as a first wiring structure; forming a plurality of holes at intervals, each penetrating at least the first wiring structure and the chip board; and finally forming a plurality of sealing portions within the plurality of holes to obtain the aforementioned substrate structure.

[0025] Regarding the manufacturing steps of the two above-mentioned embodiments, in some embodiments of this application, forming multiple edge sealing portions in multiple holes specifically includes: filling edge sealing material in multiple holes by dispensing adhesive to form multiple edge sealing portions. Attached Figure Description

[0026] To illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments of this application will be described below.

[0027] Figure 1 This is a schematic diagram of the structure of a first type of circuit board assembly according to an embodiment of this application;

[0028] Figure 2 This is a schematic diagram of the structure of a second type of circuit board assembly according to an embodiment of this application;

[0029] Figure 3 This is a schematic diagram of the glass substrate breaking at the cut surface;

[0030] Figure 4 A schematic diagram of a glass substrate exhibiting delamination.

[0031] Figure 5 This is a three-dimensional structural diagram of the packaging substrate according to an embodiment of this application;

[0032] Figure 6 This is a schematic diagram of the assembly structure of the core board and the edge sealing structure in the packaging substrate of this application embodiment;

[0033] Figure 7 This is a three-dimensional structural diagram of the core board in the packaging substrate of an embodiment of this application;

[0034] Figure 8 This is a top view of the assembly of the core board and the edge sealing structure in the packaging substrate of the embodiment of this application;

[0035] Figure 9 This is a cross-sectional schematic diagram of the packaging substrate according to an embodiment of this application;

[0036] Figure 10 This is a three-dimensional structural diagram of a packaging substrate with a chamfered structure according to an embodiment of this application;

[0037] Figure 11 This is a top view of a packaging substrate with a right-angled chamfered structure according to an embodiment of this application;

[0038] Figure 12 This is a top view of a packaging substrate with a rounded chamfer structure according to an embodiment of this application;

[0039] Figure 13 This is a three-dimensional structural diagram of a packaging substrate having a second wiring layer according to an embodiment of this application;

[0040] Figure 14 This is a three-dimensional structural diagram of a packaging substrate having a second wiring layer and a chamfered structure according to an embodiment of this application.

[0041] Figure 15 This is a three-dimensional structural diagram of a packaging substrate with an edge sealing structure that does not completely cover the corner sidewalls, according to an embodiment of this application.

[0042] Figure 16 This is a cross-sectional schematic diagram of a packaging substrate having a second wiring layer according to an embodiment of this application;

[0043] Figure 17 This is a three-dimensional structural diagram of a packaging substrate with a molding layer according to an embodiment of this application;

[0044] Figure 18 (a), (b), and (c) are schematic diagrams of the various steps involved in fabricating the large glass plate in the first type of substrate.

[0045] Figure 19 (a), (b), (c), (d), (e), and (f) are schematic diagrams of the structures of S20, S30, and S40 in the first manufacturing method of the first type of substrate, respectively.

[0046] Figure 20 (a), (b), (c), and (d) are schematic diagrams of the structures of S20, S30, and S40 in the second manufacturing method of the first type of substrate, respectively.

[0047] Figure 21 In the diagrams (a), (b), (c), (d), (e), (f), (g), (h), and (i), respectively, it is a structural diagram of each step in the fabrication method of the second type of substrate.

[0048] Icon labels:

[0049] 1000 - Circuit board assembly; 100 - Circuit board; 200 - Chip packaging structure; 10 - Chip; 20 - Packaging substrate; 20S - Substrate; 1 - Core board; 10 - Corner; 10S - Chamfered structure; 1a - First side; 1b - Second side; 101 - First surface; 102 - Second surface; 103 - Side surface; 11 - Core board body; 12 - First conductive structure; 1S - Glass plate; 110 - Through hole; 111 - Glass through hole; 1111 - Metallization Structure; 112-hole; 2-first wiring layer; 210-first wiring structure; 21-first insulating layer; 22-second conductive structure; 3-edge sealing structure; 310-edge sealing part; 31-beveled covering part; 301-first edge sealing film layer; 302-second edge sealing film layer; 4-second wiring layer; 410-second wiring structure; 41-second insulating layer; 42-third conductive structure; 5-molding layer; 510-molding board; 30-interchange board; 01-glass substrate. Detailed Implementation

[0050] To make the objectives, technical solutions, and advantages of this application clearer, the application will now be described in further detail with reference to the accompanying drawings.

[0051] In the following description, the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first," "second," etc., may explicitly or implicitly include one or more of that feature. In the description of this application, unless otherwise stated, "a plurality of" means two or more.

[0052] Furthermore, in this application, directional terms such as "upper," "lower," "left," "right," "horizontal," and "vertical" are defined relative to the indicated placement of the components in the accompanying drawings. It should be understood that these directional terms are relative concepts, used for relative description and clarification, and can change accordingly depending on the placement of the components in the accompanying drawings.

[0053] In this application, unless otherwise expressly specified and limited, the term "connection" should be interpreted broadly. For example, "connection" can refer to a mechanical or physical connection. It can be a fixed connection, a detachable connection, or an integral part; it can be a direct connection or an indirect connection through an intermediate medium. It can also be understood as the physical contact and electrical conduction of components, or as the form of connection between different components in a circuit structure through physical lines capable of transmitting electrical signals, such as PCB copper foil or wires.

[0054] This application provides an electronic device that may include a controller and a circuit board assembly. The controller is electrically connected to the circuit board assembly. Here, the electronic device may be, for example, a server, consumer electronics, home electronics, automotive electronics, financial terminal products, communication electronic products, etc., and this application does not limit this. Illustrated, the aforementioned consumer electronics may be mobile phones, tablet computers, laptops, personal computers (PCs), personal digital assistants (PDAs), smart wearable products (e.g., smartwatches, smart bracelets), virtual reality (VR) terminal devices, augmented reality (AR) terminal devices, drones, etc. Home electronics may be smart door locks, televisions, smart speakers, refrigerators, robot vacuum cleaners, etc. Automotive electronic products may be in-vehicle navigation systems, in-vehicle displays, etc. Financial terminal products may be automated teller machines (ATMs), self-service electronic devices, etc. Communication electronic products may be servers, storage devices, radar, base stations, and other communication equipment. The embodiments of this application do not impose any special restrictions on the specific form of the above-mentioned electronic devices.

[0055] Reference Figure 1 The aforementioned circuit board assembly 1000 may include a circuit board 100 and a chip packaging structure 200 disposed on the circuit board 100. Specifically, the circuit board 100 may be a printed circuit board (PCB), which may be a glass substrate, i.e., a substrate with a glass core. The chip packaging structure 200 includes a packaging substrate 20 and a chip 10 disposed on the packaging substrate 20. It should be noted that the packaging substrate 20 in the chip packaging structure 200 may also be a glass substrate.

[0056] In addition, such as Figure 2 As shown, the chip packaging structure 200 may also include multiple stacked chips 10 and an adapter board 30. The adapter board 30 can connect multiple chips to the packaging substrate. The adapter board 30 may also be made of a glass substrate. Therefore, glass substrates have wide applications in the electronics field.

[0057] It is important to note that during the fabrication of the glass substrate, the wiring layer on the glass core board needs to be cooled to room temperature after formation. During this cooling process, the wiring layer shrinks, exerting a lateral shear force on the glass core board. This can cause surface damage and internal microcracks in the glass core board during substrate cutting, significantly reducing its strength. Furthermore, in subsequent processing, these microcracks in the glass substrate can easily become the starting point for glass cracking under the influence of mechanical, thermal, and reliability-related stresses. For example, during subsequent packaging processes, the glass core board is prone to impacts with the mold, causing the microcracks at the cut surface to expand and lead to further cracking. Figure 3 The problem of partial glass breakage in the glass substrate 01 shown.

[0058] Furthermore, during the placement of the glass substrate, microcracks at the cut surface of the glass core may continue to propagate, leading to… Figure 4 The glass substrate 01 shown exhibits the "SeWaRe" phenomenon. Therefore, the reliability of the glass substrate is reduced, and it is prone to reliability failure.

[0059] Therefore, in order to solve the above problems, this application provides a substrate with an improved structure, which can be used as the above-mentioned packaging substrate 20, adapter board 30, or circuit board 100. The following description uses the substrate as a packaging substrate as an example.

[0060] For example, the chip package structure 200 includes a chip 10 and a substrate as a package substrate 20 according to embodiments of this application. The chip 10 is disposed on the package substrate 20.

[0061] Among them, such as Figure 5 As shown, the packaging substrate 20 may include a core board 1, a first wiring layer 2, and an edge sealing structure 3.

[0062] The core board 1 can specifically be a glass core board. Furthermore, the core board 1 has corners, two surfaces, and multiple sides. It is understood that different shapes of the core board 1 will result in different numbers of corners and sides. This application does not limit the shape of the core board 1. For example... Figure 6 As shown, the two surfaces of the core board 1 can be the first surface 101 (i.e., Figure 6 The upper surface of the core board 1 and the second surface 102 (i.e., Figure 6 The lower surface of the core board 1 is shown. There can be multiple side surfaces 103 of the core board 1, which are located between the first surface 101 and the second surface 102, respectively.

[0063] Example, Figure 6 The core board 1 shown is approximately rectangular. An L-shaped hole 112 can be formed at the intersection of any adjacent long and short sides of the core board 1. The area where the hole 112 is located is the corner 10 of the core board 1. Therefore, the four sides of the core board 1 form four holes 112 and four corners 10.

[0064] The aforementioned first wiring layer 2 is stacked on the first side 1a of the core board 1. For example... Figure 5 and Figure 6 As shown, the first side 1a can be the side facing the first surface 101. The second side 1b is correspondingly the side facing the second surface 102. Furthermore, the first wiring layer 2 can specifically be an Ajinomoto deposition film.

[0065] Because the corner 10 has a higher stress concentration problem compared to other areas of the core board 1, microcracks are more likely to appear at the corner 10 during cutting. Therefore, the edge sealing structure 3 of this embodiment can be wrapped around the side wall of the corner 10 (i.e., the wall surface where the side 103 is located).

[0066] It should be noted that the edge banding structure 3 can wrap around the outer sidewall of the core board 1 at the corner 10. That is, the edge banding structure 3 can wrap around part or all of the area of ​​any one sidewall of the core board 1 at the corner 10, or it can wrap around part of the area of ​​both sidewalls of the core board 1 at the corner 10. The edge banding structure 3 can also wrap around all the sidewalls of the core board 1 at the corner 10. That is, the edge banding structure 3 wraps around all the area of ​​both sidewalls of the core board 1 at the corner 10.

[0067] For example, such as Figure 7 and Figure 8 As shown, the edge sealing structure 3 can fill the L-shaped hole 112 and cover all the inner walls of the hole 112. That is, the edge sealing structure 3 wraps around all the side walls of the core board 1 at the corner 10.

[0068] Therefore, the encapsulation substrate 20 of this application embodiment, by adding an edge sealing structure 3, can protect the corner 10 of the core board 1. When the first wiring layer 2 is cooled after fabrication, the edge sealing structure 3 can absorb the lateral shear force of the shrinkage of the first wiring layer 2 on the core board 1 and reduce the contact area between the cutting tool (laser or cutting blade, etc.) and the core board 1, thus reducing the problem of cutting surface damage and internal microcracks in the core board 1 during cutting, thereby improving the strength of the glass core board.

[0069] Furthermore, during subsequent packaging or placement processes, the edge sealing structure 3 protects the core board 1 and prevents micro-cracks on the cut surface of the core board 1 from continuing to propagate, thus preventing the glass substrate from shattering or delaminating. Therefore, the substrate in this embodiment has high reliability and is less prone to reliability failure.

[0070] To ensure the protective effect of the edge sealing structure 3, the edge sealing structure 3 may include an insulating film layer, such as an Ajinomoto film; it may also use a molding film layer, such as a liquid epoxy molding compound (EMC); or it may use an adhesive layer, such as polyimide (PI) glue, or an underfill glue such as epoxy resin, silicone, or polyurethane glue. All of these materials can satisfy the requirements of the edge sealing structure 3 in absorbing the lateral shear force of the shrinkage of the first wiring layer 2 on the core board 1 and providing reliable physical protection for the core board 1.

[0071] Specifically, it can be understood that the projection of the corner 10 of the core board 1 onto the first wiring layer 2 lies within the range of the first wiring layer 2. That is, at the corner 10, the edge of the first wiring layer 2 extends beyond the edge of the projection of the core board 1 onto the first wiring layer 2; in other areas, the edge of the first wiring layer 2 coincides with the edge of the projection of the core board 1 onto the first wiring layer 2. Thus, when cutting, since a sealing structure 3 exists in a portion of the area between two adjacent core boards 1, the first wiring layer 2 can also cover the sealing structure 3. Therefore, the first wiring layer 2 and the core board 1 can be cut simultaneously at the sealing structure 3, without the need for separate cutting, which saves on process steps.

[0072] In addition, such as Figure 9 As shown, the core board 1 may include a core board body 11 and a first conductive structure 12. The core board body 11 may specifically be a glass core board body. The first conductive structure 12 is disposed on the core board body 11. Furthermore, the first conductive structure 12 may include a glass through-hole 111 and a conductive post (not shown in the figure) connected to each other, and the conductive post electrically connects the glass through-hole 111 to the first wiring layer 2.

[0073] Furthermore, the aforementioned first wiring layer 2 may include a first insulating layer 21 and a second conductive structure 22 located within the first insulating layer 21. The top surface of the second conductive structure 22 may be flush with the top surface of the first insulating layer 21, and the bottom surface of the second conductive structure 22 may be flush with the bottom surface of the first insulating layer 21, and it is in contact with and connected to the first conductive structure 12.

[0074] Based on the structure of the packaging substrate 20 described above, in some embodiments, such as Figure 10 and Figure 11 As shown, the corner 10 of the core board 1 has a chamfer structure 10S. The chamfer structure 10S can effectively alleviate stress concentration at the corner 10. Furthermore, the chamfer structure 10S can be a right-angled chamfer structure 10S. That is, the chamfer structure 10S has a side plane, and the angle between this side plane and the two adjacent side surfaces 103 is an obtuse angle. Alternatively, the chamfer structure 10S can also be an arc-shaped chamfer structure. That is, the chamfer structure 10S has an arc surface, and this arc surface is tangent to the two adjacent side surfaces 103. This application embodiment does not limit the chamfer structure 10S.

[0075] Accordingly, the aforementioned edge sealing structure 3 includes a chamfered covering portion 31, the shape of which is complementary to the shape of the chamfered structure 10S. Here, complementary shape means that the chamfered covering portion 31 is shaped to completely cover the sidewall of the chamfered structure 10S. Therefore, the chamfered covering portion 31 can cover the sidewall of the core board 1 at the chamfered structure 10S, providing reliable protection for the corner 10.

[0076] For example, such as Figure 11 As shown, the chamfer structure 10S of the core board 1 is a right-angle chamfer structure, and the surface of the chamfered covering part 31 of the edge sealing structure 3 opposite to the chamfer structure 10S is a plane.

[0077] Another example, such as Figure 12 As shown, the chamfer structure 10S of the core board 1 is a rounded chamfer structure, and the surface of the chamfered covering part 31 of the edge sealing structure 3 opposite to the chamfer structure 10S is an arc surface.

[0078] Furthermore, in Figure 11 and Figure 12 In the core board 1 shown, all four corners 10 may have chamfered structures 10S. Correspondingly, the encapsulation substrate 20 may include four edge sealing structures 3, each of which has a chamfered covering portion 31. The chamfered covering portions 31 of the four edge sealing structures 3 respectively wrap around the sidewalls of the chamfered structures 10S at the four corners 10 of the core board 1.

[0079] Apart from Figure 12The example shown has a core board 1 with four corners 10. In some other examples of this application, the core board 1 has other shapes. Accordingly, the number of corners 10 can also be one, two, three, five, or more.

[0080] Wherein, the number of corners 10 on the core board 1 is two or more, it is referred to as the core board 1 having multiple corners 10. The multiple corners 10 on the core board 1 may all have chamfered structures 10S, or may have partial chamfered structures 10S, and this application does not impose any restrictions on this.

[0081] In the example where the core board 1 has multiple corners 10, the encapsulation substrate 20 may include multiple edge sealing structures 3, which may respectively wrap around the sidewalls of the core board 1 at the multiple corners 10. Thus, reliable protection is provided for all corners 10 on the core board 1.

[0082] It is understood that there is a gap between the edge sealing structures 3 that wrap around the sidewalls at two adjacent corners 10 on the core board 1. That is, the middle area of ​​the same sidewall shared by two adjacent corners on the core board 1 is not wrapped with the aforementioned edge sealing structure 3.

[0083] It should be noted that the composition and structure of the packaging substrate 20 vary depending on the application scenario. For example, the film layer on the second side 1b of the core board 1 can have multiple layers. In some embodiments of this application, such as... Figure 13 and Figure 14 As shown, the aforementioned packaging substrate 20 further includes a second wiring layer 4, which is stacked on the second side 1b of the core board 1. The substrate, with wiring layers on both sides of the core board 1, is suitable for applications such as AI computing, mobile phones, computers, wearables, and automotive applications.

[0084] for Figure 13 and Figure 14 The package substrate 20 shown has a first wiring layer 2 and a second wiring layer 4. In some examples, such as Figure 13 and Figure 14 As shown, the edge sealing structure 3 can completely wrap around the entire side wall of the core board 1 at the corner 10.

[0085] In other examples, such as Figure 15 As shown, the edge sealing structure 3 can also wrap around the part of the sidewall of the core board 1 near the first surface 101 at the corner 10 and the part of the sidewall near the second surface 102.

[0086] For example, in Figure 15 In the encapsulation substrate 20 shown, the sealing structure 3 only wraps around the outer sidewall of the core board 1 at the corner 10 near the first wiring layer 2 and the second wiring layer 2.

[0087] It should be noted that, similarly, the projection of the core board 1 onto the second wiring layer 4 is located within the range of the second wiring layer 4. That is, the edge of the second wiring layer 4 extends beyond the edge of the projection of the corner 10 of the core board 1 onto the second wiring layer 4, and coincides with the edge of the projection of other areas of the core board 1 onto the second wiring layer 4.

[0088] As a supplementary explanation, in the examples of this application, such as Figure 16 As shown, the second wiring layer 4 may include a second insulating layer 41 and a third conductive structure 42 located within the second insulating layer 41. The top surface of the third conductive structure 42 may be flush with the top surface of the second insulating layer 41 and in contact with the bottom surface of the first conductive structure 12. Specifically, the third conductive structure 42 may contact and connect with the conductive post located on the second surface 102 of the core board 1 in the first conductive structure 12.

[0089] Furthermore, in other embodiments of this application, such as Figure 17 As shown, the aforementioned encapsulation substrate 20 also includes a molding compound 5, which is stacked on the second side 1b of the core board 1. For example, the molding compound 5 can be made of epoxy molding compound. The substrate having the first wiring layer 2 and the molding compound 5 can be used in applications such as AI computing, mobile phones, computers, wearables, and automotive applications.

[0090] It should be noted that, in addition to the molding layer 5, the second side 1b of the core board 1 may also include other film layers, such as wiring layers; this application does not impose any restrictions on this. Specifically, the appropriate film layer structure of the encapsulation substrate 20 can be selected according to the actual application requirements.

[0091] In summary, the structure of the packaging substrate 20 described above can be applied to various application scenarios. Furthermore, the above explanation uses the packaging substrate 20 as an example. The structure of the packaging substrate 20 can also be applied to adapter boards or circuit boards, and this application does not limit its application in this regard.

[0092] Furthermore, this application embodiment also provides a method for manufacturing a substrate, which can manufacture the packaging substrate 20 having a first wiring layer 2 and a second wiring layer 4 as described in the above embodiments. (Refer to...) Figure 18 and Figure 19 The method for manufacturing this substrate includes the following steps:

[0093] S10: Making core board panels.

[0094] Specifically, please refer to Figure 18 The process steps shown illustrate the fabrication of the core board. The following explanation uses a glass core board as an example:

[0095] S101: Provides large glass panels.

[0096] Available Figure 18The glass plate 1S shown in Figure (a) is subjected to light irradiation. Specifically, the light irradiation is performed at the location where through-holes are to be formed. In this way, the internal molecular structure at the irradiated location on the glass plate 1S changes, thereby facilitating the subsequent formation of through-holes.

[0097] S102: Multiple through holes are formed at intervals on the glass plate.

[0098] Among them, etching or laser etching can be used to form, at intervals, on the glass plate 1S, such as Figure 18 Multiple through holes 110 are shown in (b).

[0099] S103: Metallize multiple through holes to form multiple glass through holes.

[0100] Among them, electroplating processes can be used to produce, such as Figure 18 Multiple metallized structures 1111 are shown in (c). The number of metallized structures 1111 is the same as the number of through holes 110. The metallized structures 1111 can cover the hole walls of the through holes 110, and the metallized structures 1111 can also extend to both ends of the through holes 110 and cover part of the top and bottom surfaces of the glass plate 1S. Furthermore, the metallized structures 1111 can fill the through holes 110 completely, or they can... Figure 18 As shown in (c), the through-hole 110 is not completely filled (i.e., only a metal film layer is covered on the hole wall of the through-hole 110). Thus, multiple glass through-holes 111 are formed.

[0101] It should be noted that the steps in manufacturing the large glass panel 1S may also include manufacturing conductive pillars. Specifically, conductive pillars can be manufactured on the top and bottom surfaces of each glass through-hole 111. This step is existing technology for manufacturing the large glass panel 1S and will not be described in detail here.

[0102] S20: Multiple edge sealing sections are formed at intervals within the large glass panel.

[0103] Specifically, please refer to Figure 19 and Figure 20 The process shown involves creating multiple edge-sealing sections at intervals within the large glass panel. The specific steps are as follows:

[0104] S201: Multiple holes are formed at intervals in the glass plate.

[0105] Similarly, etching or laser etching can be used to form patterns at 1-second intervals on the glass plate. Figure 19 Multiple holes 112 are shown in (a). Furthermore, the holes 112 may have a chamfered structure 10S.

[0106] S202: Multiple sealing sections are formed within multiple holes.

[0107] For example, a dispensing process can be used to fill the sealing material in multiple holes 112, forming a sealant such as... Figure 19 Multiple edge sealing portions 310 are shown in (b). The edge sealing portion 310 may include a chamfered covering portion 31, which can wrap the sidewall of the chamfered structure 10S.

[0108] For example, it can be done according to Figure 20 The process steps shown form multiple sealing sections within multiple holes.

[0109] S2021: A first sealing film layer and a second sealing film layer are formed on both sides of the glass plate, respectively.

[0110] The first sealing film layer 301 and the second sealing film layer 302 can be film layer structures with adhesive functions. Both the first sealing film layer 301 and the second sealing film layer 302 can be Ajinomoto stacked film (ABF). Figure 20 As shown in (a), the first sealing film layer 301 can be stacked on the upper surface of the glass plate 1S, and the second sealing film layer 302 can be stacked on the lower surface of the glass plate 1S.

[0111] S2022: A hot-pressing process is used on the first and second sealing film layers to embed a portion of the first and second sealing film layers into multiple holes to form multiple sealing portions.

[0112] Under high temperature conditions, the first sealing film layer 301 and the second sealing film layer 302 are pressed together. In this way, the first sealing film layer 301 and the second sealing film layer 302 can melt at high temperature, and portions of the first sealing film layer 301 and the second sealing film layer 302 flow into the plurality of holes 112 to form a... Figure 20 The multiple sealing portions 310 are shown in (b). The remaining first sealing film layer 301 and second sealing film layer 302 can be disposed outside the aforementioned conductive post. It should be noted that a portion of the first sealing film layer 301 and a portion of the second sealing film layer 302 can also flow into the hollow glass through-hole 111. That is, the glass through-hole 111 is filled simultaneously, as well as multiple holes 112, to form multiple sealing portions 310.

[0113] Similarly, for the above-mentioned process of forming using dispensing... Figure 19 In the example of multiple sealing portions 310 in (b), the hollow glass through-hole 111 can also be filled by forming a first sealing film layer 301 and a second sealing film layer 302 on both sides of the glass plate, and then hot-pressing them together. Figure 19 As shown in (c) to (d).

[0114] It should be noted that the conductive pillars located on the top surface of the glass through-hole 111 can be located within the first sealing film layer 301, and the conductive pillars located on the bottom surface of the glass through-hole 111 can be located within the second sealing film layer 302. After the first sealing film layer 301 and the second sealing film layer 302 are hot-pressed together, if the conductive pillars are not exposed from the first sealing film layer 301 and the second sealing film layer 302, the top surface of the first sealing film layer 301 and the bottom surface of the second sealing film layer 302 can be ground to expose the bottom and top surfaces of the conductive pillars.

[0115] S30: A first wiring structure and a second wiring structure are formed on both sides of the glass panel.

[0116] like Figure 19 (e) and Figure 20 As shown in (c), a first wiring structure 210 is fabricated by adding a layer on one side of the glass plate 1S (in the example where the edge sealing portion 310 is fabricated using the first edge sealing film layer 301 and the second edge sealing film layer 302, the layer is added above the first edge sealing film layer 301). A second wiring structure 410 is fabricated by adding a layer on the other side of the glass plate 1S (in the example where the edge sealing portion 310 is fabricated using the first edge sealing film layer 301 and the second edge sealing film layer 302, the layer is added below the second edge sealing film layer 302). Specifically, the first wiring structure 210 can be fabricated on the top surface of the glass plate 1S and the top surface of the multiple edge sealing portions 310, and the second wiring structure 410 can be fabricated on the bottom surface of the glass plate 1S and the bottom surface of the multiple edge sealing portions 310. Thus, a substrate structure including the glass plate 1S, the first wiring structure 210, the second wiring structure 410, and the multiple edge sealing portions 310 is obtained.

[0117] To further explain, for the substrate to be covered by the edge sealing structure 3, which wraps around the portion of the sidewall near the first surface 101 and the portion of the sidewall near the second surface 102 at the corner 10 of the core board 1, the process for fabricating this portion of the edge sealing structure 3 can be the same as the process for fabricating the edge sealing structure 3 described above. The only difference is that the hole 112 is a blind hole, not a through hole. After the fabrication of the first wiring structure 210 is completed, the stacked structure including the glass plate 1S, the first wiring structure 210, and the multiple edge sealing portions 310 can be flipped. Then, on the side of the glass plate 1S away from the first wiring structure 210, the same process steps as described above are used to fabricate this portion of the edge sealing structure 3, which wraps around the portion of the sidewall near the second surface 102 at the corner 10 of the core board 1. After that, the second wiring structure 410 is fabricated. Thus, a substrate structure including a large glass plate 1S, a first wiring structure 210, a second wiring structure 410, and multiple edge sealing portions 310 is obtained.

[0118] S40: Cut the glass plate, the first wiring structure and the second wiring structure along the thickness direction of the glass plate at multiple edge sealing portions to obtain multiple substrates including the first wiring layer, the glass core plate, the edge sealing structure and the second wiring layer.

[0119] Specifically, the laminated structure of the glass plate 1S, the first wiring structure 210, and the second wiring structure 410 can be cut along the thickness direction of the glass plate 1S at multiple edge sealing sections 310 according to the required shape of the substrate 20S. The cutting method can be laser cutting or blade saw cutting. Laser cutting can specifically use a laser cutting machine. The laser can be an infrared (IR) laser or an ultraviolet (UV) laser. Thus, as... Figure 19 (f) and Figure 20 As shown in (d), multiple substrates 20S, including a first wiring layer 2, a glass core board, an edge sealing structure 3, and a second wiring layer 4, are obtained by cutting.

[0120] It should be noted that the first wiring structure 210 and the second wiring structure 410 are at a high temperature after fabrication and then gradually cooled down. During the cooling process, tensile stress is generated on the glass core board. The multiple edge sealing sections 310 can absorb the lateral shear force on the glass core board caused by the shrinkage of the first wiring layer 2, thus reducing the problem of cut surface damage and internal microcracks in the glass core board during cutting, thereby improving the strength of the glass core board. Furthermore, during cutting, they can also provide physical protection to certain areas of the glass core board to prevent crack propagation.

[0121] Furthermore, this application also provides another method for manufacturing a substrate, which can produce the encapsulation substrate 20 having a first wiring layer 2 and a molding compound layer 5 as described in the above embodiments. The method for manufacturing this substrate includes the following steps:

[0122] Reference Figure 21 The method for manufacturing the substrate 20S includes the following steps:

[0123] S11: Making large glass panels.

[0124] Similarly, the specifics can be followed according to Figure 18 The production process shown yields the product. Figure 21 The large glass panel shown in (a) will not be described further here. Furthermore, subsequently, as... Figure 21 As shown in (b), the first sealing film layer 301 is laminated onto the upper surface of the large glass plate 1S. Then, as... Figure 21 As shown in (c), a hot-pressing process is used on the first sealing film layer 301 so that a portion of the first sealing film layer 301 and a portion of the second sealing film layer 302 flow into the hollow glass through hole 111 to form a solid glass through hole 111.

[0125] S21: A first wiring structure layer is formed on one side of the glass panel.

[0126] Among them, such as Figure 21 As shown in (d), an additional layer is added to the upper surface of the glass plate 1S to obtain the first wiring structure layer 210S.

[0127] S31: A plastic-sealed large panel is stacked on the other side of the large glass panel.

[0128] Among them, such as Figure 21 As shown in (e), the plastic-sealed large plate 510 is stacked on the lower surface of the glass large plate 1S.

[0129] S41: Create the first wiring structure layer as the first wiring structure.

[0130] Among them, such as Figure 21 As shown in (f), the first wiring structure layer 210S is grooved by etching or laser etching to obtain the first wiring structure 210.

[0131] S51: Multiple holes are formed at intervals, at least penetrating the first wiring structure and the glass plate.

[0132] like Figure 21 As shown in (g), the stacked structure of the first wiring structure 210, the glass plate 1S, and the molding plate 510 can be processed from above using methods such as etching, laser etching, or blade cutting to form multiple spaced holes 112 (only one hole 112 is shown in the figure). The hole 112 can penetrate only the first wiring structure 210 and the glass plate 1S, or it can penetrate the first wiring structure 210, the glass plate 1S, and part of the molding plate 510. Figure 21 The example shown in (g) is an example of a hole 112 penetrating the first wiring structure 210, the glass plate 1S, and a partially thick plastic-sealed plate 510.

[0133] S61: Multiple sealing sections are formed within multiple holes.

[0134] A dispensing process can be used to fill the sealing material into multiple holes 112, forming a sealant such as... Figure 21Multiple edge-sealing portions 310 are shown in (h). Specifically, a panel-level or wafer-level (e.g., 300mm) packaging process can be used for dispensing. Furthermore, the edge-sealing portions 310 can fill the first wiring structure 210, the glass plate 1S, and part of the molding compound 510. The edge-sealing portions 310 can also include chamfered covering portions 31, which can wrap the sidewalls of the core board 1 at the chamfered structure 1S. Thus, a substrate structure including the glass plate 1S, the first wiring structure 210, the glass plate 1S, the molding compound 510, and multiple edge-sealing portions 310 is obtained.

[0135] S71: Cut the glass plate, the first wiring structure and the molding plate along the thickness direction of the glass plate at multiple edge sealing portions to obtain multiple substrates including the first wiring layer, the glass core board, the edge sealing structure and the molding layer.

[0136] That is, along the thickness direction of the glass plate 1S, the laminated structure of the first wiring structure 210, the glass plate 1S, and the molding plate 510 can be cut at multiple sealing portions 310 according to the desired shape of the substrate 20S. Thus, as... Figure 21 As shown in (i), multiple substrates 20S, including a first wiring layer 2, a glass core board, an edge sealing structure 3, and a molding layer 5, are obtained by cutting. The cutting method can be the same as the method described above for cutting the stacked structure of the first wiring structure 210, the glass core board 1S, and the second wiring structure 410, and will not be described in detail here.

[0137] Similarly, the first wiring structure 210 is manufactured at a high temperature and then gradually cooled down, generating tensile stress on the glass core board during the cooling process. Multiple edge-sealing sections 310 can absorb the lateral shear force exerted on the glass core board by the shrinkage of the first wiring layer 2, and reduce the problem of cut surface damage and internal microcracks in the glass core board during cutting, thereby improving the strength of the glass core board. Furthermore, during cutting, it can also provide physical protection to certain areas of the glass core board, preventing crack propagation.

[0138] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A substrate, characterized in that, include: Core board, the core board having corners; A first wiring layer is stacked on one side of the core board; An edge sealing structure is provided, which wraps around at least a portion of the sidewall of the core board at the corner.

2. The substrate according to claim 1, characterized in that, The core board has a chamfered corner structure, and the edge sealing structure includes a chamfered covering part. The shape of the chamfered covering part is complementary to the shape of the chamfered structure, so as to wrap the side wall of the core board at the chamfered structure.

3. The substrate according to claim 1 or 2, characterized in that, The chip has multiple corners, and the substrate includes multiple edge sealing structures, which are respectively wrapped around the sidewalls of the core board at the multiple corners.

4. The substrate according to any one of claims 1-3, characterized in that, The substrate further includes: The second wiring layer is stacked on the side of the core board opposite to the first wiring layer.

5. The substrate according to any one of claims 1-3, characterized in that, The surface on the core board facing the first wiring layer is the first surface, and the surface on the core board facing the second wiring layer is the second surface; The edge sealing structure wraps around the core board at the corner of the portion of the sidewall near the first surface and the portion of the sidewall near the second surface.

6. The substrate according to any one of claims 1-3, characterized in that, The substrate further includes: A molding layer is stacked on the side of the core board opposite to the first wiring layer.

7. The substrate according to any one of claims 1-6, characterized in that, The edge sealing structure includes an insulating film layer, a plastic sealing film layer, or an adhesive layer.

8. A chip packaging structure, characterized in that, It includes a chip and a substrate as described in any one of claims 1-7, wherein the chip is disposed on the substrate.

9. A circuit board assembly, characterized in that, It includes a circuit board and the chip packaging structure as described in claim 8, wherein the chip packaging structure is disposed on the circuit board.

10. A circuit board assembly, characterized in that, The invention includes a circuit board and a chip packaging structure, wherein the chip packaging structure is disposed on the circuit board; the circuit board is a substrate as described in any one of claims 1-7.

11. An electronic device, characterized in that, It includes a controller and the circuit board assembly as described in claim 9 or 10, wherein the controller is electrically connected to the circuit board assembly.

12. A method for manufacturing a substrate, characterized in that, Includes the following steps: Fabricating a substrate structure; the substrate structure includes a core board, a first wiring structure, and multiple edge sealing portions, wherein the core board and the first wiring structure are stacked together, and the multiple edge sealing portions are at least spaced apart within the core board; The substrate structure is cut along the thickness direction of the substrate structure at the plurality of edge sealing portions to obtain a plurality of substrates including a first wiring layer, a core board and an edge sealing structure; wherein the first wiring layer and the core board are stacked; the core board has a corner, and the edge sealing structure wraps around at least a portion of the sidewall of the core board at the corner.

13. The method for manufacturing a substrate according to claim 12, characterized in that, The fabrication of the substrate structure specifically includes: Multiple holes are formed at intervals in the core board; Multiple sealing portions are formed within the plurality of holes; A first wiring structure is formed by stacking the core board with the plurality of edge-sealing portions on one side to obtain the substrate structure.

14. The method for manufacturing a substrate according to claim 13, characterized in that, The formation of multiple sealing portions within the multiple holes specifically includes: A first edge sealing film layer and a second edge sealing film layer are respectively stacked on both sides of the core board. The first and second sealing film layers are subjected to a hot-pressing process so that portions of the first and second sealing film layers are embedded in the plurality of holes to form the plurality of sealing portions.

15. The method for manufacturing a substrate according to claim 12, characterized in that, The fabrication of the substrate structure specifically includes: A first wiring structure layer is formed on one side of the core board; The plastic-sealed large board is stacked on the other side of the core board large board; The first wiring structure layer is fabricated as the first wiring structure; Multiple holes are formed at intervals, each penetrating at least the first wiring structure and the chip board; Multiple sealing portions are formed within the plurality of holes to obtain the substrate structure.

16. The method for manufacturing a substrate according to claim 13 or 15, characterized in that, The formation of multiple sealing portions within the multiple holes specifically includes: The edge-sealing material is filled into the plurality of holes by a dispensing process to form the plurality of edge-sealing portions.

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