FPGA-based real-time filtering system and method for periodic characteristic magnetic field signals

Abstract

The application discloses a kind of periodic characteristic magnetic field signal real-time filtering system and method based on FPGA, for replacing the iteration post-processing of host computer offline software.System includes data acquisition interface and FPGA master unit, and pipeline processing module is constructed inside FPGA: power frequency suppression, low-pass filtering and Savitzky-Golay shape smoothing are carried out to input digital signal;Based on smoothed signal, differential absolute value is constructed, and synchronous trigger pulse is generated through adaptive threshold and refractory mechanism;Under trigger reference, single-cycle template is maintained using dual-port Block RAM, and displacement recursive weighting is used to realize recursive synchronous average and output filtered enhanced magnetic field waveform.The scheme can effectively suppress non-periodic baseline drift and reduce storage and computing overhead, and is suitable for online real-time magnetic field signal processing of low-cost FPGA.

Description

Technical Field

[0001] This invention belongs to the field of weak magnetic field signal processing technology, specifically relating to a real-time filtering system and method for periodic characteristic magnetic field signals based on FPGA. The system uses an FPGA main control unit to perform real-time denoising, feature extraction, and waveform enhancement on the periodic characteristic magnetic field signals output by the magnetic field measuring device, replacing the offline iterative processing flow. This facilitates online real-time processing and reduces the probability of false triggering and missed triggering that are easily generated in the threshold detection method. Background Technology

[0002] The magnetic field measuring device is a highly sensitive magnetic sensing device. However, the signal output by the lock-in amplifier is subject to power frequency interference, environmental white noise, baseline drift, and motion artifacts, which seriously affect the measurement accuracy and stability assessment. Existing technologies typically acquire the output signal of the magnetic field measuring device to a PC for offline filtering (PC, Personal Computer). This method has significant latency and cannot meet the needs of real-time monitoring. The periodic characteristic magnetic field signal referred to in this invention refers to a magnetic field signal in the output of the magnetic field measuring device that has periodically repeating characteristic points (including but not limited to spikes, steep rising edges, or wave groups); phase locking refers to the time alignment relationship between the synchronous trigger pulse and the aforementioned characteristic points within each period.

[0003] The existing methods for processing the output signals of magnetic field measuring devices have the following problems:

[0004] (1) The existing magnetic field signal processing flow relies on offline software for iterative calculation and post-processing, which leads to increased latency and makes it difficult to achieve online real-time processing and display;

[0005] (2) Feature trigger point detection often relies on the absolute amplitude of the signal or the baseline level. Under the condition of non-periodic large-amplitude baseline drift that is common in the output of the measuring device, false triggering and missed triggering are likely to occur.

[0006] (3) Traditional synchronous averaging denoising usually requires caching multiple frames of historical periodic data, which consumes a lot of on-chip storage resources and is not conducive to implementation on low-cost FPGAs. Summary of the Invention

[0007] This invention addresses the deficiencies or shortcomings of existing technologies by providing a real-time filtering system and method for periodic characteristic magnetic field signals based on FPGA. The system uses an FPGA main control unit to perform real-time denoising, feature extraction, and waveform enhancement on the periodic characteristic magnetic field signals output by the magnetic field measuring device, replacing the offline iterative processing flow. This facilitates online real-time processing and reduces the probability of false triggering and missed triggering that are prone to occur in threshold detection methods.

[0008] The technical solution of the present invention is as follows:

[0009] A real-time filtering system for periodic characteristic magnetic field signals based on FPGA is characterized by comprising an FPGA main control unit set between a magnetic field measuring device and a host computer. The input terminal of the FPGA main control unit is connected to the output terminal of the magnetic field measuring device via an analog-to-digital converter (ADC). The output terminal of the FPGA main control unit transmits the magnetic field characteristic signal to the host computer. The FPGA main control unit internally constructs a fully hardware pipeline architecture, which includes a preprocessing filtering module, a differential feature extraction module, an adaptive triggering module, and a recursive synchronous averaging module connected in sequence. The preprocessing filtering module is connected to the recursive synchronous averaging module. The preprocessing filtering module receives the sampling signal output by the ADC, and the recursive synchronous averaging module outputs the magnetic field characteristic signal.

[0010] The preprocessing filtering module is configured to perform cascade filtering on the input magnetic field digital signal and output a shape-preserving smoothed signal. The differential feature extraction module is configured to include a shift register group for performing multi-step differential operations and absolute value transformations on the smoothed signal to generate an energy feature signal that is insensitive to baseline drift. The adaptive triggering module is configured to generate a synchronous trigger pulse that is strictly phase-locked with the magnetic field feature signal based on the energy feature signal. The recursive synchronous averaging module is configured to include an on-chip Block RAM memory and a recursive operation logic unit, using the synchronous trigger pulse as a phase alignment reference, reading single-cycle historical template data in the Block RAM and performing weighted recursive operations with the current input signal, and writing the operation result back to the Block RAM.

[0011] The preprocessing filtering module includes an IIR power frequency notch filter, a digital low-pass filter, and a Savitzky-Golay smoothing filter cascaded in sequence. The Savitzky-Golay smoothing filter is configured to use a parallel convolution structure to maintain the amplitude and width characteristics of the magnetic field signal characteristic bands while filtering out high-frequency random glitches.

[0012] The operational logic executed by the differential feature extraction module is as follows: E(n) is the energy feature signal output from the differential feature extraction module at discrete-time signal index n, and S(n) is the smoothed signal input from the preprocessing filtering module to the differential feature extraction module at discrete-time signal index n. It is the delayed signal of S(n) under discrete-time signal index nK, where K is the preset differential delay step size.

[0013] The adaptive triggering module receives E(n) and executes the following state machine logic: when E(n) exceeds the preset dynamic threshold T... hWhen a potential magnetic field characteristic signal is detected, the module continuously tracks the maximum value of E(n) within the subsequent time window to lock the precise moment of the characteristic point. Once locked, a single-clock-cycle synchronous trigger pulse is immediately generated. The refractory period counter is started immediately after the trigger, ignoring any over-threshold noise during this period.

[0014] The recursive operation logic unit in the recursive synchronous averaging module is configured to perform the following shift operation instead of the division operation: Y new For the updated template data, Y old X is the historical template data stored in Block RAM. in The input signal is denoted by >>N, where >>N represents an arithmetic right shift of N bits, and N is a smoothing factor.

[0015] The method for real-time filtering of periodic characteristic magnetic field signals based on FPGA is characterized by employing the aforementioned real-time filtering system for periodic characteristic magnetic field signals based on FPGA.

[0016] Includes the following steps:

[0017] Step 1: The FPGA receives the digitized magnetic field signal and performs power frequency notch filtering, low-pass filtering, and Savitzky-Golay shape-preserving smoothing in sequence.

[0018] Step 2: Calculate the absolute difference of the smoothed signal using the internal logic of the FPGA to filter out low-frequency baseline drift and enhance magnetic field characteristics;

[0019] Step 3: Compare the absolute value of the difference with the threshold. When the triggering condition is met, generate a synchronous trigger pulse and start the refractory period shielding.

[0020] Step 4: Reset the Block RAM address pointer based on the synchronous trigger pulse. For each sampling point, read the historical average value in RAM, perform weighted recursive calculation with the current input signal, update the data in RAM, and output the filtered and enhanced magnetic field waveform to the host computer in real time.

[0021] Compared with the prior art, the present invention has the following significant advantages and beneficial effects:

[0022] (1) To address the common problem of non-periodic large-amplitude baseline drift in the output signal of magnetic field measuring devices, this invention abandons the dependence on the absolute amplitude of the signal in existing technologies and innovatively uses a hardware differential energy operator for feature extraction. Since the baseline drift is mainly concentrated in the low-frequency band (<0.5Hz), while the characteristic band is concentrated in the higher-frequency band, differential operation can effectively suppress the low-frequency drift component and significantly enhance the slope characteristics of the magnetic field characteristic signal. This enables the system to accurately lock the phase of the magnetic field characteristic signal even when the magnetic field environment is unstable and the baseline fluctuates drastically, effectively reducing the probability of false triggering and missed triggering that are easily generated in the traditional threshold detection method.

[0023] (2) Adapting to low-cost FPGAs: Traditional synchronous averaging algorithms typically require a large amount of RAM space to cache complete data for dozens of historical cycles (RAM, random access memory), which places extremely high demands on hardware storage resources. The recursive synchronous averaging architecture proposed in this invention uses an iterative algorithm to compress the storage requirements of multiple frames into single-frame template storage, significantly saving on-chip storage resources. In addition, this invention uses shift operations to replace complex floating-point division operations, greatly reducing the consumption of DSP multiplication units and logic gates (DSP, Digital Signal Processing), enabling this high-precision algorithm to run efficiently on low-cost, low-power FPGA chips.

[0024] (3) Unlike the existing offline processing mode of acquisition cards and host computer software, this invention is based on a fully hardware pipeline architecture. Data flows smoothly between modules within the FPGA without obstruction, without operating system scheduling overhead, and without instruction cycle delay. The system can complete filtering, detection, and averaging operations within each sampling cycle, realizing instant measurement and display of the magnetic field waveform.

[0025] (4) In terms of noise filtering, this invention adopts a combination strategy of IIR notch filtering and low-pass filter with Savitzky-Golay conformal smoothing (IIR, Infinite Impulse Response; Savitzky-Golay, a digital filter). Compared with the traditional scheme that only uses a powerful low-pass filter, which leads to severe attenuation of the magnetic field characteristic signal amplitude, this invention utilizes the polynomial fitting characteristics of the Savitzky-Golay filter to filter out high-frequency glitches and noise while preserving the characteristic band of the magnetic field signal to the greatest extent, ensuring high fidelity and low delay of the output signal. Attached Figure Description

[0026] Figure 1 This is a schematic diagram illustrating the structural principle of the real-time filtering system for periodic characteristic magnetic field signals based on FPGA, which implements the present invention. Figure 1The system includes a magnetic field measuring device that acquires the raw magnetic field signal. The magnetic field measuring device outputs a baseband analog voltage signal. This analog voltage signal is converted into a digital signal by an ADC (Analog-to-Digital Converter) and then input to the FPGA (Field-Programmable Gate Array) main control unit. The FPGA main control unit outputs the magnetic field characteristic signal to a host computer / display. FPGA stands for Field-Programmable Gate Array. ADC is an analog-to-digital converter.

[0027] Figure 2 yes Figure 1 A schematic diagram of the structure of the FPGA main control unit. Figure 2 The system includes a preprocessing filtering module, a differential feature extraction module, an adaptive triggering module, and a recursive synchronous averaging module connected in sequence. The preprocessing filtering module is connected to the recursive synchronous averaging module. The preprocessing filtering module receives an input signal i(n) and outputs S(n) to the differential feature extraction module. The recursive synchronous averaging module outputs u(n), where u(n) is the final output signal of the FPGA main control unit, i.e., the output signal of the recursive synchronous averaging module, i(n) is the sampling signal output by the analog-to-digital converter (ADC), and S(n) is the output signal of the preprocessing filtering module.

[0028] Figure 3 This is a schematic diagram of the structure of the real-time filtering system for periodic characteristic magnetic field signals based on FPGA, which implements the present invention. Figure 3 The system includes a magnetic field measuring device, an FPGA main control unit, and a host computer / display connected in sequence. The magnetic field measuring device converts the acquired raw magnetic field signal into a baseband analog voltage signal. The analog voltage signal is then converted into a digital signal by an ADC signal acquisition and input to the FPGA main control unit. The FPGA main control unit has a fully hardware pipeline architecture, which includes a preprocessing filtering module, a differential feature extraction module, an adaptive triggering module, and a recursive synchronous averaging module. The preprocessing filtering module is connected to the recursive synchronous averaging module. The recursive synchronous averaging module outputs the real-time filtered magnetic field waveform to the host computer / display for display or storage. The recursive synchronous averaging module outputs the magnetic field characteristic signal to the host computer / display. Detailed Implementation

[0029] The following is in conjunction with the attached diagram ( Figures 1-3 The present invention will be described in conjunction with the examples.

[0030] Figure 1 This is a schematic diagram illustrating the structural principle of the real-time filtering system for periodic characteristic magnetic field signals based on FPGA, which implements the present invention. Figure 2 yes Figure 1 A schematic diagram of the structure of the FPGA main control unit. Figure 3This is a schematic diagram of the FPGA-based real-time filtering system for periodic characteristic magnetic field signals, implementing the present invention. (Reference) Figures 1 to 3 As shown, a real-time filtering system for periodic characteristic magnetic field signals based on FPGA includes an FPGA main control unit set between a magnetic field measuring device and a host computer. The input terminal of the FPGA main control unit is connected to the output terminal of the magnetic field measuring device through an analog-to-digital converter (ADC). The output terminal of the FPGA main control unit transmits the magnetic field characteristic signal to the host computer. The FPGA main control unit has a fully hardware pipeline architecture built inside. The fully hardware pipeline architecture includes a preprocessing filtering module, a differential feature extraction module, an adaptive triggering module, and a recursive synchronous averaging module connected in sequence. The preprocessing filtering module is connected to the recursive synchronous averaging module. The preprocessing filtering module receives the sampling signal output by the ADC, and the recursive synchronous averaging module outputs the magnetic field characteristic signal.

[0031] The preprocessing filtering module is configured to perform cascade filtering on the input magnetic field digital signal and output a shape-preserving smoothed signal. The differential feature extraction module is configured to include a shift register group for performing multi-step differential operations and absolute value transformations on the smoothed signal to generate an energy feature signal that is insensitive to baseline drift. The adaptive triggering module is configured to generate a synchronous trigger pulse that is strictly phase-locked with the magnetic field feature signal based on the energy feature signal. The recursive synchronous averaging module is configured to include an on-chip Block RAM memory and a recursive operation logic unit, using the synchronous trigger pulse as a phase alignment reference, reading single-cycle historical template data in the Block RAM and performing weighted recursive operations with the current input signal, and writing the operation result back to the Block RAM.

[0032] The preprocessing filtering module includes a cascaded IIR power frequency notch filter, a digital low-pass filter, and a Savitzky-Golay smoothing filter. The Savitzky-Golay smoothing filter is configured with a parallel convolution structure to filter out high-frequency random glitches while preserving the amplitude and width characteristics of the magnetic field signal's characteristic bands. The differential feature extraction module performs the following operations: E(n) is the energy feature signal output from the differential feature extraction module at discrete-time signal index n, and S(n) is the smoothed signal input from the preprocessing filtering module to the differential feature extraction module at discrete-time signal index n. It is a delayed signal for S(n) under discrete-time signal index nK, where K is a preset differential delay step size. The adaptive trigger module receives the energy signal E(n) and executes the following state machine logic: when E(n) exceeds the preset dynamic threshold T... hWhen a potential magnetic field characteristic signal is detected, the module continuously tracks the maximum value of E(n) within the subsequent time window to lock the precise moment of the characteristic point. Once locked, a single-clock-cycle synchronization trigger pulse is immediately generated. The refractory period counter is started immediately after triggering, ignoring any over-threshold noise during this period. The recursive operation logic unit in the recursive synchronization averaging module is configured to perform the following shift operation instead of division: Y new For the updated template data, Y old X is the historical template data stored in Block RAM. in The input signal is denoted by >>N, where >>N represents an arithmetic right shift of N bits, and N is a smoothing factor.

[0033] The real-time filtering method for periodic characteristic magnetic field signals based on FPGA employs the aforementioned real-time filtering system for periodic characteristic magnetic field signals based on FPGA. It includes the following steps: Step 1, the FPGA receives the digitized magnetic field signal and sequentially performs power frequency notch filtering, low-pass filtering, and Savitzky-Golay conformal smoothing; Step 2, the FPGA's internal logic calculates the absolute difference of the smoothed signal to filter out low-frequency baseline drift and enhance the magnetic field characteristics; Step 3, the absolute difference is compared with a threshold. When the trigger condition is met, a synchronous trigger pulse is generated and refractory period shielding is initiated; Step 4, the Block RAM address pointer is reset based on the synchronous trigger pulse. For each sampling point, the historical average value in RAM is read, and a weighted recursive calculation is performed with the current input signal to update the data in RAM. The filtered and enhanced magnetic field waveform is output to the host computer in real time.

[0034] This invention discloses a real-time filtering system and method for periodic characteristic magnetic field signals based on FPGA, which can replace the iterative post-processing of offline software on a host computer. The system includes a data acquisition interface and an FPGA main control unit. A pipelined processing module is built inside the FPGA: it performs power frequency suppression, low-pass filtering, and Savitzky-Golay conformal smoothing on the input digital signal; it constructs the differential absolute value based on the smoothed signal and generates a synchronous trigger pulse through an adaptive threshold and refractory period mechanism; under the trigger reference, it uses a dual-port Block RAM to maintain a single-cycle template, and uses recursive weighted shifting to achieve recursive synchronous averaging and output the filtered and enhanced magnetic field waveform. This scheme can effectively suppress non-periodic baseline drift and reduce storage and computational overhead, making it suitable for online real-time magnetic field signal processing on low-cost FPGAs.

[0035] A real-time filtering system for periodic characteristic magnetic field signals based on FPGA includes an FPGA main control unit and a data acquisition interface connected to the FPGA main control unit. The internal logic circuit of the FPGA main control unit is constructed with a fully hardware pipeline architecture, including a preprocessing filtering module, a differential feature extraction module, an adaptive triggering module, and a recursive synchronous averaging module cascaded in sequence. The preprocessing filtering module is configured to perform cascaded filtering on the input magnetic field digital signal and output a shape-preserving smoothed signal. The differential feature extraction module is configured to include a shift register group for performing multi-step differential operations and absolute value transformations on the smoothed signal to generate an energy characteristic signal that is insensitive to baseline drift. The adaptive triggering module is configured to generate a synchronous trigger pulse that is strictly phase-locked with the magnetic field characteristic signal based on the energy characteristic signal. The recursive synchronous averaging module is configured to include an on-chip Block RAM memory and a recursive operation logic unit (Block RAM, block random access memory), using the synchronous trigger pulse as a phase alignment reference, reading single-cycle historical template data in the Block RAM and performing weighted recursive operations with the current input signal, and writing the operation result back to the Block RAM.

[0036] The preprocessing filtering module includes an IIR (Infinite-duration Impulse Response) notch filter, a digital low-pass filter, and a Savitzky-Golay smoothing filter cascaded in sequence. The Savitzky-Golay smoothing filter is configured with a parallel convolution structure to maintain the amplitude and width characteristics of the magnetic field signal's characteristic bands while filtering out high-frequency random glitches.

[0037] The operational logic executed by the differential feature extraction module is as follows: Where E(n) is the output energy characteristic signal, S(n) is the input smooth signal, and K is the preset differential delay step size.

[0038] The recursive operation logic unit in the recursive synchronous averaging module is configured to perform the following shift operation instead of the division operation: Among them, Y new For the updated template data, Y old X is the historical template data stored in Block RAM. in The input signal is denoted as >>N, which represents an arithmetic right shift of N bits, where N is a smoothing factor.

[0039] A real-time filtering method for periodic characteristic magnetic field signals based on the system of claim 1 includes the following steps: Step S1: The FPGA receives the digitized magnetic field signal and sequentially performs power frequency notch filtering, low-pass filtering, and Savitzky-Golay conformal smoothing; Step S2: The FPGA internal logic calculates the absolute difference of the smoothed signal to filter out low-frequency baseline drift and enhance the magnetic field characteristics; Step S3: The absolute difference is compared with a threshold. When the trigger condition is met, a synchronous trigger pulse is generated and refractory period shielding is initiated; Step S4: The Block RAM address pointer is reset based on the synchronous trigger pulse. For each sampling point, the historical average value in RAM is read, and a weighted recursive calculation is performed with the current input signal to update the data in RAM. The filtered and enhanced magnetic field waveform is output to the host computer in real time.

[0040] A real-time filtering system for periodic characteristic magnetic field signals based on FPGA includes a magnetic field measuring device, an analog-to-digital conversion interface, an FPGA main control unit, and a display module.

[0041] The magnetic field measuring device is configured to sense a magnetic field signal and convert it into an analog voltage signal output.

[0042] The analog-to-digital conversion interface connects the magnetic field measuring device to the FPGA main control unit and is used to convert analog voltage signals into digital signals.

[0043] The FPGA main control unit, as the core processing component of the system, has the following modules cascaded together in its internal logic circuitry:

[0044] (1) Preprocessing filtering module: configured to receive digital signals, filter out environmental noise through an internally instantiated IIR power frequency notch filter and low-pass filter, and remove high-frequency glitches through Savitzky-Golay smoothing logic;

[0045] (2) Differential feature extraction module: configured to include a shift register group and a subtractor, to perform multi-step differential operation on the smoothed signal in order to eliminate the baseline drift effect common in magnetic field measurement devices and extract magnetic field signal features;

[0046] (3) Adaptive triggering module: configured to compare the extracted feature signal with the dynamic threshold and generate a synchronous trigger pulse;

[0047] (4) Recursive synchronous averaging module: configured to include dual-port Block RAM, using the trigger pulse as a reference, and realize real-time updating and denoising of single-cycle template through recursive weighting algorithm.

[0048] like Figures 1 to 3As shown, this embodiment provides a real-time filtering system for periodic characteristic magnetic field signals based on FPGA. The magnetic field measuring device outputs a baseband analog voltage signal, which is digitized via an analog-to-digital converter and then input to the FPGA main control unit. The FPGA main control unit internally constructs a fully hardware pipeline architecture, which sequentially includes a preprocessing filtering module, a differential feature extraction module, an adaptive triggering module, and a recursive synchronous averaging module, and outputs the real-time filtered magnetic field waveform to a host computer / display for display or storage.

[0049] In this embodiment, the specific implementation steps of the system are as follows:

[0050] (1) After the system is powered on, the FPGA drives a high-precision analog-to-digital converter through the interface to acquire the analog voltage signal output by the magnetic field measuring device at a sampling rate of 1kHz to 2kHz. The acquired raw digital signal enters the FPGA and first flows through an IIR notch filter to filter out 50Hz power frequency interference and its harmonics; secondly, the data flows through a digital low-pass filter with a cutoff frequency preferably of 100Hz to remove high-frequency magnetic noise outside the signal bandwidth; finally, the data enters a Savitzky-Golay smoothing filter, and the output signal is S(n).

[0051] (2) To overcome the non-periodic baseline drift of the magnetic field measuring device, this step does not directly use the signal amplitude, but instead calculates the slope energy of the signal. The shift register group inside the FPGA delays the signal S(n) smoothed in step (1). The delay step size K can be set, corresponding to the typical time of the rising edge of the magnetic field characteristic signal. The differential feature extraction module performs the following calculations in real time:

[0052]

[0053] Here, E(n) is the absolute value of the difference. When the baseline drifts slowly, its absolute value of the difference approaches zero; while when the magnetic field characteristic signal appears, its steep rising edge will generate a significant energy spike in E(n), thus decoupling the signal characteristics from the baseline drift. In S(n), n represents the index of the discrete-time signal.

[0054] (3) While performing step (2), the adaptive triggering module receives the energy signal E(n) and executes the following state machine logic: when E(n) exceeds the preset dynamic threshold T h When a potential magnetic field characteristic signal is detected, the module continuously tracks the maximum value of E(n) within the subsequent time window to lock the precise moment of the characteristic point. Once locked, a single-clock-cycle synchronous trigger pulse is immediately generated. The refractory period counter is started immediately after the trigger, ignoring any over-threshold noise during this period.

[0055] (4) Recursive synchronization averaging denoising is performed on the data stream. The FPGA internally preferably uses a 16-bit dual-port Block RAM with a storage depth of 1000 as a circular buffer. When the synchronization trigger pulse generated in step (3) is received, the RAM's read / write address pointer is immediately reset to address 0, achieving strict alignment with the phase of the magnetic field characteristic signal. For each subsequent sampling point, the system performs the following operations:

[0056] 1. Read the historical average value Y from the current address of RAM for the previous cycle. old ;

[0057] 2. Calculate the updated value:

[0058]

[0059] Where X in The input signal is currently preprocessed. ">>" is the right shift operator; uppercase N represents the number of bits to shift to the right, which here represents the smoothing factor. A larger N results in stronger smoothing but slower convergence, while a smaller N results in weaker smoothing but faster convergence.

[0060] 3. Y new Write back to the same address in RAM. Y new Simultaneously, it serves as the final enhanced signal output of the system. This step causes the aperiodic random white noise to attenuate significantly with the increase of the magnetic field signal cycle number, and the signal-to-noise ratio of the output waveform converges rapidly over time.

[0061] Contents not described in detail in this specification are existing technologies known to those skilled in the art. It is hereby indicated that the above description is intended to help those skilled in the art understand the present invention, but does not limit the scope of protection of the present invention. Any equivalent substitutions, modifications, improvements, and / or simplifications of the above descriptions that do not depart from the essence of the present invention fall within the scope of protection of the present invention.

Claims

1. A real-time filtering system for periodic characteristic magnetic field signals based on FPGA, characterized in that, The system includes an FPGA main control unit positioned between a magnetic field measuring device and a host computer. The input of the FPGA main control unit is connected to the output of the magnetic field measuring device via an analog-to-digital converter (ADC). The output of the FPGA main control unit transmits magnetic field characteristic signals to the host computer. The FPGA main control unit has a fully hardware pipeline architecture, which includes a preprocessing filtering module, a differential feature extraction module, an adaptive triggering module, and a recursive synchronous averaging module connected in sequence. The preprocessing filtering module is connected to the recursive synchronous averaging module. The preprocessing filtering module receives the sampling signal output by the ADC, and the recursive synchronous averaging module outputs the magnetic field characteristic signal.

2. The real-time filtering system for periodic characteristic magnetic field signals based on FPGA according to claim 1, characterized in that, The preprocessing filtering module is configured to perform cascade filtering on the input magnetic field digital signal and output a shape-preserving smoothed signal. The differential feature extraction module is configured to include a shift register group for performing multi-step differential operations and absolute value transformations on the smoothed signal to generate an energy feature signal that is insensitive to baseline drift. The adaptive triggering module is configured to generate a synchronous trigger pulse that is strictly phase-locked with the magnetic field feature signal based on the energy feature signal. The recursive synchronous averaging module is configured to include an on-chip Block RAM memory and a recursive operation logic unit, using the synchronous trigger pulse as a phase alignment reference, reading single-cycle historical template data in the Block RAM and performing weighted recursive operations with the current input signal, and writing the operation result back to the Block RAM.

3. The real-time filtering system for periodic characteristic magnetic field signals based on FPGA according to claim 1, characterized in that, The preprocessing filtering module includes an IIR power frequency notch filter, a digital low-pass filter, and a Savitzky-Golay smoothing filter cascaded in sequence. The Savitzky-Golay smoothing filter is configured to use a parallel convolution structure to maintain the amplitude and width characteristics of the magnetic field signal characteristic bands while filtering out high-frequency random glitches.

4. The real-time filtering system for periodic characteristic magnetic field signals based on FPGA according to claim 1, characterized in that, The operational logic executed by the differential feature extraction module is as follows: E(n) is the energy feature signal output from the differential feature extraction module at discrete-time signal index n, and S(n) is the smoothed signal input from the preprocessing filtering module to the differential feature extraction module at discrete-time signal index n. It is the delayed signal of S(n) under discrete-time signal index nK, where K is the preset differential delay step size.

5. The real-time filtering system for periodic characteristic magnetic field signals based on FPGA according to claim 1, characterized in that, The adaptive triggering module receives E(n) and executes the following state machine logic: when E(n) exceeds the preset dynamic threshold T... h When a potential magnetic field characteristic signal is detected, the module continuously tracks the maximum value of E(n) within the subsequent time window to lock the precise moment of the characteristic point. Once locked, a single-clock-cycle synchronous trigger pulse is immediately generated. The refractory period counter is started immediately after the trigger, ignoring any over-threshold noise during this period.

6. The real-time filtering system for periodic characteristic magnetic field signals based on FPGA according to claim 1, characterized in that, The recursive operation logic unit in the recursive synchronous averaging module is configured to perform the following shift operation instead of the division operation: Y new For the updated template data, Y old X is the historical template data stored in Block RAM. in The input signal is denoted by >>N, where >>N represents an arithmetic right shift of N bits, and N is a smoothing factor.

7. A real-time filtering method for periodic characteristic magnetic field signals based on FPGA, characterized in that, The above-mentioned FPGA-based real-time filtering system for periodic characteristic magnetic field signals is adopted.

8. The real-time filtering method for periodic characteristic magnetic field signals based on FPGA according to claim 7, characterized in that, Includes the following steps: Step 1: The FPGA receives the digitized magnetic field signal and performs power frequency notch filtering, low-pass filtering, and Savitzky-Golay shape-preserving smoothing in sequence. Step 2: Calculate the absolute difference of the smoothed signal using the internal logic of the FPGA to filter out low-frequency baseline drift and enhance magnetic field characteristics; Step 3: Compare the absolute value of the difference with the threshold. When the triggering condition is met, generate a synchronous trigger pulse and start the refractory period shielding. Step 4: Reset the Block RAM address pointer based on the synchronous trigger pulse. For each sampling point, read the historical average value in RAM, perform weighted recursive calculation with the current input signal, update the data in RAM, and output the filtered and enhanced magnetic field waveform to the host computer in real time.

Images