A high-temperature micro-pressure sensor chip and a preparation method thereof

Abstract

This invention discloses a high-temperature micro-pressure sensor chip and its fabrication method, belonging to the field of MEMS piezoresistive micro-pressure sensor technology. The sensor chip includes a silicon substrate and a glass substrate bonded to the silicon substrate. The silicon substrate includes, from top to bottom, an embossed device layer, a pressure-bearing film, and a back cavity structure layer. The embossed device layer includes a cross-shaped isolation groove and edge isolation grooves connecting adjacent ends of the cross-shaped isolation groove. The area enclosed by the four edge isolation grooves is a deformation film. The cross-shaped isolation groove includes a first and a second isolation groove that intersect perpendicularly, with two piezoresistive strips arranged at the center of the cross-shaped isolation groove. Two piezoresistive strips are arranged at both ends of the first or second isolation groove. The four piezoresistive strips are connected to metal pads through metal leads to form a Wheatstone bridge. The back cavity structure layer includes several islands connected to the back of the pressure-bearing film. This sensor chip can measure micro-pressures at the Pa level and has high sensitivity and linearity.

Description

Technical Field

[0001] This invention belongs to the field of MEMS piezoresistive micro-pressure sensor technology, specifically relating to a high-temperature micro-pressure sensor chip and its fabrication method. Background Technology

[0002] In high-temperature pipelines, combustion systems, engine testing, industrial furnaces, and petrochemical equipment, minute changes in gas pressure are crucial parameters reflecting the system's operating status. Detecting these micro-pressure signals allows for the monitoring of gas flow, combustion fluctuations, leaks, blockages, and abnormal equipment conditions, significantly improving system safety and operational reliability. Currently, most commercially available micro-pressure sensors are designed for ambient temperatures. When ambient temperatures exceed 120°C, conventional silicon-based PN junction sensing elements exhibit junction characteristic degradation, leading to sensor failure. Therefore, there is an urgent need in this field to provide a high-temperature resistant, stable, and accurate micro-pressure sensor to address the poor high-temperature adaptability of existing products.

[0003] Based on different measurement principles, MEMS pressure sensors are mainly classified into piezoresistive, piezoelectric, capacitive, and resonant types. Compared with pressure sensors based on other principles, MEMS piezoresistive micro-pressure sensors have advantages such as simple structure, high sensitivity, good dynamic response, and low power consumption, thus gaining wide application.

[0004] The working principle of a piezoresistive pressure sensor is based on the piezoresistive effect. When the sensor is subjected to external pressure, the sensitive diaphragm deforms, causing the doped piezoresistive strip to deform as well, resulting in a change in its resistance. The sensor converts the change in resistance into an electrical signal through a Wheatstone bridge. When pressure is applied to the silicon diaphragm, the bridge becomes unbalanced and outputs a voltage signal proportional to the pressure.

[0005] To meet the requirements of micro-pressure measurement, pressure sensors must possess high sensitivity and low nonlinearity. Increasing the diaphragm's aspect ratio can improve sensor sensitivity, but the increased diaphragm deflection leads to a sharp deterioration in the sensor's linearity. Therefore, finding a balance between improving sensor sensitivity and linearity is particularly important. Summary of the Invention

[0006] To overcome the shortcomings of the prior art, the present invention provides a high-temperature micro-pressure sensor chip and its fabrication method, which can measure micro-pressure at the Pa level and has the characteristics of high sensitivity and linearity.

[0007] To achieve the above objectives, the present invention adopts the following technical solution: In a first aspect, the present invention provides a high-temperature micro-pressure sensor chip, comprising a silicon substrate and a glass substrate bonded to the silicon substrate; a through hole is formed on the glass substrate; The silicon substrate includes, from top to bottom, an embossed device layer, a pressure-bearing thin film, and a back cavity structure layer; The embossed device layer includes a cross-shaped isolation groove and edge isolation grooves connecting adjacent ends of the cross-shaped isolation groove; the area enclosed by the four edge isolation grooves is a deformable film; the cross-shaped isolation groove includes a first isolation groove and a second isolation groove that intersect perpendicularly, and two varistor strips are arranged in the center of the cross-shaped isolation groove; two varistor strips are arranged at both ends of the first isolation groove or the second isolation groove. Four varistor strips are connected to metal pads via metal leads to form a Wheatstone bridge. The back cavity structure layer includes several islands connected to the back of the pressure-bearing membrane.

[0008] Furthermore, several islands are located within the projection coverage area of ​​the deformable film.

[0009] Furthermore, the deformable film includes a first deformable film, a second deformable film, a third deformable film, and a fourth deformable film; the islands include a first island, a second island, a third island, and a fourth island, with the first island, the second island, the third island, and the fourth island located on the vertical lines of the first deformable film, the second deformable film, the third deformable film, and the fourth deformable film, respectively.

[0010] Furthermore, the lengths of the two varistor strips arranged at the center of the cross-shaped isolation groove are equal to the width of the groove.

[0011] Furthermore, the depth of the cross-shaped isolation groove is equal to that of the edge isolation groove.

[0012] Furthermore, the two varistor strips arranged in the center of the cross-shaped isolation groove adopt a single-strip structure, while the remaining varistor strips adopt a double-strip structure.

[0013] Furthermore, the width of the cross-shaped isolation groove is 90 μm ~ 110 μm.

[0014] Furthermore, the Wheatstone bridge is a closed-loop connection.

[0015] Secondly, the present invention provides a method for fabricating a high-temperature micro-pressure sensor chip, comprising the following steps: Step 1: Perform high-temperature thermal oxidation on the front side of the SOI silicon wafer to form a silicon oxide thin film; Step 2: Etch the varistor strip area on the silicon oxide film to expose the top silicon device layer, and lightly dope the top silicon device silicon in the varistor strip area with boron ions to form four varistor strips. Step 3: Etch the ohmic contact area on the silicon oxide film to expose the top silicon device layer, and heavily dop the top silicon device silicon in the ohmic contact area with boron ions to form the ohmic contact area. Step 4: Perform photolithography on the cross-shaped isolation trench and edge isolation trench on the front side of the SOI wafer, and etch down to the buried oxide layer of silicon oxide to form the cross-shaped isolation trench and edge isolation trench; Step 5: Sputter metal onto the front side of the SOI wafer and perform photolithography to form metal leads and metal pads; Step 6: Perform photolithography on the back side of the SOI silicon wafer and etch the remaining part of the back side to the buried oxide layer of silicon oxide to form islands and back cavities. The bottom surface of the back cavity is a pressure-bearing film to obtain the silicon substrate. Step 7: Create through holes in the glass to obtain a glass substrate; Step 8: Anodicly bond the silicon substrate obtained in Step 6 to the glass substrate obtained in Step 7 to obtain the sensor chip.

[0016] Furthermore, the structure obtained in step 3 is subjected to annealing.

[0017] Compared with the prior art, the present invention has at least the following beneficial technical effects: This invention adds a cross-shaped isolation groove and an edge isolation groove to the front of the sensor, causing the pressure diaphragm to protrude in a pyramid shape under pressure, resulting in stress concentration. Four piezoresistive strips are arranged longitudinally, utilizing only the longitudinal piezoresistive effect. This structure has lower nonlinearity than a flat diaphragm structure that simultaneously employs lateral and longitudinal piezoresistive strip effects. Two piezoresistive strips are positioned at the center of the cross-shaped isolation groove, with the same width as the groove, while the other two are positioned at the ends of the groove. The beam containing the four piezoresistive strips has a narrow cross-section, and its bending stiffness is much lower than the surrounding structure, causing a sudden change in lateral stiffness, thereby further amplifying the longitudinal stress and greatly improving the sensor sensitivity. Simultaneously, the presence of four deformation films allows for a corresponding increase in the thickness of the diaphragm (including the deformation film and the pressure-bearing film), thereby increasing the overall structural stiffness and balancing sensitivity and linearity.

[0018] The present invention sets islands on the back of the pressure-bearing membrane, and several islands at the bottom of the pressure-bearing membrane are located in the deformation membrane area, which improves the local stiffness of the deformation membrane above the island structure, thereby preventing the membrane from deforming downward and increasing the membrane's resistance to bending.

[0019] Furthermore, the first to fourth islands are located on the vertical lines of the first to fourth deformable films, respectively, which restricts the deformation of the diaphragm under pressure and forms longitudinal stress concentration at the gaps.

[0020] Furthermore, the width of the cross-shaped isolation groove is 90 μm to 110 μm, which is the length of the piezoresistive strip, and the width of the piezoresistive strip is 5 μm. The aspect ratio of the piezoresistive strip is 20, which can avoid both excessively low resistance, resulting in a weak output signal and poor signal-to-noise ratio, and excessive resistance, which can cause overheating and severe temperature drift of the sensor.

[0021] This invention uses SOI silicon wafers and embossed varistor strips to avoid PN junction leakage at high temperatures, which could lead to chip failure and further improve the high-temperature resistance of the sensor chip.

[0022] The sensor chip fabrication method described in this invention uses conventional and mature processes, without the need to build new production lines or develop new production processes. It is low in cost, highly reliable, and easy to mass-produce. Attached Figure Description

[0023] Figure 1 This is a frontal isometric view of the present invention; Figure 2 This is a front view and a partially enlarged schematic diagram of the present invention; Figure 3 This is an isometric view of the rear side of the present invention; Figure 4 This is a schematic diagram of the rear structure of the present invention; Figure 5 This is an isometric schematic diagram of the glass substrate of the present invention; Figure 6 This is a schematic diagram of the Wheatstone bridge of the present invention; Figure 7 This is a simulation diagram of the stress and deflection of the sensor chip of the present invention; Figure 8 This is a schematic diagram of the manufacturing process of the present invention.

[0024] In the attached diagram: 1. Silicon substrate; 2. Cross-shaped isolation groove; 3-1. First deformable film; 3-2. Second deformable film; 3-3. Third deformable film; 3-4. Fourth deformable film; 4. Edge isolation groove; 5. Ohmic contact area; 5-1. First ohmic contact area; 5-2. Second ohmic contact area; 6. Varistor strip; 6-1. First varistor strip; 6-2. Second varistor strip; 6-3. Third varistor strip; 6-4. Fourth varistor strip; 7. Metal lead; 8. Metal pad; 9. Glass substrate; 10. Island; 10-1. First island; 10-2. Second island; 10-3. Third island; 10-4. Fourth island; 11. Pressure-bearing film; 12. Glass via; 13. Top silicon device layer; 14. Silicon oxide buried oxide layer; 15. Bottom monocrystalline silicon; 16. Oxide layer. Detailed Implementation

[0025] The present invention will now be described in detail with reference to the accompanying drawings and specific embodiments.

[0026] To enable those skilled in the art to better understand the technical solutions of this invention, the technical solutions of the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this invention, and not all embodiments. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of this invention.

[0027] It should be noted that when an element is referred to as being "set on" another element, it can be directly on the other element or may be interposed with another element. When an element is considered to be "connected" to another element, it can be directly connected to the other element or may be interposed with another element. The terms "upper," "lower," "front," "rear," "left," "right," "top," "bottom," "inner," and "outer," etc., used herein to indicate orientation or positional relationships are based on the orientation or positional relationships shown in the accompanying drawings and are only for the convenience of describing the invention and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the invention.

[0028] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the specification of this invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0029] Reference Figure 1 A high-temperature micro-pressure sensor chip includes a silicon substrate 1 and a glass substrate 9 bonded to the silicon substrate 1. The silicon substrate 1 includes an embossed device layer, a pressure-bearing film 11 and a back cavity structure layer arranged sequentially from top to bottom.

[0030] refer to Figure 1 The embossed device layer includes a cross-shaped isolation groove 2, a first deformable film 3-1, a second deformable film 3-2, a third deformable film 3-3, a fourth deformable film 3-4, four edge isolation grooves 4, an ohmic contact area 5, a varistor strip 6, metal leads 7, and metal pads 8. The ohmic contact area 5 includes a first ohmic contact area 5-1, a second ohmic contact area 5-2, and a third ohmic contact area. The varistor strip 6 includes a first varistor strip 6-1, a second varistor strip 6-2, a third varistor strip 6-3, and a fourth varistor strip 6-4.

[0031] The cross-shaped isolation groove includes a first and a second isolation groove that intersect perpendicularly. The width of the cross-shaped isolation groove is 90 μm to 110 μm. The first isolation groove has a first end and a second end opposite to each other, and the second isolation groove has a third end and a fourth end opposite to each other. The first end and the third end, the third end and the second end, the second end and the fourth end, and the fourth end and the first end are respectively connected by an edge isolation groove 4, and the edge isolation groove 4 and the cross-shaped isolation groove 2 have the same depth. The arrangement of the cross-shaped isolation groove 2 and the edge isolation groove 4 makes the beam containing the piezoresistive strip 6 protrude relatively, forming a relief-like piezoresistive structure. Its bending stiffness is much lower than that of the surrounding structure, which can cause a sudden change in lateral stiffness, thereby further amplifying the longitudinal stress and greatly improving the sensor sensitivity. The first deformation film 3-1, the second deformation film 3-2, the third deformation film 3-3, and the fourth deformation film 3-4 are located in the four triangular areas formed by the cross-shaped isolation groove 2 and the edge isolation groove 4.

[0032] refer to Figure 2 The cross-shaped isolation groove 2 has a first varistor strip 6-1 and a second varistor strip 6-2 arranged at its center, and a third varistor strip 6-3 and a fourth varistor strip 6-4 arranged at each end of the first isolation groove. All the varistor strips are connected to the metal pads 8 via metal leads 7, forming a... Figure 6 The Wheatstone bridge shown.

[0033] Preferably, the four varistor strips are connected via a third ohmic contact area and a metal lead, respectively. Preferably, the Wheatstone bridge is a closed-loop connection.

[0034] Reference Figure 2 The first varistor strip 6-1 and the second varistor strip 6-2 adopt a single-strip structure, while the third varistor strip 6-3 and the fourth varistor strip 6-4 adopt a double-strip structure. The third varistor strip 6-3 includes a first varistor strip, a first ohmic contact area 5-1, and a second varistor strip connected in sequence. The fourth varistor strip 6-4 includes a third varistor strip, a second ohmic contact area 5-2, and a fourth varistor strip connected in sequence. The initial resistance values ​​of the first to fourth varistor strips are the same, and they are all along the crystal orientation of the maximum piezoresistive coefficient. The lengths of the first varistor strip 6-1 and the second varistor strip 6-2 are equal to the width of the cross-shaped isolation groove 2.

[0035] refer to Figure 3 The back of a pressure sensor chip with a cross-shaped isolation groove structure includes a pressure-bearing film 11 and an island structure 10. The island structure 10 includes a first island 10-1, a second island 10-2, a third island 10-3, and a fourth island 10-4.

[0036] refer to Figure 4The pressure-bearing membrane 11 has the same side length as the edge isolation groove 4. The bottom of the pressure-bearing membrane 11 is a back cavity structure layer, which includes a first island 10-1, a second island 10-2, a third island 10-3, and a fourth island 10-4. The four islands have the same width, which is 20~30μm, and the same length, which is 300~350μm. The first island 10-1, the second island 10-2, the third island 10-3, and the fourth island 10-4 are located on the vertical lines of the first deformable membrane 3-1, the second deformable membrane 3-2, the third deformable membrane 3-3, and the fourth deformable membrane 3-4, respectively.

[0037] refer to Figure 5 A glass through-hole 12 is formed on the glass substrate 9.

[0038] Reference Figure 7 (a) is a stress simulation diagram of the sensor chip. It can be seen that the working stress of the chip under rated load is less than the allowable fracture stress of silicon, and the structure has sufficient safety margin. The stress value is about 30~40MPa, and the stress concentration area of ​​the chip is about 30~40MPa. The strain level in this area is high, and placing the piezoresistive strip here can obtain higher detection sensitivity.

[0039] (b) is a schematic diagram of the deflection simulation of the sensor chip. It can be seen that the maximum deflection at the center caused by the deformation and pressure of the diaphragm is less than 1 / 5 of the diaphragm thickness, which meets the design requirements for small elastic deformation.

[0040] Reference Figure 8 A method for fabricating a high-temperature micro-pressure sensor chip includes the following steps: Step 1: Substrate 1 uses an SOI wafer. The SOI silicon wafer is cleaned with BOE solution. The SOI silicon wafer consists of a top silicon device layer 13, a silicon oxide buried oxide layer 14, and a bottom monocrystalline silicon layer 15. Both the top silicon device layer 13 and the bottom monocrystalline silicon layer 15 of the SOI silicon wafer are N-type 100-crystal planes. The top silicon device layer 13 of the cleaned SOI silicon wafer is subjected to high-temperature thermal oxidation to form a 100nm dense oxide layer 16 on the front side of the top silicon device layer 13. Step 2: Using a varistor mask, the silicon dioxide directly above the varistor strip area is etched away from the SOI wafer obtained in Step 1, exposing the top silicon device silicon in the varistor strip area. The top silicon device silicon in the varistor strip area is then lightly doped with boron ions to form the varistor strip 6. Annealing is then performed to ensure a uniform distribution of impurity concentration in the SOI wafer.

[0041] Step 3: Using an ohmic contact mask, etch away the silicon dioxide directly above the ohmic contact region on the SOI wafer obtained in Step 2 to expose the top silicon device silicon in the ohmic contact region. Then, heavily dope the top silicon device silicon in the ohmic contact region with boron ions to form the ohmic contact region 5, followed by annealing. The ohmic contact region 5 includes a first ohmic contact region 5-1 and a second ohmic contact region 5-2. Step 4: The positions of the front cross-shaped isolation groove 2 and the edge isolation groove 4 of the SOI wafer obtained in Step 3 are photolithographically etched down to the buried oxide layer 14 of silicon oxide to obtain the cross-shaped isolation groove 2 and the edge isolation groove 4. Metal is sputtered on the front side of the SOI wafer, and photolithography is performed using a metal lead plate to form metal leads 7 and metal electrodes 8.

[0042] Step 5: Photolithography is performed on the back side of the SOI wafer obtained in Step 4 using a cavity etching plate, and the remaining part is etched down to the buried oxide layer to remove excess silicon, forming the first island 10-1, the second island 10-2, the third island 10-3, and the fourth island 10-4. The bottom surface of the cavity is the pressure-bearing film 11, and the silicon substrate 1 is obtained.

[0043] Step 6: Create glass through-holes 12 on the glass using laser processing to obtain the glass substrate 9.

[0044] Step 7: Anodicly bond the silicon substrate 1 prepared in step 5 to the glass substrate 9 obtained in step 6 to obtain the sensor chip.

[0045] The working principle of this invention is as follows: A schematic diagram of the chip structure of the present invention in the unloaded state is shown below. Figure 1 As shown. The front of the sensor chip, when subjected to pressure P, appears as follows... Figure 7 As shown, the pressure-bearing film 11 begins to concave, where the third and fourth varistor strips are under tension, and their resistance increases due to the piezoresistive effect of silicon; the first and second varistor strips are under compression, and their resistance decreases due to the piezoresistive effect of silicon. Two varistor strips with increased resistance and two varistor strips with decreased resistance can be connected to form... Figure 6 The Wheatstone bridge shown converts the pressure signal into a voltage signal output.

[0046] The present invention discloses a high-temperature micro-pressure sensor chip with a cross-shaped isolation groove. The cross-shaped isolation groove and the edge isolation groove control the pressure-bearing film to deform into a pyramid shape, so that the concentrated stress is completely applied to the position of the pressure-sensitive resistor strip, which can greatly improve the sensor sensitivity.

[0047] The four islands at the bottom of the pressure-bearing membrane are located in the deformation membrane region, which increases the local stiffness of the deformation membrane above the island structure. The reduced deformation in the deformation membrane region results in a smaller stress concentration area, which greatly improves the measurement sensitivity of the pressure sensor.

[0048] This invention uses SOI silicon wafers and embossed piezoresistive strips to avoid PN junction leakage at high temperatures, which could lead to chip failure and further improve the high-temperature resistance of the sensor chip.

[0049] The main technical indicators achieved by this invention are as follows: 1. Measurement range: 0~500Pa; 2. Measurement accuracy: better than 0.5%FS; 3. Sensitivity: Greater than 30 μV / V / Pa; 4. Operating temperature: -50~250℃; 5. First natural frequency: greater than 10kHz.

[0050] The term "constituting of" in describing a combination should include the identified elements, components, parts, or steps, as well as other elements, components, parts, or steps that do not substantially affect the essential novel features of the combination. The use of the terms "comprising" or "including" to describe combinations of elements, components, parts, or steps herein also contemplates embodiments that are essentially composed of such elements, components, parts, or steps. The use of the term "may" herein is intended to indicate that any described attribute included by "may" is optional.

[0051] Multiple elements, components, parts, or steps can be provided by a single integrated element, component, part, or step. Alternatively, a single integrated element, component, part, or step can be divided into multiple separate elements, components, parts, or steps. The use of "a" or "an" to describe an element, component, part, or step does not imply the exclusion of other elements, components, parts, or steps.

[0052] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that modifications or equivalent substitutions can still be made to the specific implementation of the present invention. Any modifications or equivalent substitutions that do not depart from the spirit and scope of the present invention should be covered within the protection scope of the present invention.

Claims

1. A high-temperature micro-pressure sensor chip, characterized in that, It includes a silicon substrate (1) and a glass substrate (9) bonded to the silicon substrate (1); the glass substrate (9) has through holes; The silicon substrate (1) includes, from top to bottom, an embossed device layer, a pressure-bearing thin film (11), and a back cavity structure layer; The relief device layer includes a cross-shaped isolation groove (2) and four edge isolation grooves (4) connecting adjacent ends of the cross-shaped isolation groove; the area enclosed by the four edge isolation grooves (4) is a deformable film; the cross-shaped isolation groove (2) includes a first isolation groove and a second isolation groove that intersect vertically, and two varistor strips are arranged in the center of the cross-shaped isolation groove (2); two varistor strips are arranged at both ends of the first isolation groove or the second isolation groove; The four varistor bars are connected to the metal pads (8) via metal leads (7) to form a Wheatstone bridge; The back cavity structure layer includes several islands connected to the back of the pressure-bearing membrane (11).

2. The high-temperature micro-pressure sensor chip according to claim 1, characterized in that, The islands are all located within the projection coverage area of ​​the deformable film.

3. The high-temperature micro-pressure sensor chip according to claim 1, characterized in that, The deformable film includes a first deformable film (3-1), a second deformable film (3-2), a third deformable film (3-3), and a fourth deformable film (3-4). The islands include a first island (10-1), a second island (10-2), a third island (10-3), and a fourth island (10-4), wherein the first island (10-1), the second island (10-2), the third island (10-3), and the fourth island (10-4) are respectively located on the vertical lines of the first deformable film (3-1), the second deformable film (3-2), the third deformable film (3-3), and the fourth deformable film (3-4).

4. A high-temperature micro-pressure sensor chip according to claim 1, characterized in that, The lengths of the two varistor strips arranged at the center of the cross-shaped isolation groove (2) are equal to the width of the groove (2).

5. A high-temperature micro-pressure sensor chip according to claim 1, characterized in that, The cross-shaped isolation groove (2) has the same depth as the edge isolation groove (4).

6. A high-temperature micro-pressure sensor chip according to claim 1, characterized in that, The two varistor strips arranged in the center of the cross-shaped isolation groove (2) adopt a single varistor strip structure, while the remaining varistor strips adopt a double varistor strip structure.

7. A high-temperature micro-pressure sensor chip according to claim 1, characterized in that, The width of the cross-shaped isolation groove (2) is 90 μm ~ 110 μm.

8. A high-temperature micro-pressure sensor chip according to claim 1, characterized in that, The Wheatstone bridge is a closed-loop connection.

9. The method for fabricating a high-temperature micro-pressure sensor chip according to claim 1, characterized in that, Includes the following steps: Step 1: Perform high-temperature thermal oxidation on the front side of the SOI silicon wafer to form a silicon oxide thin film (16). Step 2: Etch the varistor strip area on the silicon oxide film (16) to expose the top silicon device layer (13), and lightly dope the top silicon device silicon in the varistor strip area with boron ions to form four varistor strips. Step 3: Etch the ohmic contact region on the silicon oxide film (16) to expose the top silicon device layer (13), and heavily dope the top silicon device silicon in the ohmic contact region with boron ions to form the ohmic contact region (5). Step 4: Photolithography is performed on the cross-shaped isolation groove (2) and the edge isolation groove (4) on the front side of the SOI wafer, and etching is performed down to the buried oxide layer (14) of silicon oxide to form the cross-shaped isolation groove (2) and the edge isolation groove (4). Step 5: Sputter metal on the front side of the SOI wafer and perform photolithography to form metal leads (7) and metal pads (8). Step 6: Photolithography is performed on the back side of the SOI silicon wafer, and the remaining part of the back side is etched to the buried oxide layer (14) to form islands and back cavities. The bottom surface of the back cavity is a pressure-bearing film (11) to obtain the silicon substrate (1). Step 7: Make a through hole (12) in the glass to obtain a glass substrate (9); Step 8: Anodicly bond the silicon substrate (1) obtained in step 6 to the glass substrate (9) obtained in step 7 to obtain the sensor chip.

10. The method for fabricating a high-temperature micro-pressure sensor chip according to claim 9, characterized in that, After step 3 is completed, the structure obtained in step 3 is subjected to annealing.

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