Miniaturized CMOS sensor packaging structure

By designing the substrate, chip, frame, glass, and sealing shell, and combining epoxy resin with copper sheets, copper pillars, and heat sinks, the problem of external interference in CMOS sensor packaging is solved, achieving sealing and heat dissipation effects and extending the chip's lifespan.

CN223745194UActive Publication Date: 2025-12-30MANTE ELECTRONIC TECHNOLOGY (SHENZHEN) CO LTD
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Patent Information

Application Number
CN202520230678.2
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-02-13
Publication Date
2025-12-30
Estimated Expiration
2035-02-13

AI Technical Summary

Technical Problem

Existing CMOS sensor packaging structures cannot effectively achieve encapsulation, making them susceptible to interference from external factors, which can affect chip performance and lifespan.

Method used

The design incorporates a substrate, chip, frame, glass, and sealed shell, combined with epoxy resin and copper sheets, copper pillars, and heat sinks to form an encapsulated package. This isolates external interference and dissipates heat through the heat-conducting shell, while anti-slip textures and sealant enhance sealing and stability.

Benefits of technology

It achieves effective sealing of the chip, isolates it from external interference, extends the chip's lifespan, maintains a stable operating environment, and enhances heat dissipation performance.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model discloses a miniaturized CMOS sensor packaging structure which comprises a substrate, a chip is fixedly connected to the top surface of the substrate, an electrode is arranged at the position, close to the bottom surface, of the side edge of the chip, a bonding pad is arranged on the top surface of the substrate, the electrode is electrically connected with the bonding pad, an outer frame is fixedly connected to the top surface of the substrate, and the outer frame is electrically connected with the chip. Epoxy resin is filled between the outer frame and the chip and located on the upper side of the electrode, glass is assembled on the top of the outer frame, and a sealing outer shell is arranged at the bottom of the substrate, the substrate and the chip can be packaged in a wrapping mode, the substrate and the chip are made to be in a sealed environment, and the interference problem caused by external factors is solved.
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Description

TECHNICAL FIELD

[0001] The utility model belongs to CMOS sensor packaging technical field, concretely relates to a miniaturized CMOS sensor packaging structure. BACKGROUND

[0002] CMOS sensor packaging is a process that integrates CMOS image sensor chips with other components into a physical package. This packaging technology is crucial for ensuring the performance, reliability, and ease of use of the sensor; this enclosure not only protects the chip from physical damage and environmental influences, but also provides electrical connections and heat dissipation functions.

[0003] And the existing CMOS sensor packaging, most of which is directly smeared around the chip epoxy, after it solidifies to form a plastic package structure, this kind of packaging method can not effectively wrap the chip, so that the chip is easy to be disturbed by external factors in use, such as vibration, static electricity, electromagnetic interference and humidity, which can easily affect the performance and service life of the chip.

[0004] Therefore, a miniaturized CMOS sensor packaging structure is designed to change the above technical defects. INVENTION CONTENTS

[0005] (1) Technical problem to be solved

[0006] In view of the deficiencies of the prior art, the purpose of the utility model is to provide a miniaturized CMOS sensor packaging structure, which aims to solve the technical problem that the chip is not convenient to wrap and is easy to be affected by external factors to affect the performance of the chip under the prior art.

[0007] (2) Technical scheme

[0008] In order to solve the above technical problems, the utility model provides a miniaturized CMOS sensor packaging structure, which comprises a substrate, the top surface of the substrate is fixedly connected with a chip, the side edge of the chip is provided with an electrode close to the bottom surface, the top surface of the substrate is provided with a solder pad, the electrode is electrically connected with the solder pad, the top surface of the substrate is fixedly connected with an outer frame, the outer frame and the chip are filled with epoxy resin on the upper side of the electrode, the top of the outer frame is assembled with glass, and the bottom of the substrate is provided with a sealed shell.

[0009] The lower surface of the glass is bonded with a copper sheet, a plurality of holes are formed in the surface of the glass, a plurality of copper columns are fixedly connected to the surface of the copper sheet, and the top ends of the copper columns penetrate the holes and are fixedly connected with heat sinks.

[0010] Further, the sealed shell comprises a heat-conducting shell wrapped around the bottom of the substrate, the heat-conducting shell and the outer frame are filled with a blocking block, and the blocking block is a rectangular frame structure.

[0011] As further, the side wall opposite to the heat-conducting shell and the blocking block is provided with anti-skid lines, and the anti-skid lines are inclined.

[0012] As further, the end face of the outer frame is provided with a groove, the groove is annular, and the glass is located in the groove.

[0013] As further, the groove and the corner of the glass are inclined parts, and the groove and the inclined part of the glass are filled with sealing glue.

[0014] As further, the chip and the glass are provided with an auxiliary supporting block.

[0015] As further, the substrate and the chip are coated with curing glue.

[0016] As further, the inner wall of the heat-conducting shell is a stepped structure for limiting the blocking block.

[0017] Compared with the prior art, the beneficial effects of the utility model lie in:

[0018] The utility model discloses a substrate, chip, outer frame, glass and sealing shell's design can be wrapped type encapsulation to substrate and chip, make it in sealed environment, the interference problem caused by external factors is isolated, and the heat generated by chip can be led out by using the heat-conducting shell, prolongs the service life of chip. BRIEF DESCRIPTION OF DRAWINGS

[0019] Figure 1 It is the structural schematic diagram of the utility model;

[0020] Figure 2 It is the local structure perspective drawing of the utility model;

[0021] Figure 3 It is the utility model Figure 1 The A place enlarged view in.

[0022] The mark in the drawing is: 1, substrate;2, chip;3, electrode;4, epoxy resin;5, outer frame;6, glass;7, groove;8, inclined part;9, sealing glue;10, heat-conducting shell;11, blocking block;12, anti-skid line;13, supporting block;14, curing glue;15, copper sheet;16, copper column;17, radiating fin. SPECIFIC EMBODIMENT

[0023] This specific embodiment is a kind of miniaturization CMOS sensor packaging structure, and its structural schematic diagram is as shown in Figures 1-3As shown, including the substrate 1, the substrate 1 is made of ceramic or silicon substrate 1 and other materials, according to the actual preparation process selection. The top surface of the substrate 1 is fixedly connected with the chip 2, the side edge of the chip 2 is provided with the electrode 3 close to the bottom surface, the top surface of the substrate 1 is provided with the solder pad, the electrode 3 is electrically connected with the solder pad, the top surface of the substrate 1 is fixedly connected with the outer frame 5, the upper side between the outer frame 5 and the chip 2 is filled with the epoxy resin 4, the top of the outer frame 5 is assembled with the glass 6, the glass 6 is made of quartz, microcrystalline, ceramic or tempered material, so as to improve the high temperature resistance and quality strength of the glass 6, and create a stable operating environment for the chip 2. The bottom of the substrate 1 is provided with a sealed shell.

[0024] The lower surface of the glass 6 is bonded with the copper sheet 15, a plurality of holes are formed in the surface of the glass 6, a plurality of copper columns 16 are fixedly connected to the surface of the copper sheet 15, and the top ends of the copper columns 16 penetrate the holes and are fixedly connected with the heat dissipation fins 17.

[0025] As shown in the drawings, when the heat generated during the operation of the chip 2 is collected between the outer frame 5 and the glass 6, the heat will be conducted to the copper sheet 15, and since the copper sheet 15 has excellent heat conduction performance, the heat can be transmitted through the copper column 16, and the heat dissipation area is increased by using the heat dissipation fin 17;

[0026] In addition, after the chip 2 is assembled as a whole, a heat dissipation fan can be assembled on the surface of the heat dissipation fin 17 according to the actual application place, so as to further enhance the heat dissipation performance and make the chip 2 be in the appropriate temperature range.

[0027] As shown in the drawings, Figure 1 and Figure 2 The sealed shell includes a heat-conducting shell 10 wrapped around the bottom of the substrate 1, the heat-conducting shell 10 and the outer frame 5 are filled with a blocking block 11, and the blocking block 11 is a rectangular frame structure. The inner wall of the heat-conducting shell 10 is a stepped structure for limiting the blocking block 11.

[0028] Specifically, the bottom of the heat-conducting shell 10 is made of metal heat-conducting material, preferably copper and aluminum, the edges of the heat-conducting shell 10 and the blocking block 11 are made of plastic, and the blocking block 11 is heated at the plastic position when it is pressed down by the hot press, so as to facilitate the pressing of the blocking block 11 to the appropriate depth, and through the stepped design of the heat-conducting shell 10, when the blocking block 11 is pressed into the bottom stepped plane, it reaches the specified position, thereby completing the hot pressing process.

[0029] As shown in the drawings, Figure 1 and Figure 2 The side walls opposite to each other of the heat-conducting shell 10 and the blocking block 11 are respectively provided with anti-skid lines 12, and the anti-skid lines 12 are arranged in an inclined manner. The anti-skid lines 12 can increase the friction between the blocking block 11 and the outer frame 5 and the heat-conducting shell 10, and the chip 2 has good sealing performance even if it is subjected to vibration in long-term use.

[0030] As Figure 3 shown, the outer frame 5 end face is provided with a groove 7, the groove 7 is annular, and the glass 6 is located in the groove 7. The groove 7 can seal the glass 6 on one hand, and can also achieve the effect of auxiliary positioning and installation on the other hand, so as to facilitate the accuracy in assembly and reduce the assembly error.

[0031] As Figure 3 shown, the groove 7 and the glass 6 corner are both inclined parts 8, and the groove 7 and the glass 6 inclined part 8 are filled with sealing glue 9. By setting the inclined part 8, the contact surface of the sealing glue 9 with the glass 6 and the outer frame 5 can be increased, the sealing property and the bonding stability are further strengthened, and the cracking phenomenon is avoided.

[0032] As Figure 1 shown, the chip 2 and the glass 6 are provided with an auxiliary supporting block 13. The auxiliary supporting block 13 is made of rubber or plastic material, which is used for increasing the strength of the glass 6, and can generate a downward pressure on the chip 2, so as to avoid the unstable phenomenon of the chip 2 in the high-temperature state.

[0033] As Figure 1 shown, the substrate 1 and the chip 2 are coated with a curing glue 14. The connection mode of the curing glue 14 belongs to the conventional technology in the assembly of the chip 2, and will not be described in detail in the scheme.

[0034] Working principle: when the chip 2 is packaged, the curing glue 14 is first coated on the substrate 1, the chip 2 is placed on the substrate 1 and contacts the curing glue 14, the curing glue 14 is used for fixing the chip 2, the electrode 3 is in conductive communication with the pad, and the epoxy resin 4 is filled in the electrode 3 for sealing and fixing, then the glass 6 is placed in the groove 7, and the sealing glue 9 is filled in the inclined part 8 for fixing and sealing, then the substrate 1 is placed in the heat-conducting shell 10, the blocking block 11 is inserted between the heat-conducting shell 10 and the outer frame 5, the blocking block 11 is pressed down by using the hot press, and the sealing is realized by the close fit between the anti-skid lines 12.

[0035] All the technical features in the embodiment can be freely combined according to actual needs.

[0036] The above embodiment is a preferred implementation scheme of the utility model, in addition to this, the utility model can also be realized in other ways, and any obvious replacement without departing from the technical scheme concept is within the protection scope of the utility model.

Claims

1. A miniaturized CMOS sensor package structure comprising a substrate (1), characterized in that: The substrate (1) top surface is fixedly connected with a chip (2), the chip (2) side edge is provided with an electrode (3) near the bottom surface, the substrate (1) top surface is provided with a solder pad, the electrode (3) is electrically connected with the solder pad, the substrate (1) top surface is fixedly connected with an outer frame (5), the outer frame (5) and the chip (2) between the electrode (3) upper side are filled with epoxy resin (4), the outer frame (5) top is equipped with glass (6), the substrate (1) bottom is provided with a sealed shell; The glass (6) lower surface is bonded with a copper sheet (15), the glass (6) surface is provided with a plurality of holes, the copper sheet (15) surface is fixedly connected with a plurality of copper columns (16), the copper column (16) top end penetrates the hole and is fixedly connected with a cooling fin (17).

2. The miniaturized CMOS sensor package structure of claim 1, wherein: The sealed shell includes a heat-conducting shell (10) wrapped around the substrate (1) bottom, the heat-conducting shell (10) and the outer frame (5) between the filling are provided with a blocking block (11), the blocking block (11) is a rectangular frame structure.

3. The miniaturized CMOS sensor package structure of claim 2, wherein: The opposite side wall of the heat-conducting shell (10) and the blocking block (11) is respectively provided with an anti-skid line (12), and the anti-skid line (12) is inclined.

4. The miniaturized CMOS sensor package structure of claim 1, wherein: The outer frame (5) end face is provided with a groove (7), the groove (7) is annular, and the glass (6) is located in the groove (7).

5. The miniaturized CMOS sensor package structure of claim 4, wherein: The groove (7) and the glass (6) corner are both inclined parts (8), and the groove (7) and the glass (6) inclined part (8) are filled with sealing glue (9).

6. The miniaturized CMOS sensor package structure of claim 1, wherein: The chip (2) and the glass (6) are provided with an auxiliary supporting block (13).

7. The miniaturized CMOS sensor package structure of claim 1, wherein: The substrate (1) and the chip (2) are coated with a curing glue (14).

8. The miniaturized CMOS sensor package structure of claim 3, wherein: The inner wall of the heat-conducting shell (10) is a stepped structure for limiting the blocking block (11).