Optical integrated circuit

Abstract

To provide an optical integrated circuit which can suppress degradation in optical propagation characteristics in an optical waveguide.SOLUTION: An optical integrated circuit 1A comprises: a substrate 31; an optical waveguide layer 32, disposed on the substrate 31, which includes an input coupler 37 and an optical waveguide 38; a light-emitting device 4, disposed on the optical waveguide layer 32, which has a first surface 4a on the optical waveguide layer 32 side and a second surface 4b on the opposite side to the optical waveguide layer 32; and a sub-mount 5, disposed on the light-emitting device 4, which has a third surface 5a on the light-emitting device 4 side and a fourth surface 5b on the side opposite to the light-emitting device 4. The light-emitting device 4 includes a light-emitting layer 43 and a phase modulation layer 44. The phase modulation layer 44 includes a base layer 44a and a plurality of regions 44b differing in refractive index.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to integrated optical circuits. [Background technology]

[0002] A known photonic integrated circuit (PIC) includes a substrate, an optical waveguide layer disposed on the substrate, and a light-emitting device disposed on the optical waveguide layer. In such an optical integrated circuit, the optical waveguide layer includes an input coupler and an optical waveguide optically coupled to the input coupler, and light emitted from the light-emitting device is coupled into the optical waveguide layer by the input coupler and propagates along the optical waveguide.

[0003] In order to suppress optical loss between the light-emitting device and the optical waveguide, in the optical integrated circuit described in Non-Patent Document 1, a vertical-cavity surface-emitting laser (VCSEL) element, which is the light-emitting device, is arranged on the optical waveguide layer at an angle relative to the optical waveguide layer. [Prior art documents] [Non-patent literature]

[0004] [Non-Patent Document 1] Erik Haglund, 8 others, “High-power singletransverse and polarization mode VCSEL for silicon photonics integration”, Vol. 27, No. 13, 24Jun 2019, OPTICS EXPRESS, p.18892-18899 Summary of the Invention [Problem to be solved by the invention]

[0005] However, in the optical integrated circuit described in Non-Patent Document 1, the support of the vertical-cavity surface-emitting laser element, which is the light-emitting device, is unstable, so the optical loss between the light-emitting device and the optical waveguide increases over time, which may result in deterioration of the light propagation characteristics in the optical waveguide. Also, in the optical integrated circuit described in Non-Patent Document 1, no consideration is given to the heat dissipation characteristics of the vertical-cavity surface-emitting laser element, which is the light-emitting device, so the optical output characteristics of the vertical-cavity surface-emitting laser element itself may deteriorate, which may result in deterioration of the light propagation characteristics in the optical waveguide.

[0006] An object of the present invention is to provide an optical integrated circuit that can suppress deterioration of the light propagation characteristics in an optical waveguide. [Means for solving the problem]

[0007] The optical integrated circuit of the present invention is [1] "an optical integrated circuit comprising: a substrate; an optical waveguide layer disposed on the substrate on one side in a thickness direction of the substrate, the optical waveguide layer including an input coupler and an optical waveguide optically coupled to the input coupler; a light-emitting device disposed on the optical waveguide layer on the one side, the first surface facing the optical waveguide layer and a second surface opposite to the optical waveguide layer; and a first heat dissipation member disposed on the light-emitting device on the one side, the first surface facing the light-emitting device and a fourth surface opposite to the light-emitting device, wherein the light-emitting device includes a light-emitting layer and a phase modulation layer optically coupled to the light-emitting layer, and the phase modulation layer includes a base layer and a plurality of modified refractive index regions having a refractive index different from that of the base layer and distributed two-dimensionally in a plane intersecting the thickness direction of the base layer." The optical integrated circuit described in [1] uses a light-emitting device including a light-emitting layer and a phase modulation layer optically coupled to the light-emitting layer. Therefore, for example, even if the light-emitting device is not tilted relative to the optical waveguide layer, light emitted from the light-emitting device can be incident on the input coupler at a desired angle, thereby reducing optical loss between the light-emitting device and the optical waveguide. Furthermore, since a first heat dissipation member is disposed on the light-emitting device, heat generated in the light-emitting device can be dissipated to the first heat dissipation member, reducing deterioration of the optical output characteristics of the light-emitting device itself. Therefore, the optical integrated circuit described in [1] reduces deterioration of the optical propagation characteristics in the optical waveguide.

[0008] The optical integrated circuit of the present invention may be [2] "the optical integrated circuit according to [1], wherein the light-emitting device includes an electrode disposed on the first surface side, and the electrode has an opening through which an optical path between the light-emitting layer and the input coupler passes." According to the optical integrated circuit according to [2], it is possible to efficiently supply current to the light-emitting layer while ensuring an optical path between the light-emitting layer and the input coupler.

[0009] The optical integrated circuit of the present invention may be [3] "the optical integrated circuit according to [2], in which the area of ​​the opening is smaller than the area of ​​the current injection region in the light-emitting device when viewed from the thickness direction of the substrate." The optical integrated circuit according to [3] can block unnecessary light such as -1st order light emitted from the light-emitting layer. In addition, the heat dissipation characteristics to the substrate side via the electrodes can be improved.

[0010] The optical integrated circuit of the present invention may be [4] "the optical integrated circuit according to any one of [1] to [3], further comprising a second heat dissipation member disposed between the substrate and the light-emitting device so as not to overlap with the input coupler and the optical waveguide when viewed from the thickness direction of the substrate." According to the optical integrated circuit according to [4], even if the optical waveguide layer includes a layer with low thermal conductivity, heat generated in the light-emitting device can also be dissipated to the second heat dissipation member, thereby reliably suppressing deterioration of the optical output characteristics of the light-emitting device itself.

[0011] The optical integrated circuit of the present invention may be [5] "the optical integrated circuit according to [4], wherein the second heat dissipation member is connected to each of the substrate and the light emitting device." According to the optical integrated circuit according to [5], heat generated in the light emitting device can be efficiently dissipated to the substrate via the second heat dissipation member.

[0012] The optical integrated circuit of the present invention may be [6] "the optical integrated circuit according to any one of [1] to [5], wherein, when viewed from the thickness direction of the substrate, the first heat dissipation member includes the light-emitting device." According to the optical integrated circuit according to [6], heat generated in the light-emitting device can be efficiently dissipated to the first heat dissipation member.

[0013] The optical integrated circuit of the present invention may be [7] "an optical integrated circuit according to any one of [1] to [6], in which the distance between the light emitting layer and the second surface is shorter than the distance between the light emitting layer and the first surface." According to the optical integrated circuit according to [7], the light emitting layer, which is a heat generating source, is located close to the first heat dissipation member, so that heat generated in the light emitting layer can be efficiently dissipated to the first heat dissipation member. Furthermore, since the light emitting layer, which is a heat generating source, is located farther from the optical waveguide layer, it is possible to suppress the optical waveguide layer from being affected by heat.

[0014] The optical integrated circuit of the present invention may be [8] "the optical integrated circuit according to any one of [1] to [7], further comprising a third heat dissipation member disposed on the substrate on the other side in the thickness direction of the substrate." According to the optical integrated circuit according to [8], heat generated in the light-emitting device can be efficiently dissipated to the third heat dissipation member via the substrate.

[0015] The optical integrated circuit of the present invention may be [9] "an optical integrated circuit according to any one of [1] to [8], wherein the phase modulation layer is configured to tilt the optical axis of light traveling along the optical path between the light emitting layer and the input coupler with respect to the thickness direction of the substrate." According to the optical integrated circuit according to [9], for example, optical loss between the light emitting device and the optical waveguide can be suppressed without employing a configuration in which the light emitting device is tilted with respect to the optical waveguide layer. Furthermore, since an optical member for tilting the optical axis of light traveling along the optical path between the light emitting layer and the input coupler is not required, the configuration can be simplified.

[0016] The optical integrated circuit of the present invention may be

[10] "the optical integrated circuit according to any one of [1] to [9], further comprising a plurality of wires connected to the first heat dissipation member, each of the plurality of wires being electrically connected to the light emitting layer via the first heat dissipation member." According to the optical integrated circuit according to

[10] , heat generated in the light emitting device can be dissipated to the plurality of wires via the first heat dissipation member.

[0017] The optical integrated circuit of the present invention may be

[11] "the optical integrated circuit according to any one of [1] to

[10] , wherein the thickness of the first heat dissipation member in the thickness direction of the substrate is greater than the thickness of the light-emitting device in the thickness direction of the substrate." According to the optical integrated circuit according to

[11] , heat generated in the light-emitting device can be efficiently dissipated to the first heat dissipation member.

[0018] The optical integrated circuit of the present invention may be

[12] "the optical integrated circuit according to any one of [1] to

[11] , wherein the phase modulation layer is configured to focus light traveling along an optical path between the light emitting layer and the input coupler onto the input coupler." According to the optical integrated circuit according to

[12] , light emitted from the light emitting layer can be efficiently incident on the input coupler. Furthermore, since an optical member for focusing light traveling along an optical path between the light emitting layer and the input coupler is not required, the configuration can be simplified. [Effects of the Invention]

[0019] According to the present invention, it is possible to provide an optical integrated circuit that can suppress deterioration of the light propagation characteristics in the optical waveguide. [Brief explanation of the drawings]

[0020] [Figure 1] 1 is a cross-sectional view of an optical integrated circuit according to a first embodiment. [Figure 2] 2 is a cross-sectional view of the optical integrated circuit taken along line II-II shown in FIG. 1. [Figure 3] 2 is a cross-sectional view of the light-emitting device shown in FIG. 1. [Figure 4] FIG. 4 is a plan view of the phase modulation layer shown in FIG. [Figure 5] FIG. 10 is a cross-sectional view of an optical integrated circuit according to a second embodiment. [Figure 6] 6 is a cross-sectional view of the optical integrated circuit taken along line VI-VI shown in FIG. 5. [Figure 7] FIG. 6 is a plan view of the optical waveguide layer and the conductive member shown in FIG. 5. [Figure 8] 2 is a graph showing the relationship between the focal length and the light-collecting width in the light-emitting device shown in FIG. [Figure 9] FIG. 10 is a plan view of an optical waveguide layer and a conductive member according to a modified example. [Figure 10] FIG. 10 is a cross-sectional view of a modified optical integrated circuit. [Figure 11] FIG. 10 is a cross-sectional view of a modified optical integrated circuit. DETAILED DESCRIPTION OF THE INVENTION

[0021] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In each drawing, the same or corresponding parts are designated by the same reference numerals, and redundant explanations will be omitted. [First embodiment]

[0022] 1 and 2, an optical integrated circuit 1A includes a submount (third heat dissipation member) 2, an optical waveguide device 3, a light emitting device 4, a submount (first heat dissipation member) 5, a plurality of wires 6, and a plurality of wires 7. Hereinafter, the thickness direction of a substrate 31 constituting the optical waveguide device 3 will be referred to as the Z-axis direction, a direction perpendicular to the Z-axis direction will be referred to as the X-axis direction, and a direction perpendicular to both the Z-axis direction and the X-axis direction will be referred to as the Y-axis direction.

[0023] The submount 2 is formed in a plate shape (e.g., a rectangular plate shape) with its thickness direction in the Z-axis direction. As an example, the submount 2 is configured by forming wiring on the surface of a base material made of ceramics (e.g., aluminum nitride or silicon carbide) with excellent heat dissipation properties. As an example, the thickness of the submount 2, the width of the submount 2 in the X-axis direction, and the width of the submount 2 in the Y-axis direction are each about several hundred μm.

[0024] The optical waveguide device 3 includes a substrate 31, an optical waveguide layer 32, and a pad 33. The substrate 31 is disposed on one side in the Z-axis direction (the upper side in FIGS. 1 and 2) on the submount 2. In other words, the submount 2 is disposed on the other side in the Z-axis direction (the lower side in FIGS. 1 and 2) on the substrate 31. The substrate 31 is formed in a plate shape (e.g., a rectangular plate shape) with its thickness direction in the Z-axis direction. The material of the substrate 31 is, for example, silicon. As an example, the thickness of the substrate 31, the width of the substrate 31 in the X-axis direction, and the width of the substrate 31 in the Y-axis direction are each about several hundred μm.

[0025] The optical waveguide layer 32 is disposed on one side in the Z-axis direction on the substrate 31. The optical waveguide layer 32 is composed of an intermediate layer 34 and a pair of clad layers 35 and 36 formed integrally on the substrate 31. The clad layer 35 is located on the substrate 31 side with respect to the intermediate layer 34, and the clad layer 36 is located on the opposite side of the intermediate layer 34 from the substrate 31. In the optical integrated circuit 1A, the outer edge of the optical waveguide layer 32 coincides with the outer edge of the substrate 31 when viewed from the Z-axis direction. As an example, the thickness of the optical waveguide layer 32 is approximately several μm to several tens of μm, and the width of the optical waveguide layer 32 in the X-axis direction and the width of the optical waveguide layer 32 in the Y-axis direction are each approximately several hundred μm.

[0026] An input coupler 37 and an optical waveguide 38 are formed in the intermediate layer 34. That is, the optical waveguide layer 32 includes the input coupler 37 and the optical waveguide 38. The input coupler 37 is a grating coupler. The input coupler 37 has a plurality of grating grooves arranged in the X-axis direction, each of which opens to one side in the Z-axis direction. For example, the width of the input coupler 37 in the X-axis direction and the width of the input coupler 37 in the Y-axis direction are each several μm to several tens of μm. The optical waveguide 38 is optically coupled to the input coupler 37 and extends from the input coupler 37 to one side in the X-axis direction (the right side in FIG. 2). The width of the optical waveguide 38 in the Y-axis direction gradually decreases toward one side in the X-axis direction. For example, the width of the optical waveguide 38 in the Y-axis direction is several μm to several tens of μm at the end on the input coupler 37 side and is approximately 0.5 μm at the end opposite the input coupler 37. The input coupler 37 and the optical waveguide 38 are made of, for example, silicon. The portions of the intermediate layer 34 other than the "input coupler 37 and optical waveguide 38" and the pair of clad layers 35, 36 are made of, for example, silicon oxide. In the optical integrated circuit 1A, each of the clad layers 35, 36 is an SiO2 layer. The input coupler 37 is not limited to a grating coupler, and may be an edge coupler or the like.

[0027] The pad 33 is disposed on a surface 32a of the optical waveguide layer 32 opposite to the substrate 31. The pad 33 has an opening 33a. When viewed from the Z-axis direction, the shape of the opening 33a is, for example, rectangular. When viewed from the Z-axis direction, the center of the opening 33a overlaps with the input coupler 37. When viewed from the Z-axis direction, the center of the opening 33a is shifted to the other side in the X-axis direction (the left side in FIG. 2 ) with respect to the center 37a of the input coupler 37. The pad 33 is formed in the shape of a film made of metal. Note that the center of the shape when viewed from the Z-axis direction means the center of gravity of the shape when viewed from the Z-axis direction if the shape is not point-symmetric.

[0028] The light-emitting device 4 is disposed on one side in the Z-axis direction on the optical waveguide layer 32. The light-emitting device 4 emits light L, which is laser light, toward the optical waveguide layer 32. The light-emitting device 4 is a laser element that forms a standing wave in an in-plane direction perpendicular to the Z-axis direction and emits a phase-controlled plane wave as light L toward the optical waveguide layer 32. The light-emitting device 4 is a static-integrable phase modulating (S-iPM) laser element that can output an optical image of any shape in the Z-axis direction, a direction tilted with respect to the Z-axis direction, or a plurality of directions including these.

[0029] The light-emitting device 4 includes a semiconductor layer 40 and a pair of electrodes 41 and 42. The semiconductor layer 40 is formed in a plate shape (e.g., a rectangular plate shape) with its thickness direction aligned in the Z-axis direction. The semiconductor layer 40 includes a light-emitting layer 43 and a phase modulation layer 44. The phase modulation layer 44 is located on the opposite side of the light-emitting layer 43, which is an active layer, from the optical waveguide layer 32 and is optically coupled to the light-emitting layer 43. The phase modulation layer 44 includes a base layer 44a and multiple modified refractive index regions 44b. The multiple modified refractive index regions 44b have a refractive index different from that of the base layer 44a and are distributed two-dimensionally in a plane perpendicular to the Z-axis direction (in a plane intersecting the thickness direction of the base layer 44a). As an example, the thickness of the semiconductor layer 40, the width of the semiconductor layer 40 in the X-axis direction, and the width of the semiconductor layer 40 in the Y-axis direction are each approximately several hundred μm.

[0030] The distance between the light emitting layer 43 and the second surface 4b of the light emitting device 4 is smaller than the distance between the light emitting layer 43 and the first surface 4a of the light emitting device 4. The first surface 4a is the surface of the light emitting device 4 on the optical waveguide layer 32 side, and the second surface 4b is the surface of the light emitting device 4 opposite the optical waveguide layer 32. For example, the distance between the light emitting layer 43 and the second surface 4b is several μm to several tens of μm. When viewed from the Z-axis direction, the light emitting layer 43 overlaps with the input coupler 37. That is, when viewed from the Z-axis direction, at least a portion of the light emitting layer 43 overlaps with at least a portion of the input coupler 37. In the optical integrated circuit 1A, when viewed from the Z-axis direction, a portion of the light emitting layer 43 overlaps with the entire input coupler 37. That is, when viewed from the Z-axis direction, the light emitting layer 43 includes the input coupler 37. When viewed from the Z-axis direction, the center 43a of the light emitting layer 43 overlaps with the input coupler 37. When viewed from the Z-axis direction, the center 43a of the light-emitting layer 43 is shifted to the other side in the X-axis direction with respect to the center 37a of the input coupler 37.

[0031] The phase modulation layer 44 is configured to tilt the optical axis A of the light L traveling along the optical path P between the light emitting layer 43 and the input coupler 37 with respect to the Z-axis direction and to condense the light L traveling along the optical path P between the light emitting layer 43 and the input coupler 37 onto the input coupler 37. In the optical integrated circuit 1A, the optical axis A is tilted so as to connect the center 43a of the light emitting layer 43 when viewed from the Z-axis direction and the center 37a of the input coupler 37 when viewed from the Z-axis direction. In other words, the optical axis A is tilted so as to move closer to the optical waveguide 38 in the X-axis direction as it approaches the input coupler 37 in the Z-axis direction.

[0032] The electrode 41 is disposed on the surface of the semiconductor layer 40 facing the optical waveguide layer 32. That is, the electrode 41 is disposed on the first surface 4a side of the light-emitting device 4. The electrode 42 is disposed on the surface of the semiconductor layer 40 opposite the optical waveguide layer 32. That is, the electrode 42 is disposed on the second surface 4b side of the light-emitting device 4. The electrode 41 has an opening 41a through which an optical path P passes between the light-emitting layer 43 and the input coupler 37. When viewed from the Z-axis direction, the shape of the opening 41a is, for example, rectangular. When viewed from the Z-axis direction, the center of the opening 41a overlaps with the input coupler 37. When viewed from the Z-axis direction, the center of the opening 41a is shifted to the other side in the X-axis direction with respect to the center 37a of the input coupler 37. When viewed from the Z-axis direction, the area of ​​the opening 41a is smaller than the area of ​​the current injection region 40a (see FIG. 3 ) of the light-emitting device 4. The electrode 41 is disposed on the pad 33 of the optical waveguide device 3 so that the opening 41a overlaps the opening 33a of the pad 33 when viewed from the Z-axis direction, and is electrically and physically connected to the pad 33 via a joining member such as solder. In the optical integrated circuit 1A, the outer edge of the opening 41a coincides with the outer edge of the opening 33a when viewed from the Z-axis direction.

[0033] The submount 5 is disposed on one side of the light-emitting device 4 in the Z-axis direction. The submount 5 is formed in a block shape (e.g., a rectangular parallelepiped) having a third surface 5a and a fourth surface 5b. The third surface 5a is the surface of the submount 5 facing the light-emitting device 4, and the fourth surface 5b is the surface of the submount 5 opposite the light-emitting device 4. The second surface 4b of the light-emitting device 4 is in surface contact with the third surface 5a of the submount 5. When viewed from the Z-axis direction, the submount 5 includes the light-emitting device 4. The thickness of the submount 5 in the Z-axis direction is greater than the thickness of the light-emitting device 4 in the Z-axis direction. For example, the submount 5 is formed by forming wiring on the surface of a base material made of ceramics (e.g., aluminum nitride or silicon carbide) with excellent heat dissipation properties. For example, the thickness of the submount 5, the width of the submount 5 in the X-axis direction, and the width of the submount 5 in the Y-axis direction are each approximately several hundred μm. The portion of the wiring of the submount 5 that is disposed on the third surface 5a side is electrically and physically connected to the electrode 42 of the light-emitting device 4 via a joining member such as solder.

[0034] The plurality of wires 6 are connected to the optical waveguide device 3 and the submount 2, respectively. Specifically, each wire 6 is bridged between the pad 33 of the optical waveguide device 3 and the wiring of the submount 2, and is electrically connected to the light-emitting layer 43 of the light-emitting device 4 via the pad 33. The plurality of wires 7 are connected to the submount 5 and the submount 2, respectively. Specifically, each wire 7 is bridged between the portion of the wiring of the submount 5 located on the fourth surface 5b side and the wiring of the submount 2, and is electrically connected to the light-emitting layer 43 of the light-emitting device 4 via the submount 5. In the optical integrated circuit 1A, an external wiring is connected to the wiring of the submount 2, so that a current is supplied to the light-emitting layer 43 of the light-emitting device 4. Note that the plurality of wires 6 and the plurality of wires 7 are not shown in FIG. 2.

[0035] The configuration of the light-emitting device 4 described above will be described in more detail. As shown in FIG. 3, the semiconductor layer 40 includes a semiconductor substrate 45, a pair of cladding layers 46a and 46b, and a contact layer 47 in addition to the light-emitting layer 43 and the phase modulation layer 44. The phase modulation layer 44 is located on the second surface 4b side of the light-emitting layer 43. In the light-emitting device 4, the cladding layer 46a, the light-emitting layer 43, the phase modulation layer 44, the cladding layer 46b, and the contact layer 47 are stacked in this order on the semiconductor substrate 45 from the first surface 4a side. The semiconductor substrate 45, the pair of cladding layers 46a and 46b, and the contact layer 47 are made of compound semiconductors (e.g., GaAs-based semiconductors, InP-based semiconductors, and nitride-based semiconductors). The energy band gaps of the cladding layers 46a and 46b are larger than the energy band gap of the light-emitting layer 43.

[0036] The phase modulation layer 44 may be located on the first surface 4a side of the light emitting layer 43. That is, the phase modulation layer 44 may be located on the optical waveguide layer 32 side of the light emitting layer 43. In this case, the phase modulation layer 44 may be disposed between the light emitting layer 43 and the cladding layer 46a. The semiconductor layer 40 may further include at least one of an optical guide layer disposed between the light emitting layer 43 and the cladding layer 46a and an optical guide layer disposed between the light emitting layer 43 and the cladding layer 46b. The optical guide layer may include a carrier barrier layer for efficiently confining carriers in the light emitting layer 43.

[0037] In the phase modulation layer 44, the multiple modified refractive index regions 44b include a periodic lattice structure. When the equivalent refractive index of the mode is n and the lattice spacing is a, the wavelength λ0 selected by the phase modulation layer 44 is expressed as λ0 = (√2)a × n. This wavelength λ0 is within the emission wavelength range of the light-emitting layer 43 and forms a standing wave at the M-point photonic band edge of the square lattice. The phase modulation layer 44 can select a band edge wavelength near the wavelength λ0 from the emission wavelengths of the light-emitting layer 43 and output it to the outside. Light incident on the phase modulation layer 44 forms a predetermined mode in accordance with the arrangement of the multiple modified refractive index regions 44b in the phase modulation layer 44 and is output as light L from the light-emitting device 4 to the other side in the Z-axis direction (the lower side in FIG. 3). Note that vertical diffraction does not usually occur at the M-point photonic band edge, making it impossible to extract a beam pattern outside the plane. Therefore, the phase distribution formed by the phase modulation layer 44 is designed so that the in-plane component of the wave vector of at least one of the four fundamental waves constituting the M-point photonic band edge is smaller than 2π / λ corresponding to the light line by further superimposing the phase distribution corresponding to the diffraction vector V on the phase distribution φ of the beam pattern. Furthermore, the J-point photonic band edge can be utilized in a triangular lattice. In this case, the wavelength λ is expressed as "λ = (3 / 2)a × n." Furthermore, the phase distribution formed by the phase modulation layer 44 is designed so that the in-plane component of the wave vector of at least one of the six fundamental waves constituting the J-point photonic band edge is smaller than 2π / λ corresponding to the light line by further superimposing the phase distribution corresponding to the diffraction vector V on the phase distribution φ of the beam pattern. Furthermore, the phase modulation layer 44 may be designed to form other photonic band edges in addition to the M-point photonic band edge and the J-point photonic band edge.

[0038] The electrode 41 forms ohmic contact with the semiconductor substrate 45. The surface of the semiconductor substrate 45, except for the "frame-shaped region where the electrode 41 is disposed," is covered with an anti-reflection film 49. The electrode 42 forms ohmic contact with the contact layer 47. The surface of the contact layer 47, except for the "central region where the electrode 42 is disposed," is covered with an insulating film 48. The current injection region 40a in the light-emitting device 4 is the region where the electrode 42 and the contact layer 47 are in contact with each other. Note that a portion of the anti-reflection film 49 located outside the electrode 41 when viewed from the Z-axis direction may be removed. Also, a portion of the contact layer 47 located outside the electrode 42 when viewed from the Z-axis direction may be removed to limit the current range.

[0039] In the light-emitting device 4, when a driving current is supplied between the pair of electrodes 41 and 42, electrons and holes recombine in the light-emitting layer 43, causing the light-emitting layer 43 to emit light. The electrons and holes that contribute to this light emission, as well as the light generated in the light-emitting layer 43, are efficiently confined between the cladding layers 46a and 46b. The light generated in the light-emitting layer 43 then enters the phase modulation layer 44 and forms a predetermined mode according to the lattice structure in the phase modulation layer 44. The light L emitted from the phase modulation layer 44 passes through the opening 41a of the electrode 41 and is emitted to the outside of the light-emitting device 4. Note that the light L can be emitted not only as +1st-order light (plus first-order diffracted light) but also as −1st-order light (minus first-order diffracted light).

[0040] An example of the configuration of the phase modulation layer 44 described above will be described in more detail. As shown in FIGS. 4A and 4B, a virtual elementary lattice is set in the phase modulation layer 44 in a plane perpendicular to the Z-axis direction. The elementary lattice is a square lattice having sides parallel to the X-axis direction and sides parallel to the Y-axis direction. In the plane perpendicular to the Z-axis direction, a plurality of unit constituent regions R are two-dimensionally arranged with the X-axis direction as the row direction and the Y-axis direction as the column direction. Each unit constituent region R is a square region centered on a lattice point O of the square lattice. The center of gravity of each unit constituent region R coincides with the lattice point O of the corresponding square lattice. One modified refractive index region 44b is disposed in each unit constituent region R. The shape of each modified refractive index region 44b when viewed from the Z-axis direction is, for example, circular. Each lattice point O may be located outside or within the corresponding modified refractive index region 44b.

[0041] Each modified refractive index area 44b has a center of gravity G. The center of gravity G of each modified refractive index area 44b is located at a position relative to the corresponding lattice point O that corresponds to the phase modulation amount of a predetermined phase distribution. Here, the angle between the vector from the lattice point O toward the center of gravity G and the X-axis is defined as α(x, y). x indicates the position of the x-th lattice point on the X-axis, and y indicates the position of the y-th lattice point on the Y-axis. When the rotation angle α is 0°, the direction of the vector connecting the lattice point O and the center of gravity G coincides with the positive direction of the X-axis. Furthermore, the length of the vector connecting the lattice point O and the center of gravity G is defined as r(x, y). As an example, r(x, y) is constant throughout the phase modulation layer 44, regardless of the values ​​of x and y.

[0042] The direction of the vector connecting the lattice point O and the center of gravity G, i.e., the rotation angle α of the center of gravity G of the modified refractive index area 44b around the lattice point O, is individually set for each lattice point O according to the phase distribution φ(x,y) corresponding to the desired shape of the emitted light L. The phase distribution φ(x,y) has a specific value for each position determined by the values ​​of x and y, but is not necessarily expressed by a specific function. The rotation angle distribution α(x,y) is determined by extracting the phase distribution φ(x,y) from the complex amplitude distribution obtained by Fourier transforming the desired shape of the light L. When calculating the complex amplitude distribution from the desired shape of the light L, it is preferable to apply an iterative algorithm such as the Gerchberg-Saxton (GS) method, which is commonly used in calculations for hologram generation. This can improve the reproducibility of the beam pattern. The final phase distribution Φ is obtained by further adding a "phase distribution for diffracting the standing wave at the M-point photonic band edge in the plane-perpendicular direction" and a "phase distribution for focusing." Specifically, if the phase distribution of the two-dimensional pattern is Φ(2D), the phase distribution of the M-point emission is Φ(M), and the phase distribution of the focused light is Φ(Focus), then the actual phase distribution Φ is "Φ=Φ(2D)+Φ(M)+Φ(Focus)". An example of focusing light obliquely with a single focal length is as follows. If the lattice spacing is a and the two-dimensional hole positions are (x, y) = a(Nx, Ny), then the respective phase distributions are expressed as follows: Φ(Tilt)=((√2)π / a)(sinθt)(x(cosθr)+y(sinθr)) Φ(M)=(π / a)(x+y) Φ(Focus)=(π / (λf))(x 2 +y 2 ) θt: Tilt angle from the surface normal Z axis θr: In-plane azimuth angle relative to the X axis f: focal length

[0043] When designing a multi-point beam with multiple focal lengths, the phase distribution of the pattern for each focal length can be calculated as described above, and then superimposed. In this case, instead of adding the phases, methods such as taking the sum of complex amplitudes or randomly combining them can be used. In this way, the phase distribution can be designed.

[0044] As described above, the center of gravity G of each modified refractive index area 44b is located at a position corresponding to the phase modulation amount of a predetermined phase distribution relative to the corresponding lattice point O. In the light-emitting device 4, the phase distribution of the phase modulation layer 44 includes an element for focusing the light L emitted to the outside of the light-emitting device 4. Although the rotation angle α around the lattice point O is set individually for each lattice point O for the center of gravity G of each modified refractive index area 44b, the setting of the center of gravity G of each modified refractive index area 44b is not limited thereto. For example, the center of gravity G of each modified refractive index area 44b may be set so that the distance between each center of gravity G and each lattice point O is an individual distance on a straight line passing through each lattice point O (a straight line extending from each lattice point O at a common angle). Furthermore, instead of the position of the center of gravity G of each modified refractive index area 44b, the size of each modified refractive index area 44b may be modulated, or the position of the center of gravity G of each modified refractive index area 44b and the size of each modified refractive index area 44b may be modulated simultaneously.

[0045] As shown in FIG. 4B, when the center of gravity G of each modified refractive index region 44b in the phase modulation layer 44 is shifted onto the axis D, linearly polarized light L is emitted. As shown in FIG. 4A, when the center of gravity G of each modified refractive index region 44b in the phase modulation layer 44 is shifted onto the circumference, circularly polarized light L is emitted. Since linearly polarized light L is more likely to have improved coupling efficiency to the input coupler 37 than circularly polarized light L, from this perspective, a configuration in which the center of gravity G of each modified refractive index region 44b in the phase modulation layer 44 is shifted onto the axis D is preferable. Each modified refractive index region 44b may have a pattern formed by a plurality of holes (e.g., double holes). In this case, a pair of modified refractive index regions 44b is arranged within each unit constituent region R.

[0046] As described above, the optical integrated circuit 1A uses the light-emitting device 4 including the light-emitting layer 43 and the phase modulation layer 44 optically coupled to the light-emitting layer 43. Therefore, for example, even if the light-emitting device 4 is not tilted with respect to the optical waveguide layer 32, the light L emitted from the light-emitting device 4 can be incident on the input coupler 37 at a desired angle, thereby suppressing optical loss between the light-emitting device 4 and the optical waveguide 38. Furthermore, since the submount 5 is disposed on the light-emitting device 4, heat generated in the light-emitting device 4 can be dissipated to the submount 5, suppressing deterioration of the optical output characteristics of the light-emitting device 4 itself. Therefore, the optical integrated circuit 1A can suppress deterioration of the light propagation characteristics in the optical waveguide 38.

[0047] In the optical integrated circuit 1A, the electrode 41 arranged on the first surface 4a side of the light-emitting device 4 has an opening 41a through which the optical path P passes between the light-emitting layer 43 and the input coupler 37. This allows current to be supplied to the light-emitting layer 43 efficiently while ensuring the optical path P between the light-emitting layer 43 and the input coupler 37.

[0048] In the optical integrated circuit 1A, the area of ​​the opening 41a is smaller than the area of ​​the current injection region 40a in the light-emitting device 4 when viewed from the Z-axis direction. This makes it possible to block unnecessary light such as -1st order light emitted from the light-emitting layer 43. In addition, the heat dissipation characteristics to the substrate 31 side via the electrode 41 can be improved.

[0049] In the optical integrated circuit 1A, the submount 5 includes the light emitting device 4 when viewed from the Z-axis direction. This allows heat generated in the light emitting device 4 to be dissipated to the submount 5 efficiently.

[0050] In the optical integrated circuit 1A, the distance between the light emitting layer 43 and the second surface 4b is shorter than the distance between the light emitting layer 43 and the first surface 4a. This brings the light emitting layer 43, which is a heat generation source, closer to the submount 5, so that heat generated in the light emitting layer 43 can be efficiently dissipated to the submount 5. Furthermore, because the light emitting layer 43, which is a heat generation source, is farther from the optical waveguide layer 32, the optical waveguide layer 32 can be prevented from being affected by heat.

[0051] In the optical integrated circuit 1A, the submount 2 is disposed on the other side in the Z-axis direction on the substrate 31. This allows heat generated in the light-emitting device 4 to be efficiently dissipated to the submount 2 via the substrate 31.

[0052] In the optical integrated circuit 1A, the phase modulation layer 44 is configured to tilt the optical axis A of the light L traveling along the optical path P between the light emitting layer 43 and the input coupler 37 with respect to the Z-axis direction. This makes it possible to suppress optical loss between the light emitting device 4 and the optical waveguide 38, for example, without employing a configuration in which the light emitting device 4 is tilted with respect to the optical waveguide layer 32. Furthermore, since an optical member for tilting the optical axis of the light L traveling along the optical path P between the light emitting layer 43 and the input coupler 37 is not required, the configuration can be simplified.

[0053] In the optical integrated circuit 1A, a plurality of wires 7 are connected to the submount 5, and each wire 7 is electrically connected to the light-emitting layer 43 via the submount 5. This allows heat generated in the light-emitting device 4 to be dissipated to the plurality of wires 7 via the submount 5.

[0054] In the optical integrated circuit 1A, the thickness of the submount 5 in the Z-axis direction is greater than the thickness of the light-emitting device 4 in the Z-axis direction. This allows heat generated in the light-emitting device 4 to be dissipated to the submount 5 efficiently.

[0055] In the optical integrated circuit 1A, the phase modulation layer 44 is configured to focus the light L traveling along the optical path P between the light emitting layer 43 and the input coupler 37 onto the input coupler 37. This allows the light emitted from the light emitting layer 43 to be efficiently incident on the input coupler 37. Furthermore, since there is no need for an optical member for focusing the light L traveling along the optical path P between the light emitting layer 43 and the input coupler 37, the configuration can be simplified.

[0056] In the optical integrated circuit 1A, the center 43a of the light emitting layer 43 overlaps with the input coupler 37 when viewed from the Z-axis direction. This allows the optical integrated circuit 1 to be more compact than a configuration in which the center 43a of the light emitting layer 43 does not overlap with the input coupler 37 when viewed from the Z-axis direction. On the other hand, heat is less likely to propagate from the center 43a of the light emitting layer 43 to the substrate 31 along the Z-axis direction (linearly). However, in this configuration, heat generated in the light emitting layer 43 can be dissipated to the substrate 31 via the conductive member 8. Note that if at least a portion of the light emitting layer 43 overlaps with the input coupler 37 when viewed from the Z-axis direction, the optical integrated circuit 1 can be more compact than a configuration in which the entire light emitting layer 43 does not overlap with the input coupler 37 when viewed from the Z-axis direction. [Second embodiment]

[0057] 5, 6, and 7, the optical integrated circuit 1B differs from the above-described optical integrated circuit 1A mainly in that it further includes a conductive member (second heat dissipation member) 8 made of metal. In the following, the description of the configuration of the optical integrated circuit 1B that is the same as that of the optical integrated circuit 1A will be omitted, and the configuration of the optical integrated circuit 1B that differs from that of the optical integrated circuit 1A will be described in detail. Note that the multiple wires 6 and the multiple wires 7 are not shown in FIG. 6.

[0058] In the optical integrated circuit 1B, the optical waveguide layer 32 is disposed on the substrate 31 so that a region 31a, which is a part of the surface of the substrate 31 facing the optical waveguide layer 32, is exposed. The region 31a extends over "one side and the other side of the optical waveguide layer 32 in the Y-axis direction" and "the other side of the optical waveguide layer 32 in the X-axis direction." The pad 33 is disposed on the region 31a. In the optical integrated circuit 1B, when viewed from the Z-axis direction, the pad 33 is located on one side of the optical waveguide layer 32 in the Y-axis direction.

[0059] The conductive member 8 is disposed between the region 31a and the light-emitting device 4. The conductive member 8 extends over "one side and the other side of the optical waveguide layer 32 in the Y-axis direction" and "the other side of the optical waveguide layer 32 in the X-axis direction." That is, the conductive member 8 is disposed between the substrate 31 and the light-emitting device 4 so as not to overlap with the input coupler 37 and the optical waveguide 38 when viewed from the Z-axis direction. At least a portion of the conductive member 8 is located closer to the substrate 31 in the Z-axis direction than the surface 32a of the optical waveguide layer 32 (the surface of the optical waveguide layer 32 facing the light-emitting device 4). In the optical integrated circuit 1B, the entire conductive member 8 is located closer to the substrate 31 in the Z-axis direction than the surface 32a of the optical waveguide layer 32. The conductive member 8 is connected to both the substrate 31 and the light-emitting device 4. Specifically, the conductive member 8 is physically connected to the substrate 31 and electrically and physically connected to each of the pad 33 and the electrode 41 of the light-emitting device 4. The thermal conductivity of the conductive member 8 is higher than the thermal conductivity of the cladding layer 36 of the optical waveguide layer 32 that is located on the light emitting device 4 side.

[0060] As described above, in the optical integrated circuit 1B, the conductive member 8 is disposed between the substrate 31 and the light-emitting device 4 so as not to overlap with the input coupler 37 and the optical waveguide 38 when viewed from the Z-axis direction. This allows heat generated in the light-emitting device 4 to be dissipated to the substrate 31 via the conductive member 8, even if the optical waveguide layer 32 includes a layer with low thermal conductivity (the cladding layer 36, which is an SiO2 layer), and therefore it is possible to reliably prevent the optical output characteristics of the light-emitting device 4 itself from deteriorating.

[0061] In the optical integrated circuit 1B, the conductive member 8 is connected to both the substrate 31 and the light emitting device 4. This allows heat generated in the light emitting device 4 to be efficiently dissipated to the substrate 31 via the conductive member 8.

[0062] In addition, the optical integrated circuit 1B achieves the following effects with a configuration similar to that of the optical integrated circuit 1A described above. Specifically, the optical integrated circuit 1B uses a light-emitting device 4 including a light-emitting layer 43 and a phase modulation layer 44 optically coupled to the light-emitting layer 43. Therefore, for example, even if the light-emitting device 4 is not tilted relative to the optical waveguide layer 32, the light L emitted from the light-emitting device 4 can be incident on the input coupler 37 at a desired angle, thereby reducing optical loss between the light-emitting device 4 and the optical waveguide 38. Furthermore, since the submount 5 is disposed on the light-emitting device 4, heat generated in the light-emitting device 4 can be dissipated to the submount 5, thereby reducing deterioration of the optical output characteristics of the light-emitting device 4 itself. Therefore, the optical integrated circuit 1B reduces deterioration of the light propagation characteristics in the optical waveguide 38.

[0063] In the optical integrated circuit 1B, the electrode 41 arranged on the first surface 4a side of the light-emitting device 4 has an opening 41a through which the optical path P passes between the light-emitting layer 43 and the input coupler 37. This allows current to be supplied to the light-emitting layer 43 efficiently while ensuring the optical path P between the light-emitting layer 43 and the input coupler 37.

[0064] In the optical integrated circuit 1B, the area of ​​the opening 41a is smaller than the area of ​​the current injection region 40a in the light-emitting device 4 when viewed from the Z-axis direction. This makes it possible to block unnecessary light such as -1st order light emitted from the light-emitting layer 43. In addition, the heat dissipation characteristics to the substrate 31 side via the electrode 41 can be improved.

[0065] In the optical integrated circuit 1B, the submount 5 includes the light emitting device 4 when viewed from the Z-axis direction. This allows heat generated in the light emitting device 4 to be dissipated to the submount 5 efficiently.

[0066] In the optical integrated circuit 1B, the distance between the light emitting layer 43 and the second surface 4b is shorter than the distance between the light emitting layer 43 and the first surface 4a. This brings the light emitting layer 43, which is a heat generation source, closer to the submount 5, so that heat generated in the light emitting layer 43 can be efficiently dissipated to the submount 5. Furthermore, because the light emitting layer 43, which is a heat generation source, is farther from the optical waveguide layer 32, the optical waveguide layer 32 can be prevented from being affected by heat.

[0067] In the optical integrated circuit 1B, the submount 2 is disposed on the substrate 31 on the other side in the Z-axis direction. This allows heat generated in the light-emitting device 4 to be efficiently dissipated to the submount 2 via the conductive member 8 and the substrate 31.

[0068] In the optical integrated circuit 1B, the phase modulation layer 44 is configured to tilt the optical axis A of the light L traveling along the optical path P between the light emitting layer 43 and the input coupler 37 with respect to the Z-axis direction. This makes it possible to suppress optical loss between the light emitting device 4 and the optical waveguide 38, for example, without employing a configuration in which the light emitting device 4 is tilted with respect to the optical waveguide layer 32. Furthermore, since no optical member is required to tilt the optical axis of the light L traveling along the optical path P between the light emitting layer 43 and the input coupler 37, the configuration can be simplified.

[0069] In the optical integrated circuit 1B, a plurality of wires 7 are connected to the submount 5, and each wire 7 is electrically connected to the light-emitting layer 43 via the submount 5. This allows heat generated in the light-emitting device 4 to be dissipated to the plurality of wires 7 via the submount 5.

[0070] In the optical integrated circuit 1B, the thickness of the submount 5 in the Z-axis direction is greater than the thickness of the light-emitting device 4 in the Z-axis direction. This allows heat generated in the light-emitting device 4 to be dissipated to the submount 5 efficiently.

[0071] In the optical integrated circuit 1B, the phase modulation layer 44 is configured to collect light L traveling along the optical path P between the light emitting layer 43 and the input coupler 37 onto the input coupler 37. This allows the light emitted from the light emitting layer 43 to be efficiently incident on the input coupler 37. Furthermore, since no optical member is required to collect light L traveling along the optical path P between the light emitting layer 43 and the input coupler 37, the configuration can be simplified.

[0072] In the optical integrated circuit 1B, the center 43a of the light emitting layer 43 overlaps with the input coupler 37 when viewed from the Z-axis direction. This allows the optical integrated circuit 1 to be more compact than a configuration in which the center 43a of the light emitting layer 43 does not overlap with the input coupler 37 when viewed from the Z-axis direction. On the other hand, heat is less likely to propagate from the center 43a of the light emitting layer 43 to the substrate 31 along the Z-axis direction (linearly). However, in this configuration, heat generated in the light emitting layer 43 can be dissipated to the substrate 31 via the conductive member 8. Note that if at least a portion of the light emitting layer 43 overlaps with the input coupler 37 when viewed from the Z-axis direction, the optical integrated circuit 1 can be more compact than a configuration in which the entire light emitting layer 43 does not overlap with the input coupler 37 when viewed from the Z-axis direction. [Relationship between focal length and focal width in light-emitting devices]

[0073] The relationship between the focal length and the light-collecting width in the light-emitting device 4 will be described with reference to (a) and (b) of Figure 8. (a) and (b) of Figure 8 show the beam quality M 2 8(a) shows the result when the refractive index of the portion of the light-emitting layer 43 located on the light-emitting side of the light L is set to 1, and FIG. 8(b) shows the result when the refractive index of the portion of the light-emitting layer 43 located on the light-emitting side of the light L is set to 3.17. As shown in FIGS. 8(a) and 8(b), the light-emitting device 4 can focus the light L into the input coupler 37 having a width (width in each of the X-axis and Y-axis directions) of several tens of μm or less. Considering the size of the input coupler 37, the focus width is preferably 15 μm or less. As shown in FIG. 8(b), when the focal length is set to 350 μm or less, the focus width can be made 15 μm or less regardless of the width of the light-emitting layer 43 being 50 μm to 200 μm. [Variations]

[0074] The present invention is not limited to the first and second embodiments described above. For example, in each of the optical integrated circuits 1A and 1B, a heat dissipation member other than a submount may be used instead of at least one of the submount 2 and the submount 5. As an example, in each of the optical integrated circuits 1A and 1B, a block made of a metal with excellent heat dissipation properties (e.g., copper or copper-tungsten) may be used as a heat dissipation member instead of at least one of the submount 2 and the submount 5. The heat dissipation member used instead of the submount 5 does not have to have at least one of the flat third surface and the flat fourth surface. In other words, at least one of the third surface and the fourth surface of the heat dissipation member used instead of the submount 5 does not have to be a flat surface.

[0075] 9(a) and 9(b), the optical integrated circuit 1B may have a plurality of conductive members 8 disposed between the region 31a and the light-emitting device 4. In the example shown in FIG. 9(a), each of a pair of conductive members 8 extends in the X-axis direction on one side of the optical waveguide layer 32 in the Y-axis direction. In the example shown in FIG. 9(b), a pair of conductive members 8 are arranged side by side in the X-axis direction while spaced apart from each other on one side of the optical waveguide layer 32 in the Y-axis direction, and another pair of conductive members 8 are arranged side by side in the X-axis direction while spaced apart from each other on the other side of the optical waveguide layer 32 in the Y-axis direction.

[0076] In the optical integrated circuit 1B, some member may be disposed between the conductive member 8 and the substrate 31. In the optical integrated circuit 1B, some member may be disposed between the conductive member 8 and the light-emitting device 4.

[0077] In the optical integrated circuit 1B, a heat dissipation member other than a conductive member may be used instead of the conductive member 8. However, even in this case, it is necessary that "at least a portion of the heat dissipation member used instead of the conductive member 8 is located closer to the substrate 31 than the surface 32a of the optical waveguide layer 32 in the Z-axis direction" and "the thermal conductivity of the heat dissipation member used instead of the conductive member 8 is higher than the thermal conductivity of the cladding layer 36 of the optical waveguide layer 32 located on the light-emitting device 4 side." As an example, in the optical integrated circuit 1B, as shown in FIG. 10, an embedded electrode (second heat dissipation member) 11 may be used instead of the conductive member 8. The embedded electrode 11 is embedded in the optical waveguide layer 32 so as not to overlap with the input coupler 37 and the optical waveguide 38 when viewed from the Z-axis direction. The embedded electrode 11 is made of, for example, a metal. In addition, in the optical integrated circuit 1B, as shown in FIG. 11, multiple heat spreaders (second heat dissipation members) 12 may be used instead of the conductive member 8. The heat spreaders 12 are embedded in the optical waveguide layer 32 while being aligned in the Z-axis direction so as not to overlap with the input coupler 37 and the optical waveguide 38 when viewed from the Z-axis direction. The material of each heat spreader 12 is, for example, metal.

[0078] In the light-emitting device 4, the phase modulation layer 44 may be configured so that the optical axis A of the light L traveling along the optical path P between the light-emitting layer 43 and the input coupler 37 forms a desired angle (including 0 degrees) with respect to the Z-axis direction. In the light-emitting device 4, the phase modulation layer 44 may be configured so that the light L traveling along the optical path P between the light-emitting layer 43 and the input coupler 37 becomes parallel light. In this case, an optical member for collimating the light L traveling along the optical path P between the light-emitting layer 43 and the input coupler 37 is not required, thereby simplifying the configuration. [Explanation of symbols]

[0079] 1A, 1B...optical integrated circuit, 2...submount (third heat dissipation member), 4...light-emitting device, 4a...first surface, 4b...second surface, 5...submount (first heat dissipation member), 5a...third surface, 5b...fourth surface, 7...wire, 8...conductive member (second heat dissipation member), 11...embedded electrode (second heat dissipation member), 12...heat spreader (second heat dissipation member), 31...substrate, 32...optical waveguide layer, 37...input coupler, 38...optical waveguide, 40a...current injection region, 41...electrode, 41a...aperture, 43...light-emitting layer, 44...phase modulation layer, 44a...basic layer, 44b...modified refractive index region, A...optical axis, L...light, P...optical path.

Claims

1. A substrate; an optical waveguide layer disposed on one side of the substrate in a thickness direction of the substrate, the optical waveguide layer including an input coupler and an optical waveguide optically coupled to the input coupler; a light emitting device disposed on the one side of the light guide layer, the light emitting device having a first surface facing the light guide layer and a second surface facing away from the light guide layer; a first heat exhaust member disposed on the one side of the light emitting device, the first heat exhaust member having a third surface on the light emitting device side and a fourth surface on the opposite side of the light emitting device; the light emitting device includes a light emitting layer and a phase modulating layer optically coupled to the light emitting layer; The phase modulation layer includes a base layer and a plurality of modified refractive index areas that have a refractive index different from that of the base layer and are distributed two-dimensionally in a plane intersecting the thickness direction of the base layer.

2. the light-emitting device includes an electrode disposed on the first surface side; The optical integrated circuit of claim 1 , wherein the electrode has an opening through which an optical path passes between the light emitting layer and the input coupler.

3. The optical integrated circuit according to claim 2 , wherein the area of ​​the opening is smaller than the area of ​​a current injection region in the light-emitting device when viewed in the thickness direction of the substrate.

4. 2. The optical integrated circuit according to claim 1, further comprising a second heat dissipation member arranged between the substrate and the light-emitting device so as not to overlap with the input coupler and the optical waveguide when viewed in the thickness direction of the substrate.

5. The optical integrated circuit according to claim 4 , wherein the second heat dissipation member is connected to both the substrate and the light emitting device.

6. The optical integrated circuit according to claim 1 , wherein the first heat dissipation member includes the light emitting device when viewed in the thickness direction of the substrate.

7. The optical integrated circuit of claim 1 , wherein the distance between the light emitting layer and the second surface is less than the distance between the light emitting layer and the first surface.

8. The optical integrated circuit according to claim 1 , further comprising a third heat dissipation member disposed on the other side of the substrate in the thickness direction of the substrate.

9. 2. The optical integrated circuit according to claim 1, wherein the phase modulation layer is configured to tilt an optical axis of light traveling along an optical path between the light emitting layer and the input coupler with respect to the thickness direction of the substrate.

10. further comprising a plurality of wires connected to the first heat dissipation member; The optical integrated circuit according to claim 1 , wherein each of the plurality of wires is electrically connected to the light-emitting layer via the first heat dissipation member.

11. The optical integrated circuit according to claim 1 , wherein a thickness of the first heat dissipation member in the thickness direction of the substrate is greater than a thickness of the light emitting device in the thickness direction of the substrate.

12. The optical integrated circuit of claim 1 , wherein the phase modulation layer is configured to focus light traveling along an optical path between the light emitting layer and the input coupler onto the input coupler.

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