Manufacturing method of wiring boards

By irradiating laser light on non-adjacent target regions in a glass substrate to form through holes, the method prevents cracking and ensures the structural integrity of the substrate, addressing the issue of crack formation in narrow hole distances.

JP2026096029APending Publication Date: 2026-06-12IBIDEN CO LTD

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
IBIDEN CO LTD
Filing Date
2024-12-02
Publication Date
2026-06-12

AI Technical Summary

Technical Problem

Existing methods for forming holes in glass substrates can lead to cracks when the distance between adjacent holes is narrow.

Method used

The method involves irradiating laser light multiple times on target regions in a glass substrate to form modified portions, followed by etching to create through holes, with a specific order of laser irradiation on non-adjacent target regions to prevent stress accumulation and cracking.

Benefits of technology

This approach effectively suppresses the occurrence of cracks around through holes, enhancing the reliability and integrity of the glass substrate.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 2026096029000001_ABST
    Figure 2026096029000001_ABST
Patent Text Reader

Abstract

Suppression of crack formation around through holes. [Solution] The manufacturing method of the wiring board of the embodiment includes irradiating a plurality of linearly arranged target regions T1 to T8 on a glass substrate with laser light multiple times to form a plurality of modified regions, and removing the plurality of modified regions by etching to form a plurality of through holes in the plurality of target regions T1 to T8. Forming the modified regions includes irradiating a first target region with laser light, and, following the irradiation of the first target region with laser light, irradiating a second target region with laser light, wherein the second target region is a target region other than the adjacent target region adjacent to the first target region.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention relates to a method for manufacturing a wiring board.

Background Art

[0002] Patent Document 1 discloses a method of forming holes in a glass substrate. The method of Patent Document 1 includes a step of forming a modified portion on the glass substrate using laser light, and a step of etching the glass substrate by immersing the glass substrate in an etching solution and applying ultrasonic waves to the glass substrate. In Patent Document 1, the laser light is irradiated a plurality of times along a predetermined path.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] When forming holes in a glass substrate by the method described in Patent Document 1, if the distance between two adjacent holes is narrow, cracks may occur around the holes.

Means for Solving the Problems

[0005] The method for manufacturing a wiring board of the present invention includes forming a plurality of modified portions by irradiating laser light a plurality of times on a plurality of target regions arranged linearly in a glass substrate, and removing the plurality of modified portions by etching to form a plurality of through holes in the plurality of target regions. Forming the modified portions includes irradiating laser light on a first target region, and irradiating laser light on a second target region following the irradiation of laser light on the first target region, where the second target region is a target region other than an adjacent target region adjacent to the first target region.

[0006] According to embodiments of the present invention, it is believed that the occurrence of cracks around through holes can be suppressed. [Brief explanation of the drawing]

[0007] [Figure 1] A cross-sectional view showing an example of a wiring board manufactured by the wiring board manufacturing method of an embodiment of the present invention. [Figure 2A] A cross-sectional view showing an example of the manufacturing process for a wiring board. [Figure 2B] A cross-sectional view showing an example of the manufacturing process for a wiring board. [Figure 2C] A cross-sectional view showing an example of the manufacturing process for a wiring board. [Figure 2D] A cross-sectional view showing an example of the manufacturing process for a wiring board. [Figure 2E] A cross-sectional view showing an example of the manufacturing process for a wiring board. [Figure 2F] A cross-sectional view showing an example of the manufacturing process for a wiring board. [Figure 2G] A cross-sectional view showing an example of the manufacturing process for a wiring board. [Figure 2H] A cross-sectional view showing an example of the manufacturing process for a wiring board. [Figure 3A] A schematic diagram showing an example of a laser beam irradiation pattern. [Figure 3B] A schematic diagram showing an example of a laser beam irradiation pattern. [Figure 3C] A schematic diagram showing an example of a laser beam irradiation pattern. [Figure 3D] A schematic diagram showing an example of a laser beam irradiation pattern. [Modes for carrying out the invention]

[0008] A method for manufacturing a wiring board according to an embodiment of the present invention will be described with reference to the drawings. Figure 1 shows a cross-sectional view of a wiring board 1, which is an example of a wiring board manufactured by the manufacturing method of the embodiment. The wiring board 1 has a core portion 100 having a first surface 100A and a second surface 100B which is the opposite surface of the first surface 100A. The core portion 100 is composed of a glass substrate 100G and a through-hole conductor 100t in which through holes 100h formed in the glass substrate 100G are filled with a conductor.

[0009] The wiring board of the embodiment has build-up sections formed on both sides of the core portion, each consisting of four or more insulating layers and four or more conductive layers. The first surface 100A and the second surface 100B consist of the surface of the glass substrate 100G and the surface of the through-hole conductor 100t. A first build-up section 11 is formed on the first surface 100A. A second build-up section 12 is formed on the second surface 100B.

[0010] In the description of the wiring board of this embodiment, the side furthest from the core 100 is also referred to as "top," "upper side," "outside," or "outer," and the side closer to the core 100 is also referred to as "bottom," "lower side," "inside," or "inner." Furthermore, in each insulating layer and conductor layer, the surface facing away from the core 100 is also referred to as the "top surface," and the surface facing towards the core 100 is also referred to as the "bottom surface." Accordingly, for example, in the description of each element constituting the first build-up section 11 and the second build-up section 12, the side furthest from the core 100 is referred to as "top," "upper," "upper layer side," "outside," or simply "top" or "outer," and the side closer to the core 100 is referred to as "bottom," "downward," "lower layer side," "inside," or simply "bottom" or "inner."

[0011] The first build-up section 11 is composed of insulating layers 111 and conductor layers 112 that are alternately laminated on the first surface 100A of the core section 100. The second build-up section 12 is composed of insulating layers 121 and conductor layers 122 that are alternately laminated on the second surface 100B of the core section 100. The insulating layer 111 constituting the first build-up section 11 includes via conductors 113 that connect conductors (conductor layers 112 to each other, or conductor layer 112 to a through-hole conductor 100t) formed on opposite sides of the insulating layer 111 in the thickness direction. The insulating layer 121 constituting the second build-up section 12 includes via conductors 123 that connect conductors (conductor layers 122 to each other, or conductor layer 122 to a through-hole conductor 100t) formed on opposite sides of the insulating layer 121 in the thickness direction.

[0012] A solder resist layer SR1 is formed on the first build-up section 11. A solder resist layer SR2 is formed on the second build-up section 12. An opening SR1o is formed in the solder resist layer SR1, and the conductor pad 112p of the outermost conductor layer 112 in the first build-up section 11 is exposed through the opening SR1o. An opening SR2o is formed in the solder resist layer SR2, and the conductor pad 122p of the outermost conductor layer 122 in the second build-up section 12 is exposed through the opening SR2o.

[0013] The conductor pad 112p may be a connection pad used for mounting external electronic components. As shown in the figure, the conductor pad 112p may be electrically and mechanically connected to a connection pad of an external element IP, which may be, for example, a silicon interposer, by a bonding material such as solder. In the illustrated example, components E1 and E2, which are electronic components (e.g., logic chips and memory elements) such as semiconductor integrated circuit devices and active components such as transistors, are connected to the external element IP. That is, electronic components may be mounted on the wiring board 1 in the form of an interposer. On the other hand, the conductor pad 122p may be a connection pad used for connecting to any board, electrical component, or mechanical component (not shown), such as an external motherboard.

[0014] In the illustrated example, a reinforcing material ST is provided on the solder resist layer SR1. The reinforcing material ST is provided so as to surround the region where the external element IP is mounted, avoiding the region where the conductor pad 112p is provided, so as not to inhibit the mounting of components on the surface of the wiring board 1. By providing the reinforcing material ST, deformation such as bending or warping of the wiring board 1 can be suppressed. By suppressing the deformation of the wiring board 1, the mounting of the external element IP on the wiring board 1 can be realized with high reliability. However, the reinforcing material ST may be provided as needed, and the wiring board 1 may not have the reinforcing material ST.

[0015] The glass substrate 100G constituting the core part 100 is formed of glass selected from soda lime glass, aluminosilicate glass, borosilicate glass, fluoroglass, chalcogen glass, alkali-free glass, and quartz glass. The glass substrate 100G may contain, as additives, magnesium, calcium, manganese, aluminum, lead, iron, chromium, potassium, sulfur, antimony, boron, and the like.

[0016] The insulating layer 111 constituting the first build-up part 11 and the insulating layer 121 constituting the second build-up part 12 are each formed using an insulating resin such as, for example, an epoxy resin, a bismaleimide triazine resin (BT resin), or a phenol resin. Each of the insulating layers 111 and 121 may contain a reinforcing material (core material) such as glass fiber and / or an inorganic filler such as silica or alumina. The thermal expansion coefficient of the insulating layers 111 and 121 is, for example, 15 ppm / °C or more and 25 ppm / °C or less.

[0017] The solder resist layers SR1 and SR2 are formed using, for example, a photosensitive epoxy resin or polyimide resin. As the material of the reinforcing material ST, any material that can suppress the deformation of the wiring board 1 may be used, and metal materials such as copper alloy, aluminum alloy, and iron alloy may be used, but it is preferably formed using a material with high rigidity. For example, stainless steel is used.

[0018] The conductor layers 112, 122, via conductors 113, 123, and through-hole conductor 100t can be formed using any metal such as copper or nickel. For example, the conductor layers 112, 122 can be formed from metal foil such as copper foil and / or a metal film formed by plating or sputtering. In Figure 1, the conductor layers 112, 122, via conductors 113, 123, and through-hole conductor 100t are shown as a single layer for simplicity, but they can have a multilayer structure of two or more layers. The conductor layers 112, 122, via conductors 113, 123, and through-hole conductor 100t can have a two-layer structure including a metal film layer (e.g., electroless copper plating film) and a plating film layer (e.g., electrolytic copper plating film). Each of the conductor layers 112, 122 on the wiring board 1 is patterned to have a predetermined conductor pattern.

[0019] The through-hole conductor 100t constituting the core portion 100 connects the conductor layer 112 constituting the first build-up portion 11 and the conductor layer 122 constituting the second build-up portion 12. In the illustrated example, the through-hole conductor 100t is directly connected to the via conductor 113, thereby connecting to the conductor layer 112 via the via conductor 113, and is also directly connected to the via conductor 123, thereby connecting to the conductor layer 122 via the via conductor 123.

[0020] The through-hole conductor 100t is composed of a conductor that completely fills the through-hole 100h formed in the glass substrate 100G. In the illustration, the through-hole 100h is formed to have approximately the same dimensions in the thickness direction of the glass substrate 100G. However, the through-hole 100h (and therefore the through-hole conductor 100t) may also have a configuration in which the diameter decreases toward the center of the thickness of the glass substrate 100G from the first surface 100A side and the second surface 100B side.

[0021] Here, for convenience, the term "reduced diameter" is used, but the opening shape of the through-hole 100h in plan view is not necessarily limited to a circle. "Diameter" refers to the straight-line distance between the two furthest apart points on the outer edge of the object when viewed from above. "Reduced diameter" simply means that the straight-line distance between the two furthest apart points on the outer edge in the horizontal cross-section of the through-hole 100h becomes smaller. Note that "plan view" means viewing the object with a line of sight parallel to the thickness direction of the wiring board 1 (i.e., the thickness direction of the glass substrate 100G).

[0022] As described later, the through-holes 100h are formed on the glass substrate 100G in a predetermined pattern. The position of the through-holes 100h corresponds to the position of the target area (see symbols T1 to T12 in Figures 3A to 3D; hereinafter simply referred to as the target area T (see Figure 2A)) where laser light irradiation is performed, as described later. As shown in Figures 3A to 3D, multiple target areas T are arranged in a linear fashion, thereby forming the through-holes 100h in a linear fashion. Here, "linear" means that multiple target areas T or through-holes 100h are arranged in a continuous straight line or curve. Here, "arranged in a straight line" means that multiple target areas T or through-holes 100h are arranged such that one or more target areas or through-holes 100h exist on a straight line connecting the center of one target area (for example, target area T1 in Figure 3A) or through-hole 100h to the center of another target area (for example, target area T8 in Figure 3A) or through-hole 100h. Therefore, the centers of multiple target regions T or through holes 100h do not need to be aligned in a straight line.

[0023] In a wiring board 1 manufactured by the wiring board manufacturing method of the embodiment, the pitch PT of adjacent through holes 100h (for example, the shortest distance between the centers of an adjacent pair of through holes 100h) is, for example, 250 μm or less. The multiple through holes 100h are formed spaced apart from each other so that a space SP is formed between them. The space SP of adjacent through holes 100h (for example, the shortest distance between the outer edges of an adjacent pair of through holes 100h) is, for example, 50 μm or more, preferably 50 μm or more and 150 μm or less. Here, the "center" of the through hole 100h refers to the design center position of the through hole 100h used to form the through hole 100h. The pitch PT or space SP of adjacent through holes 100h in the direction in which the multiple through holes 100h are aligned (hereinafter referred to as the alignment direction) does not need to be constant.

[0024] The diameter DA of the through-hole 100h on the two surfaces (first surface 100A and second surface 100B) perpendicular to the thickness direction of the glass substrate 100G is, for example, 100 μm or more and 200 μm or less. Note that all drawings are schematic and show dimensions that differ from those in an actual wiring board for ease of understanding.

[0025] The manufacturing method of the wiring board of the embodiment includes irradiating a glass substrate 100G with laser light multiple times to form a plurality of modified portions hp (see Figure 2A), and removing the plurality of modified portions hp by etching to form a plurality of through holes 100h in the plurality of target regions T.

[0026] The following describes a method for manufacturing a wiring board, including forming the modified portion hp and the through-hole 100h, using the case of manufacturing the wiring board 1 shown in Figure 1 as an example, with reference to Figures 2A to 2H. In Figures 2A to 2H, as in Figure 1, the structure of each conductor layer is simplified and shown as having a single-layer structure.

[0027] First, as shown in Figure 2A, a glass substrate 100G is prepared. As the glass substrate 100G, a plate material made of glass selected from, for example, soda-lime glass, aluminosilicate glass, borosilicate glass, fluoroglass, chalcogen glass, alkali-free glass, and quartz glass may be prepared.

[0028] Multiple laser beams are shone onto a target region T of the glass substrate 100G to form multiple modified regions hp (see Figure 2A). Here, the target region T is the area of ​​the glass substrate 100G where through-holes 100h are to be formed. As the laser beam, helium-neon lasers, argon-ion lasers, excimer lasers, and various YAG lasers can be used. The modified regions hp are parts of the glass structure that have been altered and are easier to remove than the surrounding unmodified areas by subsequent etching. Details of the formation of modified regions hp by laser irradiation will be described later.

[0029] Next, multiple modified portions hp are removed by etching to form multiple through-holes 100h in multiple target regions T (see Figure 2B). The modified portions hp are removed by an etching solution containing, for example, an aqueous solution of hydrogen fluoride. Specifically, the modified portions hp are removed by immersing the glass substrate 100G on which the modified portions hp are formed in an etching solution containing, for example, an aqueous solution of hydrogen fluoride. The concentration of the aqueous solution of hydrogen fluoride is adjusted appropriately so that etching proceeds sufficiently. Furthermore, from the viewpoint of promoting etching, hydrochloric acid and / or nitric acid may be added to the etching solution, and ultrasonic waves may be transmitted to the etching bath during etching of the glass substrate 100G. Through-holes 100h are formed in the portions from which the modified portions hp have been removed, as shown in Figure 2B.

[0030] Next, as shown in Figure 2C, the through-hole 100h is filled with a conductor CM. The conductor CM is formed to completely fill the inside of the through-hole 100h and to completely cover the two surfaces of the glass substrate 100G that are perpendicular to the thickness direction. In forming the conductor CM, first, a metal film layer (not shown) is formed on the inner wall surface of the through-hole 100h and on the two surfaces of the glass substrate 100G, for example, by electroless plating. Subsequently, a plating film layer is formed on the metal film layer by electroplating using the metal film layer as a power supply layer, and a through-hole conductor 100t with a two-layer structure (single layer in the figure) of the metal film layer and the plating film layer is formed inside the through-hole 100h, and the two surfaces of the glass substrate 100G are covered with a layer of conductor CM with a two-layer structure (single layer in the figure) of the metal film layer and the plating film layer.

[0031] Next, the layers of conductive material CM covering two surfaces perpendicular to the thickness direction of the glass substrate 100G are removed by polishing. As shown in Figure 2D, the surface of the glass substrate 100G and the surface of the through-hole conductor 100t are exposed. A core portion 100 is formed, comprising a first surface 100A and a second surface 100B, which are composed of the surface of the glass substrate 100G and the surface of the through-hole conductor 100t. The removal of the conductive material CM layer by polishing can be carried out, for example, by chemical mechanical polishing (CMP).

[0032] Next, as shown in Figure 2E, an insulating layer 111 is laminated on the first surface 100A of the core portion 100, and then a conductor layer 112 is formed on top of the insulating layer 111. A via conductor 113 is formed simultaneously with the formation of the conductor layer 112. Furthermore, an insulating layer 121 is laminated on the second surface 100B of the core portion 100, and then a conductor layer 122 is formed on top of the insulating layer 121. A via conductor 123 is formed simultaneously with the formation of the conductor layer 122.

[0033] The insulating layers 111 and 121 are formed, for example, by thermocompression bonding of a film-like insulating resin (e.g., epoxy resin) onto the surface (first surface 100A and second surface 100B) of the core portion 100. The thermal expansion coefficient of the insulating layer is, for example, 15 ppm / °C or more and 25 ppm / °C or less. Through holes vh are formed in the insulating resin at the positions where the via conductors 113 and 123 are to be formed, for example, by irradiation with carbon dioxide laser light. Conductor layers 112 and 122, and via conductors 113 and 123 are formed by forming a metal film layer (not shown) on the inner surface of the through holes vh and the upper surface of the insulating layers 111 and 121 by electroless plating or sputtering, and by electroplating using a metal film layer with a plating resist having appropriate openings as a power supply layer. In other words, the conductor layers 112 and 122, and via conductors 113 and 123 are formed by a semi-additive process (SAP).

[0034] Next, as shown in Figure 2F, on the upper side of the first surface 100A of the core portion 100, the same process as described above for forming the insulating layer 111, the conductor layer 112, and the via conductor 113 is repeated three or more times to form a first build-up portion 11 including four or more insulating layers 111 and four or more conductor layers 112. Also, on the upper side of the second surface 100B of the core portion 100, the same process as described above for forming the insulating layer 121, the conductor layer 122, and the via conductor 123 is repeated three or more times to form a second build-up portion 12 including four or more insulating layers 121 and four or more conductor layers 122. The outermost conductor layer 112 of the first build-up portion 11 is formed in a pattern including a conductor pad 112p. The outermost conductor layer 122 of the second build-up portion 12 is formed in a pattern including a conductor pad 122p.

[0035] Next, as shown in Figure 2G, a solder resist layer SR1 is formed on the first build-up section 11, and a solder resist layer SR2 is formed on the second build-up section 12. Solder resist layers SR1 and SR2 are formed by, for example, forming a resin layer containing a photosensitive epoxy resin or polyimide resin, and then exposure and development using a mask having an appropriate aperture pattern. Solder resist layers SR1 and SR2 are formed to have apertures SR1o and SR2o that expose the conductor pads 112p and 122p. A surface protective film (not shown) made of Au, Ni / Au, Ni / Pd / Au, solder, or heat-resistant preflux may be formed on the exposed surfaces of the conductor pads 112p and 122p by electroless plating, solder leveling, or spray coating.

[0036] Next, as shown in Figure 2H, a reinforcing material ST is attached to the solder resist layer SR1. For the reinforcing material ST, for example, a plate-shaped stainless steel may be used, but a metal material other than stainless steel may also be used. The reinforcing material ST is made by punching or laser processing a plate-shaped metal material so that its planar shape follows the contour of the area on the wiring board 1 where the components are mounted. The plate-shaped reinforcing material ST is joined to the solder resist layer SR1 via, for example, a thermosetting adhesive (not shown). Through the above steps, the wiring board 1 is completed.

[0037] Next, the details of the formation of the modified region hp by laser irradiation will be explained using Figures 3A to 3D.

[0038] Multiple modified areas hp in multiple target regions are formed by irradiating each of the multiple target regions T with laser light multiple times in a predetermined order. Specifically, forming a modified area includes irradiating a first target region with laser light (hereinafter referred to as the first laser light irradiation step) and irradiating a second target region with laser light following the irradiation of the first target region (hereinafter referred to as the second laser light irradiation step). The second target region is a target region other than the adjacent target region adjacent to the first target region (hereinafter referred to as the non-adjacent target region). As described above, by irradiating the second target region, which is a non-adjacent target region, with laser light following the irradiation of the first target region, the occurrence of cracks around the through hole 100h is suppressed. Unlike the embodiment, if two adjacent target regions are irradiated with laser light consecutively, in other words, if another modified area is formed in an adjacent target region immediately after a modified area is formed in one target region, stress accumulates between the two modified areas that are continuously modified by laser light irradiation. It is believed that the accumulation of stress makes the glass substrate more susceptible to cracking during laser irradiation, etching, through-hole conductor formation, and reliability testing required for the substrate. In contrast, in this embodiment, laser irradiation is performed on the second target region, which is a non-adjacent target region, after the first target region, thereby suppressing the accumulation of stress in the glass substrate 100G and preventing the occurrence of cracks.

[0039] In this specification, the terms "first" and "second" in the first and second laser irradiation steps refer to the first and second laser irradiations of any two laser beams in a plurality of laser irradiation steps that irradiate a plurality of target regions T. Therefore, the first laser irradiation step does not mean the first laser beam irradiation in a plurality of laser irradiation steps, but merely indicates the relative order between it and the second laser irradiation step. For example, the first laser irradiation step may be the third laser beam irradiation in a plurality of laser beam irradiations, and the second laser irradiation step may be the fourth laser beam irradiation. The first and second laser irradiation steps indicate the relative order in the irradiation of a plurality of linearly arranged target regions T. Therefore, irradiation of regions other than the plurality of linearly arranged target regions T (e.g., region R in Figure 3C) may occur between the first and second laser irradiation steps.

[0040] The first target region is one of several target regions arranged linearly along a predetermined alignment direction that is irradiated by the first laser light irradiation process. The second target region is another of several target regions arranged linearly that is irradiated by the second laser light irradiation process. The second target region is a non-adjacent target region that is not adjacent to the first target region in the alignment direction of the target region T.

[0041] In this embodiment, as shown in Figures 3A to 3D, in all laser irradiations, the later laser beam is irradiated in a target region other than the adjacent target region where the previous laser beam is irradiated. In this case, crack formation is suppressed in all linearly aligned target regions T. However, in some laser irradiations, the later laser beam may be irradiated in a non-adjacent target region that is not adjacent to the target region where the previous laser beam is irradiated. Even in this case, crack formation is suppressed in some target regions.

[0042] The order in which laser light is irradiated onto multiple target regions T is not particularly limited. For example, the laser light is irradiated in the order shown in Figure 3A. In Figure 3A, the numbers displayed on the multiple target regions T indicate the order in which they are irradiated. In the example shown in Figure 3A, the later of two consecutive laser light irradiations is performed in a target region that is shifted by 3 or more positions in the alignment direction relative to the target region where the previous laser light is irradiated (with 2 or more target regions in between). For example, in Figure 3A, after the first laser light irradiation is performed on target region T1, the second laser light irradiation is performed on target region T2, which is shifted by 4 positions in the first alignment direction (to the right in Figure 3A) relative to target region T1. Next, the third laser light irradiation is performed on target region T3, which is shifted by 3 positions in the second alignment direction (to the left in Figure 3A) relative to target region T2. ​​In this case, by performing the two consecutive laser light irradiations at positions shifted by 3 or more positions, stress accumulation is suppressed, and the occurrence of cracks in the glass substrate 100G is further suppressed.

[0043] In the example shown in Figure 3B, laser light is irradiated to target regions other than the adjacent target regions at least twice between the irradiation of the first target region with laser light and the irradiation of the adjacent target region adjacent to the first target region. Specifically, as shown in Figure 3B, in target region T5 adjacent to target region T1 where the first laser light irradiation takes place, laser light is irradiated for the fifth time, and between the irradiation of laser light in the adjacent target regions T1 and T5, other target regions are irradiated three times with other laser light. Also, between target region T2 where the second laser light irradiation takes place and the adjacent target region T5, other laser light is irradiated twice, and between target region T2 where the second laser light irradiation takes place and the adjacent target region T6, other laser light is irradiated three times. In other target regions as well, other laser light is irradiated at least twice between the irradiation of laser light in adjacent target regions. In this case, two or more laser light irradiations take place in non-adjacent target regions before the laser light irradiation of adjacent target regions. Therefore, stress accumulation is further suppressed, and the occurrence of cracks in the glass substrate 100G is further suppressed. In the example shown in Figure 3B, the target region irradiated by the subsequent laser irradiation process (for example, target region T2 where the second laser irradiation is performed) is positioned two positions in the first direction (to the right in Figure 3B) in the alignment direction relative to the target region where the previous laser irradiation is performed (for example, target region T1 where the first laser irradiation is performed). If there is no target region at the position two positions in the first direction relative to the irradiated target region (for example, after irradiating target region T4 in Figure 3B), the laser irradiation is performed again by returning to an unirradiated target region on the second direction side in the alignment direction (for example, target region T5). After that, the laser irradiation is performed again by moving to a target region shifted two positions in the first direction in the alignment direction.

[0044] As shown in Figure 3C, the laser beam irradiation may be performed randomly. The laser beam may be irradiated to a region R outside of the linearly arranged target regions T1 to T8 shown in Figure 3C. For example, the laser beam may be irradiated in region R between the first laser beam irradiation in target region T1 and the second laser beam irradiation in target region T2.

[0045] Figure 3D shows a configuration in which linearly aligned target regions T1 to T12 intersect and are arranged linearly. Thus, the method of the embodiment may be configured so that one linear target region T1 to T6 and other linear target regions T7 to T12 are continuously irradiated with laser light. In the example shown in Figure 3D, the one linearly aligned target region T1 to T6 and other linearly aligned target regions T7 to T12 are arranged non-perpendicularly. However, the target regions T may be arranged such that, for example, one linearly aligned target region and other linearly aligned target regions are orthogonal to each other. Although not shown in the figure, the target regions may be arranged in a loop, such as in a configuration of four linearly aligned rectangular frames. [Explanation of Symbols]

[0046] 1 Wiring board 100G glass substrate 100h through hole T, T1~T12 Target Area HP Modification Section PT placement pitch R region SP Space

Claims

1. In a glass substrate, multiple modified areas are formed by irradiating multiple linearly arranged target regions with laser light multiple times, The plurality of modified portions are removed by etching, and a plurality of through holes are formed in the plurality of target regions. A method for manufacturing a wiring board, including, Forming the modified portion includes irradiating a first target region with laser light, and, following the irradiation of the first target region with laser light, irradiating a second target region with laser light, wherein the second target region is a target region other than an adjacent target region adjacent to the first target region. A method for manufacturing a wiring board.

2. A method for manufacturing a wiring board according to claim 1, wherein the plurality of target regions are arranged in a straight line.

3. A method for manufacturing a wiring board according to claim 1, wherein the pitch of adjacent through holes among the plurality of through holes is 250 μm or less, and the space between adjacent through holes among the plurality of through holes is 50 μm or more.

4. A method for manufacturing a wiring board according to claim 1, wherein the formation of the modified portion is performed by irradiating the target region other than the adjacent target region with laser light two or more times between irradiating the first target region with laser light and irradiating the adjacent target region adjacent to the first target region with laser light.

5. A method for manufacturing a wiring board according to claim 1, wherein, in all laser beam irradiation, the irradiation of the later laser beam among two consecutive laser beam irradiations is performed in a target region other than the adjacent target region adjacent to the target region where the previous laser beam irradiation is performed.