Electronic linkage device and computer program

Abstract

To enable interlocking functions of many stations to be integrated and processed in railways.SOLUTION: An electronic interlocking device 1 is connected to a plurality of on-site apparatuses 2 including signal devices 21 and switch machines 22. The electronic interlocking device 1 includes an interlocking processing unit 3 performing arithmetic processing and an interface 4. The interface 4 connects the interlocking processing unit 3 and the on-site apparatuses 2. The interlocking processing unit 3 has a logic function for each route. Each logic function is input with a locked state of a prescribed switch machine 22 relating to the route and the presence / absence of an on-rail train in a prescribed section and outputs a logical operation result about whether or not a route setting condition is satisfied. The interlocking processing unit 3 calculates a plurality of logic functions in parallel.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to an electronic interlocking device in a railway and a computer program for causing a computer to perform arithmetic processing of the electronic interlocking device.

Background Art

[0002] A ministry ordinance (Ministry of Land, Infrastructure, Transport and Tourism ordinance) that defines technical standards related to railways states that "at intersections, branchings, or other locations on a railway line where there is a risk of collision or derailment, devices must be installed to interlock signals that may obstruct the route, points within the route, and other similar elements to ensure the prevention of collisions and the safety of train operations." (See Article 56). Such a device is an interlocking device in a railway. With the interlocking device, the setting of the route → the switching of the points → the securing of the route → the holding of the route → the indication of the signal are performed without contradiction. According to Japanese Industrial Standards, an interlocking device is a general term for devices that perform mutual interlocking of signal lights, points, etc. (see No. 5001 of Non-Patent Document 1). Interlocking devices include relay interlocking devices and electronic interlocking devices. A relay interlocking device is an interlocking device that performs interlocking electrically using a group of relays. An electronic interlocking device is an interlocking device that performs interlocking using a microcomputer or the like (see Non-Patent Document 1).

[0003] The interlocking performed by the interlocking device will be described with reference to the interlocking chart illustrated in FIG. 2. An interlocking chart is a chart that represents the contents of the interlocking of an interlocking device using railway signal characters, graphic symbols, etc. (see No. 1009 of Non-Patent Document 1). The interlocking chart defines when a signal light can be indicated and how long the route is secured, and is composed of a wiring schematic diagram called an interlocking diagram (upper side of FIG. 2) and an operation definition table called an interlocking table (lower side of FIG. 2).

[0004] In this example, the interlocking diagram shows track wiring, the inbound in-station signals "1R" and "2R", the outbound departure signals "3R" and "4R", and the switches "11" and "51". In-station signals are signals for trains entering the station (see number 2011 in Non-Patent Document 1). Departure signals are signals for trains departing from the station (see number 2012 in Non-Patent Document 1). Note that a station equipped with in-station signals, departure signals, and switches is included in the definition of a station yard.

[0005] Generally, the normal state of a device is called the normal position, and the other (opposite) state is called the reverse position (see number 1008 in Non-Patent Document 1). For a switch, the direction that is normally kept open is called the normal position, and the other opening direction is called the reverse position. The direction in which the arrow blades of the interlocking diagram point is defined as the normal position of the switch, the direction in which they do not point is defined as the reverse position, the state where the route is not set by the signal lever is defined as the normal position, and the state where the route is set is defined as the reverse position. Also, a state that is mechanically protected so that the state does not change regardless of the operation is called locked. Also, the circled characters on the interlocking diagram indicate the reverse position of the device.

[0006] The number column of the interlocking table lists the elements that can be operated. In this example, the "signal lever" for operating the signal and the "switch lever" for operating the switch are listed. The locking column and the signal control or inspection locking column of the interlocking table indicate whether the operations in the number column can be realized.

[0007] For example, when setting the route for "1R", the switches "51" and "11" are in the normal position and locked. When there are no other trains in the track sections "51T", "11T", "1RT", and "BT", the train can enter safely, so the indication to proceed can be lit on the signal of "1R". Through such interlocking, the route for "1R" is set. Note that although "BT" is not directly on this route, it is inserted into the interlocking table because there is a possibility of a side collision.

[0008] Similarly, when setting the route for "2R", the turnout "51" is locked in the normal position, and "11" is locked in the reverse position (round number 11). When there are no other trains in the track sections "51T", "11T", "BT", and "2RT", the signal for "2R" can display a proceed indication. Through such interlocking, the route for "2R" is set.

[0009] If an attempt is made to set the route for "2R" simultaneously with setting the route for "1R", since "11" is not locked in the reverse position, the signal for "2R" will remain at a stop indication. That is, the route for "2R" cannot be set. Through such interlocking, conflicting operations are made ineffective.

[0010] When it is desired to switch the turnout "11", it can be switched when there is no train in "11T" and when the route is not set by "1R" or "2R". Although "1R" and "2R" are not listed in the locking column for "11" in the interlocking table, this is because the turnout "11" is listed in the locking columns for "1R" and "2R", so the listing is omitted.

[0011] Similarly, when it is desired to switch the turnout "51", it can be switched when there is no train in "51T" and when the route is not set by "1R" or "2R". Although "1R" and "2R" are not listed in the locking column for "51" in the interlocking table, this is because the turnout "51" is listed in the locking columns for "1R" and "2R", so the listing is omitted.

[0012] The route locking column and the approach locking or holding locking column in the interlocking table represent the locking that prevents the turnout related to the route from being switched. Route locking is the locking that prevents the related turnout from being switched when a train enters the route according to the indication for proceeding at a signal (see No. 5023 in Non-Patent Document 1). Approach locking is the locking that prevents the turnout in the route from being switched when a train has entered a certain section outside a signal after the signal has once shown an indication for proceeding, or when a train has entered a certain section outside a signal and the signal shows an indication for proceeding, until the train enters the inside of the signal or a certain time has elapsed after the signal shows a stop signal (see No. 5025 in Non-Patent Document 1). Holding locking is the locking that prevents the turnout in the route from being switched after a signal has once shown an indication for proceeding, until the train enters the route of the signal or a predetermined time has elapsed after the signal shows a stop signal (see No. 5026 in Non-Patent Document 1).

[0013] Conventional electronic interlocking devices have realized the interlocking represented in the interlocking diagram in two major ways. One is to focus on the interlocking diagram, check the track elements from the starting point to the arrival point represented in the interlocking diagram, and find the elements that affect the route. This method is called the "spool method" because it secures the path from the starting point to the arrival point. The other is the "connection data method" that focuses on the interlocking table, converts the interlocking represented in the interlocking table into relay logic, interprets and executes the data obtained therefrom.

[0014] For example, in the example of FIG. 2, the route of "1R" has the starting point at "Lower 1T" and the arrival point at "1RT". In the "spool method", the electronic interlocking device realizes the function of the interlocking device by sequentially checking whether the train can occupy each element of "51T", "11T", "1RT", and "BT" in the order in which the train proceeds.

[0015] In the "connection data method", the function of the interlocking device is realized by sequentially interpreting relay logic with an interpreter, which is general-purpose software for electronic interlocking. That is, this method is an emulation by software of the electromechanical interlocking device.

[0016] Both of these two methods perform processing to realize the function of the interlocking device by a single thread (sequential checking or sequential interpretation). Therefore, when such processing is performed on a single computing element, if the computation amount increases, the processing cycle will become longer in proportion to the computation amount. If the processing cycle becomes too long, the real-time performance of the processing cannot be ensured. When installing an interlocking device for each station, the computation amount is small and there is not much problem even in large stations. However, in the future, when aggregating the interlocking functions of stations across a large-scale line section or stations of multiple companies, there may be problems.

[0017] Conventionally, interlocking devices have been installed in the equipment rooms of each station. Looking at technological trends, an era has come when computing resources do not necessarily have to be local, such as the practical application of high-speed computing devices and the development of high-speed large-capacity communication. Technical elements have emerged that enable interlocking devices to perform their functions without installing devices in the equipment rooms of each station. With the advent of a super-aging society and population decline, aggregating devices so that centralized maintenance can be performed is more advantageous from the perspective of the continuity of maintenance than installing interlocking devices at each station of each railway company.

[0018] In recent years, an electronic interlocking device that performs interlocking logic processing for multiple stations has been proposed (see Patent Document 1). This electronic interlocking device sequentially processes the interlocking logic of multiple stations within the processing cycle for each station (see paragraph 0009 of the specification of Patent Document 1 and Figure 2(B)). Therefore, when the number of stations increases, the required processing amount for stations increases, so the processing capacity of the electronic interlocking device is insufficient (see paragraph 0028 of the same document).

Prior Art Documents

Patent Documents

[0019]

Patent Document 1

Non-Patent Literature

[0020]

Non-Patent Literature 1

Summary of the Invention

Problems to be Solved by the Invention

[0021] The present invention solves the above problems and aims to enable the aggregation and processing of the interlocking functions of many stations.

Means for Solving the Problems

[0022] The electronic interlocking device of the present invention is connected to a plurality of field devices including signal machines and points machines, and includes an interlocking processing unit that performs arithmetic processing, and an interface that connects the interlocking processing unit and the field devices. The interlocking processing unit has a logical function for each route, and each of the logical functions for each route has the locked state of a predetermined points machine related to the route and the presence or absence of a train in a predetermined section input thereto, and outputs a logical operation result indicating whether the route setting condition is satisfied. The interlocking processing unit is characterized by performing parallel arithmetic operations on a plurality of the logical functions.

[0023] In this electronic interlocking device, in the logical function for each route, the locked state of the points machine is a binary value representing either the state where the points machine is locked or the state where the points machine is not locked, and the presence or absence of a train in a predetermined section is a binary value representing either the state where no train is present in the section or the state where a train is present in the section or an indefinite state. The logical function is preferably a combinational logic of a plurality of the binary values.

[0024] In this electronic interlocking device, the interlocking processing unit further has a logic function for each turnout. Each of the logic functions for each turnout receives the state of a predetermined route setting related to the conversion of the turnout and the presence or absence of a train in the predetermined section, and outputs a logical operation result indicating whether the condition for converting the turnout is satisfied, which is preferable.

[0025] In the logic function for each turnout in this electronic interlocking device, the state of the predetermined route setting is a binary value representing either the state where the route is set or the state where the route is not set, and the presence or absence of a train in the predetermined section is a binary value representing either the state where no train is present in the section, the state where a train is present in the section, or an indefinite state. The logic function is preferably a combined logic of a plurality of the binary values.

[0026] In this electronic interlocking device, the interlocking processing unit has a CPU and a GPU. The GPU has a plurality of cores, and preferably each of the cores of the GPU calculates each of the logic functions in parallel.

[0027] In this electronic interlocking device, it has I / O terminals provided for each station. Each of the I / O terminals is connected to the on-site equipment of the station where it is provided, and the interface preferably has a data communication function for performing data communication between the interlocking processing unit and the I / O terminals.

[0028] In this electronic interlocking device, the presence or absence of a train in the predetermined section is detected by the track circuit of that section, and the track circuit is preferably included in the on-site equipment.

[0029] The computer program of the present invention is a computer program that causes a computer connected to a plurality of field devices including signal devices and switch machines to perform arithmetic processing of an electronic interlocking device. It has a logical function for each route, and each of the logical functions for each route inputs the locking state of a predetermined switch machine related to the route and the presence or absence of a train parked in a predetermined section, and outputs a logical operation result indicating whether or not the condition for setting the route is satisfied. The computer program is characterized in that it causes the computer to calculate a plurality of the logical functions in parallel.

[0030] In this computer program, in the logical function for each route, the locking state of the switch machine is a binary value representing either the state in which the switch machine is locked or the state in which the switch machine is not locked, and the presence or absence of a train parked in a predetermined section is a binary value representing either the state in which no train is parked in the section or the state in which a train is parked in the section or an indefinite state. The logical function is preferably a combination logic of a plurality of the binary values.

[0031] In this computer program, it further has a logical function for each switch machine, and each of the logical functions for each switch machine inputs the state of a predetermined route setting related to the conversion of the switch machine and the presence or absence of a train parked in a predetermined section, and preferably outputs a logical operation result indicating whether or not the condition for converting the switch machine is satisfied.

[0032] In this computer program, in the logical function for each switch machine, the state of a predetermined route setting is a binary value representing either the state in which the route is set or the state in which the route is not set, and the presence or absence of a train parked in a predetermined section is a binary value representing either the state in which no train is parked in the section or the state in which a train is parked in the section or an indefinite state. The logical function is preferably a combination logic of a plurality of the binary values.

[0033] In this computer program, the computer has a CPU and a GPU, and the GPU has a plurality of cores. The "co" The computer program preferably causes each of the cores of the GPU to perform each of the logical functions in parallel.

Advantages of the Invention

[0034] According to the electronic interlocking device and the computer program of the present invention, each route has a logical function that outputs a logical operation result indicating whether or not the route setting conditions are satisfied, and the plurality of logical functions are calculated in parallel. Therefore, even if the number of routes to be processed increases, an increase in the calculation time can be suppressed. For this reason, the interlocking functions of many stations can be aggregated and processed.

Brief Description of the Drawings

[0035]

Figure 1

Figure 2

Embodiments for Carrying Out the Invention

[0036] An electronic interlocking device according to an embodiment of the present invention will be described with reference to FIGS. 1 and 2. As shown in FIG. 1, the electronic interlocking device 1 is connected to a plurality of field devices 2 including a signal 21 and a switch machine 22. In this embodiment, a track circuit 23 is included in the field devices 2. The electronic interlocking device 1 is a device that interlocks the plurality of field devices 2 with each other. Interlocking means imposing a certain order and restrictions on the handling between two or more signals, switch machines, etc. (see No. 5006 of Non-Patent Document 1).

[0037] The electronic interlocking device 1 includes an interlocking processing unit 3 and an interface 4. The interlocking processing unit 3 performs arithmetic processing. The interlocking processing unit 3 is configured using a computer. The interface 4 connects the interlocking processing unit 3 and the field device 2.

[0038] The electronic interlocking device 1 has I / O terminals 5 provided for each station 20. Each I / O terminal 5 is connected to the on-site equipment 2 of the station 20 where it is provided. The interface 4 has a data communication function for performing data communication between the interlocking processing unit 3 and the I / O terminal 5. When aggregating the interlocking functions of multiple stations 20, one interlocking processing unit 3 is connected to the on-site equipment 2 via multiple I / O terminals 5.

[0039] In this embodiment, the interlocking processing unit 3 has a CPU 6 and a GPU 7. The GPU 7 has multiple cores. A GPU (Graphics Processing Unit) is a type of microprocessor that assists the CPU (Central Processing Unit) and has a function of executing image processing at high speed. Although a GPU is not suitable for general-purpose processing like a CPU, it has a large number of cores (arithmetic units) inside and is suitable for repeatedly applying relatively simple calculations to a large number of data in parallel. Taking advantage of this feature, in GPU computing, processing other than image processing is executed at high speed by the GPU. In this embodiment, the interlocking processing unit 3 calculates logical functions in parallel with the GPU 7. The interlocking processing unit 3 has a memory in addition to the CPU 6 and the GPU 7.

[0040] The operating principle of the electronic interlocking device 1 configured as described above will be explained. FIG. 2 shows a model (example) of an interlocking chart. In the interlocking table that constitutes the interlocking chart, whether the operation in the number column is established depends on the information in the locking column and the information in the signal control or inspection locking column. That dependency can be represented by a truth table.

[0041]

Table 1

[0042] Table 1 is a truth table for the route "1R" based on the interlocking table in FIG. 2. Here, in the column of the locking and unlocking machine, 1 indicates that it is locked, and 0 indicates that it is not locked. In the column of train non-presence in the line, 1 indicates that there is no train in the relevant section, and 0 indicates presence in the line or indeterminate.

[0043] The logic represented in the truth table can be expressed by a logical formula that combines AND (logical product), OR (logical sum), and NOT (negation). Therefore, in the interlocking table, whether the operation in the number column is valid is determined by combinational logic based on the information in the locking column and the information in the signal control or inspection locking column.

[0044] The logical formula based on the truth table can be expressed by a logical function. From the truth table in Table 1, the logical function of the route "1R" (the route that can be entered by the indication indicating the progression of signal "1R") can be expressed as in Equation 1 using the minterm expression (expression by AND terms with all variables).

[0045]

Equation

[0046] Similarly, the logical function of the route "2R" (the route that can be entered by the indication indicating the progression of signal "2R") can be expressed as in Equation 2.

[0047]

Equation

[0048] Even if the number of routes is 3 or more, the same applies, and a truth table for the route can be created, and a logical function can be created from that truth table.

[0049] Also, based on the interlocking table, a truth table for whether the conversion of the points machine "11" can be performed is created in the same way, and a logical function of the points machine (switch lever) "11" can be created from that truth table. Also, based on the interlocking table, a truth table for whether the conversion of the points machine "51" can be performed is created, and a logical function of the points machine (switch lever) "51" can be created from that truth table.

[0050] The operations of these logical functions do not depend on the temporal sequence. Therefore, for example, F 1R (x1 ,…x 9 ), F 2R (x 1 ,…x 9 ), but the opposite is true: F 2R (x 1 ,…x 9 ), F 1R (x 1 ,…x 9 ) or simultaneously, the result is the same. Therefore, logical functions such as Equation 1 and Equation 2 can be calculated in parallel (parallel processing).

[0051] As shown in Equation 1, the logic function F 1R The calculation of is performed by inputting the state (x 1 ,x 2 ,x 3 ,x 4 ,x 5 ,x 6 ,x 7 ,x 8 ,x 9 ) with the condition (1,0,1,0,1,1,1,1,1,0 / 1) of the course setting "1R" in the truth table based on the interlocking table. Therefore, the logical function F 1R The operation of is logical variable x 1R =(x 1 ,x 2 ,x 3 ,x 4 ,x 5 ,x 6 ,x 7 ,x 8 ,x 9 ) and the logical variable y 1R =(1,0,1,0,1,1,1,1,1,0 / 1) is the input variable of the function f(x 1R ,y 1R The function f(x, y) is a function that determines whether the logical variables x and y match.

[0052] Similarly, as shown in Equation 2, the logic function F 2R The calculation of is performed by inputting the state (x 1 ,x 2 ,x 3 ,x 4 ,x5 ,x 6 ,x 7 ,x 8 ,x 9 ) with the condition of the course setting "2R" (1,0,0,1,1,1,1,0 / 1,1). Therefore, the logical function F 2R The operation of is logical variable x 2R =(x 1 ,x 2 ,x 3 ,x 4 ,x 5 ,x 6 ,x 7 ,x 8 ,x 9 ) and the logical variable y 2R =(1,0,0,1,1,1,1,0 / 1,1) is the input variable of the function f(x 2R ,y 2R The operation of the logic function of a point is similarly an operation of the function f(x,y). This function f(x,y) is the same regardless of the route or point.

[0053] Furthermore, although it is not related to parallel processing, by applying the absorption rule of Boolean algebra, it is possible to simplify logic functions and reduce the amount of calculations. For example, Equation 1 can be expressed equivalently as Equation 3.

[0054]

number

[0055] In other words, as long as parallel processing resources can be secured, even if the number of paths increases, the processing time will depend on the maximum number of variables after the absorption rule is applied among the paths to be calculated.

[0056] As described above, the logic represented in the truth table based on the interlock table is represented by the same function f regardless of the route. This is not limited to the interlock table illustrated in FIG. 2, and the logic represented in the truth table based on any interlock table is represented by the same function regardless of the route. Therefore, it is possible to obtain the expected performance in a GPU that is good at parallel processing of the same function.

[0057] Based on the above considerations, the inventor of the present application has invented an electronic interlocking device 1 that operates as follows.

[0058] The interlock processing unit 3 has logic functions (F 1R (x 1 ,…x 9 ), F 2R (x 1 ,…x 9 )) for each route (''1R'', ''2R''). The content in parentheses illustrates the case of FIG. 2.

[0059] Each logic function (F 1R , F 2R ) for each route (''1R'', ''2R'') is based on the locking states (x 1 ,x 2 ,x 3 ,x 4 ) of predetermined points 22 (''51'', ''the inversion of 51'', ''11'', ''the inversion of 11'') related to the routes (''1R'', ''2R''), and the presence or absence of trains in the predetermined sections (''51T'', ''11T'', ''BT'', ''1RT'', ''2RT'') (x 5 ,x 6 ,x 7 ,x 8 ,x 9 ) are input, and the logical operation result indicating whether or not the conditions for setting the route are satisfied is output.

[0060] In the logic functions (F 1R , F 2R ) for each route, the locking states (x 1 ,x 2 ,x 3 ,x 4) is a binary value (1 or 0) representing either a state where the transfer machine 22 is locked or a state where the transfer machine 22 is not locked.

[0061] In this embodiment, for the locking state (x 1 ,x 2 ,x 3 ,x 4 ) of the transfer machine 22, a state where the transfer machine 22 is locked is 1, and a state where the transfer machine 22 is not locked is 0.

[0062] For the logical function (F 1R , F 2R ) for each route, the presence or absence of a train in a predetermined section (「51T」, 「11T」, 「BT」, 「1RT」, 「2RT」) (x 5 ,x 6 ,x 7 ,x 8 ,x 9 ) is a binary value (1 or 0) representing either a state where no train is present in the section or a state where a train is present or indeterminate in the section.

[0063] In this embodiment, for the presence or absence of a train (x 5 ,x 6 ,x 7 ,x 8 ,x 9 ), a state where no train is present in the section is 1, and a state where a train is present or indeterminate in the section is 0.

[0064] The presence or absence of a train in a predetermined section (「51T」, 「11T」, 「BT」, 「1RT」, 「2RT」) (x 5 ,x 6 ,x 7 ,x 8 ,x 9 ) is detected by the track circuit 23 of that section.

[0065] The logical functions (F 1R (x 1 ,…x 9 ), F 2R (x 1 ,…x9 )) is a combinational logic of a plurality of binary values (x 1 ,... x 9 ).

[0066] The interlocking processing unit 3 calculates a plurality of logical functions F 1R (x 1 ,... x 9 ), F 2R (x 1 ,... x 9 ) in parallel.

[0067] The conversion of the turnout 22 is also processed in the same way as the route. The interlocking processing unit 3 further has logical functions F 11 , F 51 ) for each turnout 22 ("11", "51").

[0068] Each logical function F 11 , F 51 ) for each turnout 22 ("11", "51") takes as input the state of a predetermined route setting ("1R", "2R") related to the conversion of the turnout 22 ("11", "51") and the presence or absence of a train in the predetermined section ("11T", "51T"), and outputs the logical operation result indicating whether the condition for converting the turnout 22 ("11", "51") is satisfied.

[0069] In the logical function F 11 , F 51 ) for each turnout, the state of the predetermined route setting ("1R", "2R") is a binary value (1 or 0) representing either the state in which the route setting has been made or the state in which the route setting has not been made.

[0070] In the logical function F 11 , F 51 ) for each turnout, the presence or absence of a train in the predetermined section ("11T", "51T") (x 6 , x 5 ) is a binary value representing either the state in which no train is present in the section or the state in which a train is present or indefinite in the section.

[0071] Logical function (F 11 , F 51 ) is a combination logic of multiple binary values.

[0072] The interlock processing unit 3 calculates a plurality of logical functions (F 1R , F 2R , F 11 , F 51 ) in parallel.

[0073] In the interlock processing unit 3, each core of the GPU 7 calculates each of the logical functions (F 1R , F 2R , F 11 , F 51 ) in parallel.

[0074] When the electronic interlocking device 1 is connected to the on-site devices 2 of a plurality of stations 20, the number of routes and points to be processed increases. The electronic interlocking device 1 calculates each of the logical functions of these routes and each point in parallel.

[0075] Regarding the interlocks described in the route locking column and the approach locking or holding locking column in the interlocking table, in this embodiment, the electronic interlocking device 1 processes them in the same manner as the conventional electronic interlocking device.

[0076] As described above, according to the electronic interlocking device 1 according to this embodiment, the interlock processing unit 3 has a logical function for each route that outputs a logical operation result indicating whether the condition for route setting is satisfied, and calculates a plurality of logical functions in parallel. Therefore, even if the number of routes to be processed increases, the increase in operation time can be suppressed. For this reason, the interlocking functions of many stations can be aggregated and processed using this electronic interlocking device 1.

[0077] The interlock processing unit 3 includes a CPU 6 and a GPU 7. The GPU 7 has a plurality of cores, and each of these cores calculates each of the logical functions in parallel. Therefore, the logical functions of a plurality of routes can be calculated at high speed, and even if the number of routes to be processed increases, the increase in operation time can be suppressed.

[0078] Since the interface 4 has a data communication function for data communication between the interlocking processing unit 3 and the I / O terminal 5, the interlocking processing unit 3 is connected to the field devices 2 of a plurality of stations 20 via a network, and can aggregate and process the interlocking functions of those stations 20.

[0079] Since the interlocking processing unit 3 is configured using a computer, the above-described interlocking function by the interlocking processing unit 3 is realized by causing a computer to execute a computer program.

[0080] That computer program causes a computer connected to a plurality of field devices 2 including the signal 21 and the points machine 22 to perform arithmetic processing of the electronic interlocking device, and has a logic function for each route. Each logic function for each route inputs the locked state of a predetermined points machine 22 related to the route and the presence or absence of a train in the predetermined section, and outputs a logic operation result indicating whether or not the route setting conditions are satisfied. This computer program causes a computer to calculate a plurality of logic functions in parallel.

[0081] That computer has a CPU 6 and a GPU 7. The GPU 7 has a plurality of cores. This computer program causes each core of the GPU 7 to calculate each of the above-described logic functions in parallel.

[0082] Note that the computer that executes this computer program is not limited to a computer dedicated to the electronic interlocking device.

[0083] Note that the present invention is not limited to the configuration of the above-described embodiment, and various modifications are possible without changing the gist of the invention. For example, the presence or absence of a train in the predetermined section is not limited to detection by the track circuit 23 in that section, and for example, wireless train detection or detection by a loop coil provided on the track may be used.

Explanation of Reference Numerals

[0084] 1 Electronic interlocking device 3 Interlocking processing unit 4 Interface 5 I / O terminal 6 CPU 7 GPU

Claims

1. An electronic interlocking device connected to a plurality of on-site devices including signal devices and turnouts, comprising an interlocking processing unit that performs arithmetic processing, and an interface that connects the interlocking processing unit and the on-site devices, wherein the interlocking processing unit has a logic function for each route, each of the logic functions for each route receives the locking state of a predetermined turnout related to the route and the presence or absence of a train in a predetermined section, and outputs a logical operation result indicating whether the condition for setting the route is satisfied, the interlocking processing unit is characterized in that it calculates a plurality of the logic functions in parallel. An electronic interlocking device.

2. In the logic function for each route, the locking state of the turnout is a binary value representing either the state in which the turnout is locked or the state in which the turnout is not locked, the presence or absence of a train in a predetermined section is a binary value representing either the state in which no train is present in that section or the state in which a train is present in that section or is indefinite, the logic function is a combinatorial logic of a plurality of the binary values. The electronic interlocking device according to claim 1.

3. the interlocking processing unit further has a logic function for each turnout, each of the logic functions for each turnout receives the state of a predetermined route setting related to the conversion of the turnout and the presence or absence of a train in a predetermined section, and outputs a logical operation result indicating whether the condition for converting the turnout is satisfied. The electronic interlocking device according to claim 1.

4. In the logic function for each turnout, the state of a predetermined route setting is a binary value representing either the state in which the route setting has been made or the state in which the route setting has not been made, the presence or absence of the train in a predetermined section is a binary value representing either the state in which no train is present in that section or the state in which a train is present in that section or is indefinite, the logic function is a combinatorial logic of a plurality of the binary values. The electronic interlocking device according to claim 3.

5. the interlocking processing unit has a CPU and a GPU, the GPU has a plurality of cores, each of the cores of the GPU calculates each of the logic functions in parallel. The electronic interlocking device according to any one of claims 1 to 4.

6. having an I / O terminal provided for each station, each of the I / O terminals is connected to the on-site devices of the station where it is provided, The electronic interlocking device according to any one of claims 1 to 5, wherein the interface has a data communication function for performing data communication between the interlocking processing unit and the I / O terminal.

7. The presence or absence of a train standing in the predetermined section is detected by the track circuit of that section, The electronic interlocking device according to any one of claims 1 to 6, wherein the track circuit is included in the field device.

8. A computer program that causes a computer connected to a plurality of field devices including a signal and a turnout machine to perform the arithmetic processing of the electronic interlocking device, having a logic function for each route, Each of the logic functions for each route receives the locking state of a predetermined turnout related to the route and the presence or absence of a train standing in a predetermined section, and outputs the logical operation result of whether or not the conditions for setting that route are satisfied. The computer program is characterized in that the computer performs arithmetic operations on a plurality of the logic functions in parallel.

9. In the logic function for each route, the locking state of the turnout is a binary value representing either the state in which the turnout is locked or the state in which the turnout is not locked, The presence or absence of a train standing in a predetermined section is a binary value representing either the state in which no train is standing in that section or the state in which a train is standing or undetermined in that section, The computer program according to claim 8, wherein the logic function is a combinatorial logic of a plurality of the binary values.

10. further having a logic function for each turnout, Each of the logic functions for each turnout receives the state of a predetermined route setting related to the conversion of the turnout and the presence or absence of a train standing in a predetermined section, and outputs the logical operation result of whether or not the conditions for converting that turnout are satisfied. The computer program according to claim 8, characterized in that

11. In the logic function for each turnout, the state of a predetermined route setting is a binary value representing either the state in which the route has been set or the state in which the route has not been set, The presence or absence of a train standing in a predetermined section is a binary value representing either the state in which no train is standing in that section or the state in which a train is standing or undetermined in that section, The computer program according to claim 10, wherein the logical function is a combination logic of a plurality of the binary values.

12. The computer has a CPU and a GPU, the GPU has a plurality of cores, the computer program according to any one of claims 8 to 11, wherein the computer program causes each of the cores of the GPU to perform operations on each of the logical functions in parallel.

Images