Ceramic phase capacitor device for RF systems in a photoactive glass substrate

Abstract

The present invention includes a ceramic phase capacitor device and methods of making the same, where the ceramic phase capacitor is formed in or on a light sensitive glass substrate and comprises a first capacitor electrode formed in or on the light sensitive glass substrate, a glass crystalline dielectric formed in situ from the light sensitive glass substrate adjacent to the first capacitor electrode, and a second capacitor electrode formed in or on the light sensitive glass substrate adjacent to the glass crystalline dielectric and opposite the first electrode.

Description

[Technical Field]

[0001] Cross-reference of related applications This application is a PCT international application claiming priority to U.S. Provisional Application No. 63 / 197,066, filed on 4 June 2021, and its entire contents are incorporated herein by reference.

[0002] Description of research funded by the federal government. none.

[0003] The present invention generally relates to the field of RF centrifugal element devices for RF systems in a packaged photoactive glass substrate. [Background technology]

[0004] Without limiting the scope of this invention, the background will be explained in relation to RF centrifugal element devices.

[0005] Photosensitive glass structures have been proposed for several micromachining and microfabrication processes, including integrated electronic elements and other elements, systems, or subsystems. Conventional silicon microfabrication of glass is expensive and has a low yield, while injection molding or embossing processes produce inconsistent shapes. Silicon microfabrication processes rely on photolithography and reactive ion etching or ion beam milling tools, which require expensive capital equipment, i.e., ultra-clean, high-productivity silicon manufacturing facilities that generally cost over a million dollars each, and millions to billions of dollars. Injection molding and embossing are cheaper methods for creating three-dimensional shapes, but they have differences due to defects in transfer or probabilistic curing processes. An ideal inductor would have zero resistance and zero capacitance. However, actual inductors have "parasitic" resistance, inductance, and capacitance.

[0006] Traditionally, inductor capacitance has been called "inter-winding capacitance," based on the assumption that it is the result of charge separation between insulated coil windings. However, if the inductor is measured on a conductive ground plane, the capacitance between the coil and the ground plane also becomes part of the measurement. The distance of the coil from the measurement ground plane and the effective dielectric constant of the measurement substrate affect the capacitance to ground. This partially explains how the test fixture affects SRF measurements. The following equation shows how SRF relates to inductance and capacitance in an LC circuit.

[0007]

number

[0008] Here, L is the inductance in Henry and C is the capacitance in Farads.

[0009] In addition to additional inductance, capacitance and resistance eliminate losses from (1) PCB interconnects, (2) the length of long metal redistributions, (3) bond pads, (4) solder balls, (5) substrate losses and dielectric constant / dielectric loss tangent, and / or (6) inconsistent assembly.

[0010] From this equation, it is clear that RF and / or microwave filters are generally fabricated with one or more coupled resonators, and that resonators / filters can be fabricated using several different techniques. The majority of resonators / filters fall into one of three common categories: lumped elements, microstrip transmission lines, and coaxial waveguides.

[0011] A lumped RF element is a combination of inductors, and a ceramic-phase capacitor (LC) filter is the simplest resonator structure used in RF and microwave filters and other devices. A lumped element circuit consists of parallel or series inductors and a ceramic phase. The advantage of a lumped element filter / device is its extremely compact size, but the disadvantages are its low quality factor, high distortion / noise levels, and relatively low performance. Therefore, lumped element devices are not considered a viable option for RF / microwave applications.

[0012] In the 2003 book *Lumped Elements for RF and Microwave Circuits* by Inder Bahl, it is stated that "due to associated parasitic reactances caused by leakage magnetic fields, ideal lumped elements are not feasible even at lower microwave frequencies." At RF and microwave frequencies, each component has associated electric and magnetic fields as well as finite dissipative losses. Thus, such components store or release electrical and magnetic energy across them, and their resistance is the cause of dissipated power. The relative values ​​of the C, L, and R components in these elements depend on the intended use of the LE. To describe their electrical behavior, equivalent circuit models are commonly used for such components. The lumped element equivalent circuit (EC) model consists of basic circuit elements (L, C, or R) and associated parasitic elements indicated by subscripts. Accurate computer-aided design of MICs and MMICs requires complete and precise characterization of these components. This requires a comprehensive model that includes the effects of the ground plane, leakage magnetic fields, proximity effects, substrate material and thickness, conductor thickness, and associated mounting techniques and applications. Therefore, the EC representation of lumped elements, their parasitic elements, and their frequency-dependent characteristics is essential for accurate element modeling. The EC model consists of the circuit elements necessary to fully describe its response, including any resonances. Models can be developed using analytical, electromagnetic simulation, and measurement-based methods. Early models of lumped elements were developed using analytical semi-empirical equations. In 1943, Terman published an equation for the inductance of a thin metal straight inductor, which was later improved by Caulton et al., who added the effect of metallization thickness. Wheeler presented an approximate formula for the inductance of a circular spiral inductor with fairly good accuracy at lower microwave frequencies. This formula has been widely used in the design of microwave lumped circuits. Inductance calculations for several other shapes have also been discussed.Theoretical modeling of microstrip inductors for MICs has typically been based on two methods: the lumped element approach and the coupled-line approach. The lumped element approach uses formulas for free-space inductance with ground-plane effects. These frequency-independent formulas are only useful when the total length of the inductor is a small fraction of the operating wavelength and when inter-winding capacitance can be ignored. In the coupled-line approach, the inductor is analyzed using multi-conductor coupled microstrip wires. This lumped element technique for RF and microwave circuits allows for fairly good predictions of spiral inductor performance for 2 turns and up to approximately 18 GHz.

[0013] Early theories on interdigital capacitors were published by Alley, and Joshi et al. presented modified formulas for these capacitors. Mondal reported a dispersion model of MIM capacitors based on a coupled-line approach. Pengelly et al. presented the first extensive results on different lumped elements on GaAs, including inductors and interdigital capacitors, with a particular emphasis on Q-factor.

[0014] Pettenpaul et al. reported a lumped element model using numerical methods along with basic microstrip theory and network analysis. In general, analytical models are good for estimating the electrical performance of lumped elements. By keeping the component size much smaller than the operating wavelength, it is possible to realize lumped L, C, R elements at microwave frequencies.

[0015] However, when component sizes increase by more than 1 / 10, these components have undesirable associated parasitic elements such as resistance, capacitance, and inductance. At RF and higher frequencies, the reactance of parasitic elements becomes larger, and as frequency increases, losses and spurious resonances increase. Therefore, empirical representations are not accurate enough to accurately predict LE performance. When lumped elements are accurately characterized by electromagnetic (EM) simulations or measurements, parasitic reactances become an integral part of the component, and their effects can be included in the design.

[0016] Recent advances in workstation computing power and user-friendly software have made it possible to develop EM field simulators. These simulators play a significant role in simulating single-layer and multi-layer passive circuit elements such as transmission lines and their discontinuities, patches, multilayer components, i.e., inductors, capacitors, resistors, via holes, air bridges, inductor transformers, packages, and passive couplings between various circuit elements. Accurate evaluation of the effects of radiation, surface waves, and inter-component interactions on the performance of high-density monolithic microwave integrated circuits (MMICs) can only be calculated using three-dimensional (3-D) EM simulators. The most commonly used method for developing accurate models for lumped elements is by measuring DC resistance and S-parameter data. While this modeling approach provides rapid and accurate results, the results are typically limited to the measured device. EC model parameters are extracted by computer optimization, which, depending on the application, associates measured DC and S-parameter data (1 or 2-port data) up to 26 or 40 GHz. By using recently developed on-wafer calibration standards and techniques, the accuracy of model parameter values ​​can be made equivalent to the measurement accuracy. The equivalent circuit model is almost the first parallel resonant frequency (f resThis is valid up to f. However, when the design involves harmonics, for example, a power amplifier with second and third harmonic termination at the output, either EM simulation data that operates up to the highest design frequency or a more complex model that takes higher-order resonances into account is required. res If it is lower than / 3, the model discussed above is appropriate. At RF and microwave frequencies, the resistance of an LE is quite different from its dc value due to the skin effect. When an RF signal is applied across an LE, due to the finite conductivity of the conducting material, the EM field penetrates the conductor to a limited depth along its cross-section. The distance within the conductor at which the field decreases to 1 / e (approximately 36.9%) of its surface value is called the penetration depth, or skin depth. This effect is a function of frequency, and as the frequency increases, the penetration depth decreases. As a result of the RF current flow being limited to the surface only, the RF surface resistance becomes higher than its dc value. This effect is taken into account when accurately modeling the resistance loss within a component.

[0017] Microstrip transmission lines, also known as striplines, can fabricate good resonators / filters and offer a better compromise than lumped element filters in terms of size and performance. The processes used to manufacture microstrip circuits are very similar to those used to manufacture printed circuit boards using precision thin-film processes, but to achieve the performance required for low-power / loss RF applications, it is necessary to use substrates such as quartz, ceramic, sapphire, and low-resistance metals such as gold.

[0018] Coaxial waveguide (CW) filters offer a higher Q factor than planar transmission lines and are used in high-performance RF applications. Coaxial resonators can be made smaller by utilizing high dielectric constant materials. The size of a CW filter is inversely proportional to the frequency, with a size of 2 cm² on a ceramic substrate at frequencies above 30 GHz. 2 It can reach less than [a certain value]. Due to the combination of ceramic substrate and physical size, these filters are more expensive and larger than other RF filters, and therefore are not commonly used in commercially available portable, compact RF products.

[0019] One of the most common RF filters is the surface acoustic wave (SAW) and / or bulk acoustic wave (BAW). Both SAW and BAW show a decrease in signal-to-noise ratio when the operating frequency exceeds the speed of sound in the piezoelectric material. Single-crystal BAW devices have been shown to have higher performance, but the signal-to-noise can also collapse dramatically when the frequency exceeds the speed of sound in the piezoelectric material. Due to the speed of sound in the piezoelectric materials used in SAW and BAW filters, their applications are limited to frequencies below 3 GHz. BAW and SAW devices themselves lack the frequency selectivity required for 5G performance, and often multiple channels / frequencies / signals overlap. This increases the noise floor to the desired communication signal, and the error rate and loss data increase substantially.

[0020] Despite all these advances, there is still a need for improvements to existing devices that increase the signal-to-noise ratio, are easy and inexpensive to build, and eliminate losses from (1) PCB interconnections, (2) long metal redistribution line lengths, (3) bond pads, (4) solder balls, (5) substrate losses and dielectric constant / dielectric tangent, and / or (6) inconsistent assembly.

Prior Art Documents

Non-Patent Documents

[0021]

Non-Patent Document 1

Summary of the Invention

Means for Solving the Problems

[0022] Typically, an RF concentrator device (capacitor or inductor) is fabricated by creating a ceramic phase in a photosensitive glass and chemically etching the exposed material to create a physical capacitor or inductor structure. This is due to the selective nature of the ceramic phase with respect to the chemical etchant. The ceramic phase of the photosensitive glass is etched tens of times faster than the glass phase of the photosensitive glass. However, studies have shown that the dielectric tangent of the ceramic phase is substantially lower than that of the glass phase of the photosensitive glass, and RF filters fabricated using ceramic phase elements have much higher Q values than their glass phase counterparts.

[0023] In one embodiment, the present invention includes a method for fabricating a ceramic phase capacitor in or on a photosensitive glass, comprising the steps of forming two or more capacitor electrodes of a ceramic phase capacitor on or within a photosensitive glass substrate, wherein a portion of the photosensitive glass substrate separates the two or more capacitor electrodes; exposing the portion of the photosensitive glass substrate separating the two or more capacitor electrodes to an activation energy source; heating the photosensitive glass substrate above its glass transition temperature for at least 10 minutes; cooling the photosensitive glass substrate to convert the exposed portion of the photosensitive glass substrate into a glass crystalline dielectric; and forming electrical connections to the two or more capacitor electrodes. In one embodiment, the method further includes the step of forming two or more capacitor electrodes in vias within the photosensitive glass substrate. In another embodiment, the method further includes the step of forming two or more capacitor electrodes on both sides of the photosensitive glass substrate. In yet another embodiment, the method further includes the step of forming a glass crystalline dielectric on a surface parallel to the photosensitive glass substrate, wherein the glass crystalline dielectric is in the ceramic phase. In another embodiment, the method further includes the step of connecting a ceramic phase capacitor to an isolator equipped with an integrated centrifugal device in a system-in-a-package (SiP). In another embodiment, the method further includes the step of connecting a ceramic phase capacitor to a circulator equipped with an integrated centrifugal device in a SiP. In another embodiment, the method further includes the step of connecting a ceramic phase capacitor to an RF filter equipped with an integrated centrifugal device in a SiP. In another embodiment, the method further includes the step of connecting a ceramic phase capacitor to at least one of a low-pass filter, high-pass filter, notch filter, band-pass filter, or transformer equipped with an integrated centrifugal device in a SiP. In another embodiment, the method further includes the step of connecting a ceramic phase capacitor to a power combiner or power splitter in or on a photosensitive glass substrate.In another embodiment, the method further includes connecting ceramic phase capacitors to one or more antennas, impedance matching elements, 50-ohm termination elements, integrated ground planes, RF shielding elements, electromagnetic interference shielding elements, RF combiners, RF splitters, transformers, switches, or diplexers.

[0024] In another embodiment, the present invention includes a ceramic phase capacitor device formed in or on a photosensitive glass substrate, comprising a first capacitor electrode formed in or on the photosensitive glass substrate, a glass crystalline dielectric formed in situ from the photosensitive glass substrate adjacent to the first capacitor electrode, and a second capacitor electrode formed in or on the photosensitive glass substrate adjacent to the glass crystalline dielectric and on the opposite side of the first electrode. In one embodiment, the first and second capacitor electrodes are formed in vias in the photosensitive glass substrate. In another embodiment, the first and second capacitor electrodes are formed on both sides of the photosensitive glass substrate. In another embodiment, the glass crystalline dielectric is formed on a surface parallel to the photosensitive glass substrate. In another embodiment, the device further includes a first metal connector connected to the first capacitor electrode and a second metal connector connected to the second capacitor electrode. In another embodiment, the ceramic phase capacitor is connected to an isolator comprising an integrated condenser device and is located in SiP. In another embodiment, the ceramic phase capacitor is connected to a circulator comprising an integrated condenser device and is located in SiP. In another embodiment, the ceramic phase capacitor is connected to an RF filter equipped with an integrated lumber device and is located within the SiP. In another embodiment, the ceramic phase capacitor is connected to at least one of a low-pass filter, high-pass filter, notch filter, band-pass filter, or transformer equipped with an integrated lumber device and is located within the SiP. In another embodiment, the ceramic phase capacitor is connected to a power combiner or power splitter located within or on a photosensitive glass substrate. In another embodiment, the ceramic phase capacitor is connected to one or more antennas, impedance matching elements, 50-ohm termination elements, integrated ground planes, RF shielding elements, electromagnetic interference shielding elements, RF combiners, RF splitters, transformers, switches, power splitters, power combiners, or diplexers.

[0025] In another embodiment, the present invention includes a method for fabricating a ceramic phase capacitor in or on a photosensitive glass, comprising the steps of forming two or more capacitor electrodes of a ceramic phase capacitor on or within a photosensitive glass substrate, wherein a portion of the photosensitive glass substrate separates the two or more capacitor electrodes; exposing the portion of the photosensitive glass substrate separating the two or more capacitor electrodes to an activation energy source; heating the photosensitive glass substrate above its glass transition temperature for at least 10 minutes; cooling the photosensitive glass substrate to convert the exposed portion of the photosensitive glass substrate into a glass crystalline dielectric; and forming electrical connections to the two or more capacitor electrodes. In one embodiment, the method further includes the step of forming two or more capacitor electrodes in vias within the photosensitive glass substrate. In another embodiment, the method further includes the step of forming two or more capacitor electrodes on both sides of a photosensitive glass substrate. In yet another embodiment, the method further includes the step of forming a glass crystalline dielectric on a surface parallel to the photosensitive glass substrate, wherein the glass crystalline dielectric is in the ceramic phase. In another embodiment, the method further includes the step of connecting a ceramic phase capacitor to an isolator equipped with an integrated condenser device in a SiP. In another embodiment, the method further includes the step of connecting a ceramic phase capacitor to a circulator equipped with an integrated condenser device in a SiP. In another embodiment, the method further includes the step of connecting a ceramic phase capacitor to an RF filter equipped with an integrated condenser device in a SiP. In another embodiment, the method further includes the step of connecting a capacitor to at least one of a low-pass filter, high-pass filter, notch filter, band-pass filter, or transformer equipped with an integrated condenser device in a SiP. In another embodiment, the method further includes the step of connecting a capacitor to a power combiner or power splitter in or on a photosensitive glass substrate.In another embodiment, the method further includes connecting capacitors to one or more antennas, impedance matching elements, 50-ohm termination elements, integrated ground planes, RF shielding elements, electromagnetic interference shielding elements, RF combiners, RF splitters, transformers, switches, power splitters, power combiners, or diplexers. [Brief explanation of the drawing]

[0026] For a more complete understanding of the features and advantages of the present invention, a detailed description of the invention is provided here with reference to the accompanying figures. [Figure 1] This is a top view of a ceramic phase capacitor within the volume of a photosensitive glass. [Figure 2] This is a side view of a ceramic phase capacitor within the volume of a photosensitive glass. [Figure 3] This is a top view of an in-plane ceramic phase capacitor in a photosensitive glass. [Figure 4] This is a cross-sectional / side view of an in-plane ceramic phase capacitor in a photosensitive glass. [Figure 5] This figure shows the dielectric loss tangent of a ceramic phase capacitor in a photosensitive glass. [Figure 6] This figure shows the dielectric constant of a ceramic phase capacitor made of photosensitive glass. [Figure 7] This figure shows the dielectric loss tangent of a ceramic phase capacitor versus a glass phase capacitor fabricated in a photosensitive glass. [Figure 8] This figure shows the dielectric constants of a ceramic phase capacitor versus a glass phase capacitor fabricated in a photosensitive glass. [Figure 9] This figure shows the circuit layout of an LC tank in a photosensitive glass. [Figure 10A-10B] This is a schematic diagram of an inductor fabricated in photosensitive glass. [Figure 11] The figures show simulations of 5GHz LC tank circuits for ceramic and glass phase capacitors fabricated in photosensitive glass. [Figure 12]This figure shows a 30GHz bandpass filter equipped with a ceramic phase capacitor. [Figure 13] This figure shows the 19GHz bandpass filter of the present invention. [Figure 14] This figure shows the 28GHz bandpass filter of the present invention. [Figure 15] This figure shows the 33GHz low-pass filter of the present invention. [Figure 16] This figure shows the 20GHz bandpass filter of the present invention. [Figure 17] This figure shows the 7GHz bandpass filter of the present invention. [Figure 18] This figure shows a layout of a Doherty amplifier design including a lumped element that can be fabricated using the present invention. [Figure 19] This figure shows a layout of a power divider / combiner that can be manufactured using the present invention. [Figure 20] This diagram shows the layout of a concentrated element circulator. When a terminating resistor is connected to the circulator, it becomes an isolator, which can be fabricated using the present invention. [Figure 21] This figure shows a glass-based system-in-package (SiP) equipped with the integrated centralized element device of the present invention. The SiP measures approximately 0.5 cm × 0.5 cm. [Figure 22] This figure shows sampling of a glass-based SiP equipped with the integrated element device of the present invention. [Modes for carrying out the invention]

[0027] While various embodiments of the present invention will be discussed in detail below, it should be understood that the present invention provides many applicable inventive concepts that can be embodied in a wide variety of specific contexts. The specific embodiments discussed herein are merely illustrative of specific methods of constructing and using the present invention and do not limit the scope of the invention.

[0028] To facilitate understanding of the present invention, several terms are defined below. The terms defined herein have the meanings that are commonly understood by those skilled in the art in the area relating to the present invention. Terms such as "a," "an," and "the" are not intended to refer only to singular entities, but include a general category for which specific examples may be used as illustrations. The terms herein are used to describe specific embodiments of the present invention, but their use is not intended to limit the present invention except as outlined in the claims.

[0029] The present invention eliminates parasitic losses and signals associated with lumped element devices in the RF domain. Lumped element devices or arrays of lumped element devices consist of capacitors, inductors, and resistors, and numerous electronic devices and functions, including filters (bandpass, bandstop, highpass, notch, lowpass filters), circulators, antennas, power conditioning, power combiners, power splitters, matching networks, isolators, and / or Doherty power amplifiers, are mounted in a photosensitive glass-ceramic system-in-package (SiP) for microwave and high-frequency applications that eliminates or significantly reduces parasitic signals or losses. Parasitic signals or losses arise from antenna effects combined with inductance, capacitance, and resistance from the packaging, solder bonding (ball grid), electronic connectors (wires), electrical bond pads, and mounting elements that attach the packaged lumped element device to the SiP. Distorted signals or losses are transmitted to printed circuit boards or other RF devices on the board. Conventional packaging and mounting of lumped elements have considerable variability, resulting in large performance variations from the actually intended performance. These variations appear random due to subtle differences in packaging, which forces RF products to undergo numerous design iterations and / or manual trimming / modifications to produce a final RF circuit that satisfies the desired operating envelope. Eliminating distortions associated with RF packaging and mounting elements allows RF filter devices to perform as designed / simulated. Integrating lumped element devices into photosensitive glass ceramic SiPs allows circuits to perform as designed and simulated across the entire RF spectrum. These lumped element device structures consist of both vertical and horizontal planes, either separately or simultaneously, forming two- or three-dimensional lumped element devices with device equivalence to the design, low loss, low signal distortion, reduced parasitic capacitance, reduced cost, and small physical size.

[0030] As explained in the background, photosensitive glass structures have been proposed for several micromachining and microfabrication processes, such as integrated electronic elements in combination with other elemental systems or subsystems. The present invention has advantages over conventional silicon microfabrication of glass, which is expensive and has low yield, and inconsistent shapes are produced by injection modeling or embossing processes, while improving the RF Q value. The present invention has further advantages over silicon microfabrication processes that rely on photolithography and reactive ion etching or ion beam milling tools, which require expensive capital equipment, generally costing over a million dollars each, and ultra-clean, high-productivity silicon manufacturing facilities costing millions to billions of dollars or more. The present invention also overcomes the problems associated with injection molding and embossing, which result in defects in transfer or differences due to the probabilistic curing process. An ideal inductor would have zero resistance and zero capacitance. However, real inductors have "parasitic" resistance, inductance, and capacitance. The first self-resonant frequency of an inductor is the lowest frequency at which the inductor resonates with its own self-capacitance. The initial resonance can be modeled by a combination of inductance and capacitance in a ceramic phase capacitor fabricated in photosensitive glass, and the performance of the RF circuit / SiP can be further improved by increasing the Q value of the circuit. This is shown in Figure 1. Resistor "R1" limits the impedance near the resonant frequency at the inductor's self-resonant frequency (SRF), and all of the following conditions are met: (1) The input impedance is at its peak. (2) The phase angle of the input impedance is zero, ranging from positive (inductive) to negative (capacitive). (3) Because the phase angle is zero, the Q value is zero. (4) The effective inductance is zero because the negative capacitive reactance (Xc=1 / jωC) simply cancels out the positive inductive reactance (XL=jωL). (5) The 2-port insertion loss (e.g., S21dB) is at its maximum value, which corresponds to the minimum value in the frequency vs. S21dB plot. (6) The two-port phase (e.g., S21) angle is zero and crosses from negative at low frequencies to positive at high frequencies.

[0031] To address these needs, the inventors have developed glass ceramic (APEX® glass ceramic) as a novel packaging and substrate material for semiconductors, RF electronics, microwave electronics, and optical imaging. APEX® glass ceramic is processed in a simple three-step process using first-generation semiconductor equipment, and the final material can be formed as either glass, ceramic, or contain areas of both glass and ceramic. APEX® glass ceramic enables the fabrication of SiPs containing one or more of the following: easily manufactured high-density vias and electronic devices including inductors, ceramic phase capacitors, resistors, transmission lines, coaxial cables, antennas, microprocessors, memories, amplifiers, transistors, matching networks, RF filters (tank circuits, notch filters, bandpass filters, low-pass filters, high-pass filters, and others), RF circulators, RF isolators, impedance matching elements, 50-ohm termination elements, integrated ground planes, RF shielding elements, EMI shielding elements, RF combiners, RF splitters, transformers, switches, multiplexers, and / or diplexers.

[0032] Loss, distortion / noise, parasitic signals, and degradation of performance quality factors are eliminated. The improved performance of lumped element devices with ceramic phase capacitors directly integrated into the SiP dramatically enhances functionality in RF / microwave devices, enabling connection with smaller feature sizes. Lumped element-based devices directly integrated in or on the SiP include, but are not limited to, RF filters, RF circulators, RF isolators, antennas, impedance matching elements, 50-ohm termination elements, integrated ground planes, RF shielding elements, EMI shielding elements, RF combiners, RF splitters, transformers, switches, power splitters, power combiners, and / or diplexers. These lumped element devices directly integrated on the SiP are connected to integrated circuit devices. These integrated circuit devices include, but are not limited to, microprocessors, multiplexers, switches, amplifiers, and memory.

[0033] In particular, SiPs equipped with integrated centrifugal RF devices have been manufactured using conventional semiconductor processing equipment with device equivalence to design in APEX® glass. An integrated centrifugal RF filter in an APEX® glass SiP is shown in Figure 12. The empty area in the center of the SiP is for arranging the integrated circuit to complete the SiP. Figure 13 shows a sample of a glass-based SiP equipped with the integrated centrifugal device of the present invention. Depending on the size of the SiP, there can be many SiPs on a single wafer. More than 500 SiPs equipped with integrated centrifugal devices are mounted on an APEX® glass wafer.

[0034] SiPs with fully integrated condensed element devices can be manufactured in photosensitive glass that has high-temperature stability, good mechanical and electrical properties, and better chemical resistance than plastics and many metals. To the inventor's knowledge, the only commercially available photosensitive glass is FOTURAN® from Schott. FOTURAN® contains lithium aluminum silicate glass with trace amounts of silver ions. When exposed to UV light within the absorption band of cerium oxide, the cerium oxide acts as a sensitizer, absorbing photons and losing electrons, which reduces adjacent silver oxide to form silver atoms. For example, Ce3++Ag+=Ce4++Ag0

[0035] Silver atoms coalesce into silver nanoclusters during the baking process, inducing nucleation sites for crystallization in the surrounding glass. When exposed to UV light through a mask, only the exposed areas of the glass crystallize during subsequent heat treatment.

[0036] This heat treatment must be performed at a temperature close to the glass transition temperature (for example, greater than 465°C in air for FOTURAN®). The crystalline phase is more readily soluble in etchants such as hydrofluoric acid (HF) than the unexposed vitreous amorphous region. In particular, the crystalline region of FOTURAN® is etched approximately 20 times faster than the amorphous region in 10% HF, and once the exposed region is removed, a microstructure with a wall gradient ratio of approximately 20:1 becomes possible. See TR Dietrich et al., "Fabrication technologies for microsystems utilizing photoetchable or photodefinable glass," Microelectronic Engineering 30, 497 (1996), which is incorporated herein by reference.

[0037] Preferably, the molded glass structure includes at least one or more two- or three-dimensional inductive devices. The inductive devices are formed by creating a series of connected loops to form a self-supporting inductor. The loops can be rectangular, circular, elliptical, fractal, or any other shape that creates an induction pattern. The patterned areas of the APEX® glass can be filled with metal, alloy, composite, glass, or other magnetic media by several methods, including plating or vapor deposition. The inductance of the device is provided by the dimensions and number of structures (loops, turns, or other inductive elements) in the device, combined with the permeability of the medium.

[0038] FOTURAN®, as described in information provided by Invenios Corporation (FOTURAN®'s US supplier), is composed of 75–85 wt% silicon dioxide (SiO2), 7–11 wt% lithium oxide (Li2O), 3–6 wt% aluminum oxide (Al2O3), 1–2 wt% sodium oxide (Na2O), 0.2–0.5 wt% antimony trioxide (Sb2O3) or arsenic oxide (As2O3), 0.05–0.15 wt% silver oxide (Ag2O), and 0.01–0.04 wt% cerium oxide (CeO2). As used herein, the terms “APEX® glass ceramic,” “APEX® glass,” or simply “APEX®” are used to describe one embodiment of the glass ceramic composition of the present invention. The present invention provides a single-material approach for manufacturing ceramic phase capacitors used in various filters and systems within packages.

[0039] Generally, glass-ceramic materials have achieved limited success in microstructure formation due to issues with performance, uniformity, ease of use, and availability for others. While past glass-ceramic materials have an etching aspect ratio of approximately 15:1, APEX® glass has an average etching aspect ratio greater than 50:1. This allows users to create smaller and deeper features. In addition, our manufacturing process enables a product yield of over 90% (compared to a yield of closer to 50% for conventional glass). Finally, while only about 30% of the glass is converted to a ceramic state in conventional glass-ceramics, this conversion is closer to 70% in APEX® glass-ceramics.

[0040] APEX® glass compositions offer three main mechanisms for improving their performance: (1) a higher silver content leads to the formation of smaller ceramic crystals that are etched more quickly at grain boundaries; (2) a lower silica content (the main component etched by HF acids) reduces undesirable etching of unexposed materials; and (3) a higher total weight percentage of alkali metals and boron oxide results in a much more homogeneous glass during manufacturing.

[0041] The present invention includes a method for manufacturing glass-ceramic structures for use in forming inductive structures used in electromagnetic transmission, transformer, and filtering applications. The present invention includes inductive element device structures fabricated on multiple planes of a glass-ceramic substrate, such a process using (a) exposure to excitation energy such that exposure occurs at various angles by changing the orientation of either the substrate or the energy source, (b) a bake step, and (c) an etching step. The size of the angle can be either acute or obtuse. Curved digital structures are difficult, if not impossible, to fabricate on most glass, ceramic, or silicon substrates. The present invention has created the ability to fabricate such structures on both vertical and horizontal planes of a glass-ceramic substrate. The present invention includes a method for manufacturing inductor structures on or within a glass-ceramic.

[0042] The ceramicization of glass involves exposing the entire glass substrate to light at 310 nm and approximately 20 J / cm². 2 This is achieved by exposure. When attempting to create a glass space within a ceramic, the user exposes all of the material except where the glass should remain glass. In one embodiment, the present invention provides a quartz / chromium mask containing various concentric circles with different diameters.

[0043] The present invention includes methods for manufacturing inductive devices and ceramic phase capacitors in or on photosensitive glass-ceramic structures for direct current (DC) electrical, microwave, radio frequency, and millimeter-wave applications. The glass-ceramic substrate can be a photosensitive glass substrate with numerous compositional variations, including but not limited to 60-76 wt% silica, at least 3 wt% K2O and 6-16 wt% K2O and Na2O combinations, 0.003-1 wt% of at least one oxide selected from the group consisting of Ag2O and Au2O, 0.003-2 wt% Cu2O, 0.75-7 wt% B2O3, and 6-7 wt% Al2O3 and B2O3 combinations, and Al2O3 not exceeding 13 wt%, 8-15 wt% Li2O, and 0.001-0.1 wt% CeO2. These and various other compositions are generally referred to as APEX® or photosensitive glass.

[0044] The exposed areas can be converted to a crystalline material by heating the glass substrate to a temperature close to its glass transition temperature. When etching the glass substrate with an etchant such as hydrofluoric acid, the glass is exposed to a flood lamp with broad-spectrum mid-ultraviolet light (approximately 308-312 nm) to provide a molded glass structure with an aspect ratio of at least 30:1, and when an inductive structure is fabricated, the anisotropic etching ratio of the exposed areas to the unexposed areas is at least 30:1. The exposure mask can be a halftone mask that provides a continuous grayscale for exposure to form a curved structure for fabricating the inductive structure / device. The halftone mask or grayscale allows control of the device structure by controlling the exposure intensity, and undercuts of the digital mask can also be used in flood exposure to generate the inductive structure / device. The exposed glass is then typically baked in a two-step process. To bond silver ions to silver nanoparticles, a temperature range of 420°C to 520°C for 10 minutes to 2 hours is used, and a temperature range of 520°C to 620°C for 10 minutes to 2 hours allows lithium oxide to form around the silver nanoparticles. The glass plate is then etched. The glass substrate is etched with an HF solution, typically 5 to 10 volume percent of the etchant, and the etching ratio of exposed areas to unexposed areas is at least 30:1 when exposed with broad-spectrum mid-ultraviolet floodlight, and greater than 30:1 when exposed with a laser, providing anisotropic etching to the molded glass structure.

[0045] Preferred ceramic phase capacitor structures are rectangular blind vias or other structures. Rectangular blind via structures provide sufficient energy (20 J / cm²) in 80% of the time required to fabricate through-hole vias. 2 The region is fabricated by exposure and then baked at 620°C for at least 10 minutes. The converted ceramic region is then etched with a 10% HF solution, leaving a thinned area of ​​photosensitive glass. The same mask defining the rectangular blind vias is then etched at 20 J / cm². 2It is used for 100% of the time. This creates a thin ceramic region of the photosensitive glass. Using the same rectangular mask, a photoresist pattern is created that exposes the thin ceramic region of the photosensitive glass. The exposed rectangular pattern is metallized with a nickel flash coating (<0.5 μm) from the sputtering system. The wafer is then placed in a photoresist stripper to remove the photoresist. The wafer is then rinsed with DI water and dried. The wafer is then placed in an electroless copper electroplating bath.

[0046] Ceramic capacitors can also be fabricated when the ceramic dielectric layer is perpendicular (orthogonal) to the substrate. Two rectangular patterns can be fabricated at 20 J / cm² in 100% of the time required for through-hole via fabrication. 2 It is exposed to light. One structure of the present invention is shown in Figures 1 and 2. Figure 1 is a top view of one embodiment of the capacitor 10 of the present invention, in which the capacitor 10 is shown on a photosensitive glass substrate 12, on which capacitor electrodes 14a and 14b are shown, in this case shown in an interdigitated state. Metal connections 16a and 16b are shown connecting the capacitor electrodes 14a and 14b, respectively, to separate electrical circuits (not shown). The ceramic phase 18 of the photosensitive glass substrate is shown between the capacitor electrodes 14a and 14b.

[0047] Figure 2 shows a side view of the capacitor 10 of the present invention, which includes capacitor electrodes 14a and 14b shown on a photosensitive glass substrate 12, in this case shown in an interdigitated state. Metal connections 16a and 16b are shown connecting the capacitor electrodes 14a and 14b, respectively, to separate electrical circuits (not shown). The ceramic phase 18 of the photosensitive glass substrate is shown between the capacitor electrodes 14a and 14b.

[0048] Figure 3 shows a top view of another embodiment of the capacitor 10 of the present invention, where the capacitor 20 is shown on a photosensitive glass substrate 22, with the upper capacitor electrode 24a shown thereon. Metal connections 26a and 26b are shown connecting the upper capacitor electrodes 24a and 24b (see Figure 4), respectively, and these are connected to separate electrical circuits.

[0049] Figure 4 is a side / cutaway view of the capacitor 20 of the present invention, in which the upper capacitor electrode 24a and the lower capacitor electrode 24b are shown on a photosensitive glass substrate 22. Metal connections 26a and 26b are shown connecting the capacitor electrodes 24a and 24b, respectively, to separate electrical circuits (not shown). The ceramic phase 28 of the photosensitive glass substrate is shown between the capacitor electrodes 24a and 24b.

[0050] The capacitor 20 shown in Figures 3 and 4 can be achieved by exposing two rectangular patterns. The two patterns are 20 μm wide and 20 μm long, separated by at least 15 μm. The photoresist is then removed using a standard photoresist stripper. The wafer is then placed in an oven and baked at 620°C for at least 10 minutes. The rectangular patterns are converted into the ceramic phase of the photosensitive glass. The two parallel rectangular patterns are then etched with 10% HF. The remaining glass phase of the photosensitive glass separating the two rectangular through-hole vias is etched at 20 J / cm² for 100% of the time required to fabricate the through-hole vias. 2 The wafer is exposed to light. The photosensitive wafer is then baked at 620°C for at least 10 minutes to convert the spacer region into a ceramic phase of photosensitive glass. The through-hole vias are then filled using a standard electroplating process.

[0051] Both or these capacitor structures are connected to the rest of the circuit or bonding pads via standard copper metallization using a 200 Å thick titanium seed layer with a sputtering metallization system or other thin-film deposition system. Copper metal is then deposited by electroless deposition. The copper and seed layers are patterned and etched using standard photoresist and copper etching processes.

[0052] Both of these, as well as other capacitor structures fabricated with the ceramic phase of photosensitive glass, exhibit significantly superior performance compared to glass phase capacitors. The dielectric constant is slightly reduced in the ceramic phase compared to the glass phase capacitor (see Figure 8). This can be compensated for by slightly altering the area or thickness of the ceramic phase capacitor structure. Nevertheless, the low dielectric loss tangent and temperature stability in ceramic phase capacitors offer significant performance advantages in RF electronics. Temperature stability is shown in Figures 5 and 6. Lower dielectric loss tangent enables better performance in battery life, signal-to-noise ratio, transmission power, and other critical system attributes. These enhanced performance attributes are a combination of material properties such as dielectric loss tangent, but also due to the precision of the manufacturing process. Precise manufacturing processes produce RF capacitors and inductors with tolerances better than + / - 5%.

[0053] Integrated inductor.

[0054] The glass substrate is then etched with an HF solution, typically at a concentration of 5 to 10 volumes per etchant. The fully integrated inductor lumped element device structure is fabricated as follows:

[0055] The process of fabricating an inductive device using the present invention shows a starting material that is photosensitive glass, which can be made into a wafer, preferably, for example, APEX (registered trademark) glass with a thickness of 1 mm, a surface roughness of 50 nm or less, a surface parallelism of 10% or less, and an RMS roughness of less than 200 Å (RMS roughness < 200 Å). In this example, the resistive section of the SiP and its manufacturing are shown. A pattern of through-hole vias with a diameter of 20 μm spaced 75 μm center to center is exposed. For the specific arrangement of the through-hole vias, refer to FIG. 10. Next, copper is electroplated to fill the vias. The excess copper can be removed and the surface flattened using a CMP process.

[0056] The copper-filled through-glass structure and the APEX (registered trademark) glass substrate are exposed using a second photomask having a pattern connecting the vias for the inductor. The ceramic vias are etched preferentially over the glass using a 10% HF solution. The wafer is then washed with DI water and spin-dried. The vias are filled by preferential electroless plating of copper within the vias. Then, the substrate and the excess copper plating are removed using a conventional CMP process. Refer to FIG. 10.

[0057] Next, the photosensitive glass wafer is exposed using a photomask to create a trench / rectangular pattern in the photosensitive glass. The photosensitive glass is exposed to radiation at 310 nm with an intensity of about 20 J / cm 2 and baked at 600 °C for 10 minutes in argon to convert the exposure pattern into the ceramic phase.

[0058] A photosensitive glass wafer with metallic connections between copper-filled through-hole vias. A pattern is exposed and developed according to a standard process to create a pattern on which a resistive layer can be deposited through a photoresist. The wafer is exposed to a light O2 plasma to remove any residual organic material in the pattern. Next, a thin film of nickel (300 Å) is deposited using a DC sputter metallization process. The photoresist is then removed using a standard photoresist stripper. The nickel pattern thin film is placed in an electroless copper plating bath and 10 μm of copper is plated onto the patterned nickel. The process of completing the inductor is achieved by placing the substrate in a 10% HF solution to remove the rectangular patterned ceramic phase. This inductor can be connected to the capacitor of the present invention.

[0059] Removing the glass / ceramic material identified as the material within the rectangular contour of the inductor allows the coil to stand on its own, thereby improving the inductor's quality factor or Q value.

[0060] Integrated resistor.

[0061] A photosensitive glass wafer with a resistor is first fabricated by creating a resistor of the desired dimensions using a standard lift-off process. The pattern is exposed and developed according to a standard process to create a pattern on which a resistive layer can be deposited through a photoresist. The wafer is exposed to a light O2 plasma to remove any residual organic material in the pattern. This is typically achieved with a forward power of 200 W at 0.1 mTorr per minute. Next, a metallization layer 18, such as tantalum, titanium, TiN, TiW, NiCr, or other similar media, is deposited. Typically, deposition is achieved by vacuum deposition. Vacuum deposition of the seed layer can be achieved by DC sputtering tantalum onto the glass substrate at a rate of 40 Å / min through the lift-off pattern. This integrated resistor can be connected to the capacitor of the present invention.

[0062] Integrated ceramic phase IPD performance.

[0063] This manufacturing precision, improved material properties, and temperature stability enable higher performance and lower losses in RF circuits. Images of different types of filters are shown in Figures 12-17. These images show bandpass and lowpass filters fabricated with ceramic phase capacitors. Figures 18-20 show layouts / designs of Doherty amplifiers, power dividers / combiners, and circulators using lumped elements that can be fabricated using the present invention. The performance combination of ceramic phase capacitor filters over filters with glass phase capacitors is shown in the filter in Figure 11. Although it may appear small due to scale, the enhancements provide a 3dB (27dB to 24dB) or 50% improvement in the Q factor of RF circuits / filters.

[0064] While the present invention and its advantages have been described in detail, it should be understood that various modifications, substitutions, and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims. In some cases, where desired circuit performance or material compatibility is available, the SiP may choose to use SMD versions of resistors, capacitors, or inductors rather than photosensitive glass-based devices. Using one or more SMD versions of these elements will result in parasitic noise in the SiP, requiring special attention in assembly and packaging. Furthermore, the scope of this patent application is not intended to be limited to specific embodiments of the processes, machines, manufactures, material compositions, means, methods, and steps described herein. As those skilled in the art will readily understand from the disclosure of the invention, existing or subsequently developed processes, machines, manufactures, material compositions, means, methods, or steps that perform substantially the same functions or achieve substantially the same results as the corresponding embodiments described herein can be utilized in accordance with the invention. Accordingly, the appended claims are intended to include within their scope such processes, machines, manufactures, material compositions, means, methods, or steps.

[0065] In one embodiment, the present invention includes a method for creating a ceramic phase capacitor in or on a photosensitive glass, which essentially comprises the steps of forming two or more capacitor electrodes of a ceramic phase capacitor on or in a photosensitive glass substrate, wherein a portion of the photosensitive glass substrate separates the two or more capacitor electrodes; exposing the portion of the photosensitive glass substrate separating the two or more capacitor electrodes to an activation energy source; heating the photosensitive glass substrate above its glass transition temperature for at least 10 minutes; cooling the photosensitive glass substrate to convert the exposed portion of the photosensitive glass substrate into a glass crystalline dielectric; and forming electrical connections to the two or more capacitor electrodes. In one embodiment, the method further includes the step of forming two or more capacitor electrodes in vias in the photosensitive glass substrate. In another embodiment, the method further includes the step of forming two or more capacitor electrodes on both sides of the photosensitive glass substrate. In yet another embodiment, the method further includes the step of forming a glass crystalline dielectric on a surface parallel to the photosensitive glass substrate, wherein the glass crystalline dielectric is in the ceramic phase. In another embodiment, the method further includes the step of connecting a ceramic phase capacitor to an isolator equipped with an integrated condensed element device in a system-in-package (SiP). In another embodiment, the method further includes the step of connecting a ceramic phase capacitor to a circulator equipped with an integrated condensed element device in a SiP. In another embodiment, the method further includes the step of connecting a ceramic phase capacitor to an RF filter equipped with an integrated condensed element device in a SiP. In another embodiment, the method further includes the step of connecting a ceramic phase capacitor to at least one of a low-pass filter, high-pass filter, notch filter, band-pass filter, or transformer equipped with an integrated condensed element device in a SiP. In another embodiment, the method further includes the step of connecting a ceramic phase capacitor to a power combiner or power splitter in or on a photosensitive glass substrate.In another embodiment, the method further includes connecting ceramic phase capacitors to one or more antennas, impedance matching elements, 50-ohm termination elements, integrated ground planes, RF shielding elements, electromagnetic interference shielding elements, RF combiners, RF splitters, transformers, switches, or diplexers.

[0066] In another embodiment, the present invention includes a ceramic phase capacitor device formed in or on a photosensitive glass substrate, which essentially comprises, or comprises, a first capacitor electrode formed in or on the photosensitive glass substrate, a glass crystalline dielectric formed in situ from the photosensitive glass substrate adjacent to the first capacitor electrode, and a second capacitor electrode formed in or on the photosensitive glass substrate adjacent to the glass crystalline dielectric and on the opposite side of the first electrode. In one embodiment, the first and second capacitor electrodes are formed in vias in the photosensitive glass substrate. In another embodiment, the first and second capacitor electrodes are formed on both sides of the photosensitive glass substrate. In another embodiment, the glass crystalline dielectric is formed on a surface parallel to the photosensitive glass substrate. In another embodiment, the device further includes a first metal connector connected to the first capacitor electrode and a second metal connector connected to the second capacitor electrode. In another embodiment, the ceramic phase capacitor is connected to an isolator with an integrated condenser device and is located in SiP. In another embodiment, the ceramic phase capacitor is connected to a circulator with an integrated condenser device and is located in SiP. In another embodiment, the ceramic phase capacitor is connected to an RF filter equipped with an integrated lumber device and is located within the SiP. In yet another embodiment, the ceramic phase capacitor is connected to at least one of a low-pass filter, high-pass filter, notch filter, band-pass filter, or transformer equipped with an integrated lumber device and is located within the SiP. In yet another embodiment, the ceramic phase capacitor is connected to a power combiner or power splitter located within or on a photosensitive glass substrate. In yet another embodiment, the ceramic phase capacitor is connected to one or more antennas, impedance matching elements, 50-ohm termination elements, integrated ground planes, RF shielding elements, electromagnetic interference shielding elements, RF combiners, RF splitters, transformers, switches, power splitters, power combiners, or diplexers.

[0067] In another embodiment, the present invention includes a method for creating a ceramic phase capacitor in or on a photosensitive glass, which essentially comprises the steps of forming two or more capacitor electrodes of a ceramic phase capacitor on or in a photosensitive glass substrate, wherein a portion of the photosensitive glass substrate separates the two or more capacitor electrodes; exposing the portion of the photosensitive glass substrate separating the two or more capacitor electrodes to an activation energy source; heating the photosensitive glass substrate above its glass transition temperature for at least 10 minutes; cooling the photosensitive glass substrate to convert the exposed portion of the photosensitive glass substrate into a glass crystalline dielectric; and forming electrical connections to the two or more capacitor electrodes. In one embodiment, the method further includes the step of forming two or more capacitor electrodes in vias in the photosensitive glass substrate. In another embodiment, the method further includes the step of forming two or more capacitor electrodes on both sides of the photosensitive glass substrate. In another embodiment, the method further includes the step of forming a glass crystalline dielectric on a surface parallel to the photosensitive glass substrate, wherein the glass crystalline dielectric is in the ceramic phase. In another embodiment, the method further includes the step of connecting a ceramic phase capacitor to an isolator equipped with an integrated condenser device in a SiP. In another embodiment, the method further includes the step of connecting a ceramic phase capacitor to a circulator equipped with an integrated condenser device in a SiP. In another embodiment, the method further includes the step of connecting a ceramic phase capacitor to an RF filter equipped with an integrated condenser device in a SiP. In another embodiment, the method further includes the step of connecting a capacitor to at least one of a low-pass filter, high-pass filter, notch filter, band-pass filter, or transformer equipped with an integrated condenser device in a SiP. In another embodiment, the method further includes the step of connecting a capacitor to a power combiner or power splitter in or on a photosensitive glass substrate.In another embodiment, the method further includes connecting capacitors to one or more antennas, impedance matching elements, 50-ohm termination elements, integrated ground planes, RF shielding elements, electromagnetic interference shielding elements, RF combiners, RF splitters, transformers, switches, power splitters, power combiners, or diplexers.

[0068] Any embodiment discussed herein can be implemented with respect to any method, kit, reagent, or composition of the present invention, and vice versa. Furthermore, the methods of the present invention can be achieved using the compositions of the present invention.

[0069] It will be understood that the specific embodiments described herein are presented as examples, not as limitations of the invention. The main features of the invention can be used in various embodiments without departing from the scope of the invention. Those skilled in the art will be able to recognize or confirm numerous equivalents to the specific procedures described herein by means of simple routine experimentation. Such equivalents are considered to be within the scope of the invention and are covered by the claims.

[0070] All publications and patent applications described herein represent the level of skill of those skilled in the art to which the present invention relates. All publications and patent applications are incorporated herein by reference to the same extent as each individual publication or patent application is specifically and individually indicated as being incorporated by reference.

[0071] The use of the words "a" or "an" in conjunction with the term "comprising" in the claims and / or specification may mean "one," which also coincides with the meanings of "one or more," "at least one," and "one or more than one." The use of the term "or" in the claims is used to mean "and / or" unless explicitly indicated to refer only to substitutes, or unless these substitutes are mutually exclusive, although this disclosure supports definitions that refer only to substitutes and "and / or." Throughout this application, the term "about" is used to indicate that a value includes the inherent error variation of the device used to determine that value, or the variation present between the subjects of study.

[0072] When used herein and in the claims, “comprising” (and any form of “comprising,” such as “comprise” and “comprises”), “having” (and any form of “having,” such as “have” and “has”), “including” (and any form of “including,” such as “includes” and “include”), or “containing” (and any form of “contains” and “contain”) are comprehensive, or open-ended, and do not exclude additional, undescribed elements or method steps. In any embodiment of the components and methods provided herein, “comprising” may be replaced with “consisting essentially of” or “consisting of.” When used herein, the phrase “consisting essentially of” requires that it does not substantially affect the specified integer or step, or the features or functions of the claimed invention. As used herein, the term “consisting” is used to indicate the existence of only the described integer (e.g., feature, element, characteristic, property, method / process step, or limitation) or group of integers (e.g., feature, element, characteristic, property, method / process step, or limitation).

[0073] As used herein, the term “or any combination thereof” refers to all permutations and combinations of the enumerated items preceding the term. For example, “A, B, C, or any combination thereof” is intended to include at least one of A, B, C, AB, AC, BC, or ABC, and also BA, CA, CB, CBA, BCA, ACB, BAC, or CAB, where the order is important in the particular context. Continuing in this example, combinations containing repetitions of one or more items or terms are explicitly included, such as BB, AAA, AB, BBC, AAABCCCC, CBBAAA, CABABB, etc. A person skilled in the art will understand that, unless otherwise evident from the context, there is generally no limit to the number of items or terms in any combination.

[0074] When used herein, approximate terms such as “about,” “substantial,” or “substantially” refer to a state that, when modified in this way, is understood not necessarily absolute or complete, but which would be considered to be close enough to a person skilled in the art to guarantee that the state exists. The degree to which the description may vary will depend on how large the change is, yet still enough to cause a person skilled in the art to recognize the modified feature as still possessing the required characteristics and capabilities of the unmodified feature. Generally, however, subject to the preceding discussion, numerical values ​​in this specification modified by approximate terms such as “about” may vary by at least ±1, 2, 3, 4, 5, 6, 7, 10, 12, or 15% from the stated value.

[0075] All of the structures and / or methods disclosed and claimed herein can be fabricated and performed without undue experimentation in light of this disclosure. While the structures and methods of the present invention have been described in terms of preferred embodiments, it will be apparent to those skilled in the art that modifications can be applied to the structures and / or methods described herein, and to the steps or sequences of steps of the methods, without departing from the concept, spirit and scope of the invention. All such similar alternatives and modifications that are apparent to those skilled in the art are deemed to be within the spirit, scope and concept of the invention as defined by the appended claims.

Claims

1. A method for creating a ceramic phase capacitor in or on a photosensitive glass, A step of forming two or more capacitor electrodes of a ceramic phase capacitor on both sides of a photosensitive glass substrate and within vias in the photosensitive glass substrate, wherein a portion of the photosensitive glass substrate separates the two or more capacitor electrodes, The steps include: exposing a portion of the photosensitive glass substrate separating the two or more capacitor electrodes to an activation energy source; The steps include heating the photosensitive glass substrate above its glass transition temperature for at least 10 minutes, The steps include: cooling the photosensitive glass substrate to convert the exposed portion of the photosensitive glass substrate into a glass crystalline dielectric; The steps include forming an electrical connection to the two or more capacitor electrodes, The method, including the method described above.

2. The method according to claim 1, further comprising the step of forming the glass crystalline dielectric on a surface parallel to the photosensitive glass substrate, wherein the glass crystalline dielectric is in a ceramic phase.

3. The method according to claim 1, further comprising the step of connecting the ceramic phase capacitor to an isolator or circulator having an integrated condensed element device in a system-in-package (SiP).

4. The method according to claim 1, further comprising the step of connecting the ceramic phase capacitor to an RF filter having an integrated condensed element device in SiP.

5. The method according to claim 1, further comprising the step of connecting the ceramic phase capacitor to at least one of a low-pass filter, high-pass filter, notch filter, band-pass filter, or transformer having an integrated condensed element device in SiP.

6. The method according to claim 1, further comprising the step of connecting the ceramic phase capacitor to a power combiner or power splitter in or on the photosensitive glass substrate.

7. The method according to claim 1, further comprising the step of connecting the ceramic phase capacitor to one or more antennas, impedance matching elements, 50-ohm termination elements, integrated ground planes, RF shielding elements, electromagnetic interference shielding elements, RF combiners, RF splitters, transformers, switches, or diplexers.

8. A ceramic phase capacitor device formed in or on a photosensitive glass substrate, A first capacitor electrode formed within a via in the photosensitive glass substrate and on the first surface of the photosensitive glass substrate, A glass crystalline dielectric formed in situ from the photosensitive glass substrate adjacent to the first capacitor electrode, A second capacitor electrode formed in a via within the photosensitive glass substrate or on the photosensitive substrate adjacent to the glass crystalline dielectric, and on the second surface opposite to the first electrode, The ceramic phase capacitor device, including the aforementioned ceramic phase capacitor device.

9. The device according to claim 8, wherein the glass crystalline dielectric is formed on a surface parallel to the photosensitive glass substrate.

10. The device according to claim 8, further comprising a first metal connector connected to the first capacitor electrode and a second metal connector connected to the second capacitor electrode.

11. The device according to claim 8, wherein the ceramic phase capacitor is connected to an isolator or circulator equipped with an integrated condensed element device and is located in a system-in-package (SiP).

12. The device according to claim 8, wherein the ceramic phase capacitor is connected to an RF filter equipped with an integrated centrifugal element device and is located within SiP.

13. The device according to claim 8, wherein the ceramic phase capacitor is connected to at least one of a low-pass filter, high-pass filter, notch filter, band-pass filter, or transformer, which is an integrated condensed element device, and is located within the SiP.

14. The device according to claim 8, wherein the ceramic phase capacitor is connected to a power combiner or power splitter in or on the photosensitive glass substrate.

15. The device according to claim 8, wherein the ceramic phase capacitor is connected to one or more antennas, impedance matching elements, 50-ohm termination elements, integrated ground planes, RF shielding elements, electromagnetic interference shielding elements, RF combiners, RF splitters, transformers, switches, power splitters, power combiners, or diplexers.

Images