Inverter circuit and control circuit

Abstract

To provide an inverter circuit and a control circuit which reduce an operation of turning off a Hi-side switching element.SOLUTION: An inverter circuit 1 includes an inverter unit 10, a first power source 21, a second power source 22, a first capacitor 41, and a second capacitor 42. The first power source 21 supplies a first voltage V1 to the inverter unit 10. The second power source 22 supplies a second voltage V2 to a changeover switch 50 and supplies the second voltage V2 to the second capacitor 42 via the changeover switch 50, thereby discharging the second capacitor 42. The first capacitor 41 supplies a voltage (V2-Vf91) obtained through discharging to the inverter unit 10. The second capacitor 42 supplies a voltage (V1-Vf93+V2) obtained through discharging of the second capacitor 42 to the first capacitor 41. The changeover switch 50 switches between charging and discharging of the second capacitor 42.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to an inverter circuit and a control circuit.

Background Art

[0002] An inverter circuit provided with a bootstrap circuit can refer to, for example, the technology disclosed in Patent Document 1. The inverter circuit disclosed in Patent Document 1 is configured such that a boost capacitor is charged and discharged based on a voltage supplied from an auxiliary DC power supply provided with the auxiliary DC power supply, and a Hi-side switching element is boosted. The inverter circuit is provided with a switching switch for switching the conduction between the auxiliary DC power supply, the Hi-side switching element, and the Low-side switching element. One terminal side of the switching switch is connected to the auxiliary DC power supply, and the other terminal side is connected to the high-voltage power supply side.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] Incidentally, when attempting to drive a low-frequency motor using an inverter circuit equipped with a bootstrap circuit, the time the Hi-side switching element is on becomes longer, which can cause the bootstrap capacitor to discharge excessively and malfunction. For this reason, it is generally necessary to detect a drop in the discharge voltage of the bootstrap capacitor and, in order to recharge the bootstrap capacitor, to temporarily turn off the Hi-side switching element by turning off the Hi-side switching element and turning on the Low-side switching element. However, performing such an operation to turn off the Hi-side switching element can result in the motor not driving smoothly, leading to problems with behavior and the generation of abnormal noises.

[0005] This invention has been made in view of these circumstances, and aims to provide an inverter circuit and a control circuit that can reduce the operation of turning off the Hi-side switching element. [Means for solving the problem]

[0006] To achieve the above objective, the inverter circuit according to the present invention comprises an inverter section, a first power supply, a second power supply, a first capacitor, a second capacitor, and a changeover switch. The inverter section has a Hi-side switching element and a Low-side switching element. The first power supply supplies a first voltage to the inverter section, the second power supply supplies a second voltage to the changeover switch, the first capacitor supplies a drive voltage to drive the inverter section, the second capacitor supplies voltage to the first capacitor, and the changeover switch switches between charging and discharging the second capacitor by switching it on and off.

[0007] According to the present invention, the inverter section has a Hi-side switching element and a Low-side switching element, the first power supply supplies a first voltage to the inverter section, the second power supply supplies a second voltage to the changeover switch, the first capacitor supplies a drive voltage to drive the inverter section, the second capacitor supplies voltage to the first capacitor, and the changeover switch switches between charging and discharging the second capacitor by switching it on and off, thereby enabling the second capacitor to charge the first capacitor in a top-up manner, and reducing the operation of turning off the Hi-side switching element.

[0008] The second capacitor repeatedly discharges and charges alternately, supplying voltage to the first capacitor through discharge. This allows the second capacitor to charge the first capacitor in a way that replenishes the voltage supplied by discharge while the first capacitor is supplying voltage to the inverter section through discharge.

[0009] The charging of the second capacitor is performed based on the first voltage while the Hi-side switching element is ON, enabling coordinated charging and discharging with the first capacitor, which is charged and discharged based on the first voltage.

[0010] The discharge of the second capacitor occurs based on the second voltage while the changeover switch is ON, allowing the second capacitor to charge by supplementing the first capacitor while maintaining a voltage through discharge, even without a voltage supply from the first power supply.

[0011] Since the second voltage is relatively lower than the first voltage, a relatively lower voltage is supplied to the changeover switch that switches between charging and discharging the second capacitor, preventing the changeover switch from having a high voltage rating and also reducing switching noise.

[0012] In other words, changeover switches often operate at high frequencies, which can generate significant noise. However, in inverter circuits requiring high voltage, such as those used in EV (electric vehicle) motors, the changeover switches need to withstand higher voltages, and their operating frequencies become even higher, resulting in a problem where switching noise increases even further. Because the changeover switch is not directly connected to the first power supply, a relatively low voltage can be supplied to the changeover switch, preventing the changeover switch from having a high voltage rating and reducing switching noise.

[0013] In other words, by connecting the changeover switch and the first power supply via at least a second capacitor, the changeover switch can be supplied with a relatively lower voltage, such as the first voltage of the first power supply being relatively high after charging by the second capacitor. This prevents the changeover switch from having a high voltage rating, reduces switching noise, and enables coordinated charging and discharging between the first and second capacitors.

[0014] To achieve the above objective, the control circuit according to the present invention is characterized by comprising at least the above-mentioned changeover switch. [Effects of the Invention]

[0015] According to the present invention, the operation of turning off the Hi-side switching element can be reduced. [Brief explanation of the drawing]

[0016] [Figure 1] This is a circuit diagram showing the configuration of the inverter circuit of the present invention. [Figure 2] This is a circuit diagram showing the detailed configuration of the changeover switch in the inverter circuit. [Figure 3]A timing chart for explaining the operation of the inverter circuit and diagrams showing the voltages of the capacitors. (a) is a timing chart for explaining the operation of the Hi-side switching element, (b) is a timing chart for explaining the operation of the Low-side switching element, (c) is a timing chart for explaining the operation of the switching switch, (d) is a timing chart for explaining the operation of CLK, (e) is a diagram showing the voltage across the first capacitor, (f) is a diagram showing the voltage across the second capacitor, and (g) is a diagram showing the voltage at the upper end of the second capacitor. [Figure 4] A circuit diagram showing a state in the inverter circuit where the Hi-side switching element is on, the Low-side switching element is off, and the switching switch is off. [Figure 5] A circuit diagram showing the details of the state of the switching switch in FIG. 4. [Figure 6] A circuit diagram showing a state in the inverter circuit where the Hi-side switching element is on, the Low-side switching element is off, and the switching switch is on. [Figure 7] A circuit diagram showing the details of the state of the switching switch in FIG. 6. [Figure 8] A circuit diagram showing a state in the inverter circuit where the Hi-side switching element is off, the Low-side switching element is on, and the switching switch is on. [Figure 9] A diagram showing a modified example of the present invention.

Embodiments for Carrying Out the Invention

[0017] Embodiments of the present invention will be described in detail with reference to the drawings. Figure 1 is a circuit diagram showing the configuration of the inverter circuit of the present invention, Figure 2 is a circuit diagram showing the details of the configuration of the changeover switch in the inverter circuit, Figure 3 is a timing chart and a diagram showing the voltage of a capacitor to explain the operation of the inverter circuit, Figure 4 is a circuit diagram showing the state in which the Hi-side switching element is ON, the Low-side switching element is OFF, and the changeover switch is OFF in the inverter circuit, Figure 5 is a circuit diagram showing the details of the state of the changeover switch in Figure 4, Figure 6 is a circuit diagram showing the state in which the Hi-side switching element is ON, the Low-side switching element is OFF, and the changeover switch is ON in the inverter circuit, Figure 7 is a circuit diagram showing the details of the state of the changeover switch in Figure 6, and Figure 8 is a circuit diagram showing the state in which the Hi-side switching element is OFF, the Low-side switching element is ON, and the changeover switch is ON in the inverter circuit.

[0018] Referring to FIG. 1, the outline of the configuration of the inverter circuit 1 of the present invention will be described. The inverter circuit 1 includes an inverter section 10, a first power supply 21, a second power supply 22, a first capacitor 41, a second capacitor 42, and a switching switch 50. The first power supply 21 supplies a first voltage V1 to the inverter section 10. The second power supply 22 supplies a second voltage V2 to the switching switch 50 and supplies the second voltage V2 to the second capacitor 42 via the switching switch 50 to discharge the second capacitor 42. The first capacitor 41 supplies a voltage (V2 - Vf91) due to discharge as a driving voltage for driving the inverter section 10. The second capacitor 42 supplies a voltage (V1 - Vf93 + V2) due to discharge of the second capacitor 42 to the first capacitor 41. The first capacitor 41 discharges while charging by the voltage (V1 - Vf93 + V2) due to discharge of the second capacitor 42. The switching switch 50 switches the charging and discharging of the second capacitor 42 by turning on and off. The second voltage V2 from the second power supply 22 is configured to be a relatively lower voltage than the first voltage V1 from the first power supply 21. In the present embodiment, the inverter section 10, the second power supply 22, and the first capacitor 41 constitute a bootstrap circuit, and the first power supply 21, the second capacitor 42, and the switching switch 50 constitute a charge pump.

[0019] The inverter section 10 has a Hi-side switching element 11 and a Low-side switching element 12. The inverter section 10 has a drive circuit 30. The drive circuit 30 has a Hi-side drive circuit 31 for driving the Hi-side switching element 11 and a Low-side drive circuit 32 for driving the Low-side switching element 12. The Hi-side drive circuit 31 and the Low-side drive circuit 32 can output a drive voltage for turning on the Hi-side switching element 11 and the Low-side switching element 12.

[0020] The inverter circuit 1 has a pulse generator 70, which can output pulsed control signals 70A, 70B, and 70C to the Hi-side drive circuit 31, the Low-side drive circuit 32, and the changeover switch 50 (the pulse generator 70 can be configured as, for example, a microcontroller, and can output pulsed control signals 70A, 70B, and 70C of 0V-5V). The inverter circuit 1 is also configured to supply the current output from the inverter section 10 to the load 60 via the inductance 80.

[0021] The inverter circuit 1 is configured by electrically connecting a Hi-side switching element 11, a Low-side switching element 12, a first power supply 21, a second power supply 22, a Hi-side drive circuit 31, a Low-side drive circuit 32, a first capacitor 41, a second capacitor 42, a changeover switch 50, a pulse generator 70, and an inductance 80 via connection lines L1 to L21. The inverter circuit 1 also has a control circuit 1A, which includes a Hi-side drive circuit 31, a Low-side drive circuit 32, a changeover switch 50, a pulse generator 70, a level shift circuit 71, a flip-flop 72, and a voltage detector 73.

[0022] In other words, connection line L1 connects the first power supply 21 and the Hi-side switching element 11. The Hi-side switching element 11 is composed of an N-channel MOSFET, and connection line L1 connects the first power supply 21 and the drain electrode 11d of the Hi-side switching element 11.

[0023] The connection line L2 connects the Hi-side switching element 11 and the Low-side switching element 12 in series. The Low-side switching element 12 is composed of an N-channel MOSFET, and the connection line L2 connects the source electrode 11s of the Hi-side switching element 11 to the drain electrode 12d of the Low-side switching element 12.

[0024] The connection line L3 connects the source electrode 12s of the low-side switching element 12 to ground G1.

[0025] The connection line L4 connects the midpoint L2A between the source electrode 11s of the Hi-side switching element 11 and the drain electrode 12d of the Low-side switching element 12 in the connection line L2, and the inductance 80.

[0026] The connection line L5 connects the midpoint L4A of the connection line L4, that is, the midpoint L4A between the midpoint L2A of the connection line L2 and the inductance 80, and one end 41a of the first capacitor 41.

[0027] The connection line L6 connects the other end 41b of the first capacitor 41 to the second power supply 22. A first diode 91 is provided in the connection line L6, and the first diode 91 can prevent the current based on the first voltage V1 of the first power supply 21 from flowing back into the second power supply 22 via the connection lines L1, L2 (connection line L2 from the Hi-side switching element 11 to the midpoint L2A), L4 (connection line L4 from the midpoint L2A to the midpoint L4A), L5 and the first capacitor 41 (let the voltage drop across the first diode 91 be Vf91).

[0028] The connection line L7 connects the midpoint L6A between the other end 41b of the first capacitor 41 in the connection line L6 and the second power supply 22, and the Hi-side drive circuit 31.

[0029] The connection line L8 connects the Hi-side drive circuit 31 to the gate electrode 11g of the Hi-side switching element 11.

[0030] Connection line L9 connects the Hi-side drive circuit 31 to the midpoint L2A in connection line L2.

[0031] The connection line L10 connects the second power supply 22 and the low-side drive circuit 32.

[0032] The connection line L11 connects the low-side drive circuit 32 to the gate electrode 12g of the low-side switching element 12.

[0033] The connection line L12 connects the Low-side drive circuit 32 to the midpoint L3A between the source electrode 12s of the Low-side switching element 12 and ground G1 in the connection line L3.

[0034] The connection line L13 connects the intermediate point L6B between the second power supply 22 and the intermediate point L6A in the connection line L6, and the changeover switch 50. As shown in Figure 2, the changeover switch 50 is composed of a half-bridge inverter circuit (CMOS), with a P-channel MOSFET 51 as a Hi-side switching element and an N-channel MOSFET 52 as a Low-side switching element connected in series. In other words, when the input side of the changeover switch 50 is Hi, the output side becomes Low, and when the input side is Low, the output side becomes Hi. The connection line L13 connects the intermediate point L6B to the source electrode 51s of the P-channel MOSFET 51 in the changeover switch 50.

[0035] The connection line L14 connects the drain electrode 51d of the P-channel MOSFET 51 and the drain electrode 52d of the N-channel MOSFET 52 in series at the changeover switch 50.

[0036] The connection line L15 connects the source electrode 52s of the N-channel MOSFET 52 to ground G2 in the changeover switch 50.

[0037] The connection line 16 connects the midpoint L14A between the drain electrode 51d of the P-channel MOSFET 51 and the drain electrode 52d of the N-channel MOSFET 52 in the connection line L14, and one end 42a of the second capacitor 42.

[0038] The connection line L17 connects the other end 42b of the second capacitor 42 to the midpoint L6C between the midpoint L6A and midpoint L6B on the connection line L6. The connection line L17 is provided with a second diode 92 (the voltage drop across the second diode 92 is Vf92), and the second diode 92 has the function of rectifying the current based on the voltage (V1-Vf93+V2) due to the discharge of the second capacitor 42 so that the current based on the voltage (V1-Vf93+V2) due to the discharge of the second capacitor 42 flows to the first capacitor 41 (the second diode 92 can also prevent the current based on the voltage (V2-Vf91) due to the discharge of the first capacitor 41 from flowing back into the second capacitor 42).

[0039] The connection line L18 connects the midpoint L17A between the other end 42b of the second capacitor 42 in the connection line L17 and the midpoint L6C, and the midpoint L4B between the midpoint L4A in the connection line L4 and the inductance 80. The connection line L18 is provided with a third diode 93 (the voltage drop across the third diode 93 is Vf93), and the third diode 93 can prevent the current based on the voltage (V1-Vf93+V2) due to the discharge of the second capacitor 42 from flowing back into the connection line L4.

[0040] The connection line L19 connects the pulse generator 70 and the Hi-side drive circuit 31 via the level shift circuit 71, the flip-flop 72, and the voltage detector 73.

[0041] Connection line L20 connects the pulse generator 70 and the low-side drive circuit 32.

[0042] Connection line L21 connects the pulse generator 70 and the changeover switch 50. More specifically, connection line L21 connects the pulse generator 70 to the gate electrode 51g of the P-channel MOSFET 51 and the gate voltage 52g of the N-channel MOSFET 52 in the changeover switch 50.

[0043] The inverter circuit 1 of the present invention, configured in this way, can be operated as shown in Figures 3 to 8. In Figures 4 to 8, the flow of current is indicated by dotted arrows, with Figure 4 being the circuit diagram corresponding to time T2 in Figure 3, Figure 6 being the circuit diagram corresponding to time T1 in Figure 3, and Figure 8 being the circuit diagram corresponding to time T3 in Figure 3.

[0044] As shown in Figures 3(a), (b), and (c), first, the pulse generator 70 generates pulse-shaped control signals 70A, 70B, and 70C.

[0045] Specifically, as shown in Figure 4, control signal 70A is output to the Hi-side drive circuit 31 via connection line L19, control signal 70B is output to the Low-side drive circuit 32 via connection line L20, and control signal 70C is output to the changeover switch 50 via connection line L21.

[0046] In other words, the Hi-side drive circuit 31 receives a control signal 70A via the connection line L19. Furthermore, the Hi-side drive circuit 31 receives the voltage (V2-Vf91) due to the discharge of the first capacitor 41 as a drive voltage via the connection lines L6 (the connection line L6 from the other end 41b of the first capacitor 41 to the midpoint L6A) and L7. As a result, the gate voltage (V1+V2-Vf91) is output from the Hi-side drive circuit 31 to the gate electrode 11g of the Hi-side switching element 11 via the connection line L8.

[0047] The output of this gate voltage (V1 + V2 - Vf91) turns on the Hi-side switching element 11, and a current based on the first voltage V1 of the first power supply 21 flows between the source electrode 11s and the drain electrode 11d.

[0048] When the Hi-side drive circuit 31 receives a control signal 70A, the Low-side switching element 32 is turned off. This allows the current flowing between the source electrode 11s and the drain electrode 11d to be supplied to the load 60 via the connection line L2 (the connection line L2 from the source electrode 11s of the Hi-side switching element 11 to the midpoint L2A), the connection line L4, and the inductance 80.

[0049] Furthermore, when the Hi-side drive circuit 31 receives the control signal 70A, the control signal 70C is intermittently output to the changeover switch 50 via the connection line L21, causing the changeover switch 50 to repeatedly switch on and off alternately.

[0050] As a result, the second capacitor 42 can supply the first capacitor 41 with the voltage (V1-Vf93+V2) due to its discharge, by discharging while the first capacitor 41 is supplying the voltage (V2-Vf91) due to its discharge to the inverter unit 10, by repeatedly discharging and charging.

[0051] More specifically, when the first capacitor 41 supplies a discharge voltage (V2-Vf91) as a drive voltage to the Hi-side drive circuit 11 of the inverter unit 10, turning on the Hi-side switching element 11, and the changeover switch 50 is not receiving a control signal 70C (when the input side of the changeover switch is Low), the state is t2 in Figure 3, and as shown in Figure 5, the P-channel MOSFET 51 of the changeover switch 50 turns on, the N-channel MOSFET 52 turns off, and the output side of the changeover switch 50 becomes Hi. As a result, as shown in Figure 4, a circuit is formed connecting the second power supply 22, connection line L6 (connection line L6 from the second power supply 22 to the midpoint L6B), connection line L13, changeover switch 50, connection line L16, second capacitor 42, connection line L17, and connection line L6 (connection line L6 from the midpoint L6C to the other end 41b of the first capacitor 41). As shown in Figures 3(d), (e), (f), and (g), the discharge of the second capacitor 42 is performed based on the second voltage (V1-Vf93+V2) while the Hi-side switching element 11 is ON and the changeover switch 50 is ON, and the voltage (V1-Vf93+V2) due to the discharge of the second capacitor 42 is supplied to the first capacitor 41 (in this state, the third diode 93 acts to prevent the reverse flow of current based on the voltage (V1-Vf93+V2) due to the discharge of the second capacitor 42 to the connection line L4). This allows the first capacitor 41 to be charged and discharged simultaneously (when the changeover switch 50 is ON, the input side of the changeover switch 50 is Low and the output side is High).

[0052] On the other hand, when the first capacitor 41 supplies a discharge voltage (V2-Vf91) as a drive voltage to the Hi-side drive circuit 11 of the inverter unit 10, turning on the Hi-side switching element 11, and the changeover switch 50 is receiving a control signal 70C (when the input side of the changeover switch is Hi), the state is t1 in Figure 3, and the state is as shown in Figures 6 and 7.

[0053] In other words, as shown in Figure 7, the P-channel MOSFET 51 of the changeover switch 50 turns off and the N-channel MOSFET 52 turns on, causing the output side of the changeover switch 50 to go low. As a result, as shown in Figure 6, an electrical circuit is formed connecting the first power supply 21, connection line L1, Hi-side switching element 11, connection line L2 (connection line L2 from the Hi-side switching element 11 to the midpoint L2A), connection line L4, connection line L18, connection line L17 (connection line L17 from the midpoint L17A to the second capacitor 42), second capacitor 42, connection line L16, changeover switch 50, connection line L15, and ground G2, and the second capacitor 42 is charged as shown in Figures 3(d), (e), (f), and (g). In other words, the charging of the second capacitor 42 is performed based on the first voltage V1 from the first power supply 21 while the Hi-side switching element 11 is ON and the changeover switch 50 is OFF (when the changeover switch 50 is OFF, the input side of the changeover switch 50 is Hi and the output side is Low). The changeover switch 50 is not directly connected to the first power supply 21. More specifically, the changeover switch 50 and the first power supply 21 are connected to the first power supply 21 via the second capacitor 42, and the voltage after charging by the second capacitor 42 based on the first voltage V1 from the first power supply 21 is supplied to the changeover switch 50.

[0054] The input of the control signal 70A from the pulse generator 70 to the Hi-side drive circuit 31 is via the level shift circuit 71, the flip-flop 72, and the voltage detector 73. Specifically, when the voltage detector 73 detects that the voltage (V2-Vf91) due to the discharge of the first capacitor 41 is above a predetermined value, the discharge voltage 41V is sufficient to charge the gate electrode 11g of the Hi-side switching element 11, and the control signal 70A from the pulse generator 70 is set by the flip-flop 72 and sent to the Hi-side drive circuit 31. On the other hand, when the voltage detector 73 detects that the voltage (V2-Vf91) due to the discharge of the first capacitor 41 is below a predetermined value, the discharge voltage (V2-Vf91) is insufficient to charge the gate electrode 11g of the Hi-side switching element 11, and the control signal 70A from the pulse generator 70 is reset by the flip-flop 72 and not transmitted to the Hi-side drive circuit 31.

[0055] Furthermore, the Low-side drive circuit 32 receives a control signal 70B via the connection line L20. In addition, the Low-side drive circuit 32 receives the second voltage V2 of the second power supply 22 via the connection line L10. As a result, the gate voltage (V2) is output from the Low-side drive circuit 32 to the gate electrode 12g of the Low-side switching element 12 via the connection line L11. This output of gate voltage (V2) turns on the Low-side switching element 12, making the drain electrode 12d and the source electrode 12s conductive.

[0056] When the Low-side drive circuit 32 receives the control signal 70B, the Hi-side switching element 31 is turned off (state t3 in Figure 3). As a result, as shown in Figure 8, an electrical circuit is formed connecting the second power supply 22, connection line L6, first capacitor 41, connection line L5, connection line L4 (connection line L4 from midpoint L4A to midpoint L2A), connection line L2 (connection line L2 from midpoint L2A to Low-side switching element 12), connection line L3, and ground G1, and the first capacitor 41 is charged as shown in Figure 3(e).

[0057] When the Low-side drive circuit 32 receives the control signal 70B, the changeover switch 50 continues to receive the control signal 70C, resulting in a state where the input side is Hi and the output side is Low, with the P-channel MOSFET 51 being OFF and the N-channel MOSFET being ON. In this state, the Hi-side switching element 11 is OFF, so the second capacitor 42 is not charged (the third diode also prevents reverse current flow to the connection line L4 based on the voltage (V1-Vf93+V2) due to the discharge of the second capacitor 42).

[0058] As described above, according to the inverter circuit 1 of the present invention, the first power supply 21 supplies a first voltage V1 to the inverter unit 10, the second power supply 22 supplies a second voltage V2 to the changeover switch 50, the first capacitor 41 supplies a drive voltage to drive the inverter unit 10, the second capacitor 42 supplies a voltage (V1 - Vf93 + V2) to the first capacitor 41, and the changeover switch 50 switches the charging and discharging of the second capacitor 42 by switching it on and off, so that the second capacitor 42 can charge the first capacitor 41 in a top-up manner, and the operation of turning off the Hi-side switching element 11 can be reduced.

[0059] Furthermore, the second capacitor 42 repeatedly discharges and charges alternately, supplying a voltage (V1-Vf93+V2) to the first capacitor 41 through discharge. This allows the second capacitor 42 to charge the first capacitor 41 while maintaining a discharge voltage (V1-Vf93+V2) while the first capacitor 41 is supplying a discharge voltage (V2-Vf91) to the inverter unit 10.

[0060] Furthermore, the charging of the second capacitor 42 is performed based on the first voltage V1 during the time when the Hi-side switching element 11 is ON, enabling coordinated charging and discharging with the first capacitor 41, which is charged and discharged based on the first voltage V1.

[0061] Furthermore, the discharge of the second capacitor 42 is performed based on the second voltage V2 during the time the changeover switch 50 is ON. This allows the second capacitor 42 to be charged by topping up the first capacitor 41 while ensuring a voltage (V1 - Vf93 + V2) due to discharge, even without a voltage V1 supplied from the first power supply 21. This topping-up charging capability can be adjusted by changing the performance and capabilities of the changeover switch 50, such as the switching speed (switching frequency). Furthermore, because the second voltage V2 is relatively lower than the first voltage V1, a relatively lower voltage is supplied to the changeover switch 50 that switches between charging and discharging the second capacitor 42, thereby preventing the changeover switch 50 from having a high voltage rating and reducing switching noise. In other words, the changeover switch 50 often operates at high frequencies, which can generate significant noise. However, in inverter circuits 1 that require high voltage, such as those for EV (electric vehicle) motors, the changeover switch 50 needs to withstand higher voltages, and its frequency becomes even higher, resulting in a problem where switching noise also increases.

[0062] Furthermore, since the changeover switch 50 is not directly connected to the first power supply 21, a relatively low voltage can be supplied to the changeover switch 50, preventing the changeover switch 50 from having a high voltage rating and reducing switching noise.

[0063] In other words, by connecting the changeover switch 50 and the first power supply 21 via at least the second capacitor 42, the changeover switch 50 can be supplied with a relatively low voltage, such as the first voltage V1 of the first power supply 21 being supplied after charging by the second capacitor 42. This prevents the changeover switch 50 from having a high voltage rating, reduces switching noise, and enables the charging and discharging of the first capacitor 41 and the second capacitor 42 to be coordinated (although the changeover switch 50 and the first power supply 21 are connected via the second capacitor 42, the third diode 93, and the Hi-side switch 11, the above effects can be achieved by connecting them via at least the second capacitor 42).

[0064] It should be noted that the present invention is not limited to the embodiments described above, and various modifications and applications are possible without changing the essence of the invention.

[0065] For example, in the embodiment described above, the inverter unit 10 includes a Hi-side switching element 11 and a Low-side switching element 12, and supplies the voltage (V2-Vf91) generated by the discharge of the first capacitor 41 to the Hi-side drive circuit 31 of the Hi-side switching element 11. However, for example, the inverter unit 10 may be configured with other switching elements, and the voltage (V2-Vf91) generated by the discharge of the first capacitor 41 may be supplied to the inverter unit 10. In other words, as long as the first capacitor 41 is configured to simply supply the voltage (V2-Vf91) generated by its discharge as a drive voltage to the inverter unit 10, various modifications and applications of the inverter unit 10 can be included.

[0066] Furthermore, while the changeover switch 50 is intended to be a half-bridge inverter circuit having a P-channel MOSFET 51 and an N-channel MOSFET 52, it is not limited to this configuration and can include various types of switches as long as they switch the charging and discharging of the second capacitor 42 by switching it on and off.

[0067] Furthermore, as shown in Figure 9, a resistor 95 may be provided between the midpoint L17A and the second capacitor 42. This allows the current value of the second capacitor 41 to be adjusted.

[0068] Furthermore, in the above-described embodiment, the control circuit 1A includes a Hi-side drive circuit 31, a Low-side drive circuit 32, a changeover switch 50, a pulse generator 70, a level shift circuit 71, a flip-flop 72, and a voltage detector 73. However, it is also possible to include only the changeover switch 50 and provide the Hi-side drive circuit 31, Low-side drive circuit 32, pulse generator 70, level shift circuit 71, flip-flop 72, and voltage detector 73 on the main body side of the inverter circuit 1. In other words, the control circuit 1A can achieve the desired effect by including at least the changeover switch 50. Furthermore, in the embodiments described above, the second voltage V2 of the second power supply 22 is set to be relatively lower than the first voltage V1 of the first power supply 21. However, even if the first voltage V1 of the first power supply 21 is set to be relatively lower than the second voltage V2 of the second power supply 22, the invention will not depart from its spirit. [Explanation of Symbols]

[0069] G1, G2: Grand L1 to L21: Connection lines L2A,L3A,L4A,L4B,L6A,L6B,L6C,L14A,L17A: Intermediate point T1, T2, T3: Time t1~t19: Time V1: Voltage of the first power supply V2: Voltage of the second power supply Vf91: Voltage drop across the first diode Vf92: Voltage drop across the second diode Vf93: Voltage drop across the third diode 1: Inverter circuit 1A: Control circuit 10: Inverter section 11: Hi-side switching element 11g: Grid gate 11s: Source electrode 11d: Drain electrode 12: Low-side switching element 12g: Grid gate 12s: Source electrode 12d: Drain electrode 21: 1st power supply 22:Second power supply 30: Drive circuit 31::Hi-side drive circuit 32: Low-side drive circuit 41: First capacitor 41a: one end 41b: Other end 42: Second capacitor 42a: one end 42b: Other end 50: Changeover switch 51: P-channel MOSFET 51g: Grid gate 51s: Source electrode 51d: Drain electrode 52: N-channel MOSFET 52g: Grid gate 52d: Drain electrode 52s: Source electrode 60: Load 70: Pulse generator 70A, 70B, 70C: Control signals 71: Level shift circuit 72: Flip-flops 73: Voltage detector 80: Inductance 91: First diode 92: Second diode 93: Third diode 95: Resistor

Claims

1. It comprises an inverter section, a first power supply, a second power supply, a first capacitor, a second capacitor, and a changeover switch. The inverter section has a Hi-side switching element and a Low-side switching element. The first power supply provides a first voltage to the inverter section. The second power supply provides a second voltage to the changeover switch. The first capacitor supplies a drive voltage to drive the Hi-side switching element. The second capacitor supplies voltage to the first capacitor, The aforementioned changeover switch switches the charging and discharging of the second capacitor by switching it on and off. The second capacitor repeatedly discharges and charges alternately, supplying voltage to the first capacitor through the discharge. The charging of the second capacitor occurs during the time when the Hi-side switching element is ON. This is done by supplying the first voltage to the second capacitor. The inverter circuit is characterized in that the discharge of the second capacitor is performed by supplying the second voltage to the second capacitor during the time the changeover switch is ON.

2. The inverter circuit according to claim 1, characterized in that the second voltage is relatively lower than the first voltage.

3. The inverter circuit according to claim 2, characterized in that the changeover switch is not directly connected to the first power supply.

4. The inverter circuit according to claim 3, characterized in that the changeover switch and the first power supply are connected at least via the second capacitor.

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