Anomaly detection circuits, semiconductor devices, electronic equipment, vehicles
The anomaly detection circuit addresses the issue of circuit scale in conventional systems by sharing components across detection modes, achieving miniaturization and cost-effectiveness for semiconductor devices and vehicles.
JP7878894B2Active Publication Date: 2026-06-23ROHM CO LTD
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Patent Information
- Application Number
- JP2022024941
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2022-02-21
- Publication Date
- 2026-06-23
- Estimated Expiration
- 2042-02-21
AI Technical Summary
Technical Problem
Conventional abnormality detection circuits for detecting load open, output short to ground, or output short to power require separate detection circuits for each condition, leading to increased circuit scale and complexity.
Method used
An anomaly detection circuit comprising a first current source, a second current source, a comparator, and a controller that switches between two detection modes to minimize circuit size by sharing components across different abnormality detection operations.
Benefits of technology
The solution enables a miniaturized and cost-effective anomaly detection circuit for semiconductor devices and vehicles, effectively detecting load open and output short conditions with reduced component count.
✦ Generated by Eureka AI based on patent content.
Abstract
To provide an abnormality detection circuit that can realize miniaturization and cost reduction.SOLUTION: An abnormality detection circuit 35 includes: a first current source CS11 configured to generate a first current flowing from an external terminal 11 toward a reference potential terminal; a second current source CS12 configured to generate a second current flowing from a power supply potential terminal VDD toward the external terminal 11; a comparator CMP1 configured to generate an abnormality detection signal S35 by comparing a detection voltage V11 corresponding to an application voltage of the external terminal 11 with a predetermined threshold voltage V12; and a controller CTL1 configured to switch between a first abnormality detection mode in which an operation of generating the first current is performed and a second abnormality detection mode in which an operation of generating the second current is performed.SELECTED DRAWING: Figure 2
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