Semiconductor device
The trapezoidal shape of source and drain metal layers and pads, combined with an alternating via arrangement, addresses parasitic on-resistance and capacitance issues in semiconductor devices, enhancing electrical performance.
Patent Information
- Application Number
- TW114109568
- Authority / Receiving Office
- TW · TW
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2024-08-26
- Filing Date
- 2025-03-14
- Publication Date
- 2026-07-11
- Estimated Expiration
- 2045-03-13
AI Technical Summary
The parasitic on-resistance and capacitance issues in semiconductor devices due to metal layer overlaps and wire capacitance are significant challenges that affect electrical performance.
The semiconductor device employs trapezoidal source and drain metal layers and pads, with narrower branch portions compared to their respective pads, along with an alternating arrangement of vias and conductive posts to reduce parasitic on-resistance and capacitance.
This design reduces parasitic on-resistance and current density of the source and drain pads, decreases overall capacitance, and increases wire density, thereby improving electrical performance.
Smart Images

Figure IMG-2_DRAW_114109568-A0304-14-0001-1 
Figure IMG-2_DRAW_114109568-A0304-14-0002-2 
Figure IMG-2_DRAW_114109568-A0304-14-0003-3
Abstract
Description
Technical Field
[0001] This disclosure relates to a semiconductor device. Prior Technology
[0002] For semiconductor devices, the parasitic on-resistance caused by metal layers and wires, as well as the capacitance between metal layers, is crucial to electrical performance. For example, the larger the overlap area between the source / drain pad and the source / drain metal layer, the greater the capacitance formed between them, leading to an increase in the parasitic on-resistance of the metal. As the number of wires increases, the parasitic on-resistance of the wires also increases. Therefore, providing a semiconductor device that can address these issues remains a pressing research direction. Summary of the Invention
[0003] One embodiment disclosed herein is a semiconductor device.
[0004] In one embodiment, the semiconductor device includes an active layer, a source electrode and a drain electrode, a source metal layer, a drain metal layer, and a source pad. The active layer includes an active region. The source electrode and drain electrode are disposed on the active region of the active layer and extend in a first direction. The source metal layer is disposed in the active region and electrically connected to the source electrode, wherein the source metal layer extends in a second direction and is trapezoidal in the top view. The drain metal layer is disposed in the active region and electrically connected to the drain electrode, wherein the drain metal layer extends in the second direction and is trapezoidal in the top view. The source pad is disposed in the active region, wherein the source pad is electrically connected to the source metal layer, and wherein the source pad includes a main portion extending in the first direction and a branch portion extending in the second direction.
[0005] In one embodiment, the branch portion of the source pad is trapezoidal in the top view.
[0006] In one embodiment, the first width of the source metal layer along the first direction is smaller than the second width of the branch portion of the source pad that overlaps with the source metal layer in the top view along the first direction.
[0007] In one embodiment, the source metal layer includes a first body portion, a second body portion, and a branch portion. The body portion of the source pad overlaps with the first body portion in the top view. The body portion of the drain pad overlaps with the second body portion in the top view. The second body portion is rectangular. The branch portion connects the first body portion and the second body portion, wherein the branch portion is trapezoidal in the top view.
[0008] In one embodiment, the first main body portion is rectangular.
[0009] In one embodiment, the first main body portion of the source metal layer has a third width along a first direction, and the branch portion of the source metal layer has a fourth width along the first direction, the fourth width being smaller than the third width.
[0010] In one embodiment, the semiconductor device further includes a drain pad disposed in the active region. The drain pad is electrically connected to a drain metal layer, wherein the drain pad includes a body portion extending in a first direction and a branch portion extending in a second direction in the top view.
[0011] In one embodiment, the branch portion of the drain pad is trapezoidal in the top view.
[0012] In one embodiment, the fifth width of the drain metal layer along the first direction is smaller than the sixth width of the branch portion of the drain metal layer that overlaps with the drain metal layer along the first direction in the top view.
[0013] In one embodiment, the drain metal layer includes a first body portion, a second body portion, and a branch portion. The body portion of the source pad overlaps with the first body portion in the top view, and the first body portion of the drain metal layer is rectangular in the top view. The body portion of the drain pad overlaps with the second body portion in the top view. The branch portion connects the first body portion and the second body portion, and the branch portion of the drain metal layer is trapezoidal in the top view.
[0014] In one embodiment, the second main body portion of the drain metal layer is rectangular.
[0015] In one embodiment, the first main body portion of the drain metal layer has a seventh width along a first direction, and the branch portion has an eighth width along the first direction, the eighth width being smaller than the first width.
[0016] In one embodiment, the semiconductor device further includes two gate electrodes disposed on the active region of the active layer and arranged along a first direction.
[0017] In one embodiment, the semiconductor device further includes a top insulating layer, a plurality of first vias, and a plurality of second vias. The top insulating layer is disposed above the source pad and the drain pad. The first vias are disposed in the top insulating layer and overlap with the source pad, wherein the first vias are arranged in two rows along a second direction. The second vias are disposed in the top insulating layer and overlap with the drain pad. The second vias are arranged in two rows along the second direction, and the source pad and the drain pad are exposed from the top insulating layer through the first vias and the second vias.
[0018] In one embodiment, the semiconductor device further includes a lead frame, a plurality of first through-holes, a plurality of second through-holes, and a plurality of wires. The first through-holes are disposed in first vias. The second through-holes are disposed in second vias. The wires connect the first through-holes, the second through-holes, and the lead frame.
[0019] In one embodiment, the semiconductor device further includes a leadframe and a plurality of conductive posts. The conductive posts are disposed in a top insulating layer and connected to the leadframe.
[0020] One embodiment disclosed herein is a semiconductor device.
[0021] In one embodiment, the semiconductor device includes an active layer, a source electrode and a drain electrode, a source metal layer, a drain metal layer, and a source pad. The active layer includes an active region. The source electrode and drain electrode are disposed on the active region of the active layer and extend in a first direction. The source metal layer is disposed in the active region and electrically connected to the source electrode, wherein the source metal layer extends in a second direction. The drain metal layer is disposed in the active region and electrically connected to the drain electrode, wherein the drain metal layer extends in the second direction. The source pad is disposed in the active region, wherein the source pad is electrically connected to the source metal layer, and wherein the source pad includes a main portion extending in the first direction and a branch portion extending in the second direction. A first width of the source metal layer along the first direction is smaller than a second width of the branch portion of the source pad overlapping the source metal layer in the top view along the first direction.
[0022] In one embodiment, at least one of the source metal layer, the drain metal layer, and the branch portion of the source pad is trapezoidal in the top view.
[0023] In one embodiment, the branch portion of the source pad has a third width on a first side near the main body portion of the source pad, and the branch portion of the source pad has a fourth width on a second side away from the main body portion of the source pad, and the third width is greater than the fourth width.
[0024] In one embodiment, the fifth width of the first side of the source metal layer below the branch portion of the source pad is greater than the sixth width of the second side of the source metal layer away from the main body portion of the source pad.
[0025] In one embodiment, the semiconductor device further includes a drain pad disposed in the active region. The drain pad is electrically connected to a drain metal layer, wherein the drain pad includes a body portion extending in a first direction and a branch portion extending in a second direction in the top view, and the branch portion of the drain pad has a seventh width on a first side near the body portion of the drain pad, and an eighth width on a second side away from the body portion of the drain pad, and the seventh width is greater than the eighth width.
[0026] In one embodiment, the ninth width of the first side of the drain metal layer below the main body portion of the drain pad is greater than the tenth width of the second side of the drain metal layer below the main body portion of the source pad.
[0027] In the above embodiments, since the source pad and drain pad are trapezoidal, the parasitic on-resistance and current density of the source pad and drain pad can be reduced. Since the source metal layer and drain metal layer are trapezoidal and narrower than the source pad and drain pad, the overall capacitance of the semiconductor device can be reduced. Simple Explanation of the Diagram
[0028] Figure 1A is a top view of a semiconductor device 100 according to some embodiments of the present disclosure. Figure 1B is a top view of the semiconductor device in Figure 1A, omitting the source pad and drain pad. Figure 2A is a cross-sectional view along line segment 2A-2A in Figure 1A. Figure 2B is a cross-sectional view along line segment 2B-2B in Figure 1A. Figure 3 is a semiconductor device according to another embodiment of the present disclosure. Figure 4 is a top view of a semiconductor device according to another embodiment of the present disclosure. Figure 5 is a cross-sectional view along line segment 5-5 of Figure 4. Figure 6 is a top view of the semiconductor device in Figure 4 connected to a lead frame according to an embodiment of the present disclosure. Figure 7 is a cross-sectional view of the connection between the semiconductor device and the lead frame in Figure 4. Implementation
[0029] The following drawings disclose several embodiments of the present invention. For clarity, many practical details will be described in the following description. However, it should be understood that these practical details are not intended to limit the present invention.
[0030] Figure 1A is a top view of a semiconductor device 100 according to some embodiments of the present disclosure. Figure 1B is a top view of the semiconductor device 100 in Figure 1A, omitting the source pad and drain pad. Figure 2A is a cross-sectional view along line segment 2A-2A in Figure 1A, and Figure 2B is a cross-sectional view along line segment 2B-2B in Figure 1A. Referring to Figures 1A, 2A, and 2B, the semiconductor device 100 includes an active layer 110, a source electrode 120, a drain electrode 130, a gate electrode 140, a source metal layer 150, a drain metal layer 160, a source pad 170, and a drain pad 180. The active layer 110 has an active region 112. The source electrode 120, drain electrode 130, gate electrode 140, source metal layer 150, and drain metal layer 160 are disposed on the active region 112 of the active layer 110.
[0031] Source metal layers 150 and drain metal layers 160 are alternately arranged along a first direction D1 and extend along a second direction D2, which is different from the first direction D1. For example, the first direction D1 and the second direction D2 are substantially perpendicular as shown in Figure 1A. The source metal layers 150 are spaced apart from each other, and the drain metal layers 160 are spaced apart from each other. The term "substantially" as used herein may be used to modify any quantitative expression, allowing for variation without altering the fundamental function associated with it.
[0032] The source metal layer 150 and the drain metal layer 160 are trapezoidal in the top view. In this embodiment, the source metal layer 150 and the drain metal layer 160 are only partially trapezoidal.
[0033] Specifically, each source metal layer 150 includes a first body portion 152, a second body portion 154, and a branch portion 156. The body portion 172 of the source pad 170 overlaps with the first body portion 152 in the top view, and the first body portion 152 is rectangular. In the top view, the second body portion 154 overlaps with the body portion 182 of the drain pad 180, and the second body portion 154 is rectangular. The branch portion 156 connects the first body portion 152 and the second body portion 154 in the top view, and the branch portion 156 is trapezoidal. In some other embodiments, the first body portion 152 and the second body portion 154 have other shapes such as trapezoids.
[0034] Similarly, each drain metal layer 160 includes a first body portion 162, a second body portion 164, and a branch portion 166. The body portion 172 of the source pad 170 overlaps with the first body portion 162 in the top view, and the first body portion 162 is rectangular. The body portion 182 of the drain pad 180 overlaps with the second body portion 164 in the top view, and the second body portion 164 is rectangular. The branch portion 166 connects the first body portion 162 and the second body portion 164 in the top view, and the branch portion 166 is trapezoidal. In some other embodiments, the first body portion 162 and the second body portion 164 have other shapes such as trapezoids.
[0035] Source pad 170 includes a main body portion 172 extending along a first direction D1 and a plurality of branch portions 174 extending along a second direction D2. Source pad 170 is electrically connected to source metal layer 150 and source electrode 120. Drain pad 180 includes a main body portion 182 extending along the first direction D1 and a plurality of branch portions 184 extending along the second direction D2. Drain pad 180 is electrically connected to drain metal layer 160 and drain electrode 130.
[0036] The main body portion 172 of source pad 170 and the main body portion 182 of drain pad 180 are rectangular. That is, source pad 170 and drain pad 180 are substantially parallel. The branch portion 174 of source pad 170 and the branch portion 184 of drain pad 180 are both trapezoidal in the top view. As shown in Figure 1A, the branch portion 174 of source pad 170 substantially overlaps with the trapezoidal portion of source metal layer 150. The branch portion 184 of drain pad 180 substantially overlaps with the trapezoidal portion of drain metal layer 160. In some other embodiments, the main body portion 172 of source pad 170 and the main body portion 182 of drain pad 180 have other shapes such as trapezoids.
[0037] In this embodiment, the first width W1 of the branch portion 156 of the source metal layer 150 along the first direction D1 is smaller than the second width W2-1 of the branch portion 174 of the source pad 170 along the first direction D1.
[0038] In other words, the trapezoidal portion of the source metal layer 150 is narrower than the branch portion 174 of the source pad 170, and the area of the branch portion 156 of the source metal layer 150 is smaller than the area of the branch portion 174 of the source pad 170.
[0039] The second width W2-2 of the first side 1742 of the branch portion 174 of the source pad 170, which is closer to the main body portion 172 of the source pad 170, is greater than the second width W2-3 of the second side 1744 of the branch portion 174, which is farther from the main body portion 172 of the source pad 170. Specifically, the current on the second side 1744 (i.e., the tail) is less than the current on the first side 1742 (i.e., the root). Therefore, the wider first side 1742 can increase the area of the root and reduce the parasitic on-resistance of the source pad 170. The narrower second side 1744 can reduce the total current density of the source pad 170.
[0040] The first main body portion 152 of the source metal layer 150 has a third width W3-1 along the first direction D1, and the first width W1 of the branch portion 156 is smaller than the third width W3-1. In this embodiment, the second main body portion 154 has a third width W3-2, and the third widths W3-1 and W3-2 can be the same or different. That is, the trapezoidal portion of the source metal layer 150 is narrower than the rectangular portion of the source metal layer 150.
[0041] Similarly, the fourth width W4 of the branch portion 166 of the drain metal layer 160 along the first direction D1 is smaller than the fifth width W5-1 of the branch portion 184 of the drain pad 180 along the first direction D1. That is, the trapezoidal portion of the drain metal layer 160 is narrower than the branch portion 184 of the drain pad 180, and the area of the branch portion 166 of the drain metal layer 160 is smaller than the area of the branch portion 184.
[0042] The fifth width W5-2 of the first side 1842 of the branch portion 184 of the drain pad 180, which is closer to the main body portion 182 of the drain pad 180, is greater than the fifth width W5-3 of the second side 1844 of the branch portion 184, which is farther from the main body portion 182 of the drain pad 180. Specifically, the current on the second side 1844 (i.e., the tail) is less than the current on the first side 1842 (i.e., the root). Therefore, the wider first side 1842 can increase the area of the root and reduce the parasitic on-resistance of the drain pad 180.
[0043] The first main body portion 162 of the drain metal layer 160 has a sixth width W6-1 along the first direction D1, and the fifth width W5-1 of the branch portion 166 is smaller than the sixth width W6-1. In this embodiment, the second main body portion 164 has a sixth width W6-2, and the sixth widths W6-1 and W6-2 can be the same or different. That is, the trapezoidal portion of the source metal layer 150 is narrower than the rectangular portion of the source metal layer 150.
[0044] Referring to Figure 1A, the active layer 110 also includes an insulating region 114 surrounding the active region 112. The insulating region 114 is a shallow trench isolation (STI). The active layer 110 is optionally disposed on the substrate 105. Figures 2A and 2B are also shown. In some embodiments, the active layer 110 includes a channel layer 116 and a barrier layer 118 disposed on the channel layer 116. In some embodiments, the channel layer 116 may be made of gallium nitride, and the barrier layer 118 may be made of aluminum gallium nitride.
[0045] The semiconductor device 100 also includes a dielectric layer 270. For clarity, the dielectric layer 270 is only shown in Figures 2A and 2B. The dielectric layer 270 covers the source metal layer 150 and the drain metal layer 160. Source pads 170 and 180 are disposed on the dielectric layer 270. The source pad 170 is electrically connected to the source metal layer 150, for example, through a via 176 disposed in the dielectric layer 270. The drain pad 180 is electrically connected to the drain metal layer 160, for example, through a via 168 disposed in the dielectric layer 260.
[0046] Referring to Figures 2A and 2B, in this embodiment, the source electrode 120 includes a bottom source electrode portion 122 and a top source electrode portion 124. The drain electrode 130 includes a bottom drain electrode portion 132 and a top drain electrode portion 134. The top source electrode portion 124 and the top drain electrode portion 134 may be omitted. The gate electrode 140 includes a bottom gate electrode portion 142, a top gate electrode portion 144, and a plurality of field plates 210 electrically connected to the source electrode 120. The field plates 210 include a first field plate 212, a second field plate 214, and a third field plate 216.
[0047] The semiconductor device 100 also includes dielectric layers 250 and 260. For clarity, dielectric layers 250 and 260 are only shown in Figures 2A and 2B. Dielectric layer 250 is disposed on active layer 110. Dielectric layer 250 covers bottom source electrode portion 122, bottom drain electrode portion 132, and gate electrode 140. In other words, bottom source electrode portion 122, bottom drain electrode portion 132, and gate electrode 140 are disposed between dielectric layer 260 and active layer 110. Top source electrode portion 124 is disposed on dielectric layer 250 and covers bottom source electrode portion 122 and gate electrode 140, and top drain electrode portion 134 is disposed on dielectric layer 250 and covers bottom drain electrode portion 132.
[0048] Dielectric layer 260 covers the top source electrode portion 124 and the top drain electrode portion 134. In other words, the top source electrode portion 124 and the top drain electrode portion 134 are disposed between dielectric layers 260 and 250, and the source metal layer 150 and the drain metal layer 160 are disposed between dielectric layers 260 and 270. The top source electrode portion 124 and the top drain electrode portion 134 extend along a first direction D1 and are alternately arranged along a second direction D2.
[0049] A source metal layer 150 is disposed on the dielectric layer 260 and is electrically connected to the top source electrode portion 124, for example, through a via 158 disposed in the dielectric layer 260. A drain metal layer 160 is disposed on the dielectric layer 260 and is electrically connected to the top drain electrode portion 134, for example, through a via 168 disposed in the dielectric layer 260. The source metal layer 150 and the top source electrode portion 124 extend in different directions, and the drain metal layer 160 extends in a different direction from the top drain electrode portion 134.
[0050] The top source electrode portion 124 is electrically connected to the bottom source electrode portion 122, for example, through a via 126 provided in the dielectric layer 250, and is electrically insulated from the gate electrode 140. The top drain electrode portion 134 is electrically connected to the bottom drain electrode portion 132, for example, through a via 136 provided in the dielectric layer 250. The top source electrode portions 124 are spaced apart from each other, and the top drain electrode portions 134 are spaced apart from each other.
[0051] Referring to Figures 1A and 1B, since the area of the branch portion 166 of the drain metal layer 160 is smaller than the area of the branch portion 184 of the drain pad 180, the overlap area between the drain metal layer 160 and the drain pad 180 is reduced. As a result, the capacitance between the drain metal layer 160 and the top source electrode portion 124 is reduced. Furthermore, part of the capacitance is formed by the outer portion of the branch portion 184 (i.e., the portion that does not overlap with the branch portion 166) and the top source electrode portion 124. Because the distance between the drain pad 180 and the top source electrode portion 124 is greater than the distance between the top source electrode portion 124 and the drain metal layer 160, the overall capacitance of the semiconductor device 100 can be reduced.
[0052] Referring to Figures 1A and 2B, since the area of the branch portion 156 of the source metal layer 150 is smaller than the area of the branch portion 174 of the source pad 170, the overlap area between the source metal layer 150 and the source pad 170 is reduced. This reduces the capacitance between the source metal layer 150 and the top drain electrode portion 134. Furthermore, a portion of the capacitance is formed by the outer portion of the branch portion 174 (i.e., the portion that does not overlap with the branch portion 156) and the top drain electrode portion 134. Because the distance between the source pad 170 and the top drain electrode portion 134 is greater than the distance between the source metal layer 150 and the top drain electrode portion 134, the overall capacitance of the semiconductor device 100 can be reduced.
[0053] Figure 3 shows a semiconductor device 100a according to another embodiment of this disclosure. Semiconductor device 100a is similar to semiconductor device 100 of Figure 1A, except for the arrangement of the source metal layer 150a and the drain metal layer 160a. The source metal layer 150a does not include a rectangular portion. Therefore, as shown in Figure 3, the width of the source metal layer 150a in the first direction D1 gradually decreases along the second direction D2. In other words, the seventh width W7-2 of the first side 1502a of the source metal layer 150a located below the main body portion 172 of the source pad 170 is greater than the width W7-3 of the second side 1504a of the source metal layer 150a located below the main body portion 182 of the drain pad 180.
[0054] The relationship between the width of the branch portion 174 of the source pad 170 and the source metal layer 150a is similar to that described in the embodiment shown in Figure 1A. The seventh width W7-1 of the portion of the source metal layer 150 below the branch portion 174 of the source pad 170 along the second direction D2 is smaller than the second width W2-1 of the branch portion 174 of the source pad 170 along the second direction D2. As described above, this structural design can reduce the overall capacitance of the semiconductor device 100a.
[0055] The drain metal layer 160a does not include the rectangular portion. Therefore, the width of the drain metal layer 160a gradually increases along the second direction D2. In other words, the eighth width W8-2 of the first side 1602a of the drain metal layer 160a located below the main body portion 182 of the drain pad 180 is greater than the eighth width W8-3 of the second side 1604a of the drain metal layer 160a located below the main body portion 172 of the source pad 170.
[0056] The relationship between the width of the branch portion 184 of the drain pad 180 and the drain metal layer 160a is similar to that described in the embodiment shown in Figure 1A. The eighth width W8-1 of the portion of the drain metal layer 160 located below the branch portion 184 of the drain pad 180 in the second direction D2 is smaller than the fifth width W5-1 of the branch portion 184 of the drain pad 180 along the second direction D2. As mentioned above, this structural design can reduce the overall capacitance of the semiconductor device 100a.
[0057] Figure 4 is a top view of a semiconductor device 100b according to another embodiment of this disclosure. Figure 5 is a cross-sectional view along line segment 5-5 of Figure 4. Referring to Figures 4 and 5, the semiconductor device 100b further includes a top insulating layer 190 disposed above source pad 170 and drain pad 180. A plurality of first vias 192 are formed in the top insulating layer 190 to expose the source pad 170. The plurality of first vias 192 are arranged in two rows along a first direction D1. A plurality of second vias 194 are formed in the top insulating layer 190 to expose the drain pad 180. The second vias 194 are arranged in two rows along the first direction D1. The semiconductor device 100b includes two gate electrodes (see Figure 2A) disposed on the active region 112 of the active layer 110 and disposed along a second direction D2. Two third vias 196 are formed in the top insulating layer 190 for interconnecting the two gates.
[0058] Figure 6 is a top view of the semiconductor device 100b in Figure 4 connected to a leadframe 300 according to an embodiment of the present disclosure. In this embodiment, a first through-hole 410 is formed in a first through-hole 192 and overlaps with a source pad 170. The first through-holes 410 are arranged in two rows along a first direction D1. A second through-hole 420 is formed in a second through-hole 194 and overlaps with a drain pad 180. The second through-holes 420 are arranged in two rows along the first direction D1.
[0059] The first conductive post 410 and the second conductive post 420 are connected to the wire 400, and the semiconductor device 100b and the lead frame 300 are electrically connected through the wire 400. The first conductive post 410 and the second conductive post 420 are arranged alternately along the second direction D2, thereby increasing the wire density and reducing the parasitic on-resistance.
[0060] Figure 7 is a cross-sectional view of the connection between the semiconductor device 100b and the lead frame 300 in Figure 4. In this embodiment, a plurality of through-holes 500 are formed in the first through-hole 192 and the second through-hole 194. The through-holes 500 extend from the top insulating layer 190 and are connected to the lead frame 300 by a flip-chip process.
[0061] In summary, the trapezoidal shape of the source and drain pads reduces their parasitic on-resistance and current density. The trapezoidal shape of the source and drain metal layers, compared to the narrower diameter of the source and drain pads, reduces the overall capacitance of the semiconductor device. Furthermore, the alternating arrangement of the first and second vias in the top insulating layer along the first direction increases the wire density and reduces parasitic on-resistance.
[0062] Although the present invention has been disclosed above by way of embodiments, it is not intended to limit the present invention. Anyone skilled in the art can make various modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims.
[0063] 100, 100a, 100b: Semiconductor devices 105:Substrate 110: Active Layer 112: Active Zone 114: Insulation Zone 116: Channel Layer 118: Barrier layer 120: Source electrode 122: Bottom source electrode section 124: Top source electrode section 126: Through hole 130: Drain electrode 132: Bottom drain electrode section 134: Top drain electrode section 136: Through hole 140: Gate electrode 142: Bottom gate electrode section 144: Top gate electrode section 150, 150a: Source metal layer 1502a: First side 1504a: Second side 152: First Main Body 154: Second Main Body 156: Branch Section 158: Through hole 160, 160a: Drain metal layer 1602a: First side 1604a: Second side 162: First main body, 164: Second Main Body 166: Branch Section 168: Through hole 170: Source Pad 172: Main Body 174: Branch Section 1742: First Side 1744: Second Side 176: Through hole 180: Drainage Pad 182: Main Body 184: Branch Section 1842: First side 1844: Second Side 186: Through hole 190: Top insulation layer 192: First through hole 194: Second through hole 196: Third through hole 210: Field board 212: First game board 214: Second game board 216: Third game board 250, 260, 270: Dielectric layer 300: Conductor frame 400: Wire 410: First Conductor Post 420: Second Conductor Post 500: Conductor Post D2: Second Direction D1: First Direction W1: First width W2-1, W2-2, W2-3: Second width W3-1, W3-2, W3-3: Third width W4: Fourth Width W5-1, W5-2, W5-3: Fifth width W6-1, W6-2: Sixth width W7-1, W7-2: Seventh Width W8-1, W8-2, W8-3: Eighth Width 2A-2A, 2B-2B, 5-5: Line segments
Claims
1. A semiconductor device comprising: an active layer including an active region; a source electrode and a drain electrode disposed on the active region of the active layer and extending in a first direction; a source metal layer disposed in the active region and electrically connected to the source electrode, wherein the source metal layer extends in a second direction and is trapezoidal in a top view; a drain metal layer disposed in the active region and electrically connected to the drain electrode, wherein the drain metal layer extends in the second direction and is trapezoidal in a top view; and a source pad disposed in the active region, wherein the source pad is electrically connected to the source metal layer, and wherein the source pad includes a main portion extending in the first direction and a branch portion extending in the second direction.
2. The semiconductor device as claimed in claim 1, wherein the branch portion of the source pad is trapezoidal in the top view.
3. The semiconductor device as claimed in claim 1, wherein a first width of the source metal layer along the first direction is smaller than a second width of the branch portion of the source pad that overlaps with the source metal layer in the top view along the first direction.
4. The semiconductor device as claimed in claim 1, further comprising: a drain pad disposed in the active region, wherein the drain pad is electrically connected to the drain metal layer, wherein the drain pad includes a main portion extending in the first direction and a branch portion extending in the second direction in the top view.
5. The semiconductor device as claimed in claim 4, wherein the source metal layer comprises: a first body portion, wherein the body portion of the source pad overlaps with the first body portion in a top view; a second body portion, wherein the body portion of the drain pad overlaps with the second body portion in a top view, wherein the second body portion is rectangular; and a branch portion connecting the first body portion and the second body portion, wherein the branch portion is trapezoidal in a top view.
6. The semiconductor device as claimed in claim 5, wherein the first body portion is rectangular.
7. The semiconductor device as claimed in claim 5, wherein the first body portion of the source metal layer has a third width along the first direction, and the branch portion of the source metal layer has a fourth width along the first direction, the fourth width being smaller than the third width.
8. The semiconductor device as claimed in claim 4, wherein the branch portion of the drain pad is trapezoidal in the top view.
9. The semiconductor device of claim 4, wherein a fifth width of the drain metal layer along the first direction is smaller than a sixth width of the branch portion of the drain pad that overlaps with the drain metal layer in the top view along the first direction.
10. The semiconductor device of claim 4, wherein the drain metal layer comprises: a first body portion, wherein the body portion of the source pad overlaps with the first body portion in a top view, and wherein the first body portion of the drain metal layer is rectangular in the top view; a second body portion, wherein the body portion of the drain pad overlaps with the second body portion in the top view; and a branch portion connecting the first body portion and the second body portion, wherein the branch portion of the drain metal layer is trapezoidal in the top view.
11. The semiconductor device as claimed in claim 10, wherein the second body portion of the drain metal layer is rectangular.
12. The semiconductor device as claimed in claim 10, wherein the first body portion of the drain metal layer has a seventh width along the first direction, and the branch portion of the drain metal layer has an eighth width along the first direction, the eighth width being smaller than the seventh width.
13. The semiconductor device as claimed in claim 1, further comprising: two gate electrodes disposed on the active region of the active layer and arranged along the first direction.
14. The semiconductor device of claim 7, further comprising: a top insulating layer disposed above the source pad and the drain pad; a plurality of first vias disposed in the top insulating layer and overlapping the source pad, wherein the first vias are arranged in two rows along the second direction; and a plurality of second vias disposed in the top insulating layer and overlapping the drain pad, wherein the second vias are arranged in two rows along the second direction, and the source pad and the drain pad are exposed from the top insulating layer through the first vias and the second vias.
15. The semiconductor device of claim 14 further comprises: a lead frame; a plurality of first vias disposed in the first vias; a plurality of second vias disposed in the second vias; and a plurality of wires connecting the first vias, the second vias, and the lead frame.
16. The semiconductor device as claimed in claim 14 further comprises: a lead frame; and a plurality of conductive posts disposed in the top insulating layer and connected to the lead frame.
17. A semiconductor device comprising: an active layer including an active region; a source electrode and a drain electrode disposed on the active region of the active layer and extending in a first direction; a source metal layer disposed on the active region of the active layer and electrically connected to the source electrode, wherein the source metal layer extends in a second direction; a drain metal layer disposed on the active region and electrically connected to the drain electrode, wherein the drain metal layer extends in the second direction; and a source pad disposed on the active region, wherein the source pad is electrically connected to the source metal layer, wherein the source pad includes a main portion extending in the first direction and a branch portion extending in the second direction, and a first width of the source metal layer along the first direction is smaller than a second width of the branch portion of the source pad overlapping the source metal layer in the top view along the first direction.
18. The semiconductor device as claimed in claim 17, wherein at least one of the source metal layer, the drain metal layer, and the branch portion of the source pad is trapezoidal in the top view.
19. The semiconductor device of claim 17, wherein the branch portion of the source pad has a third width on a first side near the body portion of the source pad, the branch portion of the source pad has a fourth width on a second side away from the body portion of the source pad, and the third width is greater than the fourth width.
20. The semiconductor device of claim 17, wherein a fifth width on a first side of the source metal layer below the branch portion of the source pad is greater than a sixth width on a second side of the source metal layer away from the main portion of the source pad.
21. The semiconductor device of claim 17, further comprising: a drain pad disposed in the active region, wherein the drain pad is electrically connected to the drain metal layer, wherein the drain pad includes a main portion extending in the first direction and a branch portion extending in the second direction in the top view, and the branch portion of the drain pad has a seventh width on a first side near the main portion of the drain pad, and the branch portion of the drain pad has an eighth width on a second side away from the main portion of the drain pad, and the seventh width is greater than the eighth width.
22. The semiconductor device as claimed in claim 21, wherein a ninth width on a first side of the drain metal layer below the body portion of the drain pad is greater than a tenth width on a second side of the drain metal layer below the body portion of the source pad.