Integrated memory expansion device and computing device

Abstract

The present application provides an integrated memory expansion device and a computing device. The integrated memory expansion device is used for expanding memory for a server. The integrated memory expansion device comprises a case, a first circuit board, a first connection interface, a plurality of first memory slots, and a plurality of first memory expansion cards, wherein the first circuit board, the first connection interface, and the plurality of first memory slots are all arranged in the case; the plurality of first memory slots are arranged at intervals on the first circuit board; the first connection interface is electrically connected to the first circuit board; the first connection interface is exposed out of the outer surface of the case and is used for being connected to the server; the case is provided with a plurality of first inserting holes; the interior and the exterior of the case are communicated by means of each first inserting hole; each first memory expansion card passes through one first inserting hole and is detachably inserted into one first memory slot. The integrated memory expansion device can provide a large amount of memory space for an electronic device, thereby meeting the requirements of the computing device for scenarios such as big data processing.

Description

Memory expansion integrated device and computing device

[0001] This application claims priority to the Chinese patent application filed with the China Patent Office on October 20, 2023, with application number 202311368083.5 and application name “Memory extension integrated device and computing device”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the technical field of electronic devices, and in particular to a memory expansion integrated device and a computing device. Background Art

[0003] With the increasing popularity of big data processing scenarios such as AI (Artificial Intelligence) large models, the calculation process usually requires that massive data be saved to memory before the next step of calculation can be performed. However, the chassis space of current computing devices is limited, and the memory capacity cannot be effectively expanded. The design architecture of computing devices cannot provide a large amount of memory space for applications.

[0004] Summary of the Invention

[0005] The purpose of the embodiments of the present application is to provide a memory expansion integrated device and a computing device, wherein the memory expansion integrated device can provide a large amount of memory space for the electronic device, thereby meeting the needs of the computing device for scenarios such as big data processing.

[0006] An embodiment of the present application provides a computing device, including an electronic device and a memory expansion integrated device, the memory expansion integrated device including a housing, a first circuit board, a first connection interface, multiple first memory slots and multiple first memory expansion cards, the first circuit board, the first connection interface and the multiple first memory slots are all arranged inside the housing, the multiple first memory slots are arranged at intervals on the first circuit board, the first connection interface is electrically connected to the first circuit board, the first connection interface is exposed relative to the outer surface of the housing, the housing is provided with multiple first plug holes, each first plug hole connects the inside and outside of the housing, each first memory expansion card is inserted into a first plug hole and can be detachably plugged into a first memory slot, the electronic device is connected to the first connection interface of the memory expansion integrated device.

[0007] In the computing device provided in the embodiment of the present application, a memory expansion integrated device is used to connect to an electronic device. When the memory of the electronic device is insufficient, the memory of the electronic device can be directly expanded using the memory expansion integrated device. The memory expansion integrated device integrates multiple first memory expansion cards, has a high memory density, and can provide a large amount of memory space for the computing device, thereby meeting the computing device's needs for scenarios such as big data processing. In addition, by setting the first connection interface to be exposed relative to the outer surface of the housing, it is convenient to connect the memory expansion integrated device to the electronic device through the first connection interface, thereby facilitating the use of the memory expansion integrated device to expand the memory of the electronic device. By setting the memory expansion integrated device, the embodiment of the present application solves the problem that the memory capacity cannot be effectively expanded due to the limited chassis space of existing electronic devices.

[0008] In addition, the memory expansion integrated device can be connected to multiple electronic devices, and multiple electronic devices can access the memory expansion integrated device to improve the overall utilization of the memory expansion integrated device, avoiding the problem that the existing electronic devices monopolize the memory themselves, and when the memory of some electronic devices is idle, the idle memory cannot be allocated to other electronic devices. At the same time, it also solves the problem that a large amount of memory is scattered in different electronic devices, which is inconvenient for operation and management.

[0009] In a possible implementation, the electronic device is a server and / or a switch.

[0010] In a possible implementation, the computing device further includes a cabinet, and the electronic device and the memory expansion integrated device are both installed inside the cabinet.

[0011] In a possible implementation, the computing device further includes a hard disk device, which is installed inside the cabinet and electrically connected to both the electronic device and the memory expansion integrated device.

[0012] An embodiment of the present application also provides a memory expansion integrated device, which is used to expand memory for a server. The memory expansion integrated device includes a housing, a first circuit board, a first connection interface, multiple first memory slots and multiple first memory expansion cards. The first circuit board, the first connection interface and the multiple first memory slots are all arranged inside the housing. The multiple first memory slots are arranged at intervals on the first circuit board. The first connection interface is electrically connected to the first circuit board. The first connection interface is exposed relative to the outer surface of the housing and is used to connect to the server. The housing is provided with multiple first plug holes, each first plug hole connects the inside and outside of the housing, each first memory expansion card is passed through a first plug hole and can be detachably plugged into a first memory slot.

[0013] An embodiment of the present application provides a memory expansion integrated device, which utilizes a first memory slot in the memory expansion integrated device to be electrically connected to a first memory expansion card, and utilizes a first connection interface to be electrically connected to an electronic device, so as to realize memory expansion of the electronic device using a memory expansion card. The memory expansion integrated device of the embodiment of the present application can provide a large amount of memory space by plugging in multiple first memory expansion cards, thereby meeting the needs of computing devices for scenarios such as big data processing. In addition, the memory expansion integrated device can be electrically connected to multiple electronic devices through the first connection interface, and multiple electronic devices can all access the memory expansion integrated device through the first connection interface, thereby achieving high utilization of the memory expansion integrated device and avoiding the problem that the memory exclusively occupied by existing electronic devices cannot be allocated to other electronic devices. At the same time, the memory expansion integrated device is independent of the electronic device, and also solves the problem that a large amount of memory is scattered in different electronic devices, which is inconvenient for operation and management.

[0014] Furthermore, by inserting the first memory expansion card through the first insertion hole and removably inserting it into the first memory slot, management and maintenance of the first memory expansion card are facilitated. By providing multiple first memory slots in the memory expansion integrated device, the number of first memory expansion cards that can be inserted into the first memory slots can be increased, thereby increasing the memory space of the memory expansion integrated device and achieving high scalability of the memory expansion integrated device.

[0015] In a possible implementation, the memory expansion integrated device further includes a first adapter circuit board, which is mounted on the box and electrically connected between the first connection interface and the first circuit board.

[0016] In one possible embodiment, the memory expansion integrated device further includes a second circuit board, a second connection interface, a plurality of second memory slots, and a plurality of second memory expansion cards. The second circuit board, the second connection interface, and the plurality of second memory slots are all disposed within a housing. The second circuit board is spaced apart from the first circuit board, and the plurality of second memory slots are spaced apart from each other on the second circuit board. The second connection interface is electrically connected to the second circuit board, and the second connection interface is exposed relative to the outer surface of the housing and is used to electrically connect to the server. The housing further includes a plurality of second plug holes, the plurality of second plug holes and the plurality of first plug holes being located on opposite sides or adjacent sides of the housing, each second plug hole connecting the interior and exterior of the housing, and each second memory expansion card being inserted through a second plug hole and removably plugged into a second memory slot. By simultaneously arranging the first connection interface and the second connection interface at different positions of the housing, the electronic device can be electrically connected to the memory expansion integrated device from different sides of the housing, thereby improving the plug-in density of the memory expansion integrated device and expanding the use scenarios of the memory expansion integrated device.

[0017] In one possible implementation, the first connection interface is a UBC connector, a UBC-DD connector, a MCIO connector, an ASM connector, or a fiber optic interface connector, and / or the second connection interface is a UBC connector, a UBC-DD connector, a MCIO connector, an ASM connector, or a fiber optic interface connector.

[0018] In one possible embodiment, the housing includes a first panel and a second panel disposed opposite each other, the first plug hole being provided on the first panel and extending through the first panel along its thickness, the first circuit board being spaced apart from and disposed opposite the first panel, the first memory slot being provided on a surface of the first circuit board facing the first panel, and the first connection interface being exposed relative to an outer surface of the first panel;

[0019] And / or, the second plug hole is arranged on the second panel and passes through the second panel along the thickness direction of the second panel, the second circuit board is spaced apart and arranged opposite to the first circuit board, and is spaced apart and arranged opposite to the second panel, the second memory slot is arranged on the surface of the second panel facing the second panel, and the second connection interface is exposed relative to the outer surface of the second panel.

[0020] In a possible implementation, the memory expansion integrated device further includes a power module, which is located between the second panel and the second circuit board and is electrically connected to the second circuit board.

[0021] In one possible embodiment, the first circuit board and the second circuit board are electrically connected so that when the electronic device is connected to the memory expansion integrated device from one side of the first connection interface, the electronic device can use the memory expansion card located on the same side as the second connection interface to expand the memory; when the memory expansion integrated device is connected from the second connection interface, the electronic device can use the memory expansion card located on the same side as the first connection interface to expand the memory, thereby improving the utilization efficiency of the memory expansion cards in the memory expansion integrated device.

[0022] In a possible implementation, the memory expansion integrated device further includes a third circuit board, which is installed between the first circuit board and the second circuit board and is electrically connected to the first circuit board and the second circuit board.

[0023] In a possible implementation, the memory expansion integrated device further includes a processor, which is mounted on and electrically connected to the third circuit board. The processor is capable of managing multiple first memory expansion cards and multiple second memory expansion cards.

[0024] In one possible embodiment, the memory expansion integrated device also includes a management control chip and an indicator. The management control chip is installed on a third circuit board and electrically connected to the third circuit board. The indicator is installed on a housing and electrically connected to the third circuit board. The management control chip is used to obtain the transmission signal between the memory expansion card and the server, and control the indicator to indicate that the memory expansion integrated device is in an operating state or in a fault state.

[0025] In one possible embodiment, the memory expansion integrated device further includes a heat sink, which is mounted on the first circuit board and electrically connected to the first circuit board, or mounted on the second circuit board and electrically connected to the second circuit board, or mounted on the third circuit board and electrically connected to the third circuit board. The heat sink is provided to dissipate heat from components in the memory expansion integrated device.

[0026] In a possible embodiment, the heat sink is located between the first circuit board and the second circuit board, and both the first circuit board and the second circuit board are provided with ventilation holes. The ventilation holes of the first circuit board penetrate the first circuit board along the thickness direction of the first circuit board, and the ventilation holes of the second circuit board penetrate the second circuit board along the thickness direction of the second circuit board.

[0027] In one possible embodiment, multiple first plug holes are located on opposite sides of the first connection interface, so that the first connection interfaces are relatively concentrated on the first panel. When an external electronic device is connected to the memory expansion integrated device through the first connection interface, the electronic devices are concentrated at the location where the memory expansion integrated device is plugged in, which facilitates the management and control chip to centrally manage and control multiple electronic devices. Alternatively, there are multiple first connection interfaces, and the multiple first connection interfaces are located on opposite sides of the multiple first plug holes, so that the first plug holes are concentrated in the middle of the first panel. When an electronic device is plugged into the first connection interface exposed relative to the first through hole via a connecting cable, the obstruction caused by the connecting cable when the first memory expansion card passes through the first plug hole is avoided, and it is convenient to plug in the electronic device from both sides of the first panel. Alternatively, multiple second plug holes are located on opposite sides of the second connection interface, or there are multiple second connection interfaces, and the multiple second connection interfaces are located on opposite sides of the multiple second plug holes.

[0028] In one possible embodiment, a first receiving cavity is formed between the first panel and the first circuit board, and a second receiving cavity is formed between the second panel and the second circuit board. The memory expansion integrated device further includes a first partition and a second partition. The first partition is installed in the first receiving cavity and divides the first receiving cavity into a plurality of first receiving portions along a height direction of the box. The second partition is installed in the second receiving cavity and divides the second receiving cavity into a plurality of second receiving portions along a height direction of the box.

[0029] A plurality of first memory slots spaced apart along the length of the first circuit board form a group of first memory slots, and a plurality of first memory slot groups spaced apart along the height of the first circuit board, with each group of first memory slots located in a first receiving portion. A plurality of second memory slots spaced apart along the length of the second circuit board form a group of second memory slots, and a plurality of second memory slot groups spaced apart along the height of the second circuit board, with each group of second memory slots located in a second receiving portion. By providing first and second partitions to divide the first receiving cavity into a plurality of first receiving portions, and the second receiving cavity into a plurality of second receiving portions, the number of memory expansion cards that can be accommodated is increased, thereby improving the memory expansion capability of the memory expansion integrated device. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0031] FIG1 is a schematic diagram of the three-dimensional structure of a computing device provided in a first embodiment of the present application;

[0032] FIG2 is a schematic diagram of the electrical connection structure of the electronic device, the memory expansion integrated device, and the hard disk device in the computing device shown in FIG1 ;

[0033] FIG3 is a schematic structural diagram of a memory expansion integrated device in the computing device shown in FIG1 in a first example;

[0034] FIG4 is a schematic structural diagram of the memory expansion integrated device shown in FIG3 from another perspective;

[0035] FIG5 is a schematic diagram of the exploded structure of the memory expansion integrated device shown in FIG3 , with the side shell and the top shell partially removed;

[0036] FIG6 is a schematic structural diagram of a memory expansion integrated device in the computing device shown in FIG1 in a second example;

[0037] FIG7 is a schematic diagram of a partial structure of a memory expansion integrated device in the computing device shown in FIG1 in a third example;

[0038] FIG8 is a schematic diagram of the exploded structure of a portion of the structure of the memory expansion integrated device in the computing device shown in FIG1 in a fourth example;

[0039] FIG9 is a schematic structural diagram of a portion of the structure of a memory expansion integrated device in the computing device shown in FIG1 in a fifth example;

[0040] FIG10 is a schematic diagram of the three-dimensional structure of a computing device provided in the second embodiment of the present application. DETAILED DESCRIPTION

[0041] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the embodiments described are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the embodiments of the present application. In the embodiments of the present application, "multiple" means two or more.

[0042] Please refer to Figures 1 and 2. Figure 1 is a schematic diagram of the three-dimensional structure of the computing device 1 provided in the first embodiment of the present application, and Figure 2 is a schematic diagram of the electrical connection structure of the electronic device 3, the memory expansion integrated device 4 and the hard disk device 5 in the computing device 1 shown in Figure 1.

[0043] For ease of description, the length of the computing device 1 shown in FIG1 is defined as the X-axis, the width as the Y-axis, and the height as the Z-axis, with the X-axis, Y-axis, and Z-axis directions being perpendicular to each other. The terms "top," "bottom," "front," and "back" used in describing the panel 10200 in this embodiment of the present application are based on the orientation shown in FIG1 of the specification, with the direction facing the positive Z-axis being "top," the direction facing the negative Z-axis being "bottom," the direction facing the negative Y-axis being "front," and the direction facing the positive Y-axis being "back." These terms do not limit the actual application of the computing device 1.

[0044] Computing device 1 may include a cabinet 2, an electronic device 3, a memory expansion integrated device 4, and a hard disk device 5. In this embodiment, the electronic device 3, the memory expansion integrated device 4, and the hard disk device 5 are all installed inside the cabinet 2. Of course, in other embodiments, computing device 1 may include only the cabinet 2, the electronic device 3, and the memory expansion integrated device 4, with the memory expansion integrated device 4 installed inside the cabinet 2 and the electronic device 3 being located outside the cabinet 2. Alternatively, computing device 1 may include only the cabinet 2, the electronic device 3, and the memory expansion integrated device 4.

[0045] Exemplarily, the electronic device 3 may be a server 3a and / or a switch 3b. In this embodiment, there are multiple electronic devices 3, and the multiple electronic devices 3 include a server 3a and a switch 3b. Exemplarily, the server 3a may be a server whose processor is a central processing unit (CPU) or a server whose processor is an eXtreme Processing Unit (XPU). The server 3a may also be a server equipped with a high-performance graphics processing unit (GPU). Exemplarily, the switch 3b is a Top of Rack Switch (ToR Switch).

[0046] The memory expansion integrated device 4 is connected to multiple electronic devices 3 to expand the memory of the electronic devices 3, thereby improving the operating efficiency of the electronic devices 3. For example, the memory expansion integrated device 4 can be connected to the electronic devices 3 via an open interconnection protocol (Compute Express Link, CXL). The hard disk device 5 is connected to both the electronic devices 3 and the memory expansion integrated device 4 to store data information of the electronic devices 3 and the memory expansion integrated device 4.

[0047] In the computing device 1 provided in the embodiment of the present application, a memory expansion integrated device 4 is connected to the electronic device 3. When the memory of the electronic device 3 is insufficient, the memory of the electronic device 3 can be directly expanded through the memory expansion integrated device 4. This allows the memory expansion integrated device 4 to provide a large amount of memory space for the electronic device 3, thereby meeting the computing device 1's needs for scenarios such as big data processing. The provision of the memory expansion integrated device 4 solves the problem of the inability to effectively expand the memory capacity of the existing electronic device 3 due to the limited chassis space.

[0048] In addition, the memory expansion integrated device 4 can be connected to multiple electronic devices 3, and all electronic devices 3 can access the memory expansion integrated device 4 to improve the overall utilization of the memory expansion integrated device 4, avoiding the problem that the existing electronic devices 3 monopolize the memory themselves, and when the memory of some electronic devices 3 is idle, the idle memory cannot be allocated to other electronic devices 3. At the same time, it also solves the problem that a large amount of memory is scattered in different electronic devices 3, which is inconvenient for operation and management.

[0049] Referring to Figures 3, 4, and 5, Figure 3 is a schematic diagram of the structure of the memory expansion integrated device 4 in the computing device 1 shown in Figure 1 in a first example. Figure 4 is a schematic diagram of the structure of the memory expansion integrated device 4 shown in Figure 3 from another perspective. Figure 5 is an exploded structural diagram of the memory expansion integrated device 4 shown in Figure 3 with part of the side housing 30 and top housing 40 removed. Figure 5 shows only a portion of the guide slot 60, not all of it. Figure 5 also shows only a portion of the second memory slot 333, which is shown in perspective and indicated by dashed lines.

[0050] The memory expansion integrated device 4 may include a housing 100, a plug-in assembly 300, a memory expansion card 400, a connection interface 500, a power module 700, a management control chip 810, a power button 820, an indicator 830, and a heat sink 850. The plug-in assembly 300, the memory expansion card 400, the power module 700, the management control chip 810, and the heat sink 850 are all installed inside the housing 100, and the connection interface 500, the power button 820, and the indicator 830 are installed on the housing 100.

[0051] Specifically, the box body 100 may include two panels 10, two side shells 30, a top shell 40 and a bottom shell 50. The two panels 10 are arranged relative to each other along the Y-axis direction. In this embodiment, the two panels 10 include a first panel 10a and a second panel 10b, the first panel 10a is the front panel, and the first panel 10a faces the negative direction of the Y-axis, and the second panel 10b is the back panel, and the second panel 10b faces the positive direction of the Y-axis. The length directions of the first panel 10a and the second panel 10b are both in the X-axis direction, the height directions of the first panel 10a and the second panel 10b are both in the Z-axis direction, and the thickness directions of the first panel 10a and the second panel 10b are both in the Y-axis direction. In this embodiment, the height of the box body 100 along the Z-axis direction is 1U, that is, the height of the first panel 10a and the second panel 10b along the Z-axis direction is 1U. Among them, U is a unit representing the external dimensions of the server (unit of measurement: height or thickness), which is an abbreviation of unit. A height of 1U means a height of 4.445cm. The two side shells 30 are disposed opposite each other along the X-axis and are connected between the first panel 10a and the second panel 10b. The top shell 40 and the bottom shell 50 are disposed opposite each other along the Z-axis and are connected to both panels 10 and both side shells 30. The first panel 10a, the second panel 10b, the two side shells 30, the top shell 40, and the bottom shell 50 enclose a receiving chamber.

[0052] The housing 100 is provided with a plug hole 11, a through hole 13, and an opening 15. The openings of the plug hole 11, through hole 13, and opening 15 are all located on the outer surface of the housing 100, and the plug hole 11, through hole 13, and opening 15 are connected to the storage cavity. The plug hole 11 is used to insert the memory expansion card 400, the through hole 13 is used to expose the connection interface 500, and the opening 15 is used to expose the interface of the power module 700.

[0053] In this embodiment, there are multiple plug holes 11, and the multiple plug holes 11 include a first plug hole 11a and a second plug hole 11b. There are multiple through holes 13, and the multiple through holes 13 include a first through hole 13a and a second through hole 13b. The first plug hole 11a and the first through hole 13a are both provided on the first panel 10a, and both penetrate the first panel 10a along the thickness direction of the first panel 10a, so that the first plug hole 11a and the first through hole 13a are connected to the accommodating cavity of the box body 100, thereby connecting the first plug hole 11a and the first through hole 13a to the inside and outside of the box body 100. There are multiple first plug holes 11a, and the multiple first plug holes 11a are arranged in sequence along the length direction of the first panel 10a and are spaced apart from each other. Each first plug hole 11a can be used to insert a memory expansion card 400. In this embodiment, the plurality of first plugging holes 11 a include a first sub-plugging hole 111 a and a second sub-plugging hole 113 a , and there are a plurality of each of the first sub-plugging hole 111 a and the second sub-plugging hole 113 a .

[0054] There are multiple first through holes 13a, and the multiple first through holes 13a are spaced apart from each other. Each first through hole 13a is used to expose a connection interface 500. In this embodiment, the multiple first through holes 13a are roughly located in the middle of the first panel 10a, and between the first sub-plug hole 111a and the second sub-plug hole 113a, so that the multiple first plug holes 11a are located on opposite sides of the first through hole 13a. It will be understood that the positions of the first through holes 13a and the first plug holes 11a on the first panel 10a can be flexibly adjusted according to actual conditions.

[0055] The second plug hole 11b, the second through hole 13b, and the opening 15 are all provided on the second panel 10b and extend through the second panel 10b along the thickness direction of the second panel 10b, so that the second plug hole 11b, the second through hole 13b, and the opening 15 are connected to the accommodating cavity of the housing 100, thereby connecting the second plug hole 11b, the second through hole 13b, and the opening 15 to the interior and exterior of the housing 100. The opening 15 is used to expose the interface of the power module 700. In this embodiment, there are two openings 15, which are spaced apart along the Z-axis direction. In this embodiment, there are multiple second plug holes 11b, which are arranged in sequence along the length direction of the first panel 10a and are spaced apart from each other. Each second plug hole 11b can be used to insert a memory expansion card 400. In this embodiment, the plurality of second plug holes 11b include a third sub-plug hole 111b and a fourth sub-plug hole 113b, and there are multiple third sub-plug holes 111b and multiple fourth sub-plug holes 113b. It is understood that in this embodiment, the first plug hole 11a and the second plug hole 11b are respectively provided on the first panel 10a and the second panel 10b of the housing 100, so that the first plug hole 11a and the second plug hole 11b are respectively located on opposite sides of the housing 100. Of course, in other embodiments, the first plug hole 11a and the second plug hole 11b can also be provided on adjacent sides of the housing 100, for example, the first plug hole 11a is provided on the first panel 10a and the second plug hole 11b is provided on the side shell 30, or the first plug hole 11a is provided on the side shell 30 and the second plug hole 11b is provided on the second panel 10b.

[0056] There are multiple second through holes 13b, spaced apart from each other, with each second through hole 13b exposing a connection interface 500. In this embodiment, the multiple second through holes 13b are located between the third sub-plug hole 111b and the fourth sub-plug hole 113b, so that the multiple second plug holes 11b are located on opposite sides of the second through hole 13b. It will be appreciated that the positions of the second through holes 13b, the second plug holes 11b, and the opening 15 on the second panel 10b can be flexibly adjusted based on actual conditions.

[0057] The housing 100 also has guide slots 60, located in the top case 40 and the bottom case 50, for guiding the movement of the memory expansion card 400. There are multiple guide slots 60, arranged sequentially along the X-axis. Each guide slot 60 corresponds to a socket 11 and is used to guide the movement of a memory expansion card 400 along the Y-axis. The sidewalls of each guide slot 60 are designed to prevent the memory expansion card 400 from deflecting along the Y-axis.

[0058] It is understandable that, in other embodiments, the guide groove 60 may also be provided only on the top shell 40 , or only on the bottom shell 50 .

[0059] The sidewalls of each guide groove 60 include a first groove sidewall 61 and a second groove sidewall 62 spaced apart along the X-axis direction. In this embodiment, the first groove sidewall 61 and the second groove sidewall 62 are both protruded from the top shell 40 and the bottom shell 50. The first groove sidewall 61 protruded from the top shell 40, the second groove sidewall 62 protruded from the top shell 40, and the top shell 40 together form the guide groove 60 of the top shell 40. The first groove sidewall 61 protruded from the bottom shell 50, the second groove sidewall 62 protruded from the bottom shell 50, and the bottom shell 50 together form the guide groove 60 of the bottom shell 50.

[0060] In this embodiment, the first slot sidewall 61 and the second slot sidewall 62 are generally elongated, extending along the Y-axis and spaced apart along the X-axis. In this embodiment, the width of the space between the first slot sidewall 61 and the second slot sidewall 62 along the X-axis is slightly greater than the width of the memory expansion card 400.

[0061] In other embodiments, the guide groove 60 may be directly opened on the top shell 40 and the bottom shell 50. In this case, the guide groove 60 of the top shell 40 is recessed from the surface of the top shell 40 toward the accommodating cavity in a direction away from the accommodating cavity, and the guide groove 60 of the bottom shell 50 is recessed from the surface of the bottom shell 50 toward the accommodating cavity in a direction away from the accommodating cavity.

[0062] The plug-in assembly 300 may include a circuit board 310 and a memory slot 330. The circuit board 310 and the memory slot 330 are both installed in the accommodating cavity to enable the plug-in assembly 300 to be installed in the case 100. In this embodiment, there are multiple circuit boards 310. The multiple circuit boards 310 may include a first circuit board 311 and a second circuit board 313. The first circuit board 311 and the second circuit board 313 are both installed between the two side shells 30 and are spaced apart from each other. The first circuit board 311 is spaced apart from and opposite to the first panel 10a, and is enclosed with the two side shells 30 and the first panel 10a to form a first accommodating cavity 17. The first accommodating cavity 17 is used to accommodate the memory expansion card 400. The second circuit board 313 is opposite to the second panel 10b, and is enclosed with the two side shells 30 and the second panel 10b to form a second accommodating cavity 18. The second accommodating cavity 18 is used to accommodate the memory expansion card 400 and the power module 700. It will be appreciated that, by providing cavities for accommodating memory expansion cards 400 on both sides of the memory expansion integrated device 4, this embodiment enables the memory expansion integrated device 4 to integrate more memory expansion cards 400, effectively improving the memory density of the memory expansion integrated device 4. Of course, in other embodiments, a cavity for accommodating memory expansion cards 400 may be provided on only one side of the memory expansion integrated device 4. For example, only the first cavity 17 may be provided, in which case only the first panel 10a may have the first plug hole 11a, or only the second cavity 18 may be provided, in which case only the second panel 10b may have the second plug hole 11b. Of course, in other embodiments, cavities for accommodating memory expansion cards 400 may be provided on three, four, five, or six sides of the memory expansion integrated device 4.

[0063] In this embodiment, the first circuit board 311 is electrically connected to the second circuit board 313. In other embodiments, the first circuit board 311 and the second circuit board 313 may not be electrically connected.

[0064] The plug assembly 300 is provided with a vent 315 for ventilation. In this embodiment, the vent 315 is provided on the first circuit board 311 and the second circuit board 313. Specifically, the vent 315 of the first circuit board 311 penetrates the first circuit board 311 along the thickness direction of the first circuit board 311 and communicates with the first receiving cavity 17. The vent 315 of the second circuit board 313 penetrates the second circuit board 313 along the thickness direction of the second circuit board 313 and communicates with the second receiving cavity 18. It will be understood that in other embodiments, the vent 315 may be provided only on the first circuit board 311 or the second circuit board 313.

[0065] In this embodiment, the vents 315 of the first circuit board 311 and the vents 315 of the second circuit board 313 are both rectangular. It is understood that in other embodiments, there may be multiple vents 315 of the first circuit board 311 and the vents 315 of the second circuit board 313, and the multiple vents 315 of the first circuit board 311 and the vents 315 of the second circuit board 313 are spaced apart from each other, so that the vents 315 of the first circuit board 311 and the vents 315 of the second circuit board 313 appear hollow. It is understood that in other embodiments, the surface of the first circuit board 311 facing the top shell 40 may be spaced apart from the top shell 40 to form the vents 315, and / or the surface of the first circuit board 311 facing the bottom shell 50 may be spaced apart from the bottom shell 50 to form the vents 315.

[0066] The memory slot 330 is mounted on the surface of the circuit board 310 facing the socket 11 and is electrically connected to the circuit board 310. The memory slot 330 is used to connect to the memory expansion card 400. For example, the memory slot 330 can be a PCIE (Peripheral Component Interconnect Express, a high-speed serial computer expansion bus standard) slot. Specific models of memory slots 330 include E3.S, E3.L, E1.S, and E1.L. In this case, the memory expansion cards 400 connected to the memory slot 330 correspond to E3.S interface memory expansion cards, E3.L interface memory expansion cards, E1.S interface memory expansion cards, and E1.L interface memory expansion cards, respectively.

[0067] In this embodiment, there are multiple memory slots 330, and the multiple memory slots 330 include a first memory slot 331 and a second memory slot 333. There are multiple first memory slots 331, and the multiple first memory slots 331 are installed on the surface of the first circuit board 311 facing the first panel 10a, and are spaced apart from each other and arranged in sequence along the length direction of the first circuit board 311. Each first memory slot 331 is arranged opposite to a first plug hole 11a provided on the first panel 10a. There are multiple second memory slots 333, and the multiple second memory slots 333 are installed on the surface of the second circuit board 313 facing the second panel 10b, and are spaced apart from each other and arranged in sequence along the length direction of the second circuit board 313. Each second memory slot 333 is arranged opposite to a second plug hole 11b provided on the second panel 10b. In this embodiment, the plug-in assembly 300 may further include a third circuit board 350. The third circuit board 350 is mounted on the bottom case 50 and is disposed opposite the top case 40. It is mounted between the first circuit board 311 and the second circuit board 313 and is electrically connected to both the first circuit board 311 and the second circuit board 313. Exemplarily, the third circuit board 350 is electrically connected to the first circuit board 311 and the second circuit board 313 by soldering wires. In this embodiment, the plane on which the first circuit board 311 and the plane on which the second circuit board 313 are located are substantially parallel, and the plane on which the third circuit board 350 is located is substantially perpendicular to the planes on which the first circuit board 311 and the second circuit board 313 are located.

[0068] The memory expansion card 400 may include a CXL (Compute Express Link) control chip and a memory. The memory may include a dual inline memory module (DIMM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), a solid state drive (SSD), or persistent memory (PMEM). The memory is the actual physical carrier that provides storage space for the electronic device 3.

[0069] The CXL control chip is used to write data to or read data from the memory in the memory expansion card 400 based on read / write data requests sent by the electronic device 3. The CXL control chip is also called a memory expansion (CXL memory expander) chip, a CXL memory expander controller, or a CXL memory expander pooling chip.

[0070] There are multiple memory expansion cards 400, including a first memory expansion card 410 and a second memory expansion card 430. The first memory expansion card 410 is received in the first receiving cavity 17 and is removably plugged into and electrically connected to the first memory slot 331. The second memory expansion card 430 is received in the second receiving cavity 18 and is removably plugged into and electrically connected to the second memory slot 333, thereby achieving electrical connection between the memory expansion card 400 and the plug-in assembly 300.

[0071] Among them, the memory expansion card 400 can include a plug-in state and a pull-out state. Specifically, take the memory expansion card 400 as the first memory expansion card 410 as an example. When the first memory expansion card 410 is in the plug-in state, the first memory expansion card 410 can penetrate the first plug hole 11a and be plugged into the first memory slot 331. When the first memory expansion card 410 is in the pull-out state, the first memory expansion card 410 can be detached from the first plug hole 11a. The plug-in state and pull-out state of the second memory expansion card 430 can refer to the first memory expansion card 410 and will not be repeated here. It can be understood that when the memory expansion integrated device 4 is actually used, the number of the first memory expansion card 410 and the second memory expansion card 430 can be increased or decreased according to the actual demand for memory.

[0072] There are multiple connection interfaces 500, which are mounted on the circuit board 310 and electrically connected to the circuit board 310. Each connection interface 500 is disposed opposite a through hole 13, and the interface of each connection interface 500 is exposed relative to a through hole 13, thereby facilitating the electrical connection between the memory expansion integrated device 4 and the interface of the external electronic device 3 through the connection interface 500.

[0073] Exemplarily, the connection interface 500 may be a UBC connector (Union Bus Connector), a UBC-DD (Unified Bus Connector-Double Density), an MCIO (Mini Cool Edge Input / Output) connector, an ASM (OminiEdge ASM) connector, or a fiber optic interface connector. The fiber optic interface connector includes an SFP (Small Form Pluggable) connector, an OSFP (Octal Small Formfactor Pluggable) connector, or a QSFP (Quad Small Form-factor Pluggable) connector.

[0074] In this embodiment, the multiple connection interfaces 500 include a first connection interface 510 and a second connection interface 530. There are multiple first connection interfaces 510, each of which is mounted on the first panel 10a. Each first connection interface 510 is positioned opposite a first through-hole 13a, such that the interface of the first connection interface 510 is exposed relative to the first through-hole 13a, thereby exposing the interface of the first connection interface 510 relative to the outer surface of the housing 100. This facilitates connection between the memory expansion integrated device 4 and the external electronic device 3 via the first connection interface 510. In this embodiment, the multiple first connection interfaces 510 are electrically connected to the first circuit board 311 via wires, thereby establishing an electrical connection between the first connection interface 510 and the plug-in assembly 300.

[0075] There are multiple second connection interfaces 530, all mounted on the second panel 10b. Each second connection interface 530 is positioned opposite a second through hole 13b, such that the interface of the second connection interface 530 is exposed relative to the second through hole 13b, thereby exposing the interface of the second connection interface 530 relative to the outer surface of the housing 100. This facilitates connection between the memory expansion integrated device 4 and the external electronic device 3 via the second connection interfaces 530. In this embodiment, the multiple second connection interfaces 530 are all electrically connected to the second circuit board 313 via wires, thereby establishing an electrical connection between the second connection interfaces 530 and the plug-in assembly 300.

[0076] The power module 700 is mounted in the second receiving cavity 18 so that the power module 700 is located between the second panel 10b and the second circuit board 313. The power module 700 is electrically connected to the second circuit board 313 to establish an electrical connection between the power module 700 and the plug assembly 300. The power module 700 is used to supply power to the first circuit board 311 and the second circuit board 313 in the plug assembly 300. The interface of the power module 700 is exposed relative to the opening 15 to facilitate electrical connection of the power module 700 to an external power source via a power cable. In this embodiment, there are two power modules 700, and the interface of each power module 700 is exposed relative to one of the openings 15.

[0077] The power button 820 and indicator 830 are both mounted on the first panel 10a and connected to the first circuit board 311 to achieve electrical connection between the power button 820 and indicator 830 and the plug-in assembly 300, thereby enabling signal transmission between the power button 820 and the power module 700. The power button 820 is used to turn on and off the memory expansion integrated device 4. In this embodiment, there are multiple indicators 830, including a first indicator 831 and a second indicator 833. The first indicator 831 is used to indicate that the memory expansion integrated device 4 is in an operating state. The second indicator 833 is used to indicate that the memory expansion integrated device 4 is in a fault state. Exemplarily, the first indicator 831 and the second indicator 833 are both indicator lights.

[0078] In this embodiment, the heat sink 850 is mounted on the surface of the third circuit board 350 facing away from the bottom case 50 and is electrically connected to the third circuit board 350, so that the heat sink 850 is located between the first circuit board 311 and the second circuit board 313. Exemplarily, the heat sink 850 is a fan. It is understood that in other embodiments, the heat sink 850 may also be mounted on the surface of the first circuit board 311 facing away from the first panel 10a, and / or the heat sink 850 may be mounted on the surface of the second circuit board 313 facing away from the second panel 10b.

[0079] In this embodiment, the memory expansion integrated device 4 further includes a processor, which is mounted on the third circuit board 350 and electrically connected to the third circuit board 350. The processor is capable of managing the first memory expansion card 410 and the second memory expansion card 430. For example, the processor can manage the first memory expansion card 410 and the second memory expansion card 430 by running a fabric management (FM) program. For example, the processor can be a management control chip 810 or a central processing unit (CPU).

[0080] Here, "managing first memory expansion card 410 and second memory expansion card 430" means that the processor, by running the FM program, can record the address and memory size of each first memory expansion card 410 and each second memory expansion card 430 in the memory expansion integrated device 4, as well as the specific electronic devices 3 that are signal-interconnected with the first memory expansion card 410 and the second memory expansion card 430. When the memory expansion integrated device 4 is connected to an electronic device 3 to be connected, such as a server, the processor in the memory expansion integrated device 4 can run the FM program to allocate the first memory expansion card 410 and / or the second memory expansion card 430 for signal interconnection with the connected electronic device 3 based on the memory size required by the connected electronic device 3, thereby providing memory to the connected electronic device 3.

[0081] It is understood that the memory expansion integrated device 4 may not be provided with a processor, or the processor provided, such as the management control chip 810, may not run the FM program. In this case, the electronic device 3 connected to the memory expansion integrated device 4, such as a server, is typically provided with a central processing unit (CPU) capable of running the FM program. When the electronic device 3 is connected to multiple memory expansion integrated devices 4, the FM program running on the CPU of the electronic device 3 can manage each first memory expansion card 410 and each second memory expansion card 430 in the multiple memory expansion integrated devices 4.

[0082] In this embodiment, the processor is used as the management control chip 810 for example. The management control chip 810 can be a SOC chip (System on Chip) or a BMC chip (Baseboard Management Controller). Specifically, the management control chip 810 is mounted on a surface of the third circuit board 350 facing away from the bottom case 50 and is electrically connected to the third circuit board 350 to achieve electrical connection between the management control chip 810 and the plug-in assembly 300, thereby enabling the management control chip 810 to manage the first memory expansion card 410 and the second memory expansion card 430.

[0083] In this embodiment, the management and control chip 810 is spaced apart from the heat sink 850 and is electrically connected to the heat sink 850 via the third circuit board 350, so that the management and control chip 810 can manage the heat sink 850. Specifically, the management and control chip 810 can control the opening and closing of the heat sink 850 and the rotation speed of the heat sink 850, such as a fan.

[0084] In addition, the management control chip 810 can also be used to manage the operating status and fault status of the memory expansion integrated device 4. Specifically, the management control chip 810 is electrically connected to the indicator 830 via the third circuit board 350 and the first circuit board 311. When the management control chip 810 detects signal transmission between the electronic device 3 and the memory expansion card 400 of the memory expansion integrated device 4, it can transmit a signal to the first indicator 831 in the indicator 830 to control the first indicator 831 to turn on, so that the first indicator 831 indicates that the memory expansion integrated device 4 is in the operating state. When the memory expansion integrated device 4 fails, the management control chip 810 can detect the interruption of signal transmission between the electronic device 3 and the memory expansion card 400 of the memory expansion integrated device 4 and transmit a signal to the second indicator 833 to control the second indicator 833 to turn on, so that the second indicator 833 indicates that the memory expansion integrated device 4 is in the fault state.

[0085] Continuing to refer to Figures 1 and 2, in the assembled computing device 1, the power cable is connected between the external power supply and the interface of the power module 700. The power module 700 can convert the input voltage of the external power supply into the operating voltage of the first circuit board 311 and the second circuit board 313 to supply power to the first circuit board 311 and the second circuit board 313, thereby enabling the operation of the memory expansion integrated device 4. The connecting cable is connected between the connecting interface 500 and the interface of the electronic device 3 to achieve the connection between the memory expansion integrated device 4 and the electronic device 3. Specifically, each first connecting interface 510 can be connected to an electronic device 3 via a connecting cable to achieve connection with the electronic device 3 from the front side of the memory expansion integrated device 4. Each second connecting interface 530 can be connected to an electronic device 3 via a connecting cable to achieve connection with the electronic device 3 from the back side of the memory expansion integrated device 4.

[0086] The first memory expansion card 410 is removably plugged into the first memory slot 331, and the second memory expansion card 430 is removably plugged into the second memory slot 333, thereby enabling the memory expansion card 400 to be removably plugged into the memory slot 330. Specifically, during the insertion of the memory expansion card 400, the first memory expansion card 410 is inserted through the first insertion hole 11a and moves along the guide slot 60 until it is plugged into the first memory slot 331, thereby establishing an electrical connection between the first memory expansion card 410 and the first circuit board 311. The second memory expansion card 430 is inserted through the second insertion hole 11b and moves along the guide slot 60 until it is plugged into the second insertion hole 11b, thereby establishing an electrical connection between the second memory expansion card 430 and the second circuit board 313. When removing the memory expansion card 400, the first memory expansion card 410 separates from the first memory slot 331 and moves along the guide slot 60 until it is disengaged from the first insertion hole 11a. The second memory expansion card 430 separates from the second memory slot 333 and moves along the guide slot 60 until it is disengaged from the second insertion hole 11b. By arranging for the first memory expansion card 410 to be removably inserted into the first memory slot 331 and the second memory expansion card 430 to be removably inserted into the second memory slot 333, management and maintenance of the first memory expansion card 410 and the second memory expansion card 430 are facilitated.

[0087] When using computing device 1, pressing power button 820 activates memory expansion integrated device 4. During operation, management control chip 810 controls heat sink 850, which rotates and drives airflow, creating a wind flow. This wind flow can flow from first panel 10a to second panel 10b, from first receiving cavity 17, through vents 315 on first circuit board 311 and second circuit board 313, to second receiving cavity 18, dissipating heat from plug-in assembly 300, memory expansion card 400, connection interface 500, and power module 700. External electronic device 3 can access memory expansion integrated device 4 via first connection interface 510 and / or second connection interface 530. Management control chip 810 runs the FM program to allocate the first memory expansion card 410 and / or second memory expansion card 430 to the external electronic device 3 for signal interconnection based on the memory size required by the external electronic device 3, thereby enabling memory expansion of the external electronic device 3 using the memory expansion card 400.

[0088] When the management control chip 810 detects signal transmission between the external electronic device 3 and the memory expansion card 400, it controls the first indicator 831 to turn on, so that the first indicator 831 indicates that the memory expansion integrated device 4 is in the operating state. When the management control chip 810 detects interruption of signal transmission between the external electronic device 3 and the memory expansion card 400, it controls the second indicator 833 to turn on, so that the second indicator 833 indicates that the memory expansion integrated device 4 is in the fault state.

[0089] In the computing device 1 provided in the embodiment of the present application, the first memory slot 331 in the memory expansion integrated device 4 is electrically connected to the memory expansion card 400, and the first connection interface 510 is used to connect to the electronic device 3, so as to realize the expansion of the memory of the electronic device 3 by using the memory expansion card 400. The memory expansion integrated device 4 in the embodiment of the present application can provide a large amount of memory space by plugging in a large number of memory expansion cards 400, thereby meeting the needs of the computing device 1 for scenarios such as big data processing. In addition, the memory expansion integrated device 4 can be connected to multiple electronic devices 3 through the first connection interface 510, and multiple electronic devices 3 can all access the memory expansion integrated device 4 through the first connection interface 510, thereby achieving high utilization of the memory expansion integrated device 4 and avoiding the problem that the memory exclusively occupied by the existing electronic device 3 cannot be allocated to other electronic devices 3. At the same time, the memory expansion integrated device 4 is independent of the electronic device 3, and also solves the problem that a large amount of memory is scattered in different electronic devices 3, which is inconvenient for operation and management.

[0090] In addition, by providing a first plug hole 11a on the housing 100 opposite to the first memory slot 331, the first memory expansion card 410 can be inserted into and removed from the first plug hole 11a, thereby facilitating and improving the management and maintenance efficiency of the first memory expansion card 410. By providing a second plug hole 11b on the housing 100 opposite to the second memory slot 333, the second memory expansion card 430 can be inserted into and removed from the second memory slot 333, thereby facilitating and improving the management and maintenance efficiency of the second memory expansion card 430.

[0091] In addition, by setting multiple first memory slots 331 in the memory expansion integrated device 4, the number of memory expansion cards 400 plugged into the first memory slots 331 can be increased, thereby facilitating the increase of the memory space of the memory expansion integrated device 4, thereby achieving high scalability of the memory expansion integrated device 4.

[0092] In addition, in the memory expansion integrated device 4 provided in the embodiment of the present application, by simultaneously providing the first connection interface 510 and the second connection interface 530, the electronic device 3 can be connected to the memory expansion integrated device 4 from different sides, thereby improving the plug-in density of the memory expansion integrated device 4 and expanding the usage scenarios of the memory expansion integrated device 4. In addition, by providing an electrical connection between the first circuit board 311 and the second circuit board 313, when the electronic device 3 is connected to the memory expansion integrated device 4 from the side of the first connection interface 510, the electronic device 3 can use the second memory expansion card 430 located on the same side as the second connection interface 530 to expand the memory. When the electronic device 3 is connected to the memory expansion integrated device 4 from the side of the second connection interface 530, the electronic device 3 can use the first memory expansion card 410 located on the same side as the first connection interface 510 to expand the memory, thereby improving the utilization efficiency of the memory expansion cards in the memory expansion integrated device 4.

[0093] In addition, this embodiment arranges multiple first plug holes 11a on opposite sides of the first through hole 13a, so that the multiple first plug holes 11a are located on opposite sides of the first connection interface 510 exposed relative to the first through hole 13a, thereby making the first connection interface 510 relatively concentrated on the first panel 10a. When the external electronic device 3 is connected to the memory expansion integrated device 4 through the first connection interface 510, the electronic devices 3 are concentrated at the plug-in position of the memory expansion integrated device 4, which is beneficial for the management and control chip 810 to centrally manage and control multiple electronic devices 3.

[0094] Please refer to FIG6 , which is a schematic structural diagram of the memory expansion integrated device 4 in the computing device 1 shown in FIG1 in a second example.

[0095] The memory expansion integrated device 4 of the second example differs from the memory expansion integrated device 4 of the first example in that, in the memory expansion integrated device 4 of the second example, the plurality of first through holes 13a are distributed on opposite sides of the first plugging hole 11a along the length direction of the first panel 10a.

[0096] Similar to the arrangement of the first through-hole 13a and the first plugging hole 11a, the plurality of second through-holes 13b are distributed on opposite sides of the second plugging hole 11b along the length of the second panel 10b. It will be appreciated that the arrangement of the second through-holes 13b and the second plugging hole 11b on the second panel 10b of the memory expansion integrated device 4 of the second example may also be the same as the arrangement of the second through-holes 13b and the second plugging hole 11b on the second panel 10b of the memory expansion integrated device 4 of the first example.

[0097] In the memory expansion integrated device 4 of this example, multiple first through holes 13a are provided on opposite sides of the first plug-in hole 11a along the length direction of the first panel 10a, so that the first plug-in holes 11a are concentrated in the middle of the first panel 10a. When the electronic device 3 is plugged into the first connection interface 510 exposed relative to the first through hole 13a via a connecting cable, obstruction of the connecting cable to the first memory expansion card 410 passing through the first plug-in hole 11a is avoided, and the electronic device 3 can be easily plugged in from both sides of the first panel 10a.

[0098] It should be understood that the memory expansion integrated device 4 provided in the embodiment of the present application can flexibly arrange the positions of the first through hole 13a and the first plug hole 11a on the first panel 10a, and the positions of the second through hole 13b and the second plug hole 11b on the second panel 10b according to actual needs. For example, the first through hole 13a can be arranged on one side of the first panel 10a along the length direction, and the second through hole 13b can be arranged on one side of the second panel 10b along the length direction. The embodiment of the present application does not impose any restrictions on this.

[0099] Referring to Figure 7 , Figure 7 is a schematic diagram illustrating a portion of the structure of the memory expansion integrated device 4 in the computing device 1 shown in Figure 1 in a third example. Figure 7 shows only a portion of the second memory slot 333 , which is presented in perspective and indicated by dashed lines.

[0100] The memory expansion integrated device 4 of the third example is different from the memory expansion integrated device 4 of the first example in that the memory expansion integrated device 4 of the third example further includes a partition 900 , which is installed inside the box 100 .

[0101] Specifically, the partition 900 is connected between the two side shells 30 and is spaced apart from the top shell 40 and the bottom shell 50. In this embodiment, there are multiple partitions 900, and the multiple partitions 900 include a first partition 910 and a second partition 930. The first partition 910 is installed in the first receiving cavity 17, and divides the first receiving cavity 17 into a plurality of first receiving portions 171 along the height direction of the first panel 10a. The first panel 10a of the box body 100 is provided with a plurality of first plug holes 11a, and the plurality of first plug holes 11a spaced apart along the length direction of the first panel 10a constitute a group of first plug holes 11a. The plurality of groups of first plug holes 11a are arranged in sequence along the height direction of the first panel 10a. Each group of first plug holes 11a is connected to a first receiving portion 171.

[0102] A plurality of first memory slots 331 spaced apart along the length of the first circuit board 311 constitute a group of first memory slots 331. The groups of first memory slots 331 are arranged sequentially along the height of the first circuit board 311. Each group of first memory slots 331 is located in a first receiving portion 171. One first memory slot 331 in each group of first memory slots 331 is positioned opposite one first insertion hole 11a in a group of first insertion holes 11a.

[0103] The second divider 930 is mounted on the second receiving cavity 18 and divides the second receiving cavity 18 into a plurality of second receiving sections 181 along the height direction of the second panel 10b. The second panel 10b is provided with a plurality of second insertion holes 11b. The plurality of second insertion holes 11b spaced apart along the length direction of the second panel 10b constitute a group of second insertion holes 11b. The plurality of groups of second insertion holes 11b are arranged sequentially along the height direction of the second panel 10b. Each group of second insertion holes 11b communicates with a second receiving section 181. A plurality of second memory slots 333 spaced apart along the length direction of the second circuit board 313 constitute a group of second memory slots 333. The plurality of groups of second memory slots 333 are arranged sequentially along the height direction of the second circuit board 313. Each group of second memory slots 333 is located in a second receiving section 181. One second memory slot 333 in each group of second memory slots 333 is arranged opposite one second insertion hole 11b in a group of second insertion holes 11b.

[0104] The multiple memory expansion cards 400 include multiple first memory expansion cards 410 and multiple second memory expansion cards 430. Some of the multiple first memory expansion cards 410 are provided with a set of first plug holes 11a and are received in a first receiving portion 171. These cards are respectively plugged into a set of first memory slots 331 located in a first receiving portion 171. Some of the multiple second memory expansion cards 430 are provided with a set of second plug holes 11b and are received in a second receiving portion 181. These cards are respectively plugged into a set of second memory slots 333 located in a second receiving portion 181.

[0105] In this example, the height of the box body 100 is 2U, that is, the height of the first panel 10a and the second panel 10b is 2U. There is one first partition 910, which divides the first receiving cavity 17 into two first receiving parts 171 along the height direction of the first panel 10a, and the height of each first receiving part 171 along the Z-axis direction is approximately 1U. There is one second partition 930, which divides the second receiving cavity 18 into two second receiving parts 181 along the height direction of the second panel 10b. The multiple first plug holes 11a constitute two groups of first plug holes 11a, and the two groups of first plug holes 11a are respectively connected to the two first receiving parts 171. The multiple second plug holes 11b constitute two groups of second plug holes 11b, and the two groups of second plug holes 11b are respectively connected to the two second receiving parts 181. The plurality of first memory slots 331 form two groups of first memory slots 331. The two groups of first memory slots 331 are located in the two first receiving portions 171, respectively. Each first memory slot 331 in the two groups of first memory slots 331 is disposed opposite each first insertion hole 11a in the two groups of first insertion holes 11a. The plurality of second memory slots 333 form two groups of second memory slots 333. The two groups of second memory slots 333 are located in the two second receiving portions 181, respectively. Each second memory slot 333 in the two groups of second memory slots 333 is disposed opposite each second insertion hole 11b in the two groups of second insertion holes 11b. Multiple memory expansion cards 400 constitute two groups of first memory expansion cards 410 and two groups of second memory expansion cards 430. The two groups of first memory expansion cards 410 are respectively provided with two groups of first plug-in holes 11a, and are respectively accommodated in the two first accommodating portions 171, and are respectively plugged into the two groups of first memory slots 331. The two groups of second memory expansion cards 430 are respectively provided with two groups of second plug-in holes 11b, and are respectively accommodated in the two second accommodating portions 181, and are respectively plugged into the two groups of second memory slots 333.

[0106] It is understandable that in other embodiments, the height of the box 100 can also be 3U, 4U, 5U, etc. At this time, the arrangement of the first plug hole 11a, the second plug hole 11b, the first memory slot 331 and the second memory slot 333 can refer to the arrangement when the height of the box 100 is 2U. The embodiment of the present application does not limit the height of the box 100.

[0107] In the memory expansion integrated device 4 provided in this example, a first partition 910 and a second partition 930 are provided to divide the first receiving cavity 17 into a plurality of first receiving portions 171, and to divide the second receiving cavity 18 into a plurality of second receiving portions 181. This helps increase the number of memory expansion cards 400 that can be accommodated, thereby improving the memory expansion capability of the memory expansion integrated device 4.

[0108] Referring to FIG8 , FIG8 is a schematic diagram of an exploded structure of a portion of the structure of the memory expansion integrated device 4 in the computing device 1 shown in FIG1 in a fourth example. FIG8 shows only a portion of the second memory slot 333 , which is presented in perspective and indicated by dashed lines.

[0109] The memory expansion integrated device 4 in the fourth example differs from the memory expansion integrated device 4 in the first example in that the memory expansion integrated device 4 in the fourth example further includes an adapter circuit board 600 , which is electrically connected between the connection interface 500 and the circuit board 310 of the plug-in assembly 300 .

[0110] Specifically, the memory expansion integrated device 4 of the fourth example includes multiple adapter circuit boards 600, including a first adapter circuit board 610 and a second adapter circuit board 630. The first adapter circuit board 610 is electrically connected between the first circuit board 311 and the first connection interface 510, and the second adapter circuit board 630 is electrically connected between the second circuit board 313 and the second connection interface 530. Exemplarily, the first adapter circuit board 610 is electrically connected to the first circuit board 311 and the first connection interface 510 via wires, and the second adapter circuit board 630 is electrically connected to the second circuit board 313 and the second connection interface 530 via wires.

[0111] In the memory expansion integrated device 4 of the fourth example, a first adapter circuit board 610 is provided to electrically connect the first connection interface 510 and the first circuit board 311, and a second adapter circuit board 630 is provided to electrically connect the second connection interface 530 and the second circuit board 313, so as to realize the electrical connection between the adapter circuit board 600 and the connection interface 500 and the circuit board 310 of the plug-in assembly 300. The connection method is simple and the connection structure is neat, which can avoid the problem of messy connection caused by directly connecting multiple wires through the connection interface 500 and the circuit board 310.

[0112] Please refer to FIG9 , which is a schematic structural diagram of a portion of the structure of the memory expansion integrated device 4 in the computing device 1 shown in FIG1 in a fifth example.

[0113] The memory expansion integrated device 4 in the fifth example is different from the memory expansion integrated device 4 in the first example in that a side shell 30 of the memory expansion integrated device 4 in the fifth example is provided with a plug hole 11 and a through hole 13, and the plug hole 11 and the through hole 13 both penetrate the side shell 30 along the thickness direction of the side shell 30.

[0114] Specifically, the memory expansion integrated device 4 in the fifth example further includes a fourth circuit board, a third memory slot, a third memory expansion card 450, and a third connection interface 550. The insertion hole 11 and through hole 13 provided on the side shell 30 can be arranged with reference to the positions of the first insertion hole 11a and the first through hole 13a, respectively, in the first example. The fourth circuit board, the third memory slot, the third memory expansion card 450, and the third connection interface 550 can be arranged with reference to the structures and positions of the first circuit board 311, the first memory slot 331, the first memory expansion card 410, and the first connection interface 510, respectively. This embodiment of the present application will not be further described.

[0115] It is understandable that in other examples, the memory expansion integrated device 4 can also be provided with the plug-in hole 11 and the through hole 13 at other positions of the box body 100, such as on both side shells 30, so as to enable the electronic device 3 to be plugged into the memory expansion integrated device 4 from the direction of the two side shells 30. The embodiment of the present application does not limit this.

[0116] Please refer to FIG10 , which is a schematic diagram of the three-dimensional structure of a computing device 1 provided in the second embodiment of the present application.

[0117] The computing device 1 of the second embodiment is different from the computing device 1 of the first embodiment in that the computing device 1 of the second embodiment does not include a cabinet 2 .

[0118] Specifically, computing device 1 includes an electronic device 3 and a memory expansion integrated device 4. Electronic device 3 is electrically connected to a first connection interface 510 or a second connection interface 530 of memory expansion integrated device 4 via a cable to enable signal transmission between electronic device 3 and memory expansion integrated device 4. There may be multiple electronic devices 3, all of which may be servers 3a, or some may be servers 3a and some may be switches 3b, with switches 3b connected between memory expansion integrated device 4 and servers 3a. This allows memory expansion integrated device 4 to be connected to more servers 3a via switches 3b, regardless of the number of first connection interfaces 510 and second connection interfaces 530. This allows more servers 3a to expand their memory via memory expansion integrated device 4. Alternatively, switch 3b may be connected to multiple memory expansion integrated devices 4 and multiple servers 3a, allowing multiple servers 3a to share the expanded memory of multiple memory expansion integrated devices 4, thereby increasing the memory expansion density for multiple servers 3a. It is understood that the memory expansion integrated device 4 in computing device 1 of the second embodiment may be any of the memory expansion integrated devices 4 described in the first to fifth examples.

[0119] The above disclosure is only a preferred embodiment of the present application, and it is certainly not intended to limit the scope of the rights of the present application. A person skilled in the art can understand that all or part of the processes of the above embodiments and equivalent changes made in accordance with the claims of the present application are still within the scope of the present application.

Claims

1. A computing device, characterized in that It includes an electronic device and a memory expansion integrated device, the memory expansion integrated device includes a case, a first circuit board, a first connection interface, multiple first memory slots and multiple first memory expansion cards, the first circuit board, the first connection interface and the multiple first memory slots are all arranged inside the case, the multiple first memory slots are arranged on the first circuit board at intervals, the first connection interface is electrically connected to the first circuit board, the first connection interface is exposed relative to the outer surface of the case, the case is provided with multiple first plug holes, each of the first plug holes connects the inside and the outside of the case, each of the first memory expansion cards is inserted into one of the first plug holes and can be detachably plugged into one of the first memory slots, and the electronic device is connected to the first connection interface of the memory expansion integrated device.

2. A memory expansion integrated device, characterized in that: The memory expansion integrated device is used to expand the memory for the server. The memory expansion integrated device includes a case, a first circuit board, a first connection interface, a plurality of first memory slots and a plurality of first memory expansion cards. The first circuit board, the first connection interface and the plurality of first memory slots are all arranged inside the case. The plurality of first memory slots are arranged at intervals on the first circuit board. The first connection interface is electrically connected to the first circuit board. The first connection interface is exposed relative to the outer surface of the case and is used to connect to the server. The case is provided with a plurality of first plug holes, each of which connects the inside and the outside of the case. Each of the first memory expansion cards is inserted into one of the first plug holes and can be detachably plugged into one of the first memory slots.

3. The memory expansion integrated device according to claim 2, characterized in that: The memory expansion integrated device also includes a second circuit board, a second connection interface, multiple second memory slots and multiple second memory expansion cards. The second circuit board, the second connection interface and the multiple second memory slots are all arranged inside the box. The second circuit board is spaced apart from the first circuit board, and the multiple second memory slots are spaced apart from the second circuit board. The second connection interface is electrically connected to the second circuit board, and the second connection interface is exposed relative to the outer surface of the box and is used to connect to the server. The box is also provided with multiple second plug-in holes. The multiple second plug-in holes and the multiple first plug-in holes are respectively located on opposite sides or adjacent sides of the box. Each second plug-in hole connects the inside and the outside of the box. Each second memory expansion card is inserted into a second plug-in hole and can be detachably plugged into a second memory slot.

4. The memory expansion integrated device according to claim 3, characterized in that: The first connection interface is a UBC connector, a UBC-DD connector, a MCIO connector, an ASM connector or a fiber optic interface connector, and / or the second connection interface is a UBC connector, a UBC-DD connector, a MCIO connector, an ASM connector or a fiber optic interface connector.

5. The memory expansion integrated device according to claim 3, characterized in that: The box body includes a first panel and a second panel that are arranged opposite to each other, the first plug hole is provided on the first panel and penetrates the first panel along the thickness direction of the first panel, the first circuit board is spaced apart from and arranged opposite to the first panel, the first memory slot is provided on the surface of the first circuit board facing the first panel, and the first connection interface is exposed relative to the outer surface of the first panel; and / or, the second plug hole is provided on the second panel and penetrates the second panel along the thickness direction of the second panel, the second circuit board is spaced apart from and arranged opposite to the first circuit board, and is spaced apart from and arranged opposite to the second panel, the second memory slot is provided on the surface of the second panel facing the second panel, and the second connection interface is exposed relative to the outer surface of the second panel.

6. The memory expansion integrated device according to any one of claims 3 to 5, characterized in that: The memory expansion integrated device further includes a power module, which is located between the second panel and the second circuit board and is electrically connected to the second circuit board.

7. The memory expansion integrated device according to any one of claims 3 to 5, characterized in that: The memory expansion integrated device also includes a third circuit board, which is installed between the first circuit board and the second circuit board and is electrically connected to the first circuit board and the second circuit board.

8. The memory expansion integrated device according to claim 7, characterized in that: The memory expansion integrated device also includes a processor, which is installed on the third circuit board and electrically connected to the third circuit board. The processor can manage multiple first memory expansion cards and multiple second memory expansion cards.

9. The memory expansion integrated device according to claim 7, characterized in that: The memory expansion integrated device also includes a management control chip and an indicator. The management control chip is installed on the third circuit board and is electrically connected to the third circuit board. The indicator is installed on the box and is electrically connected to the third circuit board. The management control chip is used to obtain a transmission signal between the memory expansion card and the server, and control the indicator to indicate that the memory expansion integrated device is in an operating state or a fault state.

10. The memory expansion integrated device according to claim 7, characterized in that: The memory expansion integrated device also includes a heat sink, which is installed on the first circuit board and electrically connected to the first circuit board, or the heat sink is installed on the second circuit board and electrically connected to the second circuit board, or the heat sink is installed on the third circuit board and electrically connected to the third circuit board.

11. The memory expansion integrated device according to claim 10, characterized in that: The heat sink is located between the first circuit board and the second circuit board. Both the first circuit board and the second circuit board are provided with ventilation holes. The ventilation holes of the first circuit board penetrate the first circuit board along the thickness direction of the first circuit board, and the ventilation holes of the second circuit board penetrate the second circuit board along the thickness direction of the second circuit board.

12. The memory expansion integrated device according to any one of claims 3 to 5, characterized in that: Multiple first plug-in holes are located on opposite sides of the first connection interface, or, there are multiple first connection interfaces and multiple first connection interfaces are located on opposite sides of the multiple first plug-in holes, or, multiple second plug-in holes are located on opposite sides of the second connection interface, or, there are multiple second connection interfaces and multiple second connection interfaces are located on opposite sides of the multiple second plug-in holes.

13. The memory expansion integrated device according to any one of claims 3 to 12, characterized in that: A first receiving cavity is formed between the first panel and the first circuit board, and a second receiving cavity is formed between the second panel and the second circuit board. The memory expansion integrated device further comprises a first partition and a second partition. The first partition is installed in the first receiving cavity and divides the first receiving cavity into a plurality of first receiving portions along the height direction of the box body. The second partition is installed in the second receiving cavity and divides the second receiving cavity into a plurality of second receiving portions along the height direction of the box body. A plurality of first memory slots arranged at intervals along the length direction of the first circuit board constitute a group of first memory slots, a plurality of groups of first memory slots are arranged at intervals along the height direction of the first circuit board, and each group of first memory slots is located in a first accommodating portion, a plurality of second memory slots arranged at intervals along the length direction of the second circuit board constitute a group of second memory slots, a plurality of groups of second memory slots are arranged at intervals along the height direction of the second circuit board, and each group of second memory slots is located in a second accommodating portion.

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