Transmission circuit and communication device equipped with same

Abstract

A transmission circuit (10) is provided with: an input terminal (T0) for receiving a high-frequency signal; output terminals (T1, T2); amplification circuits (105A, 105B); a connection line (145); output circuits (170A, 170B); and switches (S1A, S1B). Each amplification circuit amplifies the high-frequency signal received at the input terminal. The output circuit (170A) transmits a signal amplified by the amplification circuit (105A) to the output terminal (T1). The output circuit (170B) transmits a signal amplified by the amplification circuit (105B) to the output terminal (T2). Each amplification circuit includes a carrier amplifier, a peak amplifier, and a hybrid coupler. In each amplifier, the carrier amplifier and the peak amplifier are respectively connected to two input terminals of the hybrid coupler. A corresponding output circuit is connected to one output terminal of the hybrid coupler. Each switch is connected to the other output terminal of the hybrid coupler. One output terminal of one hybrid coupler and one output terminal of the other hybrid coupler are interconnected via the connection line. High-frequency signals of mutually different phases are supplied to the first and second amplification circuits. The connection line has the same electrical length as that of at least one phase shift line of the hybrid couplers.

Description

Transmitter circuit and communication device incorporating the same

[0001] The present disclosure relates to a transmission circuit and a communication device equipped with the same, and more particularly to a technique for improving robustness against load fluctuations in a transmission circuit having an amplifier.

[0002] Japanese Patent Application Laid-Open Publication No. 2013-85179 (Patent Document 1) discloses a power amplifier circuit including an amplifier output phase shifter connected between the output terminal of a carrier amplifier (first amplifier) ​​and the output terminal of a peak amplifier (second amplifier), and a transformer connected to the amplifier output phase shifter and the output terminal of the peak amplifier.

[0003] JP 2013-85179 A

[0004] The power amplifier circuit disclosed in Japanese Patent Laid-Open No. 2013-85179 (Patent Document 1) is a so-called Doherty amplifier circuit. In the power amplifier circuit of Japanese Patent Laid-Open No. 2013-85179 (Patent Document 1), if the load impedance connected to the output terminal of the power amplifier circuit fluctuates, the impedance of the two amplifiers changes, which can cause the output power of each amplifier to fluctuate and become unstable.

[0005] The present disclosure has been made to solve such problems, and its object is to improve robustness against load fluctuations in a transmission circuit having an amplifier.

[0006] A transmitter circuit according to the present disclosure amplifies a high-frequency signal and transmits it to a radiating element. The transmitter circuit includes an input terminal for receiving the high-frequency signal, first and second output terminals for connection to the radiating element, first and second amplifier circuits, a connecting line, first and second output circuits, and a first and second switch. The first and second amplifier circuits amplify the high-frequency signal received at the input terminal. The connecting line connects the first and second amplifier circuits. The first output circuit is connected to the first amplifier circuit and configured to transmit the amplified signal to the first output terminal. The second output circuit is connected to the second amplifier circuit and configured to transmit the amplified signal to the second output terminal. The first amplifier circuit includes a first carrier amplifier, a first peak amplifier, and a first hybrid coupler. The second amplifier circuit includes a second carrier amplifier, a second peak amplifier, and a second hybrid coupler. Each of the first and second hybrid couplers includes a first phase shift line, a second phase shift line, a third phase shift line, and a fourth phase shift line connected in a ring. A first connection node between the first and second phase shift lines of the first hybrid coupler is connected to the output terminal of the first carrier amplifier. A second connection node between the first and third phase shift lines of the first hybrid coupler is connected to the output terminal of the first peak amplifier. A third connection node between the second and fourth phase shift lines of the first hybrid coupler is connected to ground potential via a first switch. A fourth connection node between the third and fourth phase shift lines of the first hybrid coupler is connected to the first output terminal via a first output circuit. A fifth connection node between the first and second phase shift lines of the second hybrid coupler is connected to the output terminal of the second carrier amplifier. A sixth connection node between the first and third phase shift lines of the second hybrid coupler is connected to the output end of the second peak amplifier. A seventh connection node between the second and fourth phase shift lines of the second hybrid coupler is connected to ground potential via a second switch. An eighth connection node between the third and fourth phase shift lines of the second hybrid coupler is connected to the second output terminal via a second output circuit. A connection line is connected between the fourth connection node and the eighth connection node.The first and second amplifier circuits are supplied with high-frequency signals having different phases from each other, and the connecting line has the same electrical length as at least one of the phase-shift lines in the first and second hybrid couplers.

[0007] In the transmission circuit according to the present disclosure, two amplifier circuits are supplied with high-frequency signals having a phase difference, and the output terminals of the two amplifier circuits are connected by a connecting line. The connecting line has the same electrical length as each phase-shifting line of the hybrid coupler. With this configuration, when a load fluctuation occurs, the load impedance fluctuations in each amplifier circuit, i.e., the output power fluctuations, are opposite to each other. As a result, at the output terminal, the output power fluctuations due to the load impedance fluctuations of each amplifier are canceled out, thereby suppressing the output power fluctuations of the entire transmission circuit even when a load fluctuation occurs. This improves the robustness of the transmission circuit against load fluctuations.

[0008] 1 is a schematic configuration diagram of a communication device to which a transmission circuit according to an embodiment is applied. FIG. 2 is a diagram showing a detailed configuration of the power amplifier circuit in FIG. 1. FIG. 3 is a diagram for explaining the circuit configuration when transmitting from output terminal T1. FIG. 4 is a diagram for explaining the circuit configuration when transmitting from output terminal T2. FIG. 5 is a diagram for explaining the output state of each amplifier at high output in a first example. FIG. 6 is a diagram for explaining the output state of each amplifier at back-off at high output. FIG. 7 is a diagram for explaining the output state of each amplifier at low output in the first example. FIG. 8 is a diagram for explaining the output state of each amplifier at back-off at low output. FIG. 9 is a diagram for explaining the output state of each amplifier at high output in a second example. FIG. 10 is a diagram for explaining the output state of each amplifier at back-off at high output. FIG. 11 is a diagram for explaining the output state of each amplifier at low output in the second example. FIG. 12 is a diagram for explaining the output state of each amplifier at back-off at low output. FIG. 13 is a diagram for explaining the output state of each amplifier at high output in a third example. FIG. 14 is a diagram for explaining the output state of each amplifier at back-off at high output. FIG. 15 is a diagram for explaining the output state of each amplifier at low output in the third example. FIG. 16 is a diagram for explaining the output state of each amplifier at back-off at low output. FIG. 17 is a diagram for explaining the output state of each amplifier at back-off at low output. FIG. 18 is a diagram for explaining the output state of each amplifier at high output in a fourth example. 10A and 10B are diagrams for explaining the output state of each amplifier during back-off at high output, low output in a fourth example, and low output in a fourth example, respectively.

[0009] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. In the drawings, the same or corresponding parts are designated by the same reference numerals, and description thereof will not be repeated.

[0010] 1 is a schematic diagram of a communication device 1 to which a transmission circuit 10 according to an embodiment is applied. The communication device 1 is, for example, a mobile terminal such as a mobile phone, a smartphone, or a tablet, or a personal computer with a communication function.

[0011] 1 , the communication device 1 includes an antenna ANT, a transmission circuit 10, a baseband integrated circuit (BBIC) 20 constituting a baseband signal processing circuit, a radio frequency integrated circuit (RFIC) 30, and a power supply circuit 40. The transmission circuit 10 includes input terminals T0, T3, and T4, output terminals T1 and T2, a bias control circuit 50, and a power amplifier circuit 100. In general, the communication device 1 upconverts an intermediate frequency (IF) signal transmitted from the BBIC 20 to a high frequency (radio frequency: RF) signal in the RFIC 30, amplifies the high frequency signal in the power amplifier circuit 100, and emits the amplified signal from the antenna ANT.

[0012] The RFIC 30 is an example of a signal processing circuit that processes a high-frequency signal. The RFIC 30 up-converts the intermediate frequency signal transmitted from the BBIC 20 into a high-frequency signal and outputs the generated high-frequency signal to the transmission circuit 10 via the input terminal T0.

[0013] The bias control circuit 50 receives a control signal CON from the RFIC 30 via the input terminal T3. Based on the control signal CON, the bias control circuit 50 generates a bias signal BS for controlling the magnitude and supply timing of the bias current of the amplifier included in the power amplifier circuit 100, and outputs the bias signal BS to the power amplifier circuit 100.

[0014] The power amplifier circuit 100 amplifies an input signal Pin received from the RFIC 30 via an input terminal T0, and generates output signals Pout1 and Pout2.

[0015] The antenna ANT is, for example, a flat patch antenna. An output terminal T1 of the transmission circuit 10 is connected to a feed point SP1 of the antenna ANT. An output terminal T2 of the transmission circuit 10 is connected to a feed point SP2 of the antenna ANT. The antenna ANT radiates output signals Pout1 and Pout2, which are high-frequency signals output from the transmission circuit 10, as radio waves.

[0016] (Detailed Configuration of Transmitter Circuit) Next, the detailed configuration of the power amplifier circuit 100 and the power supply circuit 40 in the transmitter circuit 10 will be described with reference to FIG.

[0017] The power supply circuit 40 is an example of a so-called digital tracker, and can supply power supply voltages Vcc of a plurality of different voltage levels to the power amplifier circuit 100. The power supply circuit 40 includes a multilevel power converter (MPC) 410, a power supply selection circuit 420, and a digital envelope tracker (digital ET) 430.

[0018] The MPC 410 includes a plurality of DC / DC converters, which are not shown in Fig. 2. The MPC 410 converts the battery voltage VB supplied from an external battery into a plurality of different voltage levels and supplies the voltages to the power supply selection circuit 420.

[0019] The digital ET 430 receives the I and Q waveform signals of the transmit signal from the BBIC 20 and tracks the envelope of the transmit signal in the digital ET mode. The digital ET 430 generates a selection signal SEL corresponding to the voltage level of the envelope of the transmit signal and outputs it to the power supply selection circuit 420.

[0020] The power supply selection circuit 420 selects a voltage corresponding to the selection signal SEL from the plurality of voltage levels supplied from the MPC 410, and supplies the selected voltage as the power supply voltage Vcc to the power amplifier circuit 100 via the input terminal T4.

[0021] The power amplifier circuit 100 includes an input terminal T10, output terminals T11 and T12, a branch circuit 115, amplifier circuits 105A and 105B, output circuits 170A and 170B, and a connection line 145. The input terminal T10 is connected to an input terminal T0 of the power amplifier circuit 100. The output terminals T11 and T12 are connected to output terminals T1 and T2 of the power amplifier circuit 100, respectively.

[0022] The branching circuit 115 includes a phase shift circuit (PS) 110 and hybrid couplers 120A and 120B. The phase shift circuit 110 branches an input signal Pin from the RFIC 30 received at an input terminal T10 into two paths, and divides the two branched signals θ １ , θ２ A phase difference of 90° is given to the two paths. A hybrid coupler 120A is connected to one of the branched paths (first path), and a hybrid coupler 120B is connected to the other path (second path). As will be described later, when a high-frequency signal is output from the output terminal T1, a signal whose phase is 90° ahead of the signal output to the first path is output to the second path (θ ２ = θ １ On the other hand, when a high frequency signal is output from the output terminal T2, a signal whose phase is delayed by 90° from the signal output to the first path is output to the second path (θ ２ = θ １ -90°).

[0023] One input terminal of the hybrid coupler 120A is connected to the first path branched by the phase shift circuit 110. The other input terminal of the hybrid coupler 120A is connected to the ground potential GND. The hybrid coupler 120A further branches the signal from the phase shift circuit 110 into two paths and gives the two branched signals a phase difference of 90°.

[0024] Similarly, one input terminal of the hybrid coupler 120B is connected to the second path branched by the phase shift circuit 110. The other input terminal of the hybrid coupler 120B is connected to the ground potential GND. The hybrid coupler 120B further branches the signal from the phase shift circuit 110 into two paths and gives the two branched signals a phase difference of 90°.

[0025] The amplifier circuit 105A includes a carrier amplifier 141A, a peak amplifier 142A, a hybrid coupler 130A, and a switch S1A. In the amplifier circuit 105A, an output terminal of the carrier amplifier 141A is connected to one input terminal of the hybrid coupler 130A, and an output terminal of the peak amplifier 142A is connected to the other input terminal. The phase of the signal input to the carrier amplifier 141A leads the phase of the signal input to the peak amplifier 142A by 90°.

[0026] One output terminal of the hybrid coupler 130A is connected to the ground potential GND via the switch S1A, and the other output terminal of the hybrid coupler 130A is connected to the output terminal T11 via the output circuit 170A.

[0027] The output circuit 170A includes phase-shift lines 140A and 160A, a matching circuit 150A, and a switch S2A. The phase-shift line 140A, the matching circuit 150A, and the phase-shift line 160A are connected in series in this order between the other output terminal of the hybrid coupler 130A and the output terminal T11. The switch S2A is connected between the line connecting the matching circuit 150A and the phase-shift line 160A and the ground potential GND.

[0028] Similarly, the amplifier circuit 105B includes a carrier amplifier 141B, a peak amplifier 142B, a hybrid coupler 130B, and a switch S1B. In the amplifier circuit 105B, the output terminal of the carrier amplifier 141B is connected to one input terminal of the hybrid coupler 130B, and the output terminal of the peak amplifier 142B is connected to the other input terminal. The phase of the signal input to the carrier amplifier 141B leads the phase of the signal input to the peak amplifier 142B by 90°.

[0029] One output terminal of the hybrid coupler 130B is connected to the ground potential GND via the switch S1B, and the other output terminal of the hybrid coupler 130B is connected to the output terminal T12 via the output circuit 170B.

[0030] The output circuit 170B includes phase shift lines 140B and 160B, a matching circuit 150B, and a switch S2B. The phase shift line 140B, the matching circuit 150B, and the phase shift line 160B are connected in series in this order between the other output terminal of the hybrid coupler 130B and the output terminal T12. The switch S2B is connected between the line connecting the matching circuit 150B and the phase shift line 160B and the ground potential GND.

[0031] A connection line 145 is connected between the other output terminal of the hybrid coupler 130A and the other output terminal of the hybrid coupler 130B. The connection line 145 is, for example, a phase-shift line having an electrical length of ¼ wavelength of the center frequency of the frequency band of the high-frequency signal to be transmitted. The connection line 145 can invert the phase of the output signal from the amplifier circuit 105A and transmit it to the output terminal of the amplifier circuit 105B. Alternatively, the phase of the output signal from the amplifier circuit 105B can be inverted and transmitted to the output terminal of the amplifier circuit 105A.

[0032] By switching the states of the switches S1A and S1B, the signal amplified by the carrier amplifier and the signal amplified by the peak amplifier can be combined in different ways in each amplifier circuit. Specific combining methods will be described in detail in Figure 5 and subsequent figures.

[0033] Switches S2A and S2B in output circuits 170A and 170B are switches for selectively switching the output port, of output terminals T1 and T2 of power amplifier circuit 100, for actually transmitting a high-frequency signal to antenna ANT. Specifically, by making switch S2A non-conductive and switch S2B conductive, the high-frequency signal is transmitted from output terminal T1 to antenna ANT through output circuit 170A. Conversely, by making switch S2B non-conductive and switch S2A conductive, the high-frequency signal is transmitted from output terminal T2 to antenna ANT through output circuit 170B.

[0034] For example, if the antenna ANT is a so-called dual-band antenna that outputs signals in two different frequency bands, by switching the switches S2A and S2B, a signal in one frequency band (first frequency band) can be output from the output terminal T1, and a signal in the other frequency band (second frequency band) can be output from the output terminal T2. In this case, the matching circuit 150A is set to match the impedance between the power amplifier circuit 100 and the antenna ANT in the first frequency band. Meanwhile, the matching circuit 150B is set to match the impedance between the power amplifier circuit 100 and the antenna ANT in the second frequency band.

[0035] The phase-shift lines 140A, 140B, 160A, and 160B in the output circuits 170A and 170B are set to a length of a quarter wavelength at the center frequency of the frequency band of the signal to be passed, and invert the phase of the signal passing through. When the switches S2A and S2B are in a conductive state (i.e., shorted), the phase-shift lines open the impedance at the output end of the corresponding amplifier circuit and the output terminal to which the antenna ANT is connected.

[0036] As described above, by inputting high-frequency signals having a phase difference of 90° to two amplifier circuits 105A and 105B, each of which is composed of a carrier amplifier, a peak amplifier, and a hybrid coupler, and connecting the output ends of amplifier circuits 105A and 105B via connection line 145, the output signals of amplifier circuits 105A and 105B can be combined in phase.

[0037] In the following description, the path through which a signal passes through the amplifier circuit 105A is referred to as a path RT1, and the path through which a signal passes through the amplifier circuit 105B is referred to as a path RT2.

[0038] Next, an example of a circuit configuration when a high-frequency signal is transmitted from each output terminal to the antenna ANT will be described with reference to Figures 3 and 4. Figures 3 and 4 show only the configuration downstream of the amplifier circuits 105A and 105B in the power amplifier circuit 100. Figure 3 shows the case when a high-frequency signal is transmitted from the output terminal T1, and Figure 4 shows the case when a high-frequency signal is transmitted from the output terminal T2.

[0039] 3 and 4, each of the hybrid couplers 130A and 130B in the amplifier circuits 105A and 105B is composed of four phase-shift lines connected in a ring shape. The hybrid coupler 130A includes phase-shift lines 131A to 134A, and the hybrid coupler 130B includes phase-shift lines 131B to 134B. The phase-shift lines of each hybrid coupler have an electrical length of a quarter wavelength at the center frequency of the frequency band to be transmitted. That is, the electrical length of each phase-shift line of the hybrid coupler is the same as the electrical length of the connecting line 145. Note that the actual electrical lengths of the phase-shift lines in a hybrid coupler do not necessarily match perfectly. Therefore, it is sufficient that the electrical length of the connecting line 145 matches the electrical length of at least one phase-shift line of the hybrid coupler.

[0040] A connection node N1A between the phase shift line 131A and the phase shift line 132A corresponds to one input terminal of the hybrid coupler 130A and is connected to an output terminal of the carrier amplifier 141A. A connection node N2A between the phase shift line 131A and the phase shift line 133A corresponds to the other input terminal of the hybrid coupler 130A and is connected to an output terminal of the peak amplifier 142A.

[0041] A connection node N3A between the phase shift line 132A and the phase shift line 134A corresponds to one output terminal of the hybrid coupler 130A and is connected to a switch S1A. A connection node N4A between the phase shift line 133A and the phase shift line 134A corresponds to the other output terminal of the hybrid coupler 130A and is connected to an output circuit 170A and a connection line 145.

[0042] Similarly, a connection node N1B between the phase shift line 131B and the phase shift line 132B corresponds to one input terminal of the hybrid coupler 130B, and is connected to an output terminal of the carrier amplifier 141B. A connection node N2B between the phase shift line 131B and the phase shift line 133B corresponds to the other input terminal of the hybrid coupler 130B, and is connected to an output terminal of the peak amplifier 142B.

[0043] A connection node N3B between the phase shift line 132B and the phase shift line 134B corresponds to one output terminal of the hybrid coupler 130B and is connected to a switch S1B. A connection node N4B between the phase shift line 133B and the phase shift line 134B corresponds to the other output terminal of the hybrid coupler 130B and is connected to an output circuit 170B and a connection line 145.

[0044] 3 and 4, the switch S1A in the amplifier circuit 105A and the switch S1B in the amplifier circuit 105B are both in a conductive state, which shorts the impedances of the connection nodes N3A and N3B, and therefore the impedance of the phase shift line 132A viewed from the connection node N1A, the impedance of the phase shift line 134A viewed from the connection node N4A, the impedance of the phase shift line 132B viewed from the connection node N1B, and the impedance of the phase shift line 134B viewed from the connection node N4B are all open.

[0045] Therefore, the output signal of the carrier amplifier 141A is combined with the output signal of the peak amplifier 142A at a connection node N2A via the phase shift line 131A. Also, the output signal of the carrier amplifier 141B is combined with the output signal of the peak amplifier 142B at a connection node N2B via the phase shift line 131B. That is, the amplifier circuit 105A and the amplifier circuit 105B constitute a Doherty amplifier.

[0046] When transmitting a signal in the first frequency band, switch S2B in output circuit 170B is turned on, and the impedance when viewing output terminal T2 from connection node N4B becomes open, as shown in Fig. 3. As a result, the signal amplified by amplifier circuit 105A and the signal amplified by amplifier circuit 105B are combined at connection node N4A and output from output terminal T1.

[0047] In this case, the high frequency signal θ supplied from the branch circuit 115 to the amplifier circuit 105B ２ is the high frequency signal θ supplied from the branch circuit 115 to the amplifier circuit 105A. １The phase of the output signal from amplifier circuit 105A is adjusted so that it leads by 90° from the phase of amplifier circuit 105B. The output signal from amplifier circuit 105B is delayed by 90° by connection line 145. As a result, the output signal from amplifier circuit 105A and the output signal from amplifier circuit 105B are in phase at connection node N4A.

[0048] When transmitting in the second frequency band, switch S2A in output circuit 170A is turned on, and the impedance when viewing output terminal T1 from connection node N4A becomes open, as shown in Fig. 4. As a result, the signal amplified by amplifier circuit 105A and the signal amplified by amplifier circuit 105B are combined at connection node N4B and output from output terminal T2.

[0049] In this case, the high frequency signal θ supplied from the branch circuit 115 to the amplifier circuit 105A １ is the high frequency signal θ supplied from the branch circuit 115 to the amplifier circuit 105B. ２ The phase of the output signal from amplifier circuit 105A is delayed by 90° by connection line 145. As a result, the output signal from amplifier circuit 105A and the output signal from amplifier circuit 105B are in phase at connection node N4B.

[0050] As described above, the amplifier circuits 105A and 105B configure a Doherty amplifier, and therefore, by stopping the peak amplifiers 142A and 142B when the output power falls below a predetermined value, the load impedance of the carrier amplifiers 141A and 141B can be increased. As a result, efficiency at low output power increases, and a back-off of approximately 6 dB can be achieved.

[0051] Furthermore, in the power amplifier circuit 100 according to the embodiment, the output terminals of the two amplifier circuits 105A and 105B are connected via a connection line 145 having an electrical length of a quarter wavelength. Therefore, as described in FIG. 5 and subsequent figures, when a load fluctuation occurs at the antenna ANT, the load impedances fluctuate in opposite directions when viewed from the output terminals of the amplifier circuits toward the antenna ANT. Furthermore, in each amplifier circuit, the load impedance fluctuates in opposite directions when viewed from the carrier amplifier and the peak amplifier. This offsets output power fluctuations due to load fluctuations between the amplifier circuits and / or between the carrier amplifier and the peak amplifier, thereby suppressing output power fluctuations when viewed from the power amplifier circuit 100 as a whole. This improves robustness against load fluctuations.

[0052] Hereinafter, variations in signal synthesis depending on the settings of the switches S1A and S1B in each amplifier circuit, and fluctuations in the output power of the transmitter circuit in response to load fluctuations will be described with reference to FIGS.

[0053] (First Example: Parallel-Series Connection) FIGS. 5 to 8 are diagrams showing fluctuations in the circuit state and output power in the first example of signal combining. In the first example, the switch S1A of the amplifier circuit 105A is in a non-conducting state. As a result, in the amplifier circuit 105A, the signal from the carrier amplifier 141A and the signal from the peak amplifier 142A are combined at the connection node N4A. This type of combination is referred to as "parallel combination" in this specification.

[0054] On the other hand, in the amplifier circuit 105B, the switch S1B of the amplifier circuit 105B is in a conductive state, and therefore, as described in FIG. 3, the amplifier circuit 105B constitutes a Doherty amplifier. Therefore, the signal from the carrier amplifier 141B cannot pass through the phase-shift lines 132B and 134B, and is combined with the signal from the peak amplifier 142B at the connection node N2B. This type of combination is referred to as "series combination" in this specification.

[0055] FIG. 5 shows the load impedance R of the antenna ANT at the time of high output when both the carrier amplifier and the peak amplifier are driven in each amplifier circuit. ＡＮＴ is the characteristic impedance R Ｌ When it becomes larger than (R Ｌ <R ＡＮＴ 5 is a diagram for explaining the output state of each amplifier in the power amplifier circuit 100. In Fig. 5, the left side shows the load impedance at each point in the partial circuit diagram of the power amplifier circuit 100. In addition, the upper part on the right side of Fig. 5 shows fluctuations in the output power of the carrier amplifier 141A and the peak amplifier 142A on the path RT1, and the lower part shows fluctuations in the output power of the carrier amplifier 141B and the peak amplifier 142B on the path RT2.

[0056] 5 and the following Figures 6 to 20, a case where a high frequency signal is transmitted from the output terminal T1 will be described as an example. Therefore, the output circuit 170B is omitted from the partial circuit diagram of the power amplifier circuit 100. Also, the load impedance R of the antenna ANT ＡＮＴ is expressed as the impedance including the phase shift line 160A.

[0057] In FIG. 5, the load impedance R of the antenna ANT ＡＮＴ is the characteristic impedance R Ｌ When the phase of the carrier amplifier 141A is greater than 0° and becomes Hi, the load impedance at the connection node N4A becomes Lo due to the phase-shift line 140A. The phase-shift lines of the hybrid coupler 130A cause the load impedance at the carrier amplifier 141A to become Lo, and the load impedance at the peak amplifier 142A to become Hi. Therefore, in the path RT1, as shown in the graph on the right, when the phase is between 0° and 90° and between 270° and 360°, the output power of the carrier amplifier 141A increases as the load decreases (solid line LN10), while the output power of the peak amplifier 142A decreases as the load increases (dashed line LN11). This offsets the power fluctuations due to the increase in the output power of the carrier amplifier 141A and the decrease in the output power of the peak amplifier 142A, resulting in a flat characteristic as shown by the solid line LN12.

[0058] On the other hand, in the amplifier circuit 105B of the path RT2, the load impedance at the connection node N4B becomes Hi due to the connection line 145, and the load impedance at the carrier amplifier 141B becomes Hi and the load impedance at the peak amplifier 142A becomes Lo due to the phase-shift lines of the hybrid coupler 130B. Therefore, in the path RT2, the output power of the carrier amplifier 141B decreases (solid line LN15) due to the increase in the load, while the output power of the peak amplifier 142B increases (dashed line LN16) due to the decrease in the load. As a result, the power fluctuations are offset by the decrease in the output power of the carrier amplifier 141B and the increase in the output power of the peak amplifier 142B, and the output power combined in the amplifier circuit 105B also exhibits a flat characteristic as shown by the solid line LN17.

[0059] As a result, the fluctuations in output power due to the load impedance fluctuations are cancelled out in each of the amplifier circuits 105A and 105B, and the fluctuations in output power of the entire power amplifier circuit 100 are also suppressed.

[0060] FIG. 6 shows the load impedance R of the antenna ANT. ＡＮＴ is the characteristic impedance R Ｌ 5 shows the output states of the amplifiers during back-off when the peak amplifier is stopped at low output and the load impedance of the carrier amplifier 141A is Lo, and the load impedance of the carrier amplifier 141B is Hi, as in FIG. 5 . This increases the output power of the carrier amplifier 141A and decreases the output power of the carrier amplifier 141B.

[0061] Meanwhile, the peak amplifiers 142A and 142B are stopped, and no output power is generated from the peak amplifiers 142A and 142B. Therefore, the power fluctuations of each amplifier circuit alone are not canceled out, as in FIG. 5 . However, the increase in the output power of the carrier amplifier 141A and the decrease in the output power of the carrier amplifier 141B cancel out the output power fluctuations in the combined signal of the amplifier circuits 105A and 105B. Therefore, the fluctuations in the output power of the entire power amplifier circuit 100 are also suppressed.

[0062] In the parallel-combined amplifier circuit 105A, when the peak amplifier 142A is stopped, the impedance of the carrier amplifier 141A increases by twice as much as when the peak amplifier 142A is driven. Therefore, in the amplifier circuit 105A, a back-off amount of 6 dB can be achieved at low output, similar to the series-combined amplifier circuit 105B that constitutes the Doherty amplifier.

[0063] FIG. 7 shows the load impedance R of the antenna ANT. ＡＮＴ is the characteristic impedance R Ｌ When it becomes smaller than (R ＡＮＴ <R Ｌ ), which shows the output states of each amplifier when both the carrier amplifier and the peak amplifier are driven at high output. In this case, the load impedance at connection node N4A becomes Hi, resulting in the load impedance at carrier amplifier 141A becoming Hi and the load impedance at peak amplifier 142A becoming Lo. Therefore, in path RT1, as in the case where the phase of the graph on the right is between 90° and 270°, an increase in the load reduces the output power of carrier amplifier 141A (solid line LN10), while a decrease in the load increases the output power of peak amplifier 142A (dashed line LN11). As a result, the power fluctuations are offset by the increase in output power of carrier amplifier 141A and the decrease in output power of peak amplifier 142A, and the output power combined in amplifier circuit 105A exhibits a flat characteristic as shown by solid line LN12.

[0064] On the other hand, in the amplifier circuit 105B of path RT2, the load impedance at the connection node N4B becomes Lo due to the connection line 145. As a result, the load impedance at the carrier amplifier 141B becomes Lo and the load impedance at the peak amplifier 142A becomes Hi due to the phase-shift lines of the hybrid coupler 130B. Therefore, in path RT2, the output power of the carrier amplifier 141B increases (solid line LN15) due to a decrease in the load, while the output power of the peak amplifier 142B decreases (dashed line LN16) due to an increase in the load. As a result, the power fluctuations are offset by the increase in the output power of the carrier amplifier 141B and the decrease in the output power of the peak amplifier 142B, and the output power combined in the amplifier circuit 105B also exhibits a flat characteristic as shown by the solid line LN17.

[0065] In this way, the fluctuations in output power due to the load impedance fluctuations are cancelled out in each of the amplifier circuits 105A and 105B, and as a result, the fluctuations in output power of the entire power amplifier circuit 100 are also suppressed.

[0066] FIG. 8 shows the load impedance R of the antenna ANT. ＡＮＴ is the characteristic impedance R Ｌ 7 shows the output states of the amplifiers during back-off when the peak amplifier is stopped and the load impedance of the carrier amplifier 141A is high, as in the case of FIG. 7, and the load impedance of the carrier amplifier 141B is low. As a result, the output power of the carrier amplifier 141A decreases and the output power of the carrier amplifier 141B increases.

[0067] Meanwhile, peak amplifiers 142A and 142B are stopped, and no output power is generated from peak amplifiers 142A and 142B. Therefore, the power fluctuations of each amplifier circuit alone are not canceled out, as in Fig. 7. However, the decrease in output power of carrier amplifier 141A and the increase in output power of carrier amplifier 141B cancel out the output power fluctuations in the combined signal of amplifier circuits 105A and 105B, and therefore the output power fluctuations of power amplifier circuit 100 as a whole are also suppressed.

[0068] As described above, when the route RT1 is configured as a parallel combination route and the route RT2 is configured as a series combination route, fluctuations in output power are suppressed even when the load impedance fluctuates, regardless of whether the output is high or low. Therefore, robustness against load fluctuations can be improved.

[0069] (Second Example: Parallel-Parallel Connection) In the second example, a case will be described in which both amplifier circuits 105A and 105B have a parallel combination configuration. That is, in the second example, switches S1A and S1B in amplifier circuits 105A and 105B are both set to a non-conductive state.

[0070] 9 to 12 are diagrams showing the fluctuations in the circuit state and output power in the second example of signal synthesis. In FIGS. 9 and 10, the load impedance R ＡＮＴ is the characteristic impedance R Ｌ If it is larger than (R Ｌ <R ＡＮＴ 9 shows the output state of each amplifier in the carrier amplifiers 141A, 141B and the peak amplifiers 142A, 142B. Fig. 9 shows the high output state in which the carrier amplifiers 141A, 141B and the peak amplifiers 142A, 142B are driven, and Fig. 10 shows the low output state in which the peak amplifiers 142A, 142B are stopped.

[0071] 11 and 12, the load impedance R of the antenna ANT ＡＮＴ is the characteristic impedance R Ｌ If it is smaller than (R ＡＮＴ <R Ｌ 11 shows the output state of each amplifier at high output, and FIG. 12 shows the state at low output.

[0072] Even in a configuration in which both amplifier circuits 105A and 105B are combined in parallel as in the second example, at high output power, the magnitude relationship between the load impedance of the carrier amplifier and the load impedance of the peak amplifier in each amplifier circuit is reversed, and accordingly, the direction of fluctuation in output power is also reversed (lines LN20, LN21, LN25, and LN26 in FIGS. 9 and 11 ). As a result, fluctuations in output power in the carrier amplifier and output fluctuations in the peak amplifier cancel each other out, and the output power from each amplifier exhibits flat characteristics as shown by lines LN22 and LN27 in FIGS. 9 and 11 . Therefore, fluctuations in output power are suppressed in the combined signal of the output signal from amplifier circuit 105A and the output signal from amplifier circuit 105B.

[0073] 10 and 12, when the antenna load fluctuates, the magnitude relationship between the fluctuation in the load impedance of amplifier circuit 105A and the fluctuation in the load impedance of amplifier circuit 105B is reversed, and the direction of fluctuation in the output power is also reversed (lines LN20 and LN25 in FIGS. 10 and 12). Therefore, in the combined signal, the fluctuation in output power of amplifier circuit 105A and the fluctuation in output power of amplifier circuit 105B cancel each other out, and fluctuations in the output power of the entire power amplifier circuit 100 are also suppressed.

[0074] As described above, even when both paths RT1 and RT2 are combined in parallel, fluctuations in output power are suppressed when the load impedance fluctuates. Therefore, robustness against load fluctuations can be improved. Furthermore, at low output, the impedance of the carrier amplifiers 141A and 141B increases compared to at high output due to the stopping of the peak amplifiers 142A and 142B, thereby improving efficiency at low output.

[0075] (Third Example: Series-Series Connection) In the third example, a case will be described in which both amplifier circuits 105A and 105B have a series combination configuration. That is, in the third example, switches S1A and S1B in amplifier circuits 105A and 105B are both set to a conductive state.

[0076] 13 to 16 are diagrams showing the fluctuations in the circuit state and output power in the third example of signal synthesis. In FIGS. 13 and 14, the load impedance R of the antenna ANT is ＡＮＴ is the characteristic impedance R Ｌ If it is larger than (R Ｌ <R ＡＮＴ 13 shows the output state of each amplifier in the carrier amplifiers 141A, 141B and the peak amplifiers 142A, 142B at high output while they are driven, and FIG. 14 shows the output state of the peak amplifiers 142A, 142B at low output while they are stopped.

[0077] 15 and 16, the load impedance R of the antenna ANT ＡＮＴ is the characteristic impedance R Ｌ If it is smaller than (R ＡＮＴ <R Ｌ 15 shows the output state of each amplifier at high output, and FIG. 16 shows the state at low output.

[0078] Even when both amplifier circuits 105A and 105B are combined in series, i.e., when forming a Doherty amplifier, as in the third example, in each amplifier circuit, the magnitude relationship between the load impedance of the carrier amplifier and the load impedance of the peak amplifier is reversed at high output power, and accordingly, the direction of fluctuation in output power is also reversed (lines LN30, LN31, LN35, and LN36 in FIGS. 13 and 15 ). Therefore, fluctuations in output power in the carrier amplifier and output fluctuations in the peak amplifier cancel each other out, and the output power from each amplifier exhibits flat characteristics as shown by lines LN32 and LN37 in FIGS. 13 and 15 . Therefore, fluctuations in output power are suppressed in the combined signal of the output signal from amplifier circuit 105A and the output signal from amplifier circuit 105B.

[0079] 14 and 16, when the antenna load fluctuates, the magnitude relationship between the fluctuation in the load impedance of amplifier circuit 105A and the fluctuation in the load impedance of amplifier circuit 105B is reversed, and the direction of fluctuation in the output power is also reversed (lines LN30 and LN35 in FIGS. 14 and 16). Therefore, in the combined signal, the fluctuation in output power of amplifier circuit 105A and the fluctuation in output power of amplifier circuit 105B cancel each other out, and fluctuations in the output power of the entire power amplifier circuit 100 are also suppressed.

[0080] As described above, even when both paths RT1 and RT2 are series-combined, fluctuations in output power are suppressed when the load impedance fluctuates. Therefore, robustness against load fluctuations can be improved. Furthermore, at low output, the impedance of the carrier amplifiers 141A and 141B increases compared to at high output because the peak amplifiers 142A and 142B are stopped, thereby improving efficiency at low output.

[0081] (Example 4: Series-Parallel Connection) In Example 4, a case will be described in which the amplifier circuit 105A has a series combination configuration and the amplifier circuit 105B has a parallel combination configuration. That is, in Example 4, the switch S1A in the amplifier circuit 105A is set to a conductive state, and the switch S1B in the amplifier circuit 105B is set to a non-conductive state.

[0082] 17 to 20 are diagrams showing the circuit state and fluctuations in output power in the fourth example of signal synthesis. In FIGS. 17 and 18, the load impedance R of the antenna ANT is ＡＮＴ is the characteristic impedance R Ｌ If it is larger than (R Ｌ <R ＡＮＴ 17 shows the output state of each amplifier in the carrier amplifiers 141A, 141B and the peak amplifiers 142A, 142B. Fig. 17 shows the high output state in which the carrier amplifiers 141A, 141B and the peak amplifiers 142A, 142B are driven, and Fig. 18 shows the low output state in which the peak amplifiers 142A, 142B are stopped.

[0083] 19 and 20, the load impedance R of the antenna ANT ＡＮＴ is the characteristic impedance R Ｌ If it is smaller than (R ＡＮＴ <R Ｌ 19 shows the output state of each amplifier at high output, and FIG. 20 shows the state at low output.

[0084] Even when amplifier circuit 105A is a series-combined amplifier and amplifier circuit 105B is a parallel-combined amplifier, as in the fourth example, at high output power, the magnitude relationship between the load impedance of the carrier amplifier and the load impedance of the peak amplifier is reversed in each amplifier circuit, and accordingly, the direction of fluctuation in output power is also reversed (lines LN40, LN41, LN45, and LN46 in FIGS. 17 and 19). As a result, fluctuations in output power in the carrier amplifier and output fluctuations in the peak amplifier are canceled out, and the output power from each amplifier exhibits flat characteristics as shown by lines LN42 and LN47 in FIGS. 17 and 19. Therefore, fluctuations in output power are suppressed in the combined signal of the output signals from amplifier circuit 105A and amplifier circuit 105B.

[0085] 18 and 20, when the antenna load fluctuates, the magnitude relationship between the fluctuation in the load impedance of amplifier circuit 105A and the fluctuation in the load impedance of amplifier circuit 105B is reversed, and the direction of fluctuation in the output power is also reversed (lines LN40 and LN45 in FIGS. 18 and 20). Therefore, in the combined signal, the fluctuation in output power in amplifier circuit 105A and the fluctuation in output power in amplifier circuit 105B cancel each other out, and fluctuations in the output power of the entire power amplifier circuit 100 are also suppressed.

[0086] As described above, even when the route RT1 is series-combined and the route RT2 is parallel-combined, fluctuations in output power are suppressed when the load impedance fluctuates. Therefore, robustness against load fluctuations can be improved. Furthermore, at low output, the impedance of the carrier amplifiers 141A and 141B increases compared to at high output due to the stopping of the peak amplifiers 142A and 142B, thereby improving efficiency at low output.

[0087] 5 to 20, output circuit 170B that transmits a signal to output terminal T2 is omitted, but because power amplifier circuit 100 is configured symmetrically with respect to connection line 145, the result is the same as the states described in Examples 1 to 4, even when a high-frequency signal is output from output terminal T2. Therefore, even in a dual-band configuration that radiates radio waves in two different frequency bands by switching the output terminal as described in Figures 3 and 4, it is possible to improve robustness against load fluctuations for signals in the two frequency bands, improve efficiency at low output, and achieve a back-off amount of 6 dB.

[0088] The "input terminal T0," "output terminal T1," and "output terminal T2" in the embodiments correspond to the "input terminal," "first output terminal," and "second output terminal," respectively, in the present disclosure. The "amplifier circuit 105A" and "amplifier circuit 105B" in the embodiments correspond to the "first amplifier circuit" and "second amplifier circuit," respectively, in the present disclosure. The "output circuit 170A" and "output circuit 170B" in the embodiments correspond to the "first output circuit" and "second output circuit," respectively, in the present disclosure. The "switch S1A," "switch S1B," "switch S2A," and "switch S2B" in the embodiments correspond to the "first switch" to "fourth switch," respectively, in the present disclosure.

[0089] The "hybrid coupler 130A" and the "hybrid coupler 130B" in the embodiments correspond to the "first hybrid coupler" and the "second hybrid coupler" in the present disclosure, respectively. The "carrier amplifier 141A" and the "carrier amplifier 141B" in the embodiments correspond to the "first carrier amplifier" and the "second carrier amplifier" in the present disclosure, respectively. The "peak amplifier 142A" and the "peak amplifier 142B" in the embodiments correspond to the "first peak amplifier" and the "second peak amplifier" in the present disclosure, respectively.

[0090] Each of the "phase shift line 131A" and the "phase shift line 131B" in the embodiments corresponds to a "first phase shift line" in the present disclosure. Each of the "phase shift line 132A" and the "phase shift line 132B" in the embodiments corresponds to a "second phase shift line" in the present disclosure. Each of the "phase shift line 133A" and the "phase shift line 133B" in the embodiments corresponds to a "third phase shift line" in the present disclosure. Each of the "phase shift line 134A" and the "phase shift line 134B" in the embodiments corresponds to a "fourth phase shift line" in the present disclosure. Each of the "phase shift line 140A," "phase shift line 160A," "phase shift line 140B," and "phase shift line 160B" in the embodiments corresponds to a "fifth phase shift line" to an "eighth phase shift line" in the present disclosure.

[0091] The "matching circuit 150A" and the "matching circuit 150B" in the embodiments correspond to the "first matching circuit" and the "second matching circuit" in the present disclosure, respectively. The "connection node N1A" to the "connection node N4A" in the embodiments correspond to the "first connection node" to the "fourth connection node" in the present disclosure, respectively. The "connection node N1B" to the "connection node N4B" in the embodiments correspond to the "fifth connection node" to the "eighth connection node" in the present disclosure, respectively.

[0092] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive. The scope of the present invention is defined by the claims, not by the description of the above embodiments, and is intended to include all modifications within the meaning and scope of the claims.

[0093] 1 Communication device, 10 Transmission circuit, 20 BBIC, 30 RFIC, 40 Power supply circuit, 50 Bias control circuit, 100 Power amplifier circuit, 105A, 105B Amplification circuit, 110 Phase shift circuit, 115 Branch circuit, 120A, 120B, 130A, 130B Hybrid coupler, 131A to 134A, 131B to 134B, 140A, 140B, 160A, 160B Phase shift line, 141A, 141B Carrier amplifier, 142A, 142B Peak amplifier, 145 Connection line, 150A, 150B Matching circuit, 170A, 170B Output circuit, 410 MPC, 420 Power supply selection circuit, 430 Digital ET, ANT Antenna, GND Ground potential, N1A to N4A, N1B to N4B connection nodes, RT1, RT2 path, S1A, S1B, S2A, S2B switches, SP1, SP2 power supply points, T0, T3, T4, T10 input terminals, T1, T2, T11, T12 output terminals, VB battery voltage, Vcc power supply voltage.

Claims

1. A transmitting circuit for amplifying a high frequency signal and transmitting it to a radiating element, comprising: an input terminal for receiving a high frequency signal; first and second output terminals for connection to the radiating element; a first amplifier circuit and a second amplifier circuit for amplifying the high frequency signal received at the input terminal; a connecting line connecting the first amplifier circuit and the second amplifier circuit; a first output circuit connected to the first amplifier circuit and configured to transmit the amplified signal to the first output terminal; a second output circuit connected to the second amplifier circuit and configured to transmit the amplified signal to the second output terminal; and a first switch and a second switch, wherein the first amplifier circuit includes a first carrier amplifier, a first peak amplifier, and a first hybrid coupler, the second amplifier circuit includes a second carrier amplifier, a second peak amplifier, and a second hybrid coupler, and each of the first hybrid coupler and the second hybrid coupler includes a first phase shift line, a second phase shift line, a third phase shift line, and a fourth phase shift line connected in a ring shape, a first connection node between the first phase shift line and the second phase shift line of the first hybrid coupler is connected to the output end of the first carrier amplifier; a second connection node between the first phase shift line and the third phase shift line of the first hybrid coupler is connected to the output end of the first peak amplifier; a third connection node between the second phase shift line and the fourth phase shift line of the first hybrid coupler is connected to ground potential via the first switch; a fourth connection node between the third phase shift line and the fourth phase shift line of the first hybrid coupler is connected to the first output terminal via the first output circuit; a fifth connection node between the first phase shift line and the second phase shift line of the second hybrid coupler is connected to the output end of the second carrier amplifier; and a sixth connection node between the first phase shift line and the third phase shift line of the second hybrid coupler is connected to the output end of the second peak amplifier. a seventh connection node between the second phase shift line and the fourth phase shift line of the second hybrid coupler is connected to the ground potential via the second switch, and an eighth connection node between the third phase shift line and the fourth phase shift line of the second hybrid coupler is connected to the second output terminal via the second output circuit;a transmission circuit, wherein the connection line is connected between the fourth connection node and the eighth connection node, the first amplifier circuit and the second amplifier circuit are supplied with high-frequency signals having different phases from each other, and the connection line has the same electrical length as at least one phase-shift line in the first hybrid coupler and the second hybrid coupler.

2. The transmission circuit according to claim 1, further comprising a branching circuit for branching a high frequency signal received at said input terminal to said first amplifier circuit and said second amplifier circuit.

3. A transmitting circuit as claimed in claim 1 or claim 2, further comprising a third switch connected between said first output circuit and the ground potential, and a fourth switch connected between said second output circuit and the ground potential, wherein when a high frequency signal is supplied from said first output terminal to said radiating element, said third switch is brought into a non-conductive state and said fourth switch is brought into a conductive state, and when a high frequency signal is supplied from said second output terminal to said radiating element, said fourth switch is brought into a non-conductive state and said third switch is brought into a conductive state.

4. A transmitting circuit as described in claim 3, wherein the radiating element is configured to be capable of radiating radio waves in two different frequency bands, and the third switch and the fourth switch are switched depending on the frequency band of the high-frequency signal supplied to the radiating element.

5. A transmission circuit as described in claim 3 or claim 4, wherein the first output circuit includes a fifth phase shift line having one end connected to the fourth connection node and a sixth phase shift line having one end connected to the first output terminal, the third switch is connected to a path connecting the other end of the fifth phase shift line and the other end of the sixth phase shift line, the second output circuit includes a seventh phase shift line having one end connected to the eighth connection node and an eighth phase shift line having one end connected to the second output terminal, and the fourth switch is connected to a path connecting the other end of the seventh phase shift line and the other end of the eighth phase shift line.

6. A transmission circuit according to claim 5, wherein the first output circuit further includes a first matching circuit adapted to the high-frequency signal transmitted from the first output terminal, and the second output circuit further includes a second matching circuit adapted to the high-frequency signal transmitted from the second output terminal.

7. A transmission circuit according to any one of claims 1 to 6, wherein when the power of the high frequency signal supplied to the input terminal is greater than a predetermined power, the first carrier amplifier, the first peak amplifier, the second carrier amplifier and the second peak amplifier are driven, and when the power of the high frequency signal supplied to the input terminal is less than the predetermined power, the first carrier amplifier and the second carrier amplifier are driven, and the first peak amplifier and the second peak amplifier are deactivated.

8. A transmission circuit according to any one of claims 1 to 7, wherein the first amplifier circuit operates as a Doherty amplifier by bringing the first switch into a conductive state, and the second amplifier circuit operates as a Doherty amplifier by bringing the second switch into a conductive state.

9. A transmission circuit according to any one of claims 1 to 8, wherein, when a high frequency signal is transmitted from the first output terminal to the radiating element, a signal whose phase is 90° ahead of the high frequency signal supplied to the first peak amplifier is supplied to the first carrier amplifier and the second peak amplifier, and a signal whose phase is 180° ahead of the high frequency signal supplied to the first peak amplifier is supplied to the second carrier amplifier.

10. A transmission circuit according to any one of claims 1 to 8, wherein, when a high frequency signal is transmitted from the second output terminal to the radiating element, a signal whose phase is 90° ahead of the high frequency signal supplied to the second peak amplifier is supplied to the second carrier amplifier and the first peak amplifier, and a signal whose phase is 180° ahead of the high frequency signal supplied to the second peak amplifier is supplied to the first carrier amplifier.

11. A communication device comprising: a transmission circuit according to any one of claims 1 to 10; a signal processing circuit for processing a high-frequency signal to be supplied to said transmission circuit; and said radiating element for emitting the high-frequency signal amplified by said transmission circuit as a radio wave.

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