Virtual resource allocation method and apparatus, computer device, computer readable storage medium, and computer program product

Abstract

Disclosed in embodiments of the present disclosure are a virtual resource allocation method and apparatus, a computer device, a computer readable storage medium, and a computer program product. The virtual resource allocation method comprises: in response to a virtual resource creation request, determining, from a virtual function resource pool, a target number of target virtual function resources that meet the virtual resource creation request, wherein the virtual function resources in the virtual function resource pool are located on a graphics card supporting a single root input / output virtualization (SR-IOV) technology; and on the basis of the target number of target virtual function resources, creating a target virtual graphics processing unit device, and on the basis of the target virtual graphics processing unit device, running a target virtual machine. In this way, under the SR-IOV technology, a target virtual graphics processing unit device having different video memory resource sizes can be created on the basis of virtual resource acquisition requirements, thereby meeting various requirements of different virtual machines for video memory resources provided by virtual function resources.

Description

Virtual resource allocation method and device, computer device, computer readable storage medium, and computer program product

[0001] Cross-reference to Related Applications

[0002] The embodiments of the present disclosure are based on the Chinese patent application No. 202410548004.7, filed on April 30, 2024, entitled "Virtual resource allocation method, device, equipment, storage medium and program product", and claim the priority of the Chinese patent application, the whole content of which is incorporated herein by reference. TECHNICAL FIELD

[0003] The present disclosure relates to, but is not limited to, the technical field of computer technology, and particularly relates to a virtual resource allocation method, device, computer equipment, computer readable storage medium and computer program product. BACKGROUND

[0004] In a device virtualization scheme based on Single Root Input / Output Virtualization (SR-IOV) technology, due to the Peripheral Component Interconnect-Special Interest Group (PCI-SIG) specification, the size of the video memory of a Virtual Function (VF) is the same, and one VF can only be assigned to one virtual machine. This means that different virtual machines can only be assigned to the same size of VF, but the size of the video memory required by different virtual machines is usually different, so the existing device virtualization scheme cannot meet the different needs of different virtual machines for video memory resources. SUMMARY

[0005] Therefore, the embodiments of the present disclosure at least provide a virtual resource allocation method, device, computer equipment, computer readable storage medium and computer program product.

[0006] The technical scheme of the embodiments of the present disclosure is implemented as follows:

[0007] In one aspect, the present disclosure provides a virtual resource allocation method, which comprises: determining a target number of target virtual function resources that meet a virtual resource creation request from a virtual function resource pool in response to the virtual resource creation request; the virtual function resources in the virtual function resource pool are located on a graphics card supporting Single Root Input / Output Virtualization technology; creating a target virtual graphics processor device based on the target number of target virtual function resources, and running a target virtual machine based on the target virtual graphics processor device.

[0008] In another aspect, the embodiments of the present disclosure provide a virtual resource allocation apparatus, comprising: a determining part, configured to determine, in response to a virtual resource creation request, a target number of target virtual function resources satisfying the virtual resource creation request from a virtual function resource pool; the virtual function resources in the virtual function resource pool are located on a graphics card supporting a single root input / output virtualization technology; a creating part, configured to create a target virtual graphics processor device based on the target number of target virtual function resources, and run a target virtual machine based on the target virtual graphics processor device.

[0009] In another aspect, the embodiments of the present disclosure provide a computer device, comprising a memory and a processor, the memory stores a computer program capable of running on the processor, and the processor implements part or all steps of the above method when executing the program.

[0010] In another aspect, the embodiments of the present disclosure provide a computer readable storage medium, which stores a computer program, and the computer program is executed by a processor to implement part or all steps of the above method.

[0011] In another aspect, the embodiments of the present disclosure provide a computer program, comprising computer readable code, when the computer readable code runs in a computer device, a processor in the computer device executes part or all steps of the above method.

[0012] In another aspect, the embodiments of the present disclosure provide a computer program product, comprising a non-transitory computer readable storage medium storing a computer program, and the computer program is read and executed by a computer to implement part or all steps of the above method.

[0013] In the embodiments of the present disclosure, under the SR-IOV technology, by installing virtualization driver software to the computer device, the computer device can execute the virtual resource allocation method of the embodiments of the present disclosure to determine a target number of target virtual function resources (VFs) that meet the virtual resource creation request from the virtual function resource pool after receiving a virtual resource creation request, create a target virtual graphics processor device based on the target number of target virtual function resources, and then allocate the target virtual graphics processor device to the target virtual machine. In this way, under the SR-IOV technology, the target virtual graphics processor device with different display memory resource sizes (display memory resources are provided by VFs) can be created according to the virtual resource acquisition demand, and the various demands of different virtual machines for the display memory resources provided by VFs can be met. In the related art, when the display memory resource size corresponding to the VF is modified, all virtual machines need to be closed and the server needs to be restarted; and in the embodiments of the present disclosure, the target number of target virtual function resources are integrated to obtain the target virtual graphics processor device that meets the virtual resource creation demand, and the entire process can be completed without stopping the operation of all virtual machines and restarting the server, and the display memory capacities of different target virtual graphics processor devices created can coexist in the same graphics card.

[0014] It should be understood that the above general description and the following detailed description are only exemplary and explanatory, but not limiting the technical solutions of the present disclosure. BRIEF DESCRIPTION OF DRAWINGS

[0015] The accompanying drawings, which are incorporated into and form part of the specification, illustrate embodiments consistent with the present disclosure and, together with the specification, serve to explain the technical solutions of the present disclosure.

[0016] FIG. 1 is a schematic diagram of the implementation process of a virtual resource allocation method according to an embodiment of the present disclosure;

[0017] FIG. 2 is a schematic diagram of the implementation process of a virtual resource allocation method according to an embodiment of the present disclosure;

[0018] FIG. 3 is a schematic diagram of the implementation process of a virtual resource allocation method according to an embodiment of the present disclosure;

[0019] FIG. 4 is a schematic diagram of the physical connection relationship between VFs and computing core groups in the chip microstructure in a virtual resource allocation method according to an embodiment of the present disclosure;

[0020] FIG. 5 is a schematic diagram of the vGPU allocation sequence in a virtual resource allocation method according to an embodiment of the present disclosure;

[0021] FIG. 6 is a schematic diagram of the composition structure of a virtual resource allocation device according to an embodiment of the present disclosure;

[0022] FIG. 7 is a schematic diagram of a hardware entity of a computer device according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0023] In order to make the purposes, technical solutions and advantages of the present disclosure clearer, the technical solutions of the present disclosure are described in further detail below in combination with the drawings and embodiments, and the described embodiments should not be regarded as limiting the present disclosure. All other embodiments obtained by those of ordinary skill in the art without creative labor fall within the scope of protection of the present disclosure.

[0024] In the following description, "some embodiments" are related to a subset of all possible embodiments, but it can be understood that "some embodiments" can be the same subset or different subsets of all possible embodiments, and can be combined with each other without conflict.

[0025] The terms "first / second / third" involved are only to distinguish similar objects, and do not represent a specific order of the objects. It can be understood that "first / second / third" can be interchanged with a specific order or sequence as allowed, so that the embodiments of the present disclosure described herein can be implemented in an order other than that illustrated or described herein.

[0026] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present disclosure belongs. The terms used herein are only for the purpose of describing the present disclosure and are not intended to limit the present disclosure.

[0027] In order to better understand the virtual resource creation method provided by the embodiments of the present disclosure, the solutions in the related art will be described first.

[0028] Graphics Processing Unit (GPU) virtualization is a technology that divides a physical GPU into multiple Virtual Graphics Processing Unit (vGPU) through software and hardware partitioning technology, so that each virtual machine can exclusively use a vGPU, thereby achieving efficient allocation and use of resources.

[0029] At present, it is an industry consensus that integrating virtualization functions in the chip design stage can greatly improve the virtualization performance of hardware devices such as network cards and graphics cards. Among them, SR-IOV is the most mainstream.

[0030] In a SR-IOV based device virtualization scheme, a device provides two Peripheral Component Interconnect Express (PCIE) functions, namely a Physical Function (PF) and a VF. The PF contains a complete PCIE function, while the VF contains a light PCIE function.

[0031] When a vGPU is created using a VF, according to the PCI-SIG specification, the Base Address Register (BAR) space size of all VFs is the same. The BAR is used to specify the base address of the VF in the system memory, which is the starting point of the memory space allocated to the VF for access. For example, a graphics card supporting SR-IOV technology and containing 32 Gigabyte (GB) of display memory, if supporting 32 VFs, each VF will have 1 GB of display memory, and if a vGPU created by any VF is allocated to a virtual machine, the virtual machine will have a graphics card containing 1 GB of display memory.

[0032] Due to hardware design limitations, the display memory capacity (display memory resource size) that can be allocated to a VF is defined during chip design. For example, the display memory capacity that can be allocated to a VF can have options of 512 Megabyte (MB), 1 GB, etc. This means that a VF can only be allocated 512 MB or 1 GB of display memory, and cannot be allocated display memory of other capacities other than 512 MB or 1 GB. However, first, the demand of virtual machine users for display memory capacity is not fixed, and different users may need 4 GB, 6 GB, 8 GB, etc. of display memory, which cannot be provided in the SR-IOV virtualization scheme; second, if the display memory capacity of a VF is to be changed, all running virtual machines need to be closed, the GPU driver in the virtual machine manager needs to be unloaded, the VF display memory size needs to be switched, and the virtualization needs to be restarted.

[0033] In related technologies, the display memory capacity of a VF is divided equally, and different sizes of VFs cannot be defined in the same graphics card. For example, allocating 1 GB of display memory to VF1 and 4 GB of display memory to VF2 is against the PCI-SIG specification and cannot be completed. However, users need more flexible allocation methods for the display memory capacity of a vGPU; for example, allocating 1 GB of display memory to vGPU1 and 4 GB of display memory to vGPU2, which cannot be met by existing schemes.

[0034] The VF memory capacity in related technologies is limited by hardware resources, and there are generally only one or two capacity options. To enable the graphics card to support different memory resource allocations, it is necessary to shut down all running virtual machines, restart the server, or reset the graphics card in a supported system. This has the disadvantages of greatly affecting the speed of user deployment of virtual machines and affecting running virtual machines.

[0035] Application number CN202311037854.2 describes a method for allocating video memory in virtualization scenarios. It primarily addresses the issue of GPU virtualization schemes under the mdev framework, where the host driver can only select the same type of video memory capacity for all virtual machines, failing to provide diverse options based on different user workloads. This disclosure aims to solve the limitation imposed by the PCI-SIG specification on the video memory capacity of the Virtual Frame (VF) in Hardware-Assisted Virtualization (SR-IOV) technology: the VF allocates a fixed amount of video memory to virtual machines, and adjusting this memory is extremely cumbersome.

[0036] This disclosure provides a virtual resource allocation method, which can be executed by a processor of a computer device. The computer device refers to a server, laptop computer, tablet computer, desktop computer, smart TV, set-top box, mobile device (e.g., mobile phone, portable video player, personal digital assistant, dedicated messaging device, portable gaming device), or other device with data processing capabilities. As shown in Figure 1, the method includes the following steps 101 to 102:

[0037] Step 101: Respond to the virtual resource creation request and determine the target number of target virtual function resources from the virtual function resource pool to satisfy the virtual resource creation request; the virtual function resources in the virtual function resource pool are located on the graphics card that supports single root input / output virtualization technology.

[0038] The computer device may have virtualization driver software installed, which is used to execute the virtual resource allocation method of the embodiments of this disclosure. The virtual machine driver software may include host driver software and guest driver software. The host driver software is installed in the virtual machine monitor (VMM) of the computer device, and the guest driver software is installed in the virtual machine (Guest).

[0039] The virtual resource creation request is used to create a vGPU device with a certain virtual resource size, so as to run a target virtual machine based on the vGPU device. In a general way, the virtual resource creation request is used to allocate a virtual resource (vGPU) for the target virtual machine. The target virtual machine is a virtual machine with a virtual resource acquisition requirement. The target virtual machine can be a newly created virtual machine on a computer device, or a newly created virtual machine on another device other than the computer device, and the embodiments of the present disclosure do not limit this.

[0040] The virtual function resource pool is used to manage virtual resources under the SR-IOV technology. In a feasible implementation manner, the virtual function resource can be a VF located on a graphics card supporting the SR-IOV technology. The VF can have a video memory capacity of 512 MB or 1 GB, and the specific video memory capacity of each VF under the SR-IOV technology can be determined.

[0041] Since the video memory capacity of one VF is fixed under the SR-IOV technology, the embodiments of the present disclosure regard the VF as a video memory resource unit to allocate video memory resources. The virtual function resource pool includes a plurality of VFs, and the virtual function resource pool can be referred to as a VF resource pool.

[0042] The target quantity refers to the number of virtual function resources (VFs) required to meet the current virtual resource acquisition requirement. The target quantity of target virtual function resources refers to one or more virtual function resources (VFs) capable of meeting the current virtual resource acquisition requirement. When constructing a vGPU, the actual required is the video memory resource of the target quantity of target virtual function resources.

[0043] In a feasible implementation manner, the specific implementation manner of obtaining the virtual resource creation request can be that a user sends a virtual resource creation request to a computer device through specific software. Specifically, the user can select the current required video memory resource size through the human-computer interaction interface of the specific software, and then send a virtual resource creation request containing the current required video memory resource size. Since the video memory resources of the graphics card are evenly divided to the VFs under the SR-IOV technology, the current required video memory resource size can refer to the number of currently required VFs.

[0044] In another feasible implementation manner, the virtual resource creation request can further include a current required computing resource size. Since the computing resource is provided by a computing core group, the computing resource size can refer to the computing resource size of the computing core group.

[0045] In some embodiments, the specific implementation of constructing the virtual function resource pool can be: determining virtual function resource information of a graphics card supporting single-root input / output virtualization technology; and constructing the virtual function resource pool based on the virtual function resource information.

[0046] The virtual function resource information can be detailed information of virtual function resources of the graphics card supporting the SR-IOV technology. In a feasible implementation, the virtual function resource information can be all VF information of the graphics card supporting the SR-IOV technology, and the virtual function resource information can include but is not limited to information such as whether the VF has been allocated, which graphics card the VF belongs to, which PF controls the VF, and which computing core group in the chip microarchitecture the VF is connected to.

[0047] In a feasible implementation, in the Host driver software initialization stage, all VF information of the graphics card supporting the SR-IOV technology is obtained, and a VF resource pool (virtual function resource pool) is established using all the VF information.

[0048] In a feasible implementation, the specific implementation of determining the target number of target virtual function resources can be: determining the target number of target virtual function resources from idle virtual function resources in the virtual function resource pool to meet the virtual resource creation request; and the sum of sizes of the target number of target virtual function resources is the same as the size of the currently required virtual function resource.

[0049] Step 102, creating a target virtual graphics processor device based on the target number of target virtual function resources, and running a target virtual machine based on the target virtual graphics processor device.

[0050] The target virtual graphics processor device refers to a vGPU device. The target virtual machine is run based on the target virtual graphics processor device, that is, the target virtual graphics processor device is allocated to the target virtual machine for use.

[0051] In a feasible implementation, when only graphics memory resources need to be allocated, the specific implementation of creating the target virtual graphics processor device can be: the graphics memory resources of the target number of target virtual function resources can be integrated to obtain the target virtual graphics processor device.

[0052] In another feasible implementation, when graphics memory resources and computing resources need to be allocated at the same time, the specific implementation of creating the target virtual graphics processor device can be: the target number of target virtual function resources and at least one computing core group matching the size of the currently required computing resources can be integrated to obtain the target virtual graphics processor device; and the size of the computing resources of the at least one computing core group is the same as the size of the currently required computing resources.

[0053] In some embodiments, the specific implementation of "running the target virtual machine based on the target virtual graphics processor device" in step 102 can be: transmitting the target virtual graphics processor device to the target virtual machine through the pass-through component, so as to run the program of the target virtual machine based on the target virtual graphics processor device.

[0054] The pass-through component is used to transmit the created target virtual graphics processor device to the virtual machine. In a feasible implementation, the pass-through component can be a Virtual Function Input / Output for Peripheral Component Interconnect (VFIO-PCI) framework. The VFIO-PCI framework is a kernel-level component that utilizes the I / O virtualization capabilities of hardware (such as Intel's VT-d and AMD's AMD-Vi) to provide direct access to devices. VFIO-PCI allows vGPU to be directly transmitted to a virtual machine, so that the virtual machine can directly access the configuration space and registers of the vGPU without the need for a driver.

[0055] For example, if the virtual resource creation request represents that 2GB of video memory resources are currently needed, and each VF has a video memory capacity of 1GB, then after receiving the virtual resource creation request, the virtualization driver software can select two VFs from the virtual function resource pool, create a vGPU based on the two VFs, and transmit the created vGPU to the virtual machine that sent the virtual resource creation request.

[0056] It should be noted that the embodiments of the present disclosure do not change the existing VF definition, but add the determination of the number of VFs required according to the user demand in the virtual resource creation request, and create a vGPU that meets the user's demand based on the number of VFs required.

[0057] In the embodiments of the present disclosure, under the SR-IOV technology, the computer device can execute the virtual resource allocation method of the embodiments of the present disclosure by installing the virtualization driver software to the computer device, so as to determine a target number of target virtual function resources (VFs) that meet the virtual resource creation request from the virtual function resource pool after receiving the virtual resource creation request, create a target virtual graphics processor device based on the target number of target virtual function resources, and then allocate the target virtual graphics processor device to the target virtual machine. In this way, under the SR-IOV technology, the target virtual graphics processor device with different display memory resource sizes (the display memory resource is provided by the VF) can be created according to the virtual resource acquisition demand, and the various demands of the virtual machines on the display memory resource provided by the VF can be met. In the related art, when the display memory resource size corresponding to the VF is modified, all virtual machines need to be closed and the server needs to be restarted; and in the embodiments of the present disclosure, the target number of target virtual function resources are integrated to obtain the target virtual graphics processor device that meets the virtual resource creation demand, and the whole process can be completed without stopping the operation of all virtual machines and restarting the server, and the display memory capacities of different target virtual graphics processor devices can coexist in the same graphics card.

[0058] The embodiments of the present disclosure provide a virtual resource allocation method, which can be executed by a processor of a computer device installed with virtualization driver software. As shown in FIG. 2, the method comprises the following steps 201 to 205:

[0059] Step 201, determining virtual function resource information of a graphics card supporting single root input / output virtualization technology.

[0060] Step 202, constructing a virtual function resource pool based on the virtual function resource information.

[0061] The virtual function resource in the virtual function resource pool is located on the graphics card supporting the single root input / output virtualization technology.

[0062] The virtual function resource information corresponds to at least one first virtual function resource, and the virtual function resource pool comprises a used resource pool and an idle resource pool.

[0063] The virtual function resource information corresponds to at least one first virtual function resource, that is, the at least one first virtual function resource refers to all virtual function resources (VFs) corresponding to the virtual function resource information. The virtual function resources in the idle resource pool are all unused (or unallocated) virtual function resources; and the virtual function resources in the used resource pool are all used (or allocated) virtual function resources.

[0064] In some embodiments, the implementation of step 202 can be: dividing each first virtual function resource into a first virtual function resource set that has been used and a second virtual function resource set that has not been used based on the usage of each first virtual function resource; determining the used resource pool and the idle resource pool based on the first virtual function resource set and the second virtual function resource set; and marking the virtual function resources in the first virtual function resource set as having been used and marking the virtual function resources in the second virtual function resource set as not having been used.

[0065] The virtual function resources in the first virtual function resource set are all used, and the virtual function resources in the second virtual function resource set are all unused.

[0066] The division of the at least one virtual function resource into the first virtual function resource set that has been used and the second virtual function resource set that has not been used is to facilitate the differentiation between which virtual function resources have been used and which virtual function resources have not been used, thereby facilitating subsequent allocation.

[0067] The marking of the virtual function resources in the first virtual function resource set as having been used is to identify whether the virtual function resources in the first virtual function resource set have been used; similarly, the marking of the virtual function resources in the second virtual function resource set as not having been used is to identify whether the virtual function resources in the second virtual function resource set have not been used; thereby, the allocation of virtual function resources can be avoided.

[0068] In an embodiment, the implementation of "determining the used resource pool and the idle resource pool based on the first virtual function resource set and the second virtual function resource set" can be: marking the first virtual function resource set as a first identifier and marking the second virtual function resource set as a second identifier; the first identifier represents that the corresponding virtual function resource has been used, and the second identifier represents that the corresponding virtual function resource has not been used; taking the marked first virtual function resource set as the used resource pool; and taking the marked second virtual function resource set as the idle resource pool. In this case, the marking of each virtual function resource in the set is achieved by marking the set.

[0069] In some embodiments, the specific implementation of "determining the used resource pool and the idle resource pool based on the first set of virtual function resources and the second set of virtual function resources" can also be: marking each virtual function resource in the first set of virtual function resources as a first identifier; the first identifier represents that the corresponding virtual function resource has been used; marking each virtual function resource in the second set of virtual function resources as a second identifier; the second identifier represents that the corresponding virtual function resource has not been used; taking the marked first set of virtual function resources as the used resource pool; and taking the marked second set of virtual function resources as the idle resource pool. In this case, each virtual function resource in the set is marked to further improve the accuracy of the marking.

[0070] In a possible implementation, the first identifier can be 1 and the second identifier can be 0; at this time, each virtual function resource in the first set of virtual function resources is marked as 1, and each virtual function resource in the second set of virtual function resources is marked as 0.

[0071] In another possible implementation, the first identifier can be false and the second identifier can be true; at this time, each virtual function resource in the first set of virtual function resources is marked as false, and each virtual function resource in the second set of virtual function resources is marked as true.

[0072] In other embodiments, after obtaining the virtual function resource pool, each virtual function resource in the virtual function resource pool can be enumerated again, and the resource description of each virtual function resource is obtained, so as to facilitate subsequent resource allocation according to the resource description.

[0073] Specifically, the resource description of each first virtual function resource is determined; the resource description includes at least one of the location, usage, control condition and connection condition of each first virtual function resource; and each virtual function resource in the virtual function resource pool is described according to the resource description of each virtual function resource.

[0074] The resource description of each virtual function resource in the virtual function resource pool includes the usage, location information, control condition and connection condition of each virtual function resource.

[0075] The usage of each virtual function resource represents whether each virtual function resource has been used (or allocated); the location information of each virtual function resource represents which graphics card each virtual function resource belongs to; the control condition of each virtual function resource represents which PF each virtual function resource is controlled by; and the connection condition of each virtual function resource represents which computing core group in the chip microstructure each virtual function resource is linked to.

[0076] Step 203: Respond to the virtual resource creation request and determine the target number of target virtual function resources from the virtual function resource pool to satisfy the virtual resource creation request.

[0077] The target video memory resource size refers to the amount of video memory resources currently required.

[0078] In some implementations, step 203 can be specifically implemented as follows: determining the video memory size of a single virtual function resource; determining a target quantity based on the video memory size of the single virtual function resource and the target video memory size; determining a target quantity of virtual function resources from the free resource pool as the target quantity of target virtual function resources; and matching the sum of the sizes of the target quantity of target virtual function resources with the target video memory size.

[0079] The sum of the sizes of the target number of target virtual function resources matches the target video memory size, indicating that the sum of the sizes of the target number of target virtual function resources is greater than or equal to the target video memory size.

[0080] In one feasible implementation, the specific way to determine the video memory size of a single virtual function resource can be: determining the video memory size of a single virtual function resource during the Host driver software initialization phase; or, determining the video memory size of a single virtual function resource through a query instruction, which is used to obtain the video memory size of a single VF.

[0081] In one feasible implementation, the specific way to determine the target quantity can be: to perform a division operation on the target video memory resource size and the video memory resource size of a single virtual function resource to obtain the target quantity.

[0082] Step 204: Create a target virtual graphics processor device based on the target number of target virtual functional resources.

[0083] Due to the unique microstructure of graphics card chips, which contain multiple computing cores, there are typically two connection methods. The first is that different Virtual Functions (VFs) are bound to different computing core groups. In this case, the virtualization driver records the VF binding information to the core group in the VF resource description structure, and computing power allocation for the vGPU is required during dynamic VF resource allocation. The second method involves all VFs sharing all computing core groups. In this case, the virtualization driver does not need to consider computing power allocation when merging VF resources. Therefore, when creating a target virtual graphics processing unit (VGPU), the connection relationships between different VFs and different computing core groups must also be considered.

[0084] In a possible implementation, the target virtual graphics processor device can be created based on the connection relationship between different virtual function resources and different computing core groups and the target quantity of target virtual function resources.

[0085] In a possible implementation, without considering the computing core groups, the specific implementation of step 204 can be: selecting one virtual function resource from the target quantity of target virtual function resources as a master virtual function resource, and selecting other virtual function resources except the master virtual function resource as slave virtual function resources; and creating the target virtual graphics processor device based on the master virtual function resource and the slave virtual function resources.

[0086] Step 205: running the target virtual machine based on the target virtual graphics processor device.

[0087] In a possible implementation, the target virtual graphics processor device can be directly transmitted to the target virtual machine through the VFIO-PCI framework, so as to run the program of the target virtual machine based on the target virtual graphics processor device.

[0088] In some embodiments, step 204 can be implemented through steps 2041 to 2042 as follows:

[0089] Step 2041: determining the association relationship between the virtual function resources and the computing core groups.

[0090] The association relationship between the virtual function resources and the computing core groups represents the connection mode between different virtual function resources (VFs) and different computing core groups.

[0091] In a possible implementation, the association relationship between the virtual function resources and the computing core groups can be determined in an artificial input manner. Alternatively, the association relationship between the virtual function resources and the computing core groups can also be determined in a software test manner.

[0092] Step 2042: creating the target virtual graphics processor device based on the association relationship and the target quantity of target virtual function resources.

[0093] In a possible implementation, in the case where the association relationship is that different virtual function resources (VFs) are connected to different computing core groups, one or more computing core groups that meet the virtual resource creation request are determined; and the target virtual graphics processor device is created based on the one or more computing core groups and the target quantity of target virtual function resources. In the case where the association relationship is that all virtual function resources (VFs) share all computing core groups, computing resources do not need to be allocated, and the target virtual graphics processor device can be directly created based on the target quantity of target virtual function resources.

[0094] In some embodiments, when different virtual function resources are connected to different computing core groups, the step 2042 can be implemented by the following steps 2042a to 2042b:

[0095] Step 2042a, in the case where the association relationship is that different virtual function resources are connected to different computing core groups, determining at least one first computing core group matching the target computing resource size.

[0096] The at least one first computing core group refers to one or more computing core groups matching the target computing resource size. The at least one first computing core group matching the target computing resource size refers to that the computing resource size of the at least one first computing core group is greater than or equal to the target computing resource size, that is, the at least one first computing core group can meet the current demand for computing resources.

[0097] In a feasible implementation, the specific implementation of "determining at least one first computing core group matching the target computing resource size" can be: in the case where the sum of the computing resource sizes of at least one second computing core group corresponding to the target number of target virtual function resources matches the target computing resource size, taking the at least one second computing core group as the at least one first computing core group; in the case where the sum of the computing resource sizes of the at least one second computing core group corresponding to the target number of target virtual function resources does not match the target computing resource size, determining at least one fourth computing core group from at least one third computing core group in an idle state, taking the at least one second computing core group and the at least one fourth computing core group as the at least one first computing core group; and the sum of the computing resource sizes of the at least one second computing core group and the at least one fourth computing core group matches the target computing resource size.

[0098] The at least one second computing core group refers to one or more computing core groups corresponding to the target number of target virtual function resources; that is, the at least one second computing core group refers to one or more computing core groups having a direct connection relationship with the target number of target virtual function resources.

[0099] The at least one third computing core group in an idle state refers to one or more computing core groups that are not used (or not allocated). The at least one fourth computing core group is one or more computing core groups additionally required when the at least one second computing core group corresponding to the at least one second virtual function resource cannot meet the current demand for computing resources.

[0100] The sum of the computing resource sizes of the at least one second computing core group corresponding to the target quantity of target virtual function resources matches the target computing resource size, indicating that the sum of the computing resource sizes of the at least one second computing core group corresponding to the target quantity of target virtual function resources is greater than or equal to the target computing resource size; that is, the at least one second computing core group corresponding to the target quantity of target virtual function resources can meet the current demand for computing resources.

[0101] The sum of the computing resource sizes of the at least one second computing core group corresponding to the target quantity of target virtual function resources does not match the target computing resource size, indicating that the sum of the computing resource sizes of the at least one second computing core group corresponding to the target quantity of target virtual function resources is less than the target computing resource size; that is, the at least one second computing core group corresponding to the target quantity of target virtual function resources cannot meet the current demand for computing resources.

[0102] The sum of the computing resource sizes of the at least one second computing core group and the at least one fourth computing core group matches the target computing resource size, indicating that the sum of the computing resource sizes of the at least one second computing core group and the at least one fourth computing core group is greater than or equal to the target computing resource size; that is, the at least one second computing core group and the at least one fourth computing core group can meet the current demand for computing resources.

[0103] In a feasible implementation, in a case where the sum of the computing resource sizes of the at least one second computing core group corresponding to the at least one second virtual function resource matches the target computing resource size, the at least one second computing core group is directly used as the at least one first computing core group.

[0104] In a feasible implementation, in a case where the sum of the computing resource sizes of the at least one second computing core group corresponding to the at least one second virtual function resource does not match the target computing resource size, the at least one fourth computing core group is first determined from the at least one third computing core group in an idle state, and then the at least one second computing core group and the at least one fourth computing core group are used together as the at least one first computing core group.

[0105] Step 2042b, creating the target virtual graphics processor device based on the target quantity of target virtual function resources and the at least one first computing core group.

[0106] In some embodiments, the implementation of step 2042b can be: selecting one virtual function resource from the target number of target virtual function resources as a master virtual function resource, and selecting other virtual function resources except the master virtual function resource as slave virtual function resources; and creating the target virtual graphics processor device based on the at least one first computing core group, the master virtual function resource, and the slave virtual function resources.

[0107] In a possible implementation, the implementation of "creating the target virtual graphics processor device based on the at least one first computing core group, the master virtual function resource, and the slave virtual function resources" can be: integrating target resources of the master virtual function resource, memory resources of the slave virtual function resources, and computing resources of the at least one first computing core group to obtain the target virtual graphics processor device; wherein the target resources include at least one of a register, configuration information, a computing resource, and a memory resource.

[0108] The master virtual function resource can be denoted as Master VF, and the slave virtual function resource can be denoted as Slave VF. The configuration information refers to resources of a configuration space, and is used to represent an execution rule of a vGPU.

[0109] When the target virtual graphics processor device (vGPU) is created, the vGPU will occupy all resources of the Master VF, including GPU, Direct Memory Access (DMA), Video (Video) register, Interrupt (Interrupt) register, and configuration space resources, and will not use registers and configuration space resources of the Slave VF; the Slave VF only provides storage resources of a memory part, that is, a VF BAR2 part of most SR-IOV technology supported graphics cards.

[0110] In implementation, all resources of the Master VF and memory resources of the Slave VF can be integrated into a vGPU by Host driver software, and the vGPU device has a memory size as required by a user.

[0111] In some embodiments, when all virtual function resources share all computing core groups, step 2042 can be implemented by step 2042c as follows:

[0112] Step 2042c, when the association relationship is that all virtual function resources share all computing core groups, creating the target virtual graphics processor device based on the target number of target virtual function resources.

[0113] When all the virtual function resources share all the computing core groups, no computing resource needs to be allocated, and thus the target virtual graphics processor device can be directly created according to the target number of target virtual function resources.

[0114] In some embodiments, the specific implementation of step 2042c can be: selecting one virtual function resource from the target number of target virtual function resources as a master virtual function resource, and selecting other virtual function resources except the master virtual function resource as slave virtual function resources; and creating the target virtual graphics processor device based on the master virtual function resource and the slave virtual function resources.

[0115] In a possible implementation, the specific implementation of "creating the target virtual graphics processor device based on the master virtual function resource and the slave virtual function resources" can be: integrating a target resource of the master virtual function resource and a video memory resource of the slave virtual function resource to obtain the target virtual graphics processor device; wherein the target resource includes at least one of a register, configuration information, a computing resource, and a video memory resource.

[0116] It should be noted that the operation of "creating the target virtual graphics processor device based on the master virtual function resource and the slave virtual function resources" is similar to the operation of "creating the target virtual graphics processor device based on at least one first computing core group, a master virtual function resource, and a slave virtual function resource" in step 2042b, and in implementation, the description in 2042b above can be referred to, and thus will not be described here.

[0117] In the embodiments of the present disclosure, under the SR-IOV technology, the computer device can execute the virtual resource allocation method of the embodiments of the present disclosure by installing virtualization driver software to the computer device, so as to determine a target number of target virtual function resources (VFs) that meet a virtual resource creation request from a virtual function resource pool after receiving the virtual resource creation request, create a target virtual graphics processor device based on the target number of target virtual function resources, and then allocate the target virtual graphics processor device to a target virtual machine. In this way, under the SR-IOV technology, the target virtual graphics processor device with different display memory resource sizes (the display memory resource is provided by the VF) can be created according to the virtual resource acquisition demand, and the various demands of different virtual machines for the display memory resource provided by the VF can be met. In the related art, when the display memory resource size corresponding to the VF is modified, all virtual machines need to be closed and the server needs to be restarted; and in the embodiments of the present disclosure, the target number of target virtual function resources are integrated to obtain the target virtual graphics processor device that meets the virtual resource creation demand, and the whole process can be completed without stopping the operation of all virtual machines and restarting the server, and the display memory capacities of different target virtual graphics processor devices created can coexist in the same graphics processing unit.

[0118] The application of the virtual resource allocation method provided by the embodiments of the present disclosure in actual scenarios is described below.

[0119] The present disclosure provides a vGPU dynamic resource allocation method (the above-mentioned virtual resource allocation method) for the field of SR-IOV virtualization, which is applied to the field of GPU virtualization. The method aims to solve the following technical problems: first, under the framework of SR-IOV technology, since the VF does not support non-equal division of display memory, all vGPUs obtained by the user have only fixed-size display memory capacity; second, under the framework of SR-IOV technology, modifying the display memory capacity of the VF requires closing all virtual machines and even restarting the server.

[0120] In order to overcome the above-mentioned shortcomings of the existing SR-IOV technology framework, such as that the vGPU does not support non-equal division of display memory and that modifying the display memory capacity of the VF requires restarting the server, the present disclosure provides a vGPU dynamic resource allocation method based on the SR-IOV technology from the level of driver software, and the present disclosure adopts the following technical solutions for implementation:

[0121] The vGPU virtualization driver software is divided into Host driver software and Guest driver software, the Host driver software is installed in the virtual machine manager (VMM), and the Guest driver software is installed in the virtual machine (Guest). The present disclosure is designed for the Host driver software, and only the Guest driver software will be mentioned in the last part, and the process is shown in FIG. 3, including the following steps 301 to 311:

[0122] Step 301, the Host driver software integrates a VF resource pool.

[0123] The Host driver software initialization phase obtains all VF information of the current graphics card supporting SR-IOV technology, and establishes a VF resource pool by using the information. Among them, the used resources and the idle resources can be marked as VF used resource pool and VF idle resource pool, respectively.

[0124] Further, the VF resource pool contains information such as whether the VF has been occupied by a vGPU, which graphics card the VF belongs to, which PF controls the VF, and which computing core group in the chip microarchitecture the VF is connected to, in the resource description structure of the VF. Due to the special chip microstructure of the graphics card, it has multiple computing core groups inside, usually with two connection modes. The first mode is that different VFs are bound to different computing core groups. In this case, the driver program records the information of the VF binding to the core group in the VF resource description structure, and also needs to allocate computing power to the vGPU when dynamically allocating VF resources. The second mode is that all VFs share all computing core groups. In this case, the driver program does not need to consider the computing power allocation problem when merging VF resources.

[0125] Further, in the chip scheme of VF binding different computing core groups, the dynamic allocation of VF resources needs to consider the allocation of computing power resources, that is, to avoid the case that all VFs bound to a computing core group are occupied as slave VFs, resulting in the inability to enable this computing core group.

[0126] Step 302, the user sends a virtual resource creation request.

[0127] The user can send a virtual resource creation request through specific software with parameters to inform the Host driver software that he wants to create a vGPU with a specified amount of graphics memory in the specified graphics card.

[0128] Step 303, determine whether the graphics memory demand in the virtual resource creation request is greater than the graphics memory of a single VF.

[0129] The Host driver software obtains the graphics memory size of the vGPU that the user wants to create, and determines whether multiple VFs need to be merged in the Host driver software. If the graphics memory size of the vGPU that the user wants to create exceeds the graphics memory size that a single VF can provide, steps 306 to 307 will be entered; if the graphics memory size of the vGPU that the user wants to create does not exceed the graphics memory size that a single VF can provide, steps 304 to 305 will be entered.

[0130] Step 304, the Host driver software allocates a single idle VF from the VF idle resource pool.

[0131] A single free VF acts as Master VF, while Slave VFs are part of the pool.

[0132] Step 305, Host driver software uses a single free VF to create a vGPU device.

[0133] Step 306, Host driver software allocates multiple free VFs from the free VF pool.

[0134] Host driver software calculates how many VFs are needed to create a vGPU. Host driver software selects the required VFs from the free VF pool according to the rule of dividing the physical computing core group equally. The first selected VF is Master VF, and the rest are Slave VFs.

[0135] Step 307, Host driver software integrates multiple free VFs to create a vGPU device.

[0136] Host driver software creates a vGPU device that will occupy all resources of Master VF, including GPU, DMA, Video, Interrupt, and configuration space resources. Slave VFs do not use the above-mentioned registers and configuration space resources. Slave VFs only provide storage resources for part of the video memory, i.e., the VF BAR2 part of most SR-IOV technology graphics cards.

[0137] Step 308, Host driver software generates a vGPU device and passes it to the virtual machine for use.

[0138] Host driver software integrates all resources of Master VF and video memory resources of Slave VF into a vGPU. This vGPU device has the desired video memory size, and passing this vGPU device to the virtual machine allows normal use.

[0139] Further, after Host driver software integrates the video memory resources of VF, it generates a vGPU device based on the Mediated VFIO framework. This vGPU device can be passed to the virtual machine through the VFIO-PCI module.

[0140] Step 309, start the virtual machine based on the vGPU device and install Guest driver software.

[0141] The vGPU device in the virtual machine will be recognized as a vGPU device with complete functions. After normal installation of Guest driver software, all capabilities provided by the vGPU device can be used.

[0142] Step 310, processing the program in the virtual machine based on the vGPU device.

[0143] Step 311, when the virtual machine is closed, the VF corresponding to the vGPU device is recycled to the VF idle resource pool.

[0144] When the user deletes the vGPU device, the VF resource occupied by the vGPU device is recycled by the Host driver software and re-placed into the VF idle resource pool.

[0145] In the embodiment of the disclosure, the physical connection relationship between the VF and the computing core group in the chip microstructure can be as shown in FIG. 4. The graphics card in FIG. 4 has 32 GB of display memory and 32 VFs, each VF occupies 1 GB of display memory, and the computing core group in the graphics card chip has 8 groups, and every 4 VFs are fixedly connected to a computing core group. Among them, VF0~VF3 are fixedly connected to the first physical computing core group in the chip, VF4~VF7 are fixedly connected to the second physical computing core group in the chip, VF8~VF11 are fixedly connected to the third physical computing core group in the chip, VF12~VF15 are fixedly connected to the fourth physical computing core group in the chip, VF16~VF19 are fixedly connected to the fifth physical computing core group in the chip, VF20~VF23 are fixedly connected to the sixth physical computing core group in the chip, VF24~VF27 are fixedly connected to the seventh physical computing core group in the chip, and VF28~VF31 are fixedly connected to the eighth physical computing core group in the chip.

[0146] The Host driver software in the embodiment of the disclosure will dynamically integrate the VFs of the graphics card shown in FIG. 4, and create a vGPU with a user-specified display memory size without the need to close all virtual machines or restart the server, to meet the user's needs. The process can include the following steps S1 to S7:

[0147] S1, in the Host driver software initialization stage, all 32 VF information of the graphics card is obtained, and the Host driver software uses the information to establish a VF resource pool. The resource pool will mark the used resources and idle resources, which are called VF used resource pool and VF idle resource pool respectively.

[0148] S2, the user can tell the Host driver program that he wants to create an 8GB display memory vGPU in the specified graphics card by executing specific software with parameters.

[0149] S3, the Host driver software obtains that the user wants to create an 8GB vGPU display memory, and calculates that 8 VF resources need to be integrated in the driver software to meet the user's demand for 8GB vGPU display memory.

[0150] S4, the Host driver software selects 8 VFs required from the VF idle resource pool according to the rule of equally dividing the maximum computing core group capacity, and selects one of the selected VFs as a Master VF and the rest as Slave VFs.

[0151] As shown in FIG. 5, each of the vGPUs created by the user in the first to eighth times requires 1 GB of display memory, at which time the entire VF complete space resource is allocated to the vGPU. When the user creates a ninth vGPU requiring 8 GB of display memory, the user needs to occupy not only VF1 but also the display memory resources of the following VFs, i.e., VF5, VF9, VF13, VF17, VF21, VF25, and VF29.

[0152] S5, the Host driver software creates a vGPU, which will occupy the Master VF, i.e., the vGPU will occupy all resources of VF1 in FIG. 5, including GPU, DMA, Video, and Interrupt registers and configuration space resources, and will not use the above-mentioned registers and configuration space resources of the Slave VFs. The slave VFs, i.e., VF5, VF9, VF13, VF17, VF21, VF25, and VF29, only provide storage resources of the display memory part.

[0153] S6, the Host driver software integrates all resources of the Master VF and the display memory resources of the Slave VFs into one vGPU, which has a size of 8 GB of display memory as required by the user, and the device can be directly passed to a virtual machine through the VFIO-PCI framework. Specifically, after the driver software integrates the display memory resources of the VFs, a vGPU virtual device is generated based on the Mediated VFIO framework, which has all the resources that can be directly transmitted to a virtual machine through the VFIO-PCI module. In the virtual machine world, a complete function display card will be seen, and after the correct installation of the Guest driver program, all functions of the display card can be used.

[0154] S7, when the virtual machine is closed, the user deletes the vGPU, and the 8 VF resources occupied by the vGPU are recycled by the Host driver software and put back into the VF idle resource pool. The complete use cycle of the user ends, and the process is entered again when the user creates a vGPU again.

[0155] The embodiments of the present disclosure have at least the following innovative points: 1. the vGPU resource integration method under the condition that the VF display memory capacity is fixed; and 2. the method of integrating resources based on the Host driver software without restarting the server or stopping all virtual machines under the SR-IOV technology.

[0156] The embodiments of the present disclosure can achieve at least the following technical effects: 1. The required vGPU memory capacity can be adjusted according to user needs; 2. The vGPU memory capacity can be adjusted without restarting the server or stopping all virtual machines; and 3. Different vGPU memory capacities can coexist in the same graphics card.

[0157] It should be noted that the VF memory size in the embodiments of the present disclosure can be flexibly allocated to meet user needs for vGPU multi-capacity use, mixed use of different capacities, and convenient switching. Compared with the SR-IOV scheme, the scheme provides the advantages of convenient switching, mixed use of different capacities, and multi-capacity support.

[0158] Based on the foregoing embodiments, the present disclosure provides a virtual resource allocation apparatus, which includes units and modules included in the units, and can be implemented by a processor in a computer device. Of course, it can also be implemented by a specific logic circuit. In the implementation process, the processor can be a central processing unit (CPU), a microprocessor unit (MPU), a digital signal processor (DSP), or a field programmable gate array (FPGA).

[0159] FIG. 6 is a schematic diagram of the composition structure of a virtual resource allocation apparatus provided by an embodiment of the present disclosure. As shown in FIG. 6, the virtual resource allocation apparatus 600 includes a determination part 610 and a creation part 620, wherein:

[0160] The determination part 610 is configured to determine, in response to a virtual resource creation request, a target number of target virtual function resources that meet the virtual resource creation request from a virtual function resource pool; the virtual function resources in the virtual function resource pool are located on a graphics card supporting a single root input / output virtualization technology;

[0161] The creation part 620 is configured to create a target virtual graphics processor device based on the target number of target virtual function resources, and run a target virtual machine based on the target virtual graphics processor device.

[0162] In some embodiments, the determination part 610 can be specifically configured to determine virtual function resource information of the graphics card supporting the single root input / output virtualization technology; and construct the virtual function resource pool based on the virtual function resource information.

[0163] In some embodiments, the virtual function resource information corresponds to at least one first virtual function resource, and the virtual function resource pool includes a used resource pool and a free resource pool; the determining portion 610 can be specifically configured to: based on usage of each first virtual function resource, divide each virtual function resource into a first virtual function resource set that has been used and a second virtual function resource set that has not been used; based on the first virtual function resource set and the second virtual function resource set, determine the used resource pool and the free resource pool; a virtual function resource in the first virtual function resource set is marked as having been used, and a virtual function resource in the second virtual function resource set is marked as not having been used.

[0164] In some embodiments, the determining portion 610 can be specifically configured to: mark each virtual function resource in the first virtual function resource set as a first identifier; the first identifier represents that the corresponding virtual function resource has been used; mark each virtual function resource in the second virtual function resource set as a second identifier; the second identifier represents that the corresponding virtual function resource has not been used; take the marked first virtual function resource set as the used resource pool; and take the marked second virtual function resource set as the free resource pool.

[0165] In some embodiments, the virtual function resource pool includes a free resource pool, and the virtual resource creation request includes a target graphics memory resource size; the determining portion 610 can be specifically configured to: determine a graphics memory resource size that a single virtual function resource has; based on the graphics memory resource size that the single virtual function resource has and the target graphics memory resource size, determine a target number; from the free resource pool, determine a target number of virtual function resources as the target number of target virtual function resources; a sum of sizes of the target number of target virtual function resources matches the target graphics memory resource size.

[0166] In some embodiments, the creating portion 620 can be specifically configured to: determine an association relationship between a virtual function resource and a computing core group; based on the association relationship and the target number of target virtual function resources, create the target virtual graphics processor device.

[0167] In some embodiments, the virtual resource creation request includes a target computing resource size; in a case where the association relationship is that different virtual function resources are connected to different computing core groups, the creating portion 620 can be specifically configured to: determine at least one first computing core group that matches the target computing resource size; based on the target number of target virtual function resources and the at least one first computing core group, create the target virtual graphics processor device.

[0168] In some embodiments, the creating part 620 can be specifically configured to: determine a sum of computing resource sizes of at least one second computing core group corresponding to the target number of target virtual function resources; in a case where the sum of computing resource sizes of the at least one second computing core group matches the target computing resource size, take the at least one second computing core group as the at least one first computing core group; in a case where the sum of computing resource sizes of the at least one second computing core group does not match the target computing resource size, determine at least one fourth computing core group from at least one third computing core group in an idle state, and take the at least one second computing core group and the at least one fourth computing core group as the at least one first computing core group; the sum of computing resource sizes of the at least one second computing core group and the at least one fourth computing core group matches the target computing resource size.

[0169] In some embodiments, the creating part 620 can be specifically configured to: in a case where the association relationship is that all virtual function resources share all computing core groups, create the target virtual graphics processor device based on the target number of target virtual function resources.

[0170] In some embodiments, the creating part 620 can be specifically configured to: select one virtual function resource from the target number of target virtual function resources as a master virtual function resource, and select other virtual function resources except the master virtual function resource as slave virtual function resources; and create the target virtual graphics processor device based on the master virtual function resource and the slave virtual function resources.

[0171] In some embodiments, the creating part 620 can be specifically configured to: integrate a target resource of the master virtual function resource and a video memory resource of the slave virtual function resource to obtain the target virtual graphics processor device; wherein the target resource includes at least one of a register, configuration information, a computing resource, and a video memory resource.

[0172] In some embodiments, the creating part 620 can be specifically configured to: pass through the target virtual graphics processor device to the target virtual machine through a pass-through component, so as to run a program of the target virtual machine based on the target virtual graphics processor device.

[0173] In some embodiments, the determining part 610 can be specifically configured to: determine a resource description of each first virtual function resource; the resource description includes at least one of a location, a use case, a control case, and a connection case of each first virtual function resource; and describe each virtual function resource in the virtual function resource pool according to the resource description of each virtual function resource.

[0174] The description of the above device embodiments is similar to the description of the above method embodiments, and has similar beneficial effects as the method embodiments. In some embodiments, the device provided by the embodiments of the present disclosure has functions or includes modules that can be used to perform the methods described in the above method embodiments. For technical details not disclosed in the device embodiments of the present disclosure, please refer to the description of the method embodiments of the present disclosure for understanding.

[0175] It should be noted that, in the embodiments of the present disclosure, if the virtual resource allocation method described above is implemented in the form of a software function module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. Based on this understanding, the technical solutions of the embodiments of the present disclosure can be embodied in the form of a software product, which is stored in a storage medium and includes a number of instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the methods described in the embodiments of the present disclosure. The aforementioned storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a magnetic disk or an optical disk, and various media that can store program codes. Thus, the embodiments of the present disclosure are not limited to any particular hardware, software or firmware, or any combination of hardware, software and firmware.

[0176] The embodiments of the present disclosure provide a computer device, which includes a memory and a processor, the memory stores a computer program executable on the processor, and the processor implements part or all of the steps of the above method when executing the program.

[0177] The embodiments of the present disclosure provide a computer-readable storage medium, which stores a computer program, and the computer program is executed by a processor to implement part or all of the steps of the above method. The computer-readable storage medium can be transitory or non-transitory.

[0178] The embodiments of the present disclosure provide a computer program, which includes computer-readable code, and when the computer-readable code is executed in a computer device, a processor in the computer device executes part or all of the steps of the above method.

[0179] The embodiment of the present disclosure provides a computer program product, which comprises a non-transitory computer-readable storage medium storing a computer program. When the computer program is read and executed by a computer, part or all of the steps of the above method are implemented. The computer program product can be implemented by hardware, software or a combination thereof. In some embodiments, the computer program product is embodied as a computer storage medium. In other embodiments, the computer program product is embodied as a software product, such as a software development kit (SDK) and the like.

[0180] It should be noted that the above description of various embodiments tends to emphasize the differences between various embodiments, and the same or similar parts can be referred to each other. The above description of the device, storage medium, computer program and computer program product embodiments is similar to the description of the method embodiments, and has similar beneficial effects as the method embodiments. For technical details not disclosed in the device, storage medium, computer program and computer program product embodiments of the present disclosure, please refer to the description of the method embodiments of the present disclosure.

[0181] It should be noted that FIG. 7 is a schematic diagram of a hardware entity of a computer device in an embodiment of the present disclosure. As shown in FIG. 7, the hardware entity of the computer device 700 includes a processor 701, a communication interface 702 and a memory 703, wherein:

[0182] The processor 701 generally controls the overall operation of the computer device 700.

[0183] The communication interface 702 can enable the computer device to communicate with other terminals or servers through a network.

[0184] The memory 703 is configured to store instructions and applications executable by the processor 701, and can also cache data to be processed by the processor 701 and modules in the computer device 700 (for example, image data, audio data, voice communication data and video communication data) that have been processed or are to be processed. It can be implemented by FLASH or Random Access Memory (RAM). The processor 701, the communication interface 702 and the memory 703 can transmit data through the bus 704.

[0185] It should be understood that every feature, structure, or characteristic described above in relation to one or more embodiments is included in at least one embodiment of the present disclosure. Therefore, the appearances of "in one embodiment" or "in an embodiment" at various places in the specification do not necessarily refer to the same embodiment. Furthermore, various features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. It should be understood that the sequence of the steps / processes described above in various embodiments of the present disclosure does not mean the order of execution, and the order of execution of the steps / processes should be determined according to their functions and inherent logic, and should not constitute any limitation on the implementation process of the embodiments of the present disclosure. The sequence numbers of the above embodiments of the present disclosure are only for description, and do not represent the advantages or disadvantages of the embodiments.

[0186] It should be noted that the terms "comprising", "including", or any other variant thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements recited, but can also include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without more limitations, an element defined by the phrase "comprising a" does not exclude the existence of additional identical elements in the process, method, article, or apparatus that includes the element.

[0187] In several embodiments provided by the present disclosure, it should be understood that the disclosed devices and methods can be implemented in other ways. The above-described device embodiments are only illustrative, for example, the division of the units is only a logical function division, and actual implementation can have another division manner, such as: multiple units or components can be combined, or can be integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the various components shown or discussed can be through some interface, indirect coupling or communication connection between devices or units, which can be electrical, mechanical or other forms.

[0188] The units described above as separate components can or can not be physically separate, and the components shown as units can or can not be physical units; they can be located in one place or distributed on multiple network units; and some or all of the units can be selected according to actual needs to achieve the purpose of the embodiment.

[0189] In addition, each functional unit in each embodiment of the present disclosure can be integrated into one processing unit, or each unit can be a separate unit, or two or more units can be integrated into one unit; the integrated unit can be realized in the form of hardware or hardware plus software functional unit.

[0190] Those skilled in the art can understand that all or part of the steps of the above-mentioned method embodiments can be completed by program instruction related hardware, and the foregoing program can be stored in a computer readable storage medium, and the program performs the steps of the above-mentioned method embodiments when executed; and the foregoing storage medium includes: a mobile storage device, a read only memory (ROM), a magnetic disc or an optical disc and various storage program codes.

[0191] Alternatively, the integrated units of the present disclosure can be stored in a computer readable storage medium if they are implemented in the form of software function modules and sold or used as independent products. Based on such understanding, the technical solutions of the present disclosure can be embodied in the form of a software product, and the computer software product is stored in a storage medium, and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the methods described in the various embodiments of the present disclosure. The foregoing storage medium includes: a mobile storage device, a ROM, a magnetic disc or an optical disc and various storage program codes.

[0192] The above is only an embodiment of the present disclosure, but the protection scope of the present disclosure is not limited thereto, and any person skilled in the art can easily think of changes or replacements within the technical range disclosed in the present disclosure, which should be covered within the protection scope of the present disclosure. Industrial applicability

[0193] The embodiment of the present disclosure provides a virtual resource allocation method and device, computer equipment, computer readable storage medium and computer program product, wherein the image processing method comprises: in response to a virtual resource creation request, determining a target number of target virtual function resources meeting the virtual resource creation request from a virtual function resource pool; the virtual function resources in the virtual function resource pool are located on a graphics card supporting a single root input / output virtualization technology; creating a target virtual graphics processor device based on the target number of target virtual function resources, and running a target virtual machine based on the target virtual graphics processor device. The above-mentioned scheme can meet the various needs of different virtual machines for the video memory resources provided by the VF, and the entire process can be completed without stopping the running of all virtual machines and restarting the server.

Claims

1. A virtual resource allocation method, comprising: determining, in response to a virtual resource creation request, a target number of target virtual function resources from a virtual function resource pool that satisfy the virtual resource creation request; the virtual function resources in the virtual function resource pool are located on a graphics card supporting a single root input / output virtualization technology; creating a target virtual graphics processor device based on the target number of target virtual function resources, and running a target virtual machine based on the target virtual graphics processor device. 2.The virtual resource allocation method of claim 1, further comprising: determining virtual function resource information of the graphics card supporting the single root input / output virtualization technology; constructing the virtual function resource pool based on the virtual function resource information. 3.The virtual resource allocation method of claim 2, wherein the virtual function resource information corresponds to at least one first virtual function resource, and the virtual function resource pool comprises a used resource pool and a free resource pool; and the constructing the virtual function resource pool based on the virtual function resource information comprises: dividing each first virtual function resource into a first virtual function resource set that has been used and a second virtual function resource set that has not been used based on a usage of each first virtual function resource; determining the used resource pool and the free resource pool based on the first virtual function resource set and the second virtual function resource set; a virtual function resource in the first virtual function resource set is marked as having been used, and a virtual function resource in the second virtual function resource set is marked as not having been used. 4.The virtual resource allocation method of claim 3, wherein the determining the used resource pool and the free resource pool based on the first virtual function resource set and the second virtual function resource set comprises: marking each virtual function resource in the first virtual function resource set as a first identifier; the first identifier represents that the corresponding virtual function resource has been used; marking each virtual function resource in the second virtual function resource set as a second identifier; the second identifier represents that the corresponding virtual function resource has not been used; taking the marked first virtual function resource set as the used resource pool; taking the marked second virtual function resource set as the free resource pool. 5.The virtual resource allocation method of any one of claims 1 to 4, wherein the virtual function resource pool comprises a free resource pool, and the virtual resource creation request comprises a target graphics memory resource size; and the determining, from the virtual function resource pool, the target number of target virtual function resources that satisfy the virtual resource creation request comprises: determining a graphics memory resource size of a single virtual function resource; determining a target number based on the graphics memory resource size of the single virtual function resource and the target graphics memory resource size; determining, from the free resource pool, the target number of virtual function resources as the target number of target virtual function resources; a sum of sizes of the target number of target virtual function resources matches the target graphics memory resource size. ​ ​ ​ 6. The virtual resource allocation method according to any one of claims 1 to 5, wherein the creating a target virtual graphics processor device based on the target number of target virtual function resources comprises: determining an association between virtual function resources and compute core groups; and creating the target virtual graphics processor device based on the association and the target number of target virtual function resources.

7. The virtual resource allocation method according to claim 6, wherein the virtual resource creation request comprises a target compute resource size; and the creating the target virtual graphics processor device based on the association and the target number of target virtual function resources comprises: in a case where the association is that different virtual function resources are connected to different compute core groups, determining at least one first compute core group that matches the target compute resource size; and creating the target virtual graphics processor device based on the target number of target virtual function resources and the at least one first compute core group.

8. The virtual resource allocation method according to claim 7, wherein the determining at least one first compute core group that matches the target compute resource size comprises: determining a sum of compute resource sizes of at least one second compute core group corresponding to the target number of target virtual function resources; in a case where the sum of compute resource sizes of the at least one second compute core group matches the target compute resource size, taking the at least one second compute core group as the at least one first compute core group; and in a case where the sum of compute resource sizes of the at least one second compute core group does not match the target compute resource size, determining at least one fourth compute core group from at least one third compute core group that is idle, and taking the at least one second compute core group and the at least one fourth compute core group as the at least one first compute core group; a sum of compute resource sizes of the at least one second compute core group and the at least one fourth compute core group matches the target compute resource size.

9. The virtual resource allocation method according to claim 6, wherein the creating the target virtual graphics processor device based on the association and the target number of target virtual function resources comprises: in a case where the association is that all virtual function resources share all compute core groups, creating the target virtual graphics processor device based on the target number of target virtual function resources.

10. The virtual resource allocation method according to any one of claims 1 to 9, wherein the creating the target virtual graphics processor device based on the target number of target virtual function resources comprises: selecting one virtual function resource from the target number of target virtual function resources as a master virtual function resource, and selecting other virtual function resources except the master virtual function resource as slave virtual function resources; and creating the target virtual graphics processor device based on the master virtual function resource and the slave virtual function resources.

11. The virtual resource allocation method of claim 10, wherein the creating the target virtual graphics processor device based on the master virtual function resources and the slave virtual function resources comprises: integrating target resources of the master virtual function resources and memory resources of the slave virtual function resources to obtain the target virtual graphics processor device; wherein the target resources comprise at least one of registers, configuration information, computing resources, and memory resources.

12. The virtual resource allocation method of any one of claims 1 to 11, wherein the running the target virtual machine based on the target virtual graphics processor device comprises: passing through the target virtual graphics processor device to the target virtual machine through a pass-through component to run a program of the target virtual machine based on the target virtual graphics processor device.

13. The virtual resource allocation method of claim 3 or 4, further comprising: determining resource descriptions of the each first virtual function resource; the resource descriptions comprising at least one of locations, usage, control, and connection of the each first virtual function resource; describing each virtual function resource in the virtual function resource pool according to the resource descriptions of the each virtual function resource.

14. A virtual resource allocation apparatus, comprising: a determining part configured to determine a target number of target virtual function resources satisfying a virtual resource creation request from a virtual function resource pool in response to the virtual resource creation request; the virtual function resources in the virtual function resource pool being located on a single root input / output virtualization technology supported graphics card; a creating part configured to create a target virtual graphics processor device based on the target number of target virtual function resources, and run a target virtual machine based on the target virtual graphics processor device.

15. A computer device, comprising a memory and a processor, the memory storing a computer program capable of being run on the processor, and the processor implementing steps of the method of any one of claims 1 to 13 when executing the program.

16. A computer readable storage medium having stored thereon a computer program, the computer program implementing steps of the method of any one of claims 1 to 13 when executed by a processor.

17. A computer program product, comprising a non-transitory computer readable storage medium storing a computer program, the computer program being read and executed by a computer to implement steps of the method of any one of claims 1 to 13.

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