Display device for protecting component with surge input voltage and control method thereof

Abstract

A display device is disclosed. The display device includes a power supply and a display. The power supply includes: a first line filter connected to an external alternating current (AC) power source and including a first common mode choke and a first capacitor connected in parallel to the first common mode choke; a second line filter connected to the first line filter and including a second common mode choke and a second capacitor connected in parallel to the second common mode choke; a third capacitor having one end connected to a neutral of the first capacitor and the other end connected to a frame ground; an AC / DC block connected to the second line filter; a fourth capacitor having one end connected to a neutral of the second capacitor and the other end connected to the frame ground; and a DC / DC block connected to the AC / DC block and configured to provide driving power to the display connected to the power supply.

Description

Display device protecting elements from surge-type input voltage and control method thereof

[0001] The present invention relates to a display device and a control method thereof, and more particularly, to a display device and a control method thereof that protect elements from a surge-type input voltage.

[0002] If a surge-type overvoltage with a large deviation is applied to a power supply designed assuming a commercial power input, there is a problem in that the components of the power supply are damaged or overloaded.

[0003] In the past, power supplies were additionally equipped with various types of surge protection circuits, such as varistors, but when surge-type overvoltage entered the power supply with a large deviation and high frequency due to various reasons, such as lightning, there was a problem that it exceeded the limits of the surge protection circuit and resulted in damage to the components.

[0004] There has been a need for a power supply that protects components from surge-type overvoltages that enter the ground of the power supply for various reasons and blocks overvoltages from entering the circuit downstream (e.g., loads, etc.) without significantly increasing the capacity of the capacitors to protect the components from surges and without providing additional surge protection circuits.

[0005] A display device according to an embodiment of the present disclosure includes a power supply unit and a display, wherein the power supply unit is connected to an external AC power source and includes a first line filter including a first common mode choke and a first capacitor connected in parallel to the first common mode choke, a second line filter connected to the first line filter and including a second common mode choke and a second capacitor connected in parallel to the second common mode choke, a third capacitor having one end connected to the neutral of the first capacitor and the other end connected to the frame ground, an AC / DC block connected to the second line filter, a fourth capacitor having one end connected to the neutral of the second capacitor and the other end connected to the frame ground, and a DC / DC block connected to the AC / DC block to provide driving power to the display connected to the power supply unit, and the first line filter, the second line filter, the third capacitor, and the fourth capacitor are mounted on a PCB (Printed Circuit Board) of the power supply unit. A first PCB pattern connecting the neutral of the first capacitor and the one end of the third capacitor, and a second PCB pattern connecting the neutral of the second capacitor and the one end of the fourth capacitor are spaced apart from each other at a preset interval, and an input voltage in the form of a surge is input to the third capacitor through the frame ground to which the third capacitor is connected, thereby generating a potential difference in the second line filter between the third capacitor and the fourth capacitor, and the potential difference generated in the second line filter by the input voltage in the form of a surge is discharged by generating an arc at a discharge point on the first PCB pattern and a discharge point on the second PCB pattern, and the magnitude of the input voltage in the form of a surge for generating the arc at the discharge point is proportional to the preset interval.

[0006] In addition, as the preset interval increases, the magnitude of the input voltage in the form of the surge for causing the arc at the discharge point on the first PCB pattern and the discharge point on the second PCB pattern also increases, and as the preset interval decreases, the magnitude of the input voltage in the form of the surge for causing the arc at the discharge point on the first PCB pattern and the discharge point on the second PCB pattern also may decrease.

[0007] In addition, the discharge points of each of the first PCB pattern corresponding to the third capacitor and the second PCB pattern corresponding to the fourth capacitor may include lead on the surface, and the discharge points on the first PCB pattern and the discharge points on the second PCB pattern may be spaced apart from each other by the preset interval.

[0008] Additionally, the first PCB pattern may include a plurality of discharge points, and the second PCB pattern may include a plurality of discharge points corresponding to each of the plurality of discharge points on the first PCB pattern.

[0009] In addition, a fifth capacitor having one end connected to the live of the first capacitor and the other end connected to the frame ground, a sixth capacitor having one end connected to the live of the second capacitor and the other end connected to the frame ground, and a third PCB pattern connecting the live of the first capacitor and the one end of the fifth capacitor on the PCB, and a fourth PCB pattern connecting the neutral of the second capacitor and the one end of the sixth capacitor are spaced apart from each other at the predetermined interval, and the input voltage in the form of a surge is input to the fifth capacitor through the frame ground to which the fifth capacitor is connected, thereby generating a potential difference in the second line filter between the fifth capacitor and the sixth capacitor, and the potential difference generated in the second line filter by the input voltage in the form of a surge is discharged by causing an arc at a discharge point on the third PCB pattern and a discharge point on the fourth PCB pattern, and the magnitude of the input voltage in the form of a surge for generating the arc at the discharge point is, It can be proportional to the preset interval.

[0010] In addition, as the preset interval increases, the magnitude of the input voltage in the form of the surge for causing the arc at the discharge point on the third PCB pattern and the discharge point on the fourth PCB pattern also increases, and as the preset interval decreases, the magnitude of the input voltage in the form of the surge for causing the arc at the discharge point on the third PCB pattern and the discharge point on the fourth PCB pattern also may decrease.

[0011] In addition, the discharge points of each of the third PCB pattern corresponding to the fifth capacitor and the fourth PCB pattern corresponding to the sixth capacitor include lead on the surface, and the discharge points on the third PCB pattern and the discharge points on the fourth PCB pattern can be arranged adjacent to each other.

[0012] In addition, on the PCB, the first PCB pattern and the second PCB pattern may be spaced apart from each other by a preset first interval, and the third PCB pattern and the fourth PCB pattern may be spaced apart from each other by a preset second interval.

[0013] Additionally, each of the first capacitor included in the first line filter and the second capacitor included in the second line filter can remove differential mode noise of AC power input through the external AC power.

[0014] Additionally, each of the third capacitor and the fourth capacitor can remove differential mode noise of AC power input through the external AC power.

[0015] According to an embodiment of the present disclosure, a method for controlling a display device, which includes a first line filter connected to an external AC power source and including a first common mode choke and a first capacitor connected in parallel to the first common mode choke, a second line filter connected to the first line filter and including a second common mode choke and a second capacitor connected in parallel to the second common mode choke, a third capacitor having one end connected to the neutral of the first capacitor and the other end connected to the frame ground, an AC / DC block connected to the second line filter, and a fourth capacitor having one end connected to the neutral of the second capacitor and the other end connected to the frame ground, comprises: a first PCB pattern connecting the neutral of the first capacitor and the one end of the third capacitor on a PCB (Printed Circuit Board) of the power supply unit on which the first line filter, the second line filter, the third capacitor, and the fourth capacitor are mounted; and a second PCB pattern connecting the neutral of the second capacitor and the fourth capacitor. A step of arranging a second PCB pattern connecting the first end of the capacitor at a predetermined interval, a step of inputting a surge-type input voltage to the third capacitor through the frame ground to which the third capacitor is connected, thereby generating a potential difference in the second line filter between the third capacitor and the fourth capacitor, and a step of causing an arc to discharge the potential difference generated in the second line filter by the surge-type input voltage using a discharge point on the first PCB pattern and a discharge point on the second PCB pattern, wherein the magnitude of the input voltage in the surge form for causing the arc at the discharge point is proportional to the predetermined interval.

[0016] In addition, as the preset interval increases, the magnitude of the input voltage in the form of the surge for causing the arc at the discharge point on the first PCB pattern and the discharge point on the second PCB pattern may also increase, and as the preset interval decreases, the magnitude of the input voltage in the form of the surge for causing the arc at the discharge point on the first PCB pattern and the discharge point on the second PCB pattern may also decrease.

[0017] In addition, the discharge points of each of the first PCB pattern corresponding to the third capacitor and the second PCB pattern corresponding to the fourth capacitor may include lead on the surface, and the discharge points on the first PCB pattern and the discharge points on the second PCB pattern may be spaced apart from each other by the preset interval.

[0018] Additionally, the first PCB pattern may include a plurality of discharge points, and the second PCB pattern may include a plurality of discharge points corresponding to each of the plurality of discharge points on the first PCB pattern.

[0019] In addition, the display device further includes a fifth capacitor having one end connected to the live of the first capacitor and the other end connected to the frame ground, and a sixth capacitor having one end connected to the live of the second capacitor and the other end connected to the frame ground, and the control method further includes a step of arranging a third PCB pattern connecting the live of the first capacitor and the one end of the fifth capacitor on the PCB, and a fourth PCB pattern connecting the neutral of the second capacitor and the one end of the sixth capacitor, with the predetermined interval, a step of inputting the input voltage in the form of a surge to the fifth capacitor through the frame ground to which the fifth capacitor is connected, thereby generating a potential difference in the second line filter between the fifth capacitor and the sixth capacitor, and a step of causing an arc to discharge the potential difference generated in the second line filter by the input voltage in the form of a surge at a discharge point on the third PCB pattern and a discharge point on the fourth PCB pattern, and the step of causing the arc at the discharge point The magnitude of the input voltage in the form of a surge may be proportional to the preset interval.

[0020] In addition, as the preset interval increases, the magnitude of the input voltage in the form of the surge for causing the arc at the discharge point on the third PCB pattern and the discharge point on the fourth PCB pattern also increases, and as the preset interval decreases, the magnitude of the input voltage in the form of the surge for causing the arc at the discharge point on the third PCB pattern and the discharge point on the fourth PCB pattern also may decrease.

[0021] In addition, the discharge points of each of the third PCB pattern corresponding to the fifth capacitor and the fourth PCB pattern corresponding to the sixth capacitor include lead on the surface, and the discharge points on the third PCB pattern and the discharge points on the fourth PCB pattern can be arranged adjacent to each other.

[0022] In addition, on the PCB, the first PCB pattern and the second PCB pattern may be spaced apart from each other by a preset first interval, and the third PCB pattern and the fourth PCB pattern may be spaced apart from each other by a preset second interval.

[0023] In addition, the control method may further include a step of removing differential mode noise of AC power input through the external AC power through each of the first capacitor included in the first line filter and the second capacitor included in the second line filter.

[0024] In addition, the control method may further include a step of removing differential mode noise of AC power input through the external AC power through each of the third capacitor and the fourth capacitor.

[0025] FIG. 1 is a drawing for explaining a display device according to an embodiment of the present disclosure.

[0026] FIG. 2 is a graph for explaining the shape of an input surge according to an embodiment of the present disclosure.

[0027] Figure 3 is a drawing for explaining the flow of input surge according to a conventional display device.

[0028] FIG. 4 is a drawing for explaining a first PCB pattern corresponding to a third capacitor and a second PCB pattern corresponding to a fourth capacitor according to an embodiment of the present disclosure.

[0029] FIG. 5 is a drawing for explaining a PCB provided in a display device according to an embodiment of the present disclosure.

[0030] Figure 6 is a drawing for explaining the flow of input surge according to a conventional display device.

[0031] FIG. 7 is a drawing for explaining a third PCB pattern corresponding to a fifth capacitor and a fourth PCB pattern corresponding to a sixth capacitor according to an embodiment of the present disclosure.

[0032] FIG. 8 is a flowchart for explaining a method for controlling a display device according to an embodiment of the present disclosure.

[0033] Hereinafter, the present disclosure will be described in detail with reference to the attached drawings.

[0034] The terms used in the embodiments of this disclosure have been selected from widely used, current terms, taking into account the functions of this disclosure. However, these terms may vary depending on the intentions of those skilled in the art, precedents, the emergence of new technologies, etc. Furthermore, in certain cases, terms may be arbitrarily selected by the applicant, and in such cases, their meanings will be described in detail in the description of the relevant disclosure. Therefore, the terms used in this disclosure should not be defined simply as names of terms, but rather based on the meanings of the terms and the overall content of this disclosure.

[0035] In this specification, expressions such as “has,” “can have,” “includes,” or “may include” indicate the presence of a feature (e.g., a number, function, operation, or component such as a part), and do not exclude the presence of additional features.

[0036] The expression "at least one of A and / or B" should be understood to mean either "A" or "B" or "A and B".

[0037] As used herein, the expressions “first,” “second,” “first,” or “second,” etc., may describe various components, regardless of order and / or importance, and are only used to distinguish one component from another, but do not limit the components.

[0038] When it is said that a component (e.g., a first component) is “(operatively or communicatively) coupled with / to” or “connected to” another component (e.g., a second component), it should be understood that the component may be directly coupled to the other component, or may be connected through another component (e.g., a third component).

[0039] Singular expressions include plural expressions unless the context clearly dictates otherwise. In this application, terms such as "comprise" or "consist of" are intended to indicate the presence of a feature, number, step, operation, component, part, or combination thereof described in the specification, but should be understood not to preclude the presence or addition of one or more other features, numbers, steps, operations, components, parts, or combinations thereof.

[0040] In the present disclosure, a "module" or "part" performs at least one function or operation and may be implemented as hardware or software, or as a combination of hardware and software. Furthermore, multiple "modules" or multiple "parts" may be integrated into at least one module and implemented as at least one processor (not shown), excluding any "modules" or "parts" that need to be implemented as specific hardware.

[0041] In this specification, the term user may refer to a person using an electronic device or a device using an electronic device (e.g., an artificial intelligence electronic device).

[0042] An embodiment of the present disclosure will be described in more detail with reference to the attached drawings below.

[0043] FIG. 1 is a drawing for explaining a display device according to an embodiment of the present disclosure.

[0044] Referring to FIG. 1, the display device (100) may include a power supply. Depending on the embodiment, the power supply may be a component of the display device (100) or may be a power supply device connected to the display device (100) and supplying power to the display device (100).

[0045] According to an embodiment, the power supply unit is connected to a power outlet that provides commercial voltage (e.g., 90 to 264 V) and can convert AC power into DC power to stably supply power to the internal load (e.g., LED, LED driver, etc.) of the display device (100).

[0046] According to an embodiment, the power supply unit may be implemented as a switched mode power supply (SMPS). An SMPS is a DC stabilized power supply that stabilizes output by controlling the on-off time ratio of a semiconductor switch element, and has the characteristics of high efficiency, small size, and light weight.

[0047] According to an embodiment, the power supply unit may include an electromagnetic interference (EMI) filter unit, an AC-DC rectifier unit, a DC-DC switching converter unit, an output filter, and an output unit.

[0048] According to an embodiment, the EMI filter unit can remove electrical noise from a commercial power source.

[0049] According to an embodiment, the EMI filter unit may include a first line filter that is connected to an external AC power source (i.e., a power outlet) through live and neutral, and includes a first common mode choke and a first capacitor (X1) connected in parallel to the first common mode choke. For example,

[0050] According to an embodiment, the EMI filter unit may include a second line filter connected to the first line filter and including a second common mode choke and a second capacitor (X2) connected in parallel to the second common mode choke.

[0051] According to an embodiment, each of the first line filter and the second line filter may be positioned at an input terminal of the display device (100) to filter noise from a power line.

[0052] According to an embodiment, each of the first common mode choke included in the first line filter and the second common mode choke included in the second line filter may be attached to a PCB in the form of two inductors wound around a single core. Each of the first common mode choke and the second common mode choke may filter common mode noise. For example, each of the first common mode choke and the second common mode choke may remove noise that occurs equally in the live and neutral of a power line.

[0053] According to an embodiment, each of the first capacitor (X1) included in the first line filter and the second capacitor (X2) included in the second line filter can filter differential mode noise (or normal mode noise).

[0054] According to an embodiment, the power supply unit may include a third capacitor (Y1) disposed between the first line filter and the second line filter, one end of which is connected to the neutral and the other end is connected to the frame ground (FG) (or ground ground (GND)). For example, one end of the third capacitor (Y1) may be connected to the neutral of the first capacitor (X1), and the other end may be connected to the frame ground.

[0055] According to an embodiment, the power supply unit may include an AC / DC block (AC-DC rectifier) ​​connected to a second line filter, and may include a fourth capacitor (Y3) disposed between the second line filter and the AC / DC block, one end of which is connected to the neutral and the other end of which is connected to the frame ground. For example, one end of the fourth capacitor (Y3) may be connected to the neutral of the second capacitor (X2), and the other end of which may be connected to the frame ground.

[0056] According to an embodiment, the third capacitor (Y1) and the fourth capacitor (Y3) can remove differential mode noise.

[0057] According to an embodiment, the EMI filter unit may include a varistor. For example, the varistor may protect the circuit, i.e., the power supply unit, from overvoltage.

[0058] In some embodiments, a varistor may change to a high resistance value when a low voltage is applied, and may change to a low resistance value when a preset voltage (or, an allowable voltage) or higher is applied. In some embodiments, a varistor may also be called a surge protector, but for the sake of convenience of explanation, it will be referred to as a varistor in the following.

[0059] According to an embodiment, a varistor can protect a circuit equipped in a power supply by absorbing high current when a surge voltage is applied to the circuit. However, the current that the varistor can withstand is limited, and its ability to protect the circuit from surge-type overvoltage, such as lightning strikes, is limited.

[0060] FIG. 2 is a graph for explaining the shape of an input surge according to an embodiment of the present disclosure.

[0061] Referring to Figure 2, overvoltage in the form of lightning or surge greatly exceeds the AC commercial voltage, and when lightning or surge occurs, overvoltage is momentarily applied to the circuit (e.g., voltage spike), which causes a problem in that the circuit is damaged or the components on the circuit are damaged.

[0062] A power supply unit according to the present disclosure is designed such that a pattern (or path) on a PCB (Printed Circuit Board) provided in the power supply unit blocks surge-type overvoltage or does not pass through an electromagnetic interference (EMI) filter unit, and when surge-type overvoltage is input, the pattern on the PCB can prevent the overvoltage (or surge component) from flowing into the rear end of the circuit.

[0063] Figure 3 is a drawing for explaining the flow of input surge according to a conventional power supply unit.

[0064] Referring to FIG. 3, conventionally, there is a problem that overvoltage occurring on the line of the power supply, especially, overvoltage in the form of lightning or surge that flows into the frame ground (FG) (or ground ground (GND)), causes a potential difference across both ends of the second line filter (e.g., both ends of the second common mode choke). The potential difference that occurs momentarily due to the surge-type overvoltage has a problem of damaging the components in the circuit.

[0065] FIG. 4 is a drawing for explaining a first PCB pattern corresponding to a third capacitor (Y1) and a second PCB pattern corresponding to a fourth capacitor (Y3) according to an embodiment of the present disclosure.

[0066] Referring to FIG. 4, when a line (pattern on the PCB) connecting one end of the third capacitor (Y1) and the neutral and a line (pattern on the PCB) connecting one end of the fourth capacitor (Y3) and the neutral are placed adjacent to each other, an overvoltage in the form of a surge flows into the frame ground (FG), and a potential difference generated at both ends of the second line filter can be discharged on the pattern on the PCB.

[0067] For example, when designing a pattern (or path) on a PCB, if a first PCB pattern connecting one end of a third capacitor (Y1) and neutral and a second PCB pattern connecting one end of a fourth capacitor (Y3) and neutral are designed to be adjacent to each other, a potential difference that occurs momentarily at both ends of the second line filter can discharge by generating an arc on the first PCB pattern and the second PCB pattern.

[0068] FIG. 5 is a drawing for explaining a PCB provided in a display device according to an embodiment of the present disclosure.

[0069] According to an embodiment, the circuit diagram illustrated in FIG. 4 includes electronic circuit information, which is an image that displays circuit design information in a specific view, and may also be called a schematic, electrical drawing, electronic drawing, product design information, circuit design information, etc., but for the convenience of explanation, it is collectively referred to as a circuit diagram hereinafter.

[0070] For example, the circuit diagram may represent each of a plurality of circuit elements for performing a function of the display device (100) with a corresponding display symbol, and may represent a connection relationship between the plurality of circuit elements (or connection information between the plurality of circuit elements).

[0071] Meanwhile, the circuit diagram does not indicate the actual location (or actual arrangement) of each of the plurality of circuit elements (e.g., the first line filter, the second line filter, the third capacitor (Y1), and the fourth capacitor (Y3), etc.), and in order to indicate the actual location of each of the plurality of circuit elements, the location for arranging each of the plurality of circuit elements on the PCB (Printed Circuit Board) must be determined based on the circuit diagram.

[0072] Fig. 5 is a drawing showing the actual location of each of a plurality of circuit elements on the PCB, unlike Fig. 4.

[0073] In some embodiments, a PCB is a thin plate onto which electrical elements, such as direct circuits, resistors, or switches, are soldered. For a circuit diagram to be implemented on a PCB, electrical elements must be mounted on the PCB and electrically connected.

[0074] According to the PCB design process, multiple circuit elements to be placed on the PCB are determined based on the circuit diagram, and the multiple circuit elements are placed on the PCB. Next, the wiring between the multiple circuit elements is determined according to the PCB design process. The electrical connection between the mounted elements is made using a PCB pattern. Here, the PCB pattern can electrically connect multiple circuit elements on the PCB. The process of connecting multiple circuit elements using the PCB pattern during the PCB design process is called routing.

[0075] Referring to FIG. 5, the power supply unit includes a PCB on which a first line filter, a second line filter, a third capacitor (Y1), and a fourth capacitor (Y3) are mounted, and the PCB may include a first PCB pattern connecting one end of the third capacitor (Y1) to neutral and a second PCB pattern connecting one end of the fourth capacitor (Y3) to neutral.

[0076] For example, the first PCB pattern may connect the neutral of the first capacitor (X1) and one terminal of the third capacitor (Y1). The other terminal of the third capacitor (Y1) may be connected to the frame ground.

[0077] For example, the second PCB pattern may connect the neutral of the second capacitor (X2) and one terminal of the fourth capacitor (Y3). The other terminal of the fourth capacitor (Y3) may be connected to the frame ground.

[0078] According to an embodiment, a first PCB pattern corresponding to a third capacitor (Y1) and a second PCB pattern corresponding to a fourth capacitor (Y3) may be arranged adjacent to each other. For example, the first PCB pattern and the second PCB pattern may be arranged spaced apart from each other by a preset interval.

[0079] According to an embodiment, an input voltage in the form of a surge may be input to the third capacitor (Y1) through a frame ground connected to the third capacitor (Y1), thereby generating a potential difference in the second line filter between the third capacitor (Y1) and the fourth capacitor (Y3).

[0080] According to an embodiment, a potential difference generated in the second line filter by an input voltage in the form of a surge may cause an arc to be discharged at a discharge point on the first PCB pattern and a discharge point on the second PCB pattern.

[0081] According to an embodiment, each of the first PCB pattern and the second PCB pattern may include at least one discharge point. The surfaces of the discharge points may be soldered, and the discharge points on the first PCB pattern and the discharge points on the second PCB pattern may be arranged adjacent to each other. That is, the discharge points may be attached to a lead.

[0082] According to an embodiment, an input voltage in the form of a surge is input to the third capacitor (Y1) through the frame ground (FG) to which the other end of the third capacitor (Y1) is connected, and a potential difference generated in the second line filter between the third capacitor (Y1) and the fourth capacitor (Y3) may be discharged by generating an arc at at least one discharge point on the first PCB pattern and at least one discharge point on the second PCB pattern. For example, an electric spark due to a high voltage potential difference may be generated at at least one discharge point on the first PCB pattern and at least one discharge point on the second PCB pattern that are adjacent to each other.

[0083] According to an embodiment, a potential difference that occurs momentarily due to surge-type overvoltage does not flow to the rear end of the circuit, but is dissipated as an arc, so that the components in the circuit are not damaged.

[0084] According to an embodiment, the magnitude of the input voltage in the form of a surge for generating an arc at the discharge point may be proportional to the distance between the first PCB pattern and the second PCB pattern, i.e., the preset interval.

[0085] In Fig. 5, for convenience of explanation, it is assumed and illustrated that three discharge points are formed on the first PCB pattern, and three discharge points are formed adjacently on the second PCB pattern to correspond to this. However, this is an example for convenience of explanation and is not limited thereto.

[0086] Even if the number of surge-type overvoltages increases and burnout occurs at one of the multiple discharge points according to the embodiment, the potential difference can cause arc discharge at the remaining discharge points.

[0087] Referring to FIG. 5, according to an embodiment, the first PCB pattern and the second PCB pattern may be arranged adjacently.

[0088] According to an embodiment, the magnitude of the input voltage in the form of a surge to cause an arc at the discharge point may be proportional to a preset interval.

[0089] For example, when the preset interval increases, the magnitude of the input voltage in the form of the surge for causing the arc at the discharge point on the first PCB pattern and the discharge point on the second PCB pattern may also increase, and when the preset interval decreases, the magnitude of the input voltage in the form of the surge for causing the arc at the discharge point on the first PCB pattern and the discharge point on the second PCB pattern may also decrease.

[0090] For example, as the distance between the first PCB pattern and the second PCB pattern increases, the magnitude of the voltage for generating an arc also increases, and as the distance between the first PCB pattern and the second PCB pattern decreases, the magnitude of the voltage for generating an arc also decreases.

[0091] For example, a first PCB pattern and a second PCB pattern may be spaced apart from each other by a first threshold distance or more and adjacent to each other by a second threshold distance or less. For example, a discharge point of a first PCB pattern and a discharge point of a second PCB pattern may be spaced apart enough not to touch each other, but adjacent enough that an arc may occur. Depending on the embodiment, the first threshold distance and the second threshold distance may be variously changed depending on the type of PCB (e.g., single-sided PCB, double-sided PCB, or multi-layer PCB), the thickness of the PCB pattern, the design method (e.g., whether to place circuit elements only on the top side of the PCB or whether to place circuit elements on the top / bottom side (i.e., double side) of the PCB), etc.

[0092] Figure 6 is a drawing for explaining the flow of input surge according to a conventional display device.

[0093] According to an embodiment, the display device (100) may include a fifth capacitor (Y2) disposed between the first line filter and the second line filter, one end of which is connected to the live and the other end of which is connected to the frame ground (FG).

[0094] According to an embodiment, the power supply may be positioned between the second line filter and the AC / DC block and may include a sixth capacitor (Y4) having one end connected to the live and the other end connected to the frame ground.

[0095] According to an embodiment, the fifth capacitor (Y2) and the sixth capacitor (Y4) can remove differential mode noise.

[0096] According to an embodiment, conventionally, there is a problem that an overvoltage occurring on a line of a power supply, especially an overvoltage in the form of lightning or surge that flows into the frame ground (FG) to which the other end of the fifth capacitor (Y2) is connected, causes a potential difference between both ends of the second line filter (e.g., both ends of the second common mode choke) between the fifth capacitor (Y2) and the sixth capacitor (Y4). The potential difference that occurs momentarily due to the overvoltage in the form of surge has a problem that it damages elements in the circuit.

[0097] FIG. 7 is a drawing for explaining a third PCB pattern corresponding to a fifth capacitor (Y2) and a fourth PCB pattern corresponding to a sixth capacitor (Y4) according to an embodiment of the present disclosure.

[0098] According to an embodiment, a third PCB pattern corresponding to a fifth capacitor (Y2) and a fourth PCB pattern corresponding to a sixth capacitor (Y4) on a PCB may be arranged adjacent to each other.

[0099] According to an embodiment, the fifth capacitor (Y2) may have one end connected to the live of the first capacitor (X1) and the other end connected to the frame ground.

[0100] According to an embodiment, the sixth capacitor (Y4) may have one end connected to the live of the second capacitor (X2) and the other end connected to the frame ground.

[0101] For example, if a line (the third PCB pattern on the PCB) connecting one end of the fifth capacitor (Y2) and the live and a line (the fourth PCB pattern on the PCB) connecting one end of the sixth capacitor (Y4) and the live are placed adjacent to each other, an overvoltage in the form of a surge may flow into the frame ground (FG), and a potential difference generated at both ends of the second line filter may be discharged between the third PCB pattern and the fourth PCB pattern on the PCB.

[0102] For example, a third PCB pattern connecting the live of the first capacitor (X1) and one end of the fifth capacitor (Y2) on the PCB, and a fourth PCB pattern connecting the neutral of the second capacitor (X2) and one end of the sixth capacitor (Y4) can be spaced apart from each other at a preset interval.

[0103] For example, when designing a pattern (or path) on a PCB, if a third PCB pattern connecting one end of a fifth capacitor (Y2) and a live and a fourth PCB pattern connecting one end of a sixth capacitor (Y4) and a live are designed to be adjacent to each other, a potential difference that occurs momentarily at both ends of the second line filter can discharge by generating an arc on the third PCB pattern and the fourth PCB pattern.

[0104] For example, if an input voltage in the form of a surge is input to the fifth capacitor through the frame ground to which the fifth capacitor is connected, a potential difference can be generated in the second line filter between the fifth capacitor and the sixth capacitor.

[0105] According to an embodiment, a potential difference generated in the second line filter by an input voltage in the form of a surge may cause an arc to be discharged at a discharge point on the third PCB pattern and a discharge point on the fourth PCB pattern.

[0106] As described for the first PCB pattern and the second PCB pattern, each of the third PCB pattern and the fourth PCB pattern may include at least one discharge point. The surfaces of the discharge points may be soldered, and the discharge points on the third PCB pattern and the discharge points on the fourth PCB pattern may be arranged adjacent to each other.

[0107] According to an embodiment, an input voltage in the form of a surge is input to the fifth capacitor (Y2) through the frame ground (FG) to which the other end of the fifth capacitor (Y2) is connected, and a potential difference generated in the second line filter between the fifth capacitor (Y2) and the sixth capacitor (Y4) may be discharged by generating an arc at at least one discharge point on the third PCB pattern and at least one discharge point on the fourth PCB pattern. For example, an electric spark due to a high voltage potential difference may be generated at at least one discharge point on the third PCB pattern and at least one discharge point on the fourth PCB pattern that are adjacent to each other.

[0108] According to an embodiment, the magnitude of the input voltage in the form of a surge to cause an arc at the discharge point may be proportional to a preset interval.

[0109] For example, as the preset interval increases, the magnitude of the surge-type input voltage for causing an arc at the discharge point on the third PCB pattern and the discharge point on the fourth PCB pattern may also increase, and as the preset interval decreases, the magnitude of the surge-type input voltage for causing an arc at the discharge point on the third PCB pattern and the discharge point on the fourth PCB pattern may also decrease.

[0110] According to an embodiment, the third PCB pattern and the fourth PCB pattern may be spaced apart from each other by a first threshold distance or more and adjacent to each other by a second threshold distance or less. For example, the discharge points of the third PCB pattern and the discharge points of the fourth PCB pattern may be spaced apart from each other so as not to touch each other, but adjacent enough so that an arc may occur.

[0111] According to an embodiment, the display device (100) can prevent an overvoltage (or surge component) in the form of a surge from flowing into the rear end of the circuit by generating an arc at at least one of the discharge points adjacent to each other between the first PCB pattern and the second PCB pattern, or the discharge points adjacent to each other between the third PCB pattern and the fourth PCB pattern, in addition to the varistor, thereby protecting the circuit, and there may be no need to provide a high-capacity varistor to protect the circuit.

[0112] Depending on the embodiment, the spacing between the first PCB pattern and the second PCB pattern and the spacing between the third PCB pattern and the fourth PCB pattern may be the same or different.

[0113] For example, on the PCB, a first PCB pattern and a second PCB pattern may be spaced apart from each other by a preset first interval, and a third PCB pattern and a fourth PCB pattern may be spaced apart from each other by a preset second interval.

[0114] For example, to protect the circuit from a first magnitude input voltage in the form of a surge, the first PCB pattern and the second PCB pattern may be spaced apart from each other by a preset first interval, and to protect the circuit from a second magnitude input voltage in the form of a surge, the third PCB pattern and the fourth PCB pattern may be spaced apart from each other by a preset second interval.

[0115] In an embodiment, if the first size is greater than the second size, the preset first interval may be greater than the preset second interval. In another example, if the first size is smaller than the second size, the preset first interval may be smaller than the preset second interval.

[0116] FIG. 8 is a flowchart for explaining a control method of a power supply device according to an embodiment of the present disclosure.

[0117] A control method of a power supply device, which is connected to an external AC power source according to an embodiment of the present disclosure and includes a first line filter including a first common mode choke and a first capacitor connected in parallel to the first common mode choke, a second line filter connected to the first line filter and including a second common mode choke and a second capacitor connected in parallel to the second common mode choke, a third capacitor arranged between the first line filter and the second line filter, an AC / DC block connected to the second line filter, and a fourth capacitor arranged between the second line filter and the AC / DC block, comprises the steps of: arranging a first PCB pattern corresponding to the third capacitor and a second PCB pattern corresponding to the fourth capacitor adjacent to each other on a PCB (Printed Circuit Board) of the power supply device on which the first line filter, the second line filter, the third capacitor, and the fourth capacitor are mounted; and when an input voltage in the form of a surge is input to the third capacitor through a frame ground to which the third capacitor is connected, a potential difference generated in the second line filter between the third capacitor and the fourth capacitor is measured between a discharge point on the first PCB pattern and a second It includes a step of generating an arc and discharging using a discharge point on a PCB pattern.

[0118] The third capacitor according to the embodiment may have one end connected to neutral and the other end connected to frame ground, and the fourth capacitor may have one end connected to neutral and the other end connected to frame ground.

[0119] The discharge points of each of the first PCB pattern corresponding to the third capacitor and the second PCB pattern corresponding to the fourth capacitor according to the embodiment include lead on the surface, and the discharge points on the first PCB pattern and the discharge points on the second PCB pattern can be arranged adjacent to each other.

[0120] The first PCB pattern according to the embodiment may include a plurality of discharge points, and the second PCB pattern may include a plurality of discharge points corresponding to each of the plurality of discharge points on the first PCB pattern.

[0121] A power supply according to an embodiment further includes a fifth capacitor disposed between a first line filter and a second line filter, one end of which is connected to Live and the other end of which is connected to Frame Ground, and a sixth capacitor disposed between the second line filter and an AC / DC block, one end of which is connected to Live and the other end of which is connected to Frame Ground, and the control method may further include a step of arranging a third PCB pattern corresponding to the fifth capacitor and a fourth PCB pattern corresponding to the sixth capacitor adjacent to each other on a PCB.

[0122] The discharge points of each of the third PCB pattern corresponding to the fifth capacitor and the fourth PCB pattern corresponding to the sixth capacitor according to the embodiment include lead on the surface, and the discharge points on the third PCB pattern and the discharge points on the fourth PCB pattern can be arranged adjacent to each other.

[0123] A control method according to an embodiment may include a step of causing an arc to discharge a potential difference generated in a second line filter between the fifth capacitor and the sixth capacitor by using a discharge point on a third PCB pattern and a discharge point on a fourth PCB pattern when an input voltage in the form of a surge is input to the fifth capacitor through a frame ground to which the fifth capacitor is connected.

[0124] The control method according to the embodiment may further include a step of removing differential mode noise of AC power input through an external AC power source through each of a first capacitor included in a first line filter and a second capacitor included in a second line filter.

[0125] The control method according to the embodiment may further include a step of removing differential mode noise of AC power input through an external AC power source through each of the third capacitor and the fourth capacitor.

[0126] According to an embodiment, a first PCB pattern corresponding to a third capacitor and a second PCB pattern corresponding to a fourth capacitor on a PCB may be spaced apart from each other by a first threshold distance or more and adjacent to each other by a second threshold distance or less.

[0127] However, it goes without saying that the various embodiments of the present disclosure can be applied not only to display devices but also to various types of electronic devices including power supplies.

[0128] Meanwhile, the various embodiments described above may be implemented in a computer-readable recording medium or similar device using software, hardware, or a combination thereof. In some cases, the embodiments described herein may be implemented by the processor itself. In a software implementation, embodiments, such as the procedures and functions described herein, may be implemented as separate software modules. Each of the software modules may perform one or more functions and operations described herein.

[0129] Meanwhile, computer instructions for performing processing operations of a robot device according to various embodiments of the present disclosure described above may be stored in a non-transitory computer-readable medium. When the computer instructions stored in such a non-transitory computer-readable medium are executed by a processor of a specific device, the computer instructions cause the specific device to perform processing operations in an electronic device according to various embodiments described above.

[0130] A non-transitory computer-readable medium refers to a medium that permanently stores data and can be read by a device, rather than a medium that stores data for a short period of time, such as a register, cache, or memory. Specific examples of non-transitory computer-readable media include CDs, DVDs, hard disks, Blu-ray discs, USBs, memory cards, and ROMs.

[0131] Although the preferred embodiments of the present disclosure have been illustrated and described above, the present disclosure is not limited to the specific embodiments described above, and various modifications may be made by a person having ordinary skill in the art to which the present disclosure pertains without departing from the gist of the present disclosure as claimed in the claims, and such modifications should not be understood individually from the technical idea or prospect of the present disclosure.

Claims

1. In the display device, power supply; and including a display; The above power supply unit, A first line filter connected to an external AC power source and including a first common mode choke and a first capacitor connected in parallel with the first common mode choke; A second line filter connected to the first line filter and including a second common mode choke and a second capacitor connected in parallel to the second common mode choke; A third capacitor having one end connected to the neutral of the first capacitor and the other end connected to the frame ground; AC / DC block connected to the second line filter; A fourth capacitor having one end connected to the neutral of the second capacitor and the other end connected to the frame ground; and A DC / DC block connected to the AC / DC block and providing driving power to the display connected to the power supply; A first PCB pattern connecting the neutral of the first capacitor and the one end of the third capacitor on the PCB (Printed Circuit Board) of the power supply unit on which the first line filter, the second line filter, the third capacitor, and the fourth capacitor are mounted, and a second PCB pattern connecting the neutral of the second capacitor and the one end of the fourth capacitor are spaced apart from each other at a preset interval. An input voltage in the form of a surge is input to the third capacitor through the frame ground to which the third capacitor is connected, thereby generating a potential difference in the second line filter between the third capacitor and the fourth capacitor, The potential difference generated in the second line filter by the input voltage in the form of the above surge is An arc is generated and discharged at a discharge point on the first PCB pattern and a discharge point on the second PCB pattern, A display device, wherein the magnitude of the input voltage in the form of the surge for causing the arc at the discharge point is proportional to the preset interval.

2. In paragraph 1, As the above-described preset interval increases, the magnitude of the input voltage in the form of a surge for causing the arc at the discharge point on the first PCB pattern and the discharge point on the second PCB pattern also increases. A display device, wherein when the above-described preset interval decreases, the magnitude of the input voltage in the form of a surge for causing the arc at the discharge point on the first PCB pattern and the discharge point on the second PCB pattern also decreases.

3. In paragraph 1, The discharge points of each of the first PCB pattern corresponding to the third capacitor and the second PCB pattern corresponding to the fourth capacitor include lead on the surface, A display device, wherein the discharge points on the first PCB pattern and the discharge points on the second PCB pattern are spaced apart from each other at the preset interval.

4. In paragraph 2, The above first PCB pattern includes a plurality of discharge points, A display device, wherein the second PCB pattern includes a plurality of discharge points corresponding to each of the plurality of discharge points on the first PCB pattern.

5. In paragraph 1, A fifth capacitor having one end connected to the live of the first capacitor and the other end connected to the frame ground; Further comprising a sixth capacitor, one end of which is connected to the live of the second capacitor and the other end of which is connected to the frame ground; A third PCB pattern connecting the live of the first capacitor and the one end of the fifth capacitor on the PCB, and a fourth PCB pattern connecting the neutral of the second capacitor and the one end of the sixth capacitor are spaced apart from each other at the preset interval, The above input voltage in the form of a surge is, The fifth capacitor is input to the fifth capacitor through the frame ground to which the fifth capacitor is connected, thereby generating a potential difference in the second line filter between the fifth capacitor and the sixth capacitor. The potential difference generated in the second line filter by the input voltage in the form of the above surge is An arc is generated and discharged at the discharge point on the third PCB pattern and the discharge point on the fourth PCB pattern, A display device, wherein the magnitude of the input voltage in the form of the surge for causing the arc at the discharge point is proportional to the preset interval.

6. In paragraph 5, As the above preset interval increases, the magnitude of the input voltage in the form of a surge for causing the arc at the discharge point on the third PCB pattern and the discharge point on the fourth PCB pattern also increases. A display device, wherein when the above-described preset interval decreases, the magnitude of the input voltage in the form of a surge for causing the arc at the discharge point on the third PCB pattern and the discharge point on the fourth PCB pattern also decreases.

7. In paragraph 5, The discharge points of each of the third PCB pattern corresponding to the fifth capacitor and the fourth PCB pattern corresponding to the sixth capacitor include lead on the surface, A display device, wherein the discharge point on the third PCB pattern and the discharge point on the fourth PCB pattern are arranged adjacent to each other.

8. In paragraph 5, A display device, wherein the first PCB pattern and the second PCB pattern are spaced apart from each other by a preset first interval on the PCB, and the third PCB pattern and the fourth PCB pattern are spaced apart from each other by a preset second interval.

9. In paragraph 1, Each of the first capacitor included in the first line filter and the second capacitor included in the second line filter, A display device that removes differential mode noise of AC power input through the external AC power source.

10. In paragraph 1, Each of the third capacitor and the fourth capacitor, A display device that removes differential mode noise of AC power input through the external AC power source.

11. A method for controlling a display device, comprising: a first line filter connected to an external AC power source, including a first common mode choke and a first capacitor connected in parallel to the first common mode choke; a second line filter connected to the first line filter, including a second common mode choke and a second capacitor connected in parallel to the second common mode choke; a third capacitor having one end connected to the neutral of the first capacitor and the other end connected to the frame ground; an AC / DC block connected to the second line filter; and a fourth capacitor having one end connected to the neutral of the second capacitor and the other end connected to the frame ground. A step of arranging a first PCB pattern connecting the neutral of the first capacitor and the one end of the third capacitor, and a second PCB pattern connecting the neutral of the second capacitor and the one end of the fourth capacitor, at a preset interval on a PCB (Printed Circuit Board) of the power supply unit on which the first line filter, the second line filter, the third capacitor, and the fourth capacitor are mounted; A step of inputting a surge-type input voltage to the third capacitor through the frame ground to which the third capacitor is connected, thereby generating a potential difference in the second line filter between the third capacitor and the fourth capacitor; and A step of causing an arc to discharge the potential difference generated in the second line filter by the input voltage in the form of the surge by using a discharge point on the first PCB pattern and a discharge point on the second PCB pattern; A control method wherein the magnitude of the input voltage in the form of a surge for causing the arc at the discharge point is proportional to the preset interval.

12. In paragraph 11, As the above-described preset interval increases, the magnitude of the input voltage in the form of a surge for causing the arc at the discharge point on the first PCB pattern and the discharge point on the second PCB pattern also increases. A control method in which, when the above-mentioned preset interval decreases, the magnitude of the input voltage in the form of a surge for causing the arc at the discharge point on the first PCB pattern and the discharge point on the second PCB pattern also decreases.

13. In paragraph 11, The discharge points of each of the first PCB pattern corresponding to the third capacitor and the second PCB pattern corresponding to the fourth capacitor include lead on the surface, A control method wherein the discharge points on the first PCB pattern and the discharge points on the second PCB pattern are spaced apart from each other at the preset interval.

14. In paragraph 11, The above first PCB pattern includes a plurality of discharge points, A control method, wherein the second PCB pattern includes a plurality of discharge points corresponding to each of the plurality of discharge points on the first PCB pattern.

15. A non-transitory computer-readable storage medium storing computer instructions that cause a display device to perform an operation when executed by a processor of a display device, the display device comprising a first line filter connected to an external AC power source and including a first common mode choke and a first capacitor connected in parallel to the first common mode choke, a second line filter connected to the first line filter and including a second common mode choke and a second capacitor connected in parallel to the second common mode choke, a third capacitor having one end connected to the neutral of the first capacitor and the other end connected to the frame ground, an AC / DC block connected to the second line filter, and a fourth capacitor having one end connected to the neutral of the second capacitor and the other end connected to the frame ground, the operation comprising: A step of arranging a first PCB pattern connecting the neutral of the first capacitor and the one end of the third capacitor, and a second PCB pattern connecting the neutral of the second capacitor and the one end of the fourth capacitor, at a preset interval on a PCB (Printed Circuit Board) of the power supply unit on which the first line filter, the second line filter, the third capacitor, and the fourth capacitor are mounted; A step of inputting a surge-type input voltage to the third capacitor through the frame ground to which the third capacitor is connected, thereby generating a potential difference in the second line filter between the third capacitor and the fourth capacitor; and A step of causing an arc to discharge the potential difference generated in the second line filter by the input voltage in the form of the surge by using a discharge point on the first PCB pattern and a discharge point on the second PCB pattern; A non-transitory computer-readable storage medium, wherein the magnitude of the input voltage in the form of a surge for causing the arc at the discharge point is proportional to the preset interval.

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