Encoding and decoding method and device using generalization of polarization-adjusted convolutional code
By applying an SCL decoding algorithm tailored for PAC codes, the complexity and time issues of existing PAC code decoders are addressed, achieving efficient and fixed-time processing for improved error-correction in communication and broadcasting systems.
Patent Information
- Application Number
- PCT/KR2024/021576
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-07-24
- Filing Date
- 2024-12-31
- Publication Date
- 2026-01-29
AI Technical Summary
Existing decoding algorithms for Polarization-Adjusted-Convolutional (PAC) codes suffer from high arithmetic/implementation complexity and variable processing time, hindering their practical application in communication and broadcasting systems.
Adopt an SCL decoding algorithm tailored for PAC codes, utilizing the SCL decoder used for Polar codes in 5G systems, by identifying parameters related to convolutional and polar codes, and employing parity check matrices for efficient encoding and decoding.
The proposed method reduces complexity and ensures fixed-time processing, enabling effective decoding of PAC codes in various channel conditions, enhancing error-correction performance in communication and broadcasting systems.
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Figure KR2024021576_29012026_PF_FP_ABST
Abstract
Description
Encoding and decoding method and device using generalization of polarization-adjusted convolutional code
[0001] The present disclosure relates to a device and method for correcting errors occurring in wired and wireless channels using a Polarization-Adjusted-Convolutional (PAC) code proposed based on a Polar code in a communication system and a broadcasting system. Specifically, the present disclosure relates to a method for effectively encoding and decoding a PAC code in a communication system and a broadcasting system.
[0002] Looking back at the evolution of wireless communication over successive generations, technologies have primarily been developed for human-facing services such as voice, multimedia, and data. With the commercialization of 5G (5th-generation) communication systems, an explosive increase in connected devices is expected to be connected to communication networks. Examples of networked objects include vehicles, robots, drones, home appliances, displays, smart sensors installed in various infrastructures, construction equipment, and factory equipment. Mobile devices are expected to evolve into diverse form factors, including augmented reality glasses, virtual reality headsets, and holographic devices. In the 6th-generation (6G) era, efforts are being made to develop improved 6G communication systems to connect hundreds of billions of devices and objects and provide diverse services. For this reason, 6G communication systems are often referred to as "Beyond 5G" systems.
[0003] The 6G communication system, expected to be realized around 2030, will have a maximum transmission speed of terabytes per second (i.e., 1,000 gigabits per second) and a wireless latency of 100 microseconds (μsec). In other words, compared to 5G, the transmission speed in a 6G communication system will be 50 times faster, while the wireless latency will be reduced to one-tenth.
[0004] To achieve these high data rates and ultra-low latency, 6G communication systems are being considered for implementation in the terahertz band (e.g., from 95 gigahertz (GHz) to 3 terahertz (THz)). Compared to the millimeter wave (mmWave) band introduced in 5G, the terahertz band is expected to experience more severe path loss and atmospheric absorption, making it more crucial to ensure signal reach, or coverage, in this band. Key technologies to ensure coverage include radio frequency (RF) components, antennas, new waveforms that offer better coverage than orthogonal frequency division multiplexing (OFDM), beamforming, and multiple antenna transmission technologies such as massive multiple-input and multiple-output (MIMO), full-dimensional MIMO (FD-MIMO), array antennas, and large-scale antennas. In addition, new technologies such as metamaterial-based lenses and antennas, high-dimensional spatial multiplexing using orbital angular momentum (OAM), and reconfigurable intelligent surfaces (RIS) are being discussed to improve the coverage of terahertz band signals.
[0005] In addition, in order to improve frequency efficiency and system network, 6G communication systems are developing full duplex technology that utilizes the same frequency resources for uplink and downlink at the same time; network technology that integrates satellites and high-altitude platform stations (HAPS); network structure innovation technology that supports mobile base stations and enables optimization and automation of network operation; dynamic spectrum sharing technology through collision avoidance based on spectrum usage prediction; AI-based communication technology that utilizes artificial intelligence (AI) from the design stage and internalizes end-to-end AI support functions to realize system optimization; and next-generation distributed computing technology that realizes services with complexity that exceeds the limits of terminal computing capabilities by utilizing ultra-high-performance communication and computing resources (mobile edge computing (MEC), cloud, etc.). In addition, efforts are being made to further strengthen connectivity between devices, further optimize networks, promote softwareization of network entities, and increase the openness of wireless communications through the design of new protocols to be used in 6G communication systems, the implementation of hardware-based security environments, the development of mechanisms for the safe use of data, and the development of technologies for maintaining privacy.
[0006] Research and development of these 6G communication systems are expected to enable a new level of hyper-connected experience through the hyper-connectivity of 6G communication systems, which encompass not only connections between things but also connections between people and things. Specifically, 6G communication systems are expected to enable services such as truly immersive extended reality (XR), high-fidelity mobile holograms, and digital replicas. Furthermore, services such as remote surgery, industrial automation, and emergency response, which are provided through 6G communication systems through enhanced security and reliability, will be applied in diverse fields such as industry, medicine, automobiles, and home appliances.
[0007] Typically, when transmitting and receiving data between a transmitter and a receiver in a communication system or broadcasting system, data errors may occur due to noise, interference, etc. existing in the wired / wireless channel. Error detection codes are used to correct errors that occur in the channel at the receiver. The use of these error detection codes is also called channel coding or forward error correction (FEC).
[0008] Representative error-correcting code techniques include convolutional codes, turbo codes, low-density parity-check (LDPC) codes, and polar codes. Among these error-correcting codes, turbo codes, LDPC codes, and polar codes are excellent channel codes that approach or achieve theoretical channel capacity, and are utilized in various communication and broadcasting systems today.
[0009] Polar codes are channel codes that achieve point-to-point channel capacity in binary discrete memoryless channels (B-DMC) by exploiting a phenomenon called channel polarization. The encoding process of Polar codes is defined by a generator matrix that is recursively constructed from a 2×2 polarization kernel. The decoding process of Polar codes is performed using a successive cancellation (SC) method, which is characterized by sequentially estimating the encoded input bits one by one. Since SC decoding has low performance when the length of Polar codes is short, several improved techniques of SC decoding are used in systems that consider practical implementation, among which SC-list (SCL) decoding is the most widely used. The 5G communication standard, 3GPP NR, uses Polar codes to transmit short control information.
[0010] Polarization-Adjusted-Convolutional (PAC) codes, a modified version of Polar codes, are constructed by concatenating convolutional codes as the outer codes of Polar codes. PAC codes exhibit superior error-correction performance than conventional Polar codes, and are known to achieve the AWGN dispersion bound, which is known as a finite-length performance limit, especially in binary additive white Gaussian noise (BI-AWGN) channels.
[0011] This disclosure considers communication and broadcasting systems using PAC codes. PAC codes are channel codes that combine convolutional and polar codes. At the receiver, they are decoded using algorithms tailored to the characteristics of the two codes. A representative example is Fano decoding, a sequential decoding algorithm. While this decoding method achieves excellent error-correction performance, it suffers from the high arithmetic / implementation complexity and time required for decoding. Furthermore, the variable arithmetic / implementation complexity and time required for decoding depending on channel conditions also hinders practical application.
[0012] To overcome the above issues, decoding algorithms that guarantee lower complexity and fixed-time processing have been proposed. Specifically, a method has been proposed to modify the conventional SCL decoding, designed for Polar codes, to enable decoding of PAC codes. However, these conventional methods do not directly utilize the SCL decoding used for Polar codes in 5G systems, but rather modify the fundamental components that are at the heart of the decoding process.
[0013] The challenge addressed in this disclosure is to process PAC codes using an SCL decoding algorithm. When PAC codes are introduced into communication and broadcasting systems, the goal is to utilize the SCL decoder currently used to process Polar codes to decode PAC codes.
[0014] An encoding method performed by a transmitting device of a communication system according to an embodiment of the present disclosure may include the steps of: identifying at least one parameter related to a convolutional code associated with a Polarization-adjusted convolutional (PAC) code; identifying a parity check matrix for an input binary vector of a polar code associated with the PAC code based on the at least one parameter; performing encoding for the polar code based on the parity check matrix; and transmitting a codeword vector generated based on the encoding.
[0015] A decoding method performed by a receiving device of a communication system according to an embodiment of the present disclosure may include the steps of identifying a received symbol vector associated with a codeword vector, identifying at least one parameter associated with a convolutional code associated with a Polarization-adjusted convolutional (PAC) code, identifying a parity check matrix for an input binary vector of a polar code associated with the PAC code based on the at least one parameter, performing decoding on the received symbol vector based on the parity check matrix, and performing an inverse convolution on a bit sequence generated through the decoding.
[0016] A transmitting device of a communication system according to one embodiment of the present disclosure may include a control unit configured to identify at least one parameter related to a convolutional code associated with a communication unit and a polarization-adjusted convolutional (PAC) code, identify a parity check matrix for an input binary vector of a polar code associated with the PAC code based on the at least one parameter, perform encoding for the polar code based on the parity check matrix, and transmit a codeword vector generated based on the encoding.
[0017] A receiving device of a communication system according to one embodiment of the present disclosure may include a control unit configured to identify a reception symbol vector associated with a communication unit and a codeword vector, identify at least one parameter associated with a convolutional code associated with a Polarization-adjusted convolutional (PAC) code, identify a parity check matrix for an input binary vector of a polar code associated with the PAC code based on the at least one parameter, perform decoding on the reception symbol vector based on the parity check matrix, and perform an inverse convolution on a bit sequence generated through the decoding.
[0018] The encoding method and device according to embodiments of the present disclosure can process a PAC code by using Polar encoding implemented and included in the system for Polar codes when encoding a PAC code. In addition, the decoding method and device according to embodiments of the present disclosure can process a PAC code by using SC decoding or SCL decoding implemented and included in the system for Polar codes in order to process a convolutional code when decoding a PAC code.
[0019] The effects that can be obtained from the present disclosure are not limited to the effects mentioned above, and other effects that are not mentioned can be clearly understood by a person having ordinary skill in the art to which the present disclosure belongs from the description below.
[0020] FIG. 1 is a diagram illustrating a communication system or broadcasting system to which various embodiments of the present disclosure can be applied.
[0021] FIG. 2 is a diagram illustrating an example of a configuration of a transmitter or receiver device of a communication system or broadcasting system to which various embodiments of the present disclosure are applicable.
[0022] FIG. 3 is a diagram showing an example of encoding of a PAC code to which various embodiments of the present disclosure are applicable.
[0023] FIG. 4 is a diagram illustrating an example of a shift register circuit for convolutional encoding to which various embodiments of the present disclosure are applicable.
[0024] FIG. 5 is a diagram illustrating an example of a process of transmitting a codeword vector generated by a transmitter through a channel to which various embodiments of the present disclosure are applicable.
[0025] FIG. 6 is a diagram illustrating an example of a decryption process using a Polar code to which various embodiments of the present disclosure are applicable.
[0026] Figure 7 is the above-mentioned generated polynomial coefficient vector The generating matrix composed by This is a drawing showing .
[0027] Figures 8a and 8b illustrate partial generation matrices from the generation matrix T according to one embodiment of the present invention. This is a diagram showing the process of obtaining .
[0028] Figure 9 is a partial generation matrix according to one embodiment of the present invention. A matrix in Reduced Row Echelon Form (RREF) This is a diagram showing the process of converting to .
[0029] Figure 10 is an RREF matrix according to one embodiment of the present invention. Standard Generator Matrix This is a diagram showing the process of converting to .
[0030] Figure 11 is a standard generation matrix according to one embodiment of the present invention. From the Standard Parity-Check Matrix This is a diagram showing the process of obtaining .
[0031] Figure 12 is a standard parity-check matrix according to one embodiment of the present invention. Parity-check matrix from This is a diagram showing the process of obtaining .
[0032] Figure 13 is a diagram illustrating a process of implementing encoding of a PAC code as an encoding operation of a Polar code.
[0033] Figure 14 is a diagram illustrating a process of implementing decryption of a PAC code as a decryption operation of a Polar code.
[0034] FIG. 15 is a diagram illustrating the results of a link-level simulation to verify the effect according to one embodiment of the present invention.
[0035] Hereinafter, embodiments of the present invention will be described in detail with the attached drawings.
[0036] In describing the embodiments, descriptions of technical details that are well-known in the technical field to which the present invention pertains and are not directly related to the present invention will be omitted. This is to avoid obscuring the gist of the present invention by omitting unnecessary explanations and to convey it more clearly.
[0037] For the same reason, some components in the attached drawings are highlighted, omitted, or schematically depicted. Furthermore, the dimensions of each component do not entirely reflect its actual size. Identical or corresponding components in each drawing are assigned the same reference numbers.
[0038] The advantages and features of the present invention, and the methods for achieving them, will become clearer with reference to the embodiments described in detail below together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below and may be implemented in various different forms. These embodiments are provided only to complete the disclosure of the present invention and to fully inform those skilled in the art of the scope of the invention, and the present invention is defined only by the scope of the claims. Like reference numerals may refer to like elements throughout the specification.
[0039] At this time, it will be understood that each block of the processing flowchart drawings and combinations of the flowchart drawings can be performed by computer program instructions. These computer program instructions can be installed in a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing equipment, so that the instructions executed by the computer or the processor of the other programmable data processing equipment create a means for performing the functions described in the flowchart block(s). These computer program instructions can also be stored in a computer-available or computer-readable memory that can be directed to a computer or other programmable data processing equipment to implement the functions in a specific manner, so that the instructions stored in the computer-available or computer-readable memory can also produce a manufactured item that includes an instruction means for performing the functions described in the flowchart block(s). Since the computer program instructions may be installed on a computer or other programmable data processing device, a series of operational steps may be performed on the computer or other programmable data processing device to create a computer-executable process, and the instructions that cause the computer or other programmable data processing device to perform the steps for performing the functions described in the flowchart block(s) may also provide steps for performing the functions described in the flowchart block(s).
[0040] Additionally, each block may represent a module, segment, or portion of code that contains one or more executable instructions for performing a specific logical function(s). It should also be noted that in some alternative implementation examples, the functions described in the blocks may occur out of order. For example, two blocks depicted in succession may actually be executed substantially concurrently, or the blocks may sometimes be executed in reverse order, depending on their respective functions.
[0041] Here, the term '~ unit' used in the present embodiment means a software or hardware component such as an FPGA or ASIC, and the '~ unit' performs certain roles. However, the '~ unit' is not limited to software or hardware. The '~ unit' may be configured to be on an addressable storage medium and may be configured to play one or more processors. Accordingly, as an example, the '~ unit' includes components such as software components, object-oriented software components, class components, and task components, processes, functions, properties, procedures, subroutines, segments of program code, drivers, firmware, microcode, circuits, data, databases, data structures, tables, arrays, and variables. The functions provided within the components and '~ units' may be combined into a smaller number of components and '~ units' or further separated into additional components and '~ units'. Additionally, components and '~parts' may be implemented to regenerate one or more CPUs within a device or secure multimedia card.
[0042] Hereinafter, various embodiments will be described in detail with reference to the attached drawings. At this time, it should be noted that the same components in the attached drawings are represented by the same reference numerals as much as possible. In addition, it should be noted that the attached drawings of the present invention are provided to help understand the present invention, and the present invention is not limited to the form or arrangement illustrated in the drawings. In addition, detailed descriptions of well-known functions and configurations that may obscure the gist of the present invention will be omitted. It should be noted that in the following description, only the parts necessary for understanding the operation according to various embodiments of the present invention will be described, and the description of other parts will be omitted so as not to distract from the gist of the present invention.
[0043] In the following description, terms referring to signals (e.g., signal, information, message, signaling), terms referring to resources, terms for operational states (e.g., step, operation, procedure), terms referring to data (e.g., packet, user stream, information, bit, symbol, codeword), terms referring to channels, terms referring to network entities, terms referring to components of devices, etc. are examples for convenience of explanation. Therefore, the present disclosure is not limited to the terms described below, and other terms having equivalent technical meanings may be used.
[0044] In the present disclosure, expressions such as "more than" and "less than" may be used to determine whether a specific condition is satisfied or fulfilled. However, this is merely a description for expressing an example and does not exclude descriptions such as "more than" and "less than." Conditions described as "more than" may be replaced with "more than," conditions described as "less than" may be replaced with "less than," and conditions described as "more than and less than" may be replaced with "more than and less than."
[0045] The present disclosure relates to some communication standards (e.g., 3GPP (3 rd Although some embodiments are described using terminology used in the Generation Partnership Project, these are merely examples for illustrative purposes. Various embodiments of the present disclosure can be easily modified and applied to other communication and broadcasting systems.
[0046] FIG. 1 illustrates a communication system and a broadcasting system according to embodiments of the present disclosure.
[0047] Referring to FIG. 1, a transmitter (110) and a receiver (120) are illustrated as part of devices or nodes that utilize wired or wireless channels, or a combined wired and wireless channel, in a wired or wireless communication system or broadcasting system. FIG. 1 illustrates one transmitter (110) and one receiver (120), but the communication and broadcasting system may include multiple transmitters or multiple receivers. In addition, for convenience of explanation, in the present disclosure, the transmitter (110) and the receiver (120) are described as separate entities, but the functions of the transmitter (110) and the receiver (120) may be interchanged. For example, in the case of an uplink of a cellular or mobile system, the transmitter (110) may be a terminal and the receiver (120) may be a base station. In the case of downlink, the transmitter (110) can be a base station, and the receiver (120) can be a terminal.
[0048] A base station is a network infrastructure that provides wireless access to terminals. A base station has coverage defined based on the distance at which it can transmit signals. In addition to the base station device, a base station may also include a massive multiple input multiple output (MIMO) unit (MMU), an access point (AP), an eNodeB (eNB), and a 5G node (5G node). thThe base station may be referred to as a 5G generation node, 5G NodeB (5G NB), wireless point, transmission / reception point (TRP), access unit, distributed unit (DU), virtualized distributed unit (vDU), radio unit (RU), remote radio head (RRH), or other terms having equivalent technical meaning. The base station may transmit downlink signals or receive uplink signals.
[0049] A terminal is a device used by a user to communicate with a base station through a wired or wireless channel. In some cases, a terminal may be operated without the involvement of a user. That is, a terminal is a device that performs machine type communication (MTC) and may not be carried by a user. A terminal may be referred to as a terminal, user equipment (UE), mobile station, subscriber station, customer premises equipment (CPE), remote terminal, wireless terminal, electronic device, vehicle terminal, user device, or other terms having equivalent technical meaning.
[0050] Although not shown in FIG. 1, in addition to communication between a base station and a terminal, a terminal may also perform direct communications with other terminals. Such communications may be configured or set up as a sidelink. For example, vehicular communication between the terminal illustrated in FIG. 1 and other terminals may be supported. In the case of vehicular communication, in the LTE system, standardization work on vehicle-to-everything (V2X) technology based on the device-to-device (D2D) communication structure was completed in 3GPP release 14 and release 15, and standardization work on NR V2X technology is currently in progress in 5G NR release 16.
[0051] Depending on the link formed between communication nodes, the transmitter and receiver may be defined in various ways. In one embodiment, the transmitter (110) may be a base station, and the receiver (120) may be a terminal. In addition, in another embodiment, the receiver (120) may be a base station, and the transmitter (110) may be a terminal. In another embodiment, both the transmitter and the receiver may be terminals that communicate via a side link. Hereinafter, the present disclosure describes the entity that transmits a signal as a transmitter, and the entity that receives a signal as a receiver, but this is only a functional expression for explaining the signal processing process, and is not to be construed as limiting a specific embodiment.
[0052] In the embodiments, the transmitter (110) can generate a codeword by encoding information bits based on polar codes, and the receiver (120) can decode a signal of the received codeword based on the polar code. Subchannel allocation for input bits can be performed. Each input bit for encoding the polar code can be analyzed and interpreted as passing through a subchannel, which is a virtual channel with different qualities, by channel polarization. At this time, each subchannel is also referred to as a split channel, a synthesized channel, or a synthetic channel. After subchannel allocation, the transmitter (110) can perform encoding for the polar code using a generator matrix. The receiver (120) can perform decoding based on the polar code through a successive cancellation (SC) operation or an operation equivalent thereto.
[0053] In the embodiments, the transmitter (110) and the receiver (120) may perform encoding and decoding based on different encoding parameters, scheduling parameters, etc. due to various reasons. That is, the encoding operation of the transmitter (110) and the decoding operation of the receiver (120) may be defined or set and performed by different settings. For example, the error correction coding technique used by the transmitter (110) and the error correction coding technique used by the receiver (120) may be different from each other. For example, even if the transmitter (110) and the receiver (120) use the same type of error correction code, the code parameters such as the code dimension (the number of encoded input bits or the number of information bits), the code length (the number of encoded output bits or the number of code word bits), and the modulation order may be different. For example, even if a transmitter (110) and a receiver (120) use the same type of error correction code and use the same code parameters, the scheduling parameters for the communication resources used may be different, and thus the allocation positions on the time and frequency at which the signal is transmitted, the antenna and layer allocation positions in the MIMO system, etc. may be different. According to the above examples, the signal input at the receiver (120) may not conform to various settings to be decoded (code parameters, scheduling parameters, etc.), and the signal input through this series of processes may be random or random-like.
[0054] In some embodiments, even though the transmitter (110) did not transmit a signal due to various reasons, the receiver (120) may be set to have received the signal and attempt to decode it. For example, the receiver (120) may mistake background noise, interference, etc. for the intended signal and perform decoding based on this.
[0055] FIG. 2 illustrates an example of a configuration of a transmitter or receiver in a communication system or broadcasting system according to embodiments of the present disclosure. That is, the configuration illustrated in FIG. 2 can be understood as the configuration of the transmitter (110) or the receiver (120) of FIG. 1. Terms such as "unit" and "device" used hereinafter mean a unit that processes at least one function or operation, and this can be implemented by hardware, software, or a combination of hardware and software.
[0056] Referring to FIG. 2, the device may include a communication unit (210), a storage unit (220), and a control unit (230).
[0057] The communication unit (210) can perform functions for transmitting and receiving signals through wired and wireless channels. For example, the communication unit (210) can perform a function of converting between a baseband signal and a bit stream according to the physical layer standard of the system. For example, when the transmitter (110) transmits data, the communication unit (210) can generate complex symbols by encoding and modulating the transmission bit stream. In addition, when the receiver (120) receives data, the communication unit (210) can estimate or restore the transmitted bit stream by demodulating and decoding the baseband signal. In addition, the communication unit (210) can up-convert a baseband signal into an RF (radio frequency) band signal and transmit it through an antenna, and down-convert an RF band signal received through the antenna into a baseband signal.
[0058] To this end, the communication unit (210) may include a transmitting filter, a receiving filter, an amplifier, a mixer, an oscillator, a digital-to-analog convertor (DAC), an analog-to-digital convertor (ADC), etc. In addition, the communication unit (210) may include a plurality of transmitting and receiving paths. Furthermore, the communication unit (210) may include at least one antenna array composed of a plurality of antenna elements. In terms of hardware, the communication unit (210) may be composed of a digital unit and an analog unit, and the analog unit may be composed of a plurality of sub-units according to operating power, operating frequency, etc. In addition, the communication unit (210) may include an encoding unit for performing encoding according to various embodiments of the present disclosure. Additionally, the communication unit (210) may include a decryption unit for performing decryption according to various embodiments of the present disclosure.
[0059] The communication unit (210) transmits and receives signals as described above. Accordingly, the communication unit (210) may be referred to as a 'transmitter', a 'receiver', or a 'transceiver'. In addition, in the following description, the transmission and reception operations performed through wired and wireless channels are used to mean that the processing as described above is performed by the communication unit (210). In addition, when the device of FIG. 2 is a base station, the communication unit (210) may additionally include a backhaul communication unit for communication with other network entities connected through a backhaul network.
[0060] The storage unit (220) can store data such as basic programs, application programs, and setting information for the operation of the receiver (120). The storage unit (220) can be composed of volatile memory, non-volatile memory, or a combination of volatile memory and non-volatile memory. In addition, the storage unit (220) can provide stored data upon request of the control unit (230).
[0061] The control unit (230) can control the overall operations of the device. For example, the control unit (230) can transmit and receive signals through the communication unit (210). In addition, the control unit (230) can record or read data in the storage unit (220). For this purpose, the control unit (230) can include at least one processor or microprocessor, or can be a part of a processor. According to various embodiments, the control unit (230) can control the device to perform operations according to various embodiments described below.
[0062] Although the present disclosure describes embodiments using terms used in some communication and broadcasting standards (e.g., 3rd Generation Partnership Project (3GPP)), these are merely examples for illustrative purposes, and various embodiments of the present disclosure can be easily modified and applied to other communication and broadcasting systems.
[0063] In the course of describing the present invention in detail, various words with the same meaning are used when referring to channel coding. The channel coding may be referred to by terms such as error correction codes (ECC), error detection codes (error detecting codes), forward error correction (FEC), etc. The operation performed in the transmitter may be referred to by terms such as channel encoding, encoding, etc., and the unit performing this may be referred to as a channel encoder, encoder, encoding unit, etc. The operation performed in the receiver may be referred to by terms such as channel decoding, channel decoding, decoding, decoding, etc., and the unit performing this may be referred to as a channel decoder, channel decoder, decoder, decoder, etc. The above terms will be clearly understood by a person skilled in the art to which the present disclosure pertains.
[0064] Additionally, throughout the detailed description of the present invention, commonly used mathematical symbols will be used. These mathematical symbols will be readily understood by those skilled in the art to which the present disclosure pertains. Representative mathematical symbols used in this disclosure include the following:
[0065] ● Calligraphic characters (e.g., ) is used to refer to a set.
[0066] ● Unless otherwise stated throughout this disclosure, it is assumed that the index of the first element of a set, sequence, or vector starts from 0 (zero-based numbering).
[0067] ● Symbol are used to refer to the set of natural numbers, the set of integers, and the set of real numbers, respectively.
[0068] ● Symbol represents a binary field.
[0069] ● For a non-negative integer n, represents a set of n consecutive integers from 0 to n-1. That is, am.
[0070] ● Boldface lowercase letters (e.g., a) are used to indicate vectors, and boldface uppercase letters (e.g., A) are used to indicate matrices. For vectors, unless otherwise specified, they indicate column vectors.
[0071] ● For vector a and matrix A and represents each transpose.
[0072] ● For vector a and two non-negative integers i and j, represents a subvector consisting of consecutive elements from the i-th element to the j-th element of vector a. That is, Is am.
[0073] Polar codes are the first error-correcting codes that have been proven to achieve the channel capacity, which is the limit of data transmission performance in binary discrete memoryless channels (B-DMC), while having a low coding / complexity performance that can be implemented with error-correcting codes. Polar codes and successive cancellation (SC)-based decoding methods enable superior error-correction performance for short-length code transmission compared to other channel codes. Because of these advantages, Polar codes are being used to transmit short-length control information in the 3GPP New Radio (NR), the 5th generation (5G) mobile communication standard.
[0074] Polarization-Adjusted Convolutional (PAC) code is an error correction code designed based on a polar code, and is characterized by composing the code by concatenating a convolutional code to a polar code.
[0075] FIG. 3 is a diagram showing an example of encoding of a PAC code to which various embodiments of the present disclosure are applicable.
[0076] The process of Fig. 3 may be a part of the encoding operation of the entire PAC code. The assumption of Fig. 3 may be a partial modification of the encoding operation of the PAC code performed by the system.
[0077] Binary vector in Fig. 3 (301) represents an encoded bit vector of length K. The binary vector a may be an information bit vector that the transmitter wishes to transmit. The binary vector a may be a result obtained by encoding the information bit vector that the transmitter wishes to transmit using an external encoding such as a Cyclic Redundancy Check (CRC) code.
[0078] The first step of the PAC code is a binary vector (301) is another binary vector (302) and multiplexed (310) binary vector (311) is configured. At this time, N is the size or code length of the convolution code and polar code to be performed thereafter, and can be determined based on the given communication resources (number of code bits to be transmitted through the channel, modulation order, number of MIMO antennas and layers, etc.).
[0079] The binary vector f(302) is called a frozen bit vector and consists of bits inserted to achieve channel polarization when using a polar code. Each frozen bit has a fixed value, and the value is pre-determined and pre-configured by the transmitter and receiver so that they recognize it as the same value. The value of the frozen bit can be either 0 or 1, but is typically set to 0.
[0080] By the above multiplexing operation (301), two binary vectors a(301) and f(302) are mixed with each other to form a binary vector b(311) of length N. That is, K elements in the binary vector b are formed by a, and the remaining NK elements are formed by f. The positions of the K elements whose values are determined and formed by the binary vector a in the binary vector b are an index set of size K. (303) is determined by. For example, N is 8, K is 4, ={3,5,6,7}, then elements b3,b5,b6,b7 in the binary vector b=(b0,b1,b2,b3,b4,b5,b6,b7) are determined by the respective elements of the binary vector a=(a0,a1,a2,a3). The mapping of a0,a1,a2,a3 to elements b3,b5,b6,b7 can be done in an arbitrary manner. The remaining elements of the binary vector b=(b0,b1,b2,b3,b4,b5,b6,b7), i.e., b0,b1,b2,b4, are determined by the respective elements of the binary vector f=(f0,f1,f2,f3).
[0081] It should be noted that the process of generating the above binary vector b(311) can be implemented without explicitly performing an operation such as multiplexing (310) if the same result can be obtained. For example, if the values of all frozen bits are determined to be 0, first initialize all element values of b to 0, and then set A binary vector b can be generated by mapping an element of binary vector a(301) to an element at a position specified by (303). This process is an example, and a binary vector b can be generated through any operation as long as the desired result is obtained in the same manner.
[0082] Binary vector generated through the above multiplexing (310) (311) is then encoded with a convolutional code to form a binary vector of the same length as (320). generates. The convolutional code can be defined by a generator polynomial set by the coefficient vector g. Convolutional encoding can be implemented in various ways.
[0083] The above convolution encoding (320) can be implemented by a circuit composed of a shift register.
[0084] FIG. 4 is a diagram illustrating an example of a shift register circuit for convolutional encoding to which various embodiments of the present disclosure are applicable.
[0085] For example, the encoding process of a convolutional code defined by a generator polynomial g = (1 1 0 1) can be implemented by the shift register circuit (400) of Fig. 4. The convolutional code encoding circuit defined by g having a length of 4 has three memories, and the connection state between the memories is determined by the generator polynomial coefficient vector g, as shown in Fig. 4. Each memory is initially initialized to a pre-determined value, which is usually 0. The circuit is a binary vector Each bit is input sequentially one by one, and the operation configured in the circuit is performed once per clock, creating a binary vector. Each bit of the binary vector u is generated sequentially one by one. By the circuit operation of Fig. 4 with three memories, the k-th bit c of the binary vector u k is the first three bits of binary vector b k-3 ,b k-2 ,b k-1 (If the subscript is negative, the value is used as the initial value of the corresponding memory) and the current input b k Linear combination b determined by the generating polynomial k-3 +b k-2 +b k is determined by . Here, addition defined by the symbol + is addition between bits, binary sum, modulo-2 sum, and exclusive OR (XOR).
[0086] The above convolution encoding (320) can be expressed as a matrix multiplication. As seen in the above example, the k-th bit u of the binary vector u is encoded by the convolution code whose generating polynomial coefficient vector is g = (1 1 0 1).k is based on the elements of the input binary vector b k =b k-3 +b k-2 +b k It is calculated as follows. If expressed as a product of these motion matrices, it can be defined as [Mathematical Formula 1] below.
[0087] [Mathematical Formula 1]
[0088] u=bT
[0089] In [Equation 1] is a generator matrix determined based on the given generator polynomial coefficient vector g. The generator matrix of the convolution code is made of a Toplitz matrix that can be obtained by shifting the given generator polynomial coefficient vector. For example, when the generator polynomial coefficient vector is given as g = (1 1 0 1) as in the example above, the generation process of the binary vector u obtained by the operation of the shift register circuit examined above can be expressed by [Mathematical Formula 1] based on T defined by [Mathematical Formula 2] below.
[0090] [Equation 2]
[0091]
[0092] As expressed in [Mathematical Expression 2], the generating matrix T is composed in such a way that the generating polynomial coefficient vector g = (1 1 0 1) appears in the first row and first column, and the values are shifted to the right one by one in the next row. Looking at the operation of [Mathematical Expression 1] defined by T in [Mathematical Expression 2], the k-th bit u of the binary vector u k is u k =b k-3 +b k-2 +b k You can see that it is generated.
[0093] Binary vector generated by convolution encoding (320) (321) is input to the encoding (330) of the Polar code and is a binary vector of the same length. (331) is generated. The encoding process of the Polar code can be expressed by the matrix multiplication [Mathematical Formula 3] below.
[0094] [Equation 3]
[0095] x=uG
[0096] In one embodiment, the generating matrix G of [Mathematical Formula 3] can be defined as in [Mathematical Formula 4] below.
[0097] [Equation 4]
[0098]
[0099] In the above [Mathematical Formula 4], F is called the polarization kernel. This is the superscript for the polarization kernel F. The operation means the Kronecker power n times. The Kronecker power is It means matrix operations in a repetitive manner, such as is a binary matrix of size N×N. Also, is a bit-reversal permutation matrix of size N×N. It is an operation that creates a new index by reversing the binary representation of each element index of a given vector and then arranging them. For example, when a vector (a0,a1,a2,a3,a4,a5,a6,a7) of length 8 is multiplied by B8, a vector (a0,a4,a2,a6,a1,a5,a3,a7) with bit-reversed indices is generated.
[0100] In another embodiment, the generating matrix G of [Mathematical Formula 3] can be defined as in [Mathematical Formula 5] below.
[0101] [Equation 5]
[0102]
[0103] The generating matrix G of the above [Mathematical Formula 5] is a bit-inversion substitution matrix B N It is defined without, and this type of generation matrix is considered in 3GPP NR systems, etc.
[0104] Below, for convenience of explanation in the embodiments of the present disclosure, unless otherwise stated, the generation matrix of [Mathematical Formula 5] It is assumed that is used. However, this is for explanation only and the contents to be described later and the contents of the present invention are the generating matrix defined in [Mathematical Formula 4] It can also be applied to a system that takes into account [Equation 5]. For example, the generating matrix B of [Mathematical Formula 4] is explained based on N The following description can be equally applied even when the generator matrix of [Equation 4] is used by performing a simple additional operation corresponding to p (e.g., applying bit-reversal permutation or its inverse permutation to either binary vector u or binary vector x). Whether or not bit-reversal permutation is included in the generator matrix does not affect the operation, characteristics, and effects of the present invention.
[0105] Figure 5 is a diagram illustrating an example of a process of transmitting a codeword vector generated by a transmitter through a channel.
[0106] The generated codeword vector x(331) is transmitted through the binary input channel (500), and the receiver receives the received symbol vector corresponding to the codeword vector (501) is obtained. Here, the alphabet for the received symbol is determined by the type of channel and is a binary field It does not have to be. The transition from the codeword vector x to the received symbol vector y by the binary input channel may be the result of various operations such as rate matching and rate dematching, interleaving and deinterleaving, scrambling and descrambling, modulation and demodulation, as well as the physical channel experienced while transmitting the signal. The rate matching and deinterleaving relate to the process of adjusting the code length and code rate by transforming the codeword vector x by repetition, puncturing, shortening, etc. The interleaving and deinterleaving relate to the process of changing the arrangement of bits. The scrambling and descrambling relate to the process of transforming the values of bits to fit a given pattern. The above modulation and demodulation refer to the process of converting the generated bits into physical signals, which are then converted into received symbols for each bit. Each of the above operations will be clearly understood by those skilled in the art to which the present disclosure pertains. The binary input channel can be defined as an end-to-end transition from x to y, taking into account all intermediate operations.
[0107] FIG. 6 is a diagram illustrating an example of a decryption process using a Polar code to which various embodiments of the present disclosure are applicable.
[0108] Information, metrics, etc. about the received symbol vector y may be expressed in an appropriate form according to system requirements and operations. For example, in one embodiment of the present disclosure, a log likelihood ratio (LLR) for each codeword bit may be used. The LLR is a value calculated in logarithmic units as a ratio of the probability of the value of the codeword bit based on the received observation. For example, for the i-th codeword bit x i The LLR for the corresponding observation y i Based on this, it can be calculated as in [Mathematical Formula 6] of the following definition.
[0109] [Equation 6]
[0110]
[0111] The above [Mathematical Formula 6] can be defined in another form having the same meaning. For example, in [Mathematical Formula 6], the probability for bit value 0 in the numerator and the probability for bit value 1 in the denominator were considered, but this can be the opposite. In addition, the LLR for each codeword bit can be calculated or obtained by various methods. In particular, when high-order modulation is used, multiple bits are bundled and transmitted and received as a single symbol, so the LLR for each bit in the symbol can be calculated by an appropriate procedure and process. The process of calculating the LLR will be clearly understood by a person having ordinary skill in the art to which the present disclosure pertains. The disclosures of the present invention can be applied to various forms of received symbol vectors and modifications thereof, and are not limited to any specific form.
[0112] The LLR vector for the codeword vector x calculated based on the received symbol vector y (501) It can be expressed as .. Below, LLR is described based on the definition as in [Mathematical Formula 6] above, but an embodiment of the present disclosure is not limited to a specific LLR calculation method and definition. According to the definition of [Mathematical Formula 6], if the probability for the bit value 0 of the target codeword bit is large, LLR becomes positive, and vice versa, it becomes negative. In the operation of the binary-input channel, the punctured codeword bit has no information about the bit value, so the corresponding LLR value can be set to 0. In the operation of the binary-input channel, the shortened codeword bit has its value clearly known, so the corresponding LLR value can be set to a positive number (bit value 0) or a negative number (bit value 1) having the maximum absolute value set by the system. In the operation of the above binary input channel, if the codeword bit is transmitted twice or more repeatedly, the LLR for each repeatedly transmitted bit can be calculated and then soft combined to set the LLR value of the target codeword bit. Here, the soft combining can be performed by adding the respective LLRs.
[0113] The received symbol vector y or the LLR vector Λ generated therefrom is processed by the decoding operation of the PAC code (600). The above LLR generation process can be described as included in the decoding operation of the PAC code (600). The decoding operation embodiment of the present disclosure for the PAC code will be described in more detail later. As a decoding result, a binary vector A binary vector that is an estimate of (301) (601) is obtained. The purpose of PAC encoding and decoding is to enable the receiver to accurately predict a that the transmitter is trying to transmit. In other words, the encoding and decoding operations of the PAC code are performed with the probability that the predicted result is different from the transmitted information vector. should be designed to minimize.
[0114] The encoding and decoding operations of PAC codes operate differently from the encoding and decoding operations of conventional Polar codes. As discussed above, PAC codes have a form in which a convolutional code is concatenated with a Polar code, and the encoding and decoding operations of this convolutional code were not performed for conventional Polar codes. Therefore, encoding and decoding of PAC codes cannot be implemented with an encoder and decoder configured for conventional Polar codes. For example, conventional Polar codes are used in 5G, and the transmitter and receiver may each be configured with an encoder and decoder for encoding and decoding them. If PAC codes are introduced in the next generation (e.g., 6G, etc.), encoding and decoding for this code cannot be processed by the encoder and decoder of the conventional Polar code implemented for 5G due to the convolutional operation, and a separate encoder and decoder for processing PAC codes must be developed, implemented, and introduced. The introduction of these new encoders and decoders leads to increased development costs for new features and increased equipment costs, including hardware and software, for introducing new features.
[0115] Various embodiments of the present invention aim to perform encoding and decoding of a PAC code involving a convolution operation using a conventional Polar code encoder and decoder. To this end, one embodiment of the present invention provides a method for expressing a PAC code involving a convolution operation as a Generalized Concatenated Polar Code (GCPC).
[0116] The outline of the present invention is briefly described as follows. As described above, the operation performed by convolution encoding of the PAC code is an input binary vector The generating matrix defined by the generating polynomial Multiplying binary vectors This is a process for obtaining. The present invention obtains a constraint equation for a binary vector u, i.e., a parity-check equation, from this matrix multiplication process. If the parity-check equation has the causality of parity bit generation, which is a feature that a concatenated code of a generalized concatenated Polar code must satisfy, a conventional Polar code encoder and decoder can perform encoding and decoding of a PAC code in a direction that utilizes the parity-check equation.
[0117] The encoding method and device according to embodiments of the present disclosure enable processing of PAC codes by using conventional Polar encoding pre-implemented and included in a system for conventional Polar codes without including separate operations and devices for convolutional codes when encoding PAC codes. In addition, the decoding method and device according to embodiments of the present disclosure enable processing of PAC codes by using conventional SC decoding or SCL decoding pre-implemented and included in a system for conventional Polar codes without including separate operations and devices for processing convolutional codes when decoding PAC codes.
[0118] The present invention, in various embodiments, is a parity-check matrix that satisfies the parity check formula of [Mathematical Formula 7] for a binary vector u from the generation matrix T of [Mathematical Formula 1], which is a convolutional encoding process of the PAC code. It provides a process for inducing .
[0119] [Equation 7]
[0120]
[0121] In the above [Mathematical Formula 7] is the zero vector of length NK.
[0122] For illustration, below we describe in detail the process of obtaining the parity-check matrix H for a binary vector u of a PAC code of N=32,K=16 using a convolutional code with a generating polynomial coefficient vector g=[1 0 1 1 0 1 1]. Here, the set of indices defined for mapping the information bits is Assume that ={7,11,13,14,15,19,21,22,23,25,26,27,28,29,30,31}. The generating polynomial coefficient vector described below is g=[1 0 1 1 0 1 1], N=32, K=16 and ={7,11,13,14,15,19,21,22,23,25,26,27,28,29,30,31} is only an example for explanation and does not limit the scope of the present invention.
[0123] Figure 7 is a generating matrix composed by the generating polynomial coefficient vector g = [1 0 1 1 0 1 1] is a diagram showing . As explained above, the generating matrix T is obtained by shifting the generating polynomial coefficient vector.
[0124] Figures 8a and 8b illustrate partial generation matrices from the generation matrix T according to one embodiment of the present invention. This is a diagram illustrating the process of obtaining . In this process, the set of indices in the generating matrix T is Extracts rows at the indices specified by in order. In the following example, from the generating matrix T = Extract the rows corresponding to the elements of {7,11,13,14,15,19,21,22,23,25,26,27,28,29,30,31} to obtain the partial generating matrix T'.
[0125] Figure 9 is a partial generation matrix according to one embodiment of the present invention. A matrix in Reduced Row Echelon Form (RREF) This is a diagram illustrating the process of converting into . According to the definition of the RREF matrix, the values of the leading entries (the first non-zero element when reading each row from the left with a smaller index) are all 1, and when comparing the positions of any two leading entries, the smaller the row index of one, the smaller the column index, and the values of the other elements located in the same column as the leading element are all 0. The matrix R of RREF can be obtained by performing an elementary row operation on the partial generation matrix T'. For example, the process of obtaining the matrix R from the partial generation matrix T' can be obtained through an operation similar to the following C++ language function. However, this is only described as an example of one of various methods of obtaining the matrix R, and does not limit the scope of the present invention, and the present invention can be applied to any method that can obtain the same matrix R from the partial generation matrix T'. In the following function Find_Binary_RREF(const BITv2& T, BITv2& R), the first input variable BITv2& T corresponds to the partial generating matrix T', and the second input variable BITv2& R corresponds to the obtained RREF matrix R.
[0126]
[0127] Figure 10 is an RREF matrix according to one embodiment of the present invention. Standard Generator Matrix This is a diagram illustrating the process of converting into . This process performs a column permutation operation on the RREF matrix R so that an identity matrix of size K×K appears in front of the result. At this time, the transmitting and receiving devices can store the permutation obtained by changing the column positions in the memory as π. The standard generating matrix R converted in this way π It can be expressed as [Mathematical Formula 8] below, which is a concatenation form of the unit matrix I and another matrix P.
[0128] [Equation 8]
[0129]
[0130] Figure 11 is a standard generation matrix according to one embodiment of the present invention. From the Standard Parity-Check Matrix This is a diagram illustrating the process of obtaining a standard generating matrix R in the form of [Mathematical Formula 8]. π From the standard parity-check matrix H π can be obtained by the following [Mathematical Formula 9].
[0131] [Equation 9]
[0132]
[0133] Figure 12 is a standard parity-check matrix according to one embodiment of the present invention. Parity-check matrix from This is a diagram illustrating the process of obtaining the standard generating matrix R from the RREF matrix R in FIG. 9. π This is an operation that performs the reverse process of the column permutation performed when obtaining . That is, the standard generating matrix R from the RREF matrix R π The reverse process of the column permutation performed when obtaining is defined through [Mathematical Formula 9]. Applying to the parity-check matrix You can get it.
[0134] Through the above series of operations, a parity check matrix H satisfying [Mathematical Formula 7] for the binary vector u of the PAC code can be obtained. If a parity check matrix H that produces the same result can be obtained, part or all of the series of processes from FIG. 7 to FIG. 12 can be modified or omitted.
[0135] Looking at the parity check matrix H of the above PAC code and the parity check determinant [Mathematical Formula 7], the set of indices for information bits in the binary vector u It can be confirmed that all bits of the index that do not belong to are either frozen bits whose values are fixed, or dynamic frozen bits whose values are calculated as a linear combination of the preceding bits of the binary vector u, or parity bits.
[0136] Each row of the parity check matrix H represents a causal parity check equation for a parity bit (including the frozen bit). For example, as in the example that follows, the indices of the information bits are If given as ={7,11,13,14,15,19,21,22,23,25,26,27,28,29,30,31}, then NK rows of the parity check matrix H are in order. The set corresponding to the complement of ={0,1,2,3,4,5,6,8,9,10,12,16,17,18,20,24} corresponds to the dynamic freeze bits or parity bits with indices of . In other words, the k-th row of H is Represents a causal parity check formula for parity bits (including freeze bits) with the kth element indexed in ascending order of u. i If is a parity bit (i.e., ) Let the row index of the corresponding parity check matrix H be k. For example, in the continued example above, the parity bit u with i = 12 12 The corresponding k is 10 (k also starts from 0 according to zero-based numbering). In this case, the parity bit u i The causal parity check formula for is given as [Mathematical Formula 10] below.
[0137] [Equation 10]
[0138]
[0139] The above [Mathematical Equation 10] indicates that all bits other than the information bits of the binary vector u are causally generated parity bits. It should be noted that, in a broad sense, parity bits also include frozen bits.
[0140] Parity check formulas with such causal relationships can be used as is in the encoding and decoding processes of conventional Polar codes. Conventional SC decoding or SC-list (SCL) decoding of Polar codes sequentially decodes each bit of the binary vector u.
[0141] u to be processed in the sequential decryption process i If is an information bit (i.e., ), u i By calculating the posterior LLR (a posteriori LLR, AP-LLR), u i Estimated value of In SC decryption, u i While only AP-LLR of u0 is used, when considering multiple paths simultaneously, such as SCL decoding, u0 to u i We can use the path metric (PM), which is the overall probability information for up to .
[0142] u to be processed in the sequential decryption process i If it is not an information bit (i.e., ), decoding can be performed by utilizing causal generating features. Here, the causal generating features are u as in [Mathematical Formula 10]. i, refers to a feature where the value is determined by a linear combination of the preceding bits. According to the sequential decoding method, u i, When decrypting, u0,u1,....u i-1 Estimate for Since this is given, u is as in [Mathematical Formula 11] below. i The values for linear combinations (estimated (Note that this is not the case) can be calculated.
[0143] [Equation 11]
[0144]
[0145] Since all bits other than information bits, i.e., parity bits (dynamically frozen bits) and frozen bits, are causally generated, the above [Equation 11] is always computable. When decoding while maintaining multiple paths, such as SCL decoding, [Equation 11] can be performed for each path.
[0146] In the decoder of the Polar code, the parity bit generated as in [Mathematical Formula 11] can be utilized in a manner appropriate to the purpose. For example, the decoder of the Polar code can utilize the parity bit generated as in [Mathematical Formula 11]. Estimate the corresponding bit can be decided immediately. That is, ← u in the way of ican determine the estimation. In this case, only the paths that satisfy the parity check formula given in SC decoding or SCL decoding are naturally left, and the next decoding is performed based on these, so this process can be understood as pruning the path. When pruning the path in this way, the corresponding parity bits are used for error correction.
[0147] As another example, the decoder of the Polar code is obtained by the above [Mathematical Formula 11]. and the estimate obtained by calculating the AP-LLR of the corresponding bit can be compared. If this If the path is the same, the path is considered valid and subsequent decryption can be continued. If this If they are different, the path is marked as invalid, but can be maintained and further decryption can be continued. Finally, when decryption is completed, only the valid path is left for further operations. In this type of decryption, the corresponding parity bit is used for error detection.
[0148] As described above, since the decoding of Polar codes performs sequential operations, in order to effectively utilize parity bits in the decoding operation, they must be causally generated as in [Mathematical Formula 10]. In addition, if the PAC code is transformed into a generalized concatenated Polar code according to an embodiment of the present invention, all causal parity bit generation formulas can be verified. Using this relationship, the encoding and decoding processes of the PAC code can be expressed as a conventional encoder and decoder of a general Polar code.
[0149] Figure 13 is a diagram illustrating a process of implementing encoding of a PAC code as an encoding operation of a Polar code.
[0150] The upper block diagram (1310) of FIG. 13 illustrates an embodiment of an encoding operation of a PAC code. Here, the encoder can obtain a parity check matrix H for a bit vector u obtained by performing a convolutional code using the method of the embodiment described above. The parity check matrix H may be recorded in the system in various ways. In one embodiment, the matrix itself may be stored in memory. In another embodiment, the position of 1 in the matrix H may be recorded. It should be noted that if information on the parity check matrix H can be accurately recorded in any form, this can all be understood as a process of obtaining the parity check matrix H described in the present invention, and can be equally applied to the present invention.
[0151] The lower block diagram (1320) of Fig. 13 illustrates an embodiment of performing encoding for a conventional Polar code based on a parity check matrix H or information thereon corresponding to the convolutional code operation of the PAC code. The value of each parity bit (including the freeze bit) can be calculated by [Mathematical Formula 10] based on the parity check matrix H as discussed above, without a separate convolutional encoding operation.
[0152] Figure 14 is a diagram illustrating a process of implementing decryption of a PAC code as a decryption operation of a Polar code.
[0153] The upper block diagram (1310) of Fig. 14 illustrates an embodiment of the encoding operation of a PAC code. Conventionally, PAC codes have been decoded using sequential decoding such as Fano decoding or special SCL decoding involving convolutional decoding.
[0154] The lower block diagram (1420) of Fig. 14 shows an embodiment of performing decoding for a conventional Polar code based on a parity check matrix H or information thereon corresponding to the convolutional code operation of the PAC code. The estimation or linear combination of each parity bit (including the freeze bit) can be calculated by [Mathematical Formula 11] based on the parity check matrix H as discussed above without a separate convolutional encoding operation. Therefore, in this case, SCL decoding (1421) capable of processing a conventional generalized concatenated Polar code can be easily utilized. However, since the result obtained by performing decoding in this way is the result of convolutional encoding, an inverse convolution operation must be performed to confirm the final result. This inverse convolution operation may be included in the operation of SC or SCL decoding, or may be performed separately after SC or SCL decoding.
[0155] FIG. 15 is a diagram illustrating the results of a link-level simulation to verify the effects according to one embodiment of the present invention. The encoding and decoding method of a PAC code according to one embodiment of the present invention utilizes the encoder and decoder of a conventional Polar code as is, and as shown in FIG. 15, achieves overall superior performance than the Polar code of a 5G system in various lengths (X-axis) and various code rates (different curves).
[0156] According to embodiments of the present disclosure, a method for encoding a PAC code performed by a transmitting device of a communication system and a broadcasting system includes: checking parameters required to configure a PAC code, such as a number of input bits (code dimension), a number of output bits (code length), a generator polynomial of a concatenated convolution code, etc.; checking a binary parity-check equation for an input binary vector of a Polar code based on the parameters; and generating an input binary vector of the Polar code without performing convolution encoding based on the binary parity-check equation.
[0157] According to embodiments of the present disclosure, a method for decoding a PAC code performed by a receiving device of a communication system and a broadcasting system includes: checking parameters necessary for configuring a PAC code, such as a number of input bits (code dimension), a number of output bits (code length), a generator polynomial of a concatenated convolution code, etc.; checking a binary parity-check equation for an input binary vector of a Polar code based on the parameters; performing decoding for a generalized concatenated Polar code by utilizing the binary parity-check equation; and performing an inverse convolution on at least one decoded result bit sequence obtained as described above.
[0158] The methods according to the embodiments described in the claims or specification of the present disclosure may be implemented in the form of hardware, software, or a combination of hardware and software.
[0159] When implemented in software, a computer-readable storage medium or computer program product storing one or more programs (software modules) may be provided. The one or more programs stored in the computer-readable storage medium or computer program product are configured for execution by one or more processors within an electronic device. The one or more programs include instructions that cause the electronic device to execute methods according to embodiments described in the claims or specification of the present disclosure.
[0160] These programs (software modules, software) may be stored in a non-volatile memory including random access memory, flash memory, read only memory (ROM), electrically erasable programmable read only memory (EEPROM), magnetic disc storage devices, compact disc ROMs (CD-ROMs), digital versatile discs (DVDs) or other forms of optical storage devices, magnetic cassettes, or may be stored in a memory configured as a combination of some or all of these. In addition, each configuration memory may be included in multiple numbers.
[0161] Additionally, the program may be stored on an attachable storage device that is accessible via a communication network such as the Internet, an intranet, a local area network (LAN), a wide local area network (WLAN), a storage area network (SAN), or a combination thereof. Such a storage device may be connected to a device implementing an embodiment of the present disclosure via an external port. Additionally, a separate storage device on the communication network may be connected to a device implementing an embodiment of the present disclosure.
[0162] In the specific embodiments of the present disclosure described above, components included in the present disclosure are expressed singularly or plurally, depending on the specific embodiment presented. However, the singular or plural expressions are selected to suit the presented situation for convenience of explanation, and the present disclosure is not limited to singular or plural components. Components expressed in plural may be composed of singular elements, or components expressed in singular may be composed of plural elements.
[0163] Meanwhile, the embodiments of the present disclosure disclosed in this specification and drawings are merely specific examples to easily explain the technical contents of the present disclosure and to help understand the present disclosure, and are not intended to limit the scope of the present disclosure. In other words, it will be apparent to those skilled in the art that other modified examples based on the technical idea of the present disclosure are possible. In addition, the above-mentioned respective embodiments can be combined and operated with each other as needed. For example, parts of one embodiment of the present disclosure and another embodiment can be combined with each other to operate a base station and a terminal. In addition, the embodiments of the present disclosure can be applied to other communication systems, and other modified examples based on the technical idea of the embodiments can also be implemented. For example, the embodiments can be applied to LTE systems, 5G, or NR systems, etc.
Claims
1. In an encoding method performed by a transmitting device of a communication system, A step of identifying at least one parameter associated with a convolutional code associated with a PAC (Polarization-adjusted convolutional) code; A step of identifying a parity check matrix for an input binary vector of a polar code associated with the PAC code based on at least one parameter; A step of performing encoding for polar codes based on the above parity check matrix; and A method characterized by comprising a step of transmitting a codeword vector generated based on the above encoding.
2. In paragraph 1, The step of performing encoding for the above polar code is: A step of generating a parity bit for an input binary vector of a polar code associated with the PAC code based on the parity check matrix; A step of generating an input binary vector of a polar code associated with the PAC code based on the parity bit and information bit; and A method characterized by comprising a step of encoding the input binary vector.
3. In paragraph 2, A method characterized in that the parity bit for the input binary vector of the polar code associated with the PAC code is determined based on a linear combination of bits having an index smaller than the parity bit.
4. In paragraph 1, At least one parameter associated with the convolutional code associated with the above PAC code, The sign dimension (K), the sign length (N), and the set of indices for information bits ( ) and a generating polynomial coefficient vector (g) associated with the convolutional code.
5. In paragraph 4, The step of identifying the above parity check matrix is: A step of identifying a generation matrix (T) based on the above generation polynomial; A set of indices for the above information bits ( ) to identify a partial generation matrix (T') based on a row of the generation matrix (T) having an index included in; A step of identifying a reduced row echelon form (RREF) matrix (R) based on the above partial generating matrix (T'); A standard generating matrix (R) based on column permutation for the above RREF matrix (R) π ) to identify; The above standard generating matrix (R π ) based on the standard parity check matrix (H π ) to identify; and The above standard parity check matrix (H π ) characterized in that it includes at least one step of identifying the parity check matrix (H).
6. In a decryption method performed by a receiving device of a communication system, A step of identifying a received symbol vector associated with a codeword vector; A step of identifying at least one parameter associated with a convolutional code associated with a PAC (Polarization-adjusted convolutional) code; A step of identifying a parity check matrix for an input binary vector of a polar code associated with the PAC code based on at least one parameter; A step of performing decoding on the received symbol vector based on the parity check matrix; and A method characterized by comprising a step of performing inverse convolution on a bit sequence generated through the above decryption.
7. In paragraph 6, The step of performing the above decryption is: A step of identifying an estimated value of a parity bit based on the above parity check matrix; and A method characterized by comprising a step of generating the bit sequence based on the estimated value of the parity bit and the estimated value of the information bit.
8. In paragraph 7, The step of identifying the estimated value of the above parity bit is: A step of identifying a linear combination value determined based on a linear combination of bits having an index smaller than the parity bit; and A method characterized by comprising a step of identifying an estimated value of the parity bit based on the linear combination value.
9. In paragraph 6, At least one parameter associated with the convolutional code associated with the above PAC code, The sign dimension (K), the sign length (N), and the set of indices for information bits ( ) and a generating polynomial coefficient vector (g) associated with the convolutional code.
10. In paragraph 9, The step of identifying the above parity check matrix is: A step of identifying a generation matrix (T) based on the above generation polynomial; A set of indices for the above information bits ( ) to identify a partial generation matrix (T') based on a row of the generation matrix (T) having an index included in; A step of identifying a reduced row echelon form (RREF) matrix (R) based on the above partial generating matrix (T'); A standard generating matrix (R) based on column permutation for the above RREF matrix (R) π ) to identify; The above standard generating matrix (R π ) based on the standard parity check matrix (H π ) to identify; and The above standard parity check matrix (H π ) characterized in that it includes at least one step of identifying the parity check matrix (H).
11. In a transmitting device of a communication system, Department of Communications; and Identifying at least one parameter associated with a convolutional code associated with a PAC (Polarization-adjusted convolutional) code, Identifying a parity check matrix for an input binary vector of a polar code associated with the PAC code based on at least one parameter, Encoding of polar codes is performed based on the above parity check matrix, A transmitting device characterized by including a control unit configured to transmit a codeword vector generated based on the above encoding.
12. In paragraph 11, The above control unit, A transmitting device characterized in that it is configured to perform encoding for the generalized concatenated polar code by generating a parity bit for an input binary vector of a polar code associated with the PAC code based on the parity check matrix, generating an input binary vector of a polar code associated with the PAC code based on the parity bit and information bit, and encoding the input binary vector.
13. In paragraph 12, A transmitting device, characterized in that the parity bit for the input binary vector of the polar code associated with the PAC code is determined based on a linear combination of bits having an index smaller than the parity bit.
14. In paragraph 11, At least one parameter associated with the convolutional code associated with the above PAC code, The sign dimension (K), the sign length (N), and the set of indices for information bits ( ) and a generating polynomial coefficient vector (g) associated with the convolutional code.
15. In a receiving device of a communication system, Department of Communications; and Identify the received symbol vector associated with the codeword vector, Identifying at least one parameter associated with a convolutional code associated with a PAC (Polarization-adjusted convolutional) code, Identifying a parity check matrix for an input binary vector of a polar code associated with the PAC code based on at least one parameter, Decoding is performed on the received symbol vector based on the parity check matrix, A receiving device characterized by including a control unit configured to perform inverse convolution on a bit sequence generated through the above decryption.
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