Display apparatus and method for producing display apparatus

Abstract

Provided is a highly reliable display device. Provided is a display device with high contrast. Provided is a display device with high visibility. Provided is a high-brightness display device. Provided is a high-definition display device. Provided is a display device with high resolution. The display device includes a light-emitting device including a first electrode on a first insulating layer, an EL layer on the first electrode, and a second electrode on the EL layer. The first electrode covers a part of an upper surface and a side surface of the first insulating layer. An end of the first electrode is located between the upper surface and a lower surface of the first insulating layer.

Description

Display device and method for manufacturing a display device

[0001] One aspect of the present invention relates to a display device, a display module, and electronic equipment. Another aspect of the present invention relates to a method for manufacturing a display device.

[0002] It should be noted that one aspect of the present invention is not limited to the above-mentioned technical field. Examples of technical fields of one aspect of the present invention include semiconductor devices, display devices, light-emitting devices, energy storage devices, memory devices, electronic devices, lighting devices, input devices (e.g., touch sensors), input / output devices (e.g., touch panels), methods for driving them, or methods for manufacturing them.

[0003] In recent years, display devices have been expected to have applications in a variety of uses. For example, large-scale display devices are used in home television systems (also called televisions or television receivers), digital signage (electronic billboards), and PID (Public Information Display). Furthermore, development is progressing on mobile information terminals such as smartphones and tablet devices equipped with touch panels.

[0004] Furthermore, there is a demand for higher resolution display devices. Devices requiring high-resolution display devices include, for example, devices for virtual reality (VR), augmented reality (AR), substitute reality (SR), and mixed reality (MR), which are being actively developed.

[0005] As a display device, for example, a light-emitting device (also called a light-emitting element) has been developed. Light-emitting devices that utilize the electroluminescence (EL) phenomenon (also called EL devices or EL elements) have features such as being easy to make thin and light, being able to respond quickly to input signals, and being able to be driven using a DC constant voltage power supply, and are being applied to display devices.

[0006] Patent Document 1 discloses a display device for VR that uses an organic EL device (also called an organic EL element).

[0007] International Publication No. 2018 / 087625

[0008] Takashi Koida, "High-Mobility Transparent Conductive Film," National Institute of Advanced Industrial Science and Technology (AIST), AIST Photovoltaic Power Generation Research Results Presentation 2019, Internet <URL: https: / / unit.aist.go.jp / rpd-envene / PV / ja / results / 2019 / oral / T13.pdf>

[0009] One aspect of the present invention aims to provide a highly reliable display device. One aspect of the present invention aims to provide a display device with high contrast. One aspect of the present invention aims to provide a display device with high visibility. One aspect of the present invention aims to provide a display device with high brightness. One aspect of the present invention aims to provide a display device with high detail. One aspect of the present invention aims to provide a display device with high resolution. One aspect of the present invention aims to provide a novel display device.

[0010] One aspect of the present invention aims to provide a method for manufacturing a highly reliable display device. One aspect of the present invention aims to provide a method for manufacturing a display device with high contrast. One aspect of the present invention aims to provide a method for manufacturing a display device with high visibility. One aspect of the present invention aims to provide a method for manufacturing a display device with high brightness. One aspect of the present invention aims to provide a method for manufacturing a display device with high detail. One aspect of the present invention aims to provide a method for manufacturing a display device with high resolution. One aspect of the present invention aims to provide a method for manufacturing a display device with high productivity. One aspect of the present invention aims to provide a method for manufacturing a novel display device.

[0011] Furthermore, the description of these problems does not preclude the existence of other problems. One aspect of the present invention does not necessarily have to solve all of these problems. It is possible to extract other problems from the description in the specification, drawings, and claims.

[0012] (1) One aspect of the present invention is a light-emitting device having a first electrode on a first insulating layer, an EL layer on the first electrode, and a second electrode on the EL layer, wherein the first electrode covers a portion of the upper and side surfaces of the first insulating layer, and the end of the first electrode is located between the upper and lower surfaces of the first insulating layer.

[0013] (2) In addition, in the embodiment described in (1), it is preferable to have a conductive layer located between the first electrode and the EL layer, wherein the conductive layer covers the upper and side surfaces of the first insulating layer with the first electrode in between, and the conductive layer covers the end of the first electrode.

[0014] (3) Or, one aspect of the present invention is a light-emitting device having a conductive layer on a first insulating layer, a first electrode on the conductive layer, an EL layer on the first electrode, and a second electrode on the EL layer, wherein the conductive layer is in contact with the upper and side surfaces of the first insulating layer, the first electrode is in contact with the upper and part of the side surfaces of the conductive layer, and the end of the first electrode is located between the upper and lower surfaces of the first insulating layer.

[0015] (4) In the embodiment described in (3), it is preferable that the first electrode covers a region on the side surface of the first insulating layer that is higher than the first height, but does not cover a region that is lower than the first height, and that the conductive layer covers a region on the side surface of the first insulating layer that is higher than the first height and a region that is lower than the first height.

[0016] (5) In addition, in the embodiment described in (3), it is preferable to have a second conductive layer located between the first electrode and the EL layer, wherein the second conductive layer covers the upper and side surfaces of the first insulating layer with the first electrode in between, and the second conductive layer covers the end of the first electrode.

[0017] (6) In addition, in the embodiment described in any one of (1) to (5), the first insulating layer is preferably island-shaped or convex.

[0018] (7) In addition, in the embodiment described in any one of (1) to (5), the first electrode preferably contains an Ag-Pd-Cu alloy.

[0019] (8) In the embodiment described in (2), the first electrode preferably comprises an Ag-Pd-Cu alloy, and the conductive layer preferably comprises one or more selected from indium oxide, zinc oxide, In-Sn oxide, In-Zn oxide, In-W oxide, In-W-Zn oxide, In-Ti oxide, In-Ti-Sn oxide, silicon-containing In-Sn oxide, zinc oxide with gallium added, In-Ga-Zn oxide, and In-Sn-Zn oxide.

[0020] (9) In addition, in the embodiment described in (2), the first electrode preferably comprises an Ag-Pd-Cu alloy, and the conductive layer preferably comprises one or more selected from indium oxide, zinc oxide, In-Sn oxide, In-Zn oxide, In-W oxide, In-W-Zn oxide, In-Ti oxide, In-Ti-Sn oxide, silicon-containing In-Sn oxide, gallium-added zinc oxide, In-Ga-Zn oxide, and In-Sn-Zn oxide.

[0021] (10) In the embodiment described in (5), the first electrode preferably comprises an Ag-Pd-Cu alloy, the conductive layer preferably comprises titanium, and the second conductive layer preferably comprises one or more selected from indium oxide, zinc oxide, In-Sn oxide, In-Zn oxide, In-W oxide, In-W-Zn oxide, In-Ti oxide, In-Ti-Sn oxide, In-Sn oxide containing silicon, zinc oxide with gallium added, In-Ga-Zn oxide, and In-Sn-Zn oxide.

[0022] (11) In another aspect of the present invention, a second insulating layer is formed on a first insulating layer, a first conductive layer is formed so as to cover the upper and side surfaces of the second insulating layer, a second conductive layer is formed on the first conductive layer, a first mask is formed on the second conductive layer, a third conductive layer is formed by using the first mask to remove a part of the second conductive layer, thereby exposing a part of the upper surface of the first conductive layer, a fourth conductive layer is formed on the first conductive layer and on the third conductive layer, a second mask is formed on the fourth conductive layer, and the second mask This is a method for manufacturing a display device, comprising: forming a fifth conductive layer by removing a portion of the fourth conductive layer using a mask; forming a sixth conductive layer by removing a portion of the first conductive layer using the second mask or the fifth conductive layer as a mask; forming an EL layer on the fifth conductive layer; forming a common electrode on the EL layer; forming the fourth conductive layer so as to be in contact with a portion of the upper surface of the exposed first conductive layer; and forming the third conductive layer by removing a portion of the second conductive layer using wet etching.

[0023] (12) In addition, in the embodiment described in (11), it is preferable that a portion of the second conductive layer that covers the side surface of the second insulating layer is removed by wet etching.

[0024] According to one aspect of the present invention, a highly reliable display device can be provided. According to one aspect of the present invention, a display device with high contrast can be provided. According to one aspect of the present invention, a display device with high visibility can be provided. According to one aspect of the present invention, a display device with high brightness can be provided. According to one aspect of the present invention, a display device with high detail can be provided. According to one aspect of the present invention, a display device with high resolution can be provided. According to one aspect of the present invention, a novel display device can be provided.

[0025] According to one aspect of the present invention, a method for manufacturing a highly reliable display device can be provided. According to one aspect of the present invention, a method for manufacturing a display device with high contrast can be provided. According to one aspect of the present invention, a method for manufacturing a display device with high visibility can be provided. According to one aspect of the present invention, a method for manufacturing a display device with high brightness can be provided. According to one aspect of the present invention, a method for manufacturing a display device with high detail can be provided. According to one aspect of the present invention, a method for manufacturing a display device with high resolution can be provided. According to one aspect of the present invention, a method for manufacturing a display device with high productivity can be provided. According to one aspect of the present invention, a method for manufacturing a novel display device can be provided.

[0026] Furthermore, the description of these effects does not preclude the existence of other effects. One aspect of the present invention does not necessarily have to possess all of these effects. Other effects can be extracted from the description, drawings, and claims.

[0027] Figure 1A is a top view showing an example of a display device. Figure 1B is a cross-sectional view showing an example of a display device. Figure 2 is a cross-sectional view showing an example of a display device. Figures 3A and 3B are cross-sectional views showing an example of a display device. Figures 4A and 4B are cross-sectional views showing an example of a display device. Figures 5A, 5B, and 5C are cross-sectional views showing an example of a display device. Figure 6 is a cross-sectional view showing an example of a display device. Figures 7A and 7B are cross-sectional views showing an example of a display device. Figures 8A and 8B are cross-sectional views showing an example of a display device. Figures 9A and 9B are cross-sectional views showing an example of a display device. Figures 10A and 10B are cross-sectional views showing an example of a display device. Figures 11A and 11B are cross-sectional views showing an example of a display device. Figures 12A and 12B are cross-sectional views showing an example of a display device. Figures 13A, 13B, and 13C are cross-sectional views showing an example of a method for manufacturing a display device. Figures 14A, 14B, and 14C are cross-sectional views showing an example of a method for manufacturing a display device. Figures 15A, 15B, and 15C are cross-sectional views showing an example of a method for manufacturing a display device. Figures 16A, 16B, and 16C are cross-sectional views showing an example of a method for manufacturing a display device. Figures 17A, 17B, and 17C are cross-sectional views showing an example of a method for manufacturing a display device. Figures 18A, 18B, and 18C are cross-sectional views showing an example of a method for manufacturing a display device. Figures 19A, 19B, 19C, 19D, 19E, 19F, and 19G are diagrams showing an example of a pixel. Figures 20A, 20B, 20C, 20D, 20E, 20F, 20G, 20H, 20I, 20J, and 20K are diagrams showing an example of a pixel. Figures 21A and 21B are top views showing an example of a display device. Figure 22 is a cross-sectional view showing an example of a display device. Figure 23 is a cross-sectional view showing an example of a display device. Figures 24A, 24B, 24C, and 24D are cross-sectional views showing an example of a transistor. Figure 25 is a cross-sectional view showing an example of a display device. Figure 26 is a cross-sectional view showing an example of a display device. Figures 27A, 27B, 27C, 27D, 27E, and 27F show examples of the configuration of a light-emitting device. Figures 28A and 28B show examples of the configuration of a light-receiving device. Figures 28C, 28D, and 28E show examples of the configuration of a display device.Figures 29A, 29B, 29C, 29D, and 29E show examples of electronic devices. Figures 30A, 30B, 30C, and 30D show examples of electronic devices. Figures 31A, 31B, 31C, 31D, 31E, and 31F show examples of electronic devices. Figures 32A, 32B, 32C, 32D, 32E, 32F, and 32G show examples of electronic devices. Figures 33A and 33B are cross-sectional views showing an example of a display device. Figures 34A and 34B are cross-sectional views showing an example of a display device. Figures 35A, 35B, and 35C are cross-sectional views showing an example of a display device. Figures 36A and 36B illustrate the carrier concentration dependence of hole mobility. Figure 36C is a cross-sectional view illustrating an indium oxide film. Figures 37A and 37B show STEM images. Figures 38A and 38B show STEM images. Figure 39 shows an optical microscope image. Figures 40A, 40B, and 40C show STEM images. Figures 41A and 41B show STEM images. Figures 42A and 42B show STEM images. Figures 43A and 43B show the display results of the display device.

[0028] Embodiments will be described in detail with reference to the drawings. However, it will be readily apparent to those skilled in the art that the present invention is not limited to the following description, and that its form and details can be modified in various ways without departing from the spirit and scope of the present invention. Accordingly, the present invention shall not be construed as being limited to the descriptions of the embodiments shown below.

[0029] In the configuration of the invention described below, the same reference numerals are used in common across different drawings for parts that are identical or have similar functions, and repeated explanations are omitted. In addition, when referring to similar functions, the hatching patterns are the same, and reference numerals may not be assigned.

[0030] The position, size, and scope of each component shown in the drawings may not represent the actual position, size, and scope for the sake of ease of understanding. Therefore, the disclosed invention is not necessarily limited to the position, size, and scope disclosed in the drawings.

[0031] In this specification, the ordinal numbers "first," "second," etc., are used for convenience only and do not limit the number of components or the order of components (for example, process order or stacking order). Furthermore, the ordinal numbers used for components in one part of this specification may not be the same as those used for the same components in other parts of this specification or in the claims.

[0032] In this specification and drawings, when the same reference numeral is used for multiple elements, and especially when it is necessary to distinguish them, the reference numeral may be accompanied by an identifying numeral such as "_1", "[n]", or "[m,n]". Furthermore, when describing a common matter for multiple elements with identifying numerals, or when it is not necessary to distinguish them, the identifying numeral may be omitted.

[0033] The words "film" and "layer" can be interchanged depending on the context or situation. For example, the term "conductive layer" can be changed to "conductive film." Or, for example, the term "insulating film" can be changed to "insulating layer."

[0034] A transistor is a type of semiconductor device that can perform functions such as amplifying current or voltage, and switching operations that control conduction or non-conductivity. Transistors as used herein include IGFETs (Insulated Gate Field Effect Transistors) and thin-film transistors (TFTs).

[0035] The functions of "source" and "drain" may be reversed when transistors with different polarities are used, or when the direction of current changes during circuit operation. For this reason, in this specification, the terms "source" and "drain" may be used interchangeably. Furthermore, the names of the source and drain of a transistor can be appropriately rephrased as source terminal and drain terminal, or source electrode and drain electrode, depending on the situation.

[0036] The terms "gate" and "back gate" are interchangeable. Therefore, in this specification, the terms "gate" and "back gate" may be used interchangeably. Furthermore, the names of the gate and back gate of a transistor can be appropriately rephrased as gate electrode and back gate electrode, etc., depending on the context.

[0037] In this specification, "connection" includes, for example, "electrical connection." The term "electrical connection" is sometimes used to describe the connection relationships of circuit elements as physical objects. Furthermore, "electrical connection" includes both "direct connection" and "indirect connection." "A and B are directly connected" means that A and B are connected without the use of circuit elements (e.g., transistors, switches, etc.; however, wiring is not considered a circuit element). On the other hand, "A and B are indirectly connected" means that A and B are connected through one or more circuit elements.

[0038] For example, assuming a circuit including A and B is in operation, if there is a timing during the circuit's operation when electrical signals are exchanged or potential interactions occur between A and B, then it can be defined that "A and B are indirectly connected" as physical objects. Furthermore, even if there is a timing during the circuit's operation when no electrical signals are exchanged or potential interactions occur between A and B, if there is a timing during the circuit's operation when electrical signals are exchanged or potential interactions occur between A and B, then it can be defined that "A and B are indirectly connected."

[0039] An example of a case where "A and B are indirectly connected" is when A and B are connected via the source and drain of one or more transistors. On the other hand, an example of a case where "A and B are not indirectly connected" is when an insulator is interposed in the path from A to B. Specifically, this includes cases where a capacitive element is connected between A and B, or where a transistor gate insulating film is interposed between A and B. Therefore, it cannot be said that "the gate (A) of a transistor and the source or drain (B) of a transistor are indirectly connected."

[0040] Another example of a situation where it cannot be said that "A and B are indirectly connected" is when multiple transistors are connected via source and drain in the path from A to B, and a constant potential V is supplied to the nodes between the transistors from a power supply, GND, etc.

[0041] In this specification, unless otherwise specified, on-current refers to the drain current (also called the conduction state) when the transistor is in the on state. Unless otherwise specified, the on state refers to the state in an n-channel transistor where the voltage between the gate and source (also called Vg or Vgs) is equal to or greater than the threshold voltage (also called Vth), and to the state in a p-channel transistor where it is less than or equal to the threshold voltage.

[0042] In this specification, unless otherwise specified, off-current refers to the source-drain leakage current when the transistor is in the off state (also called the non-conductive state or cutoff state). Unless otherwise specified, the off state refers to the state in an n-channel transistor where the voltage between the gate and source is lower than the threshold voltage, and in a p-channel transistor where it is higher than the threshold voltage.

[0043] In this specification, "parallel" means a state in which two lines are positioned at an angle of -10 degrees or more and 10 degrees or less. Therefore, the case of -5 degrees or more and 5 degrees or less is also included. Furthermore, "approximately parallel" means a state in which two lines are positioned at an angle of -30 degrees or more and 30 degrees or less. Furthermore, "perpendicular" means a state in which two lines are positioned at an angle of 80 degrees or more and 100 degrees or less. Therefore, the case of 85 degrees or more and 95 degrees or less is also included. Furthermore, "approximately perpendicular" means a state in which two lines are positioned at an angle of 60 degrees or more and 120 degrees or less.

[0044] In this specification, "matching or roughly matching top shapes" means that at least a portion of the contours overlap between stacked layers. For example, this includes cases where the upper and lower layers are processed with the same mask pattern, or partially with the same mask pattern. However, strictly speaking, the contours may not overlap, and the upper layer may be located inside the lower layer, or the upper layer may be located outside the lower layer; in this case, it may also be said that the "matching or roughly matching top shapes" apply. Furthermore, when the top shapes match or roughly match, it can also be said that the "edges match or roughly match," or "the edges are aligned or roughly aligned."

[0045] In this specification, a tapered shape refers to a shape in which at least a portion of the side surface of a structure is inclined with respect to the substrate surface or the surface to be formed. For example, it is preferable to have a region in which the angle (also called the taper angle) between the inclined side surface and the substrate surface or the surface to be formed is less than 90 degrees. The side surface of the structure, the substrate surface, and the surface to be formed do not necessarily have to be perfectly flat, and may be substantially planar with a small curvature, or substantially planar with fine irregularities.

[0046] In this specification, "step breakage" refers to the phenomenon in which a layer, film, or electrode is divided due to the shape of the surface on which it is formed (e.g., a step).

[0047] In this specification, devices manufactured using a metal mask or FMM (Fine Metal Mask, high-resolution metal mask) may be referred to as MM (metal mask) structured devices. Furthermore, in this specification, devices manufactured without using a metal mask or FMM may be referred to as MML (metal maskless) structured devices. Since MML structured devices can be manufactured without using a metal mask, they can exceed the upper limit of resolution imposed by the alignment accuracy of the metal mask. Additionally, MML structured devices eliminate the need for equipment and metal mask cleaning processes associated with metal mask manufacturing. Moreover, MML structured devices are suitable for mass production because their manufacturing costs can be kept low.

[0048] In this specification, a structure in which different light-emitting layers are created using light-emitting elements (also called light-emitting devices) with different emission wavelengths is sometimes referred to as an SBS (Side By Side) structure. Because the SBS structure allows for the optimization of materials and configurations for each light-emitting element, it broadens the range of material and configuration choices, making it easier to improve brightness and reliability.

[0049] In this specification, holes or electrons may be referred to as "carriers." Specifically, a hole injection layer or electron injection layer may be called a "carrier injection layer," a hole transport layer or electron transport layer may be called a "carrier transport layer," and a hole blocking layer or electron blocking layer may be called a "carrier blocking layer." Note that the above-mentioned carrier injection layer, carrier transport layer, and carrier blocking layer may not always be clearly distinguishable. Furthermore, a single layer may combine the functions of two or three of the carrier injection layer, carrier transport layer, and carrier blocking layer.

[0050] In this specification, a light-emitting element has an EL layer between a pair of electrodes. The EL layer has at least a light-emitting layer. Examples of layers in the EL layer (also called functional layers) include a light-emitting layer, a carrier injection layer (hole injection layer and electron injection layer), a carrier transport layer (hole transport layer and electron transport layer), and a carrier blocking layer (hole blocking layer and electron blocking layer). In this specification, a photodetector (also called a photodetector device) has at least an active layer that functions as a photoelectric conversion layer between a pair of electrodes. In this specification, one of the pair of electrodes may be referred to as a pixel electrode and the other as a common electrode.

[0051] In this specification, a photodetector (also called a photodetector) has an active layer that functions as a photoelectric conversion layer between a pair of electrodes.

[0052] In this specification, "island-like" refers to a state in which two or more layers made of the same material and formed in the same process are physically separated. For example, an island-like light-emitting layer refers to a state in which the light-emitting layer and an adjacent light-emitting layer are physically separated.

[0053] In this specification, the mask layer is located at least above the light-emitting layer (more specifically, the layer that is processed into an island shape among the layers constituting the EL layer) and has the function of protecting the light-emitting layer during the manufacturing process.

[0054] (Embodiment 1) This embodiment describes a display device according to one aspect of the present invention.

[0055] Figure 1A shows a top view (also called a plan view) of a display device 100 according to one embodiment of the present invention. The display device 100 has a display unit on which a plurality of pixels 110 are arranged, and a connection unit 140 on the outside of the display unit. Each pixel 110 has a plurality of subpixels. Figure 1A shows an example in which the pixel 110 has subpixels 11R, subpixels 11G, and subpixels 11B. The plurality of subpixels are arranged in a matrix on the display unit. Figure 1A shows subpixels in 2 rows and 6 columns, and these constitute a pixel 110 in 2 rows and 2 columns. The connection unit 140 can also be called a cathode contact unit.

[0056] The top surface shape of the subpixel shown in Figure 1A corresponds to the top surface shape of the light-emitting region.

[0057] Examples of the top surface shape of a sub-pixel include polygons such as triangles, quadrilaterals (including rectangles and squares), pentagons, polygons with rounded corners, ellipses, or circles.

[0058] The circuit layout constituting the subpixel is not limited to the subpixel range shown in Figure 1A, but can be arranged outside of it. For example, the transistors in subpixel 11R can be located within the range of subpixel 11G shown in Figure 1A, and some or all of them can be located outside the range of subpixel 11R.

[0059] In Figure 1A, the areas of the light-emitting regions of sub-pixels 11R, 11G, and 11B are shown to be equal or approximately equal, and their aperture ratios are shown to be equal or approximately equal; however, one aspect of the present invention is not limited thereto. The aperture ratios of sub-pixels 11R, 11G, and 11B can each be determined as appropriate. The aperture ratios of sub-pixels 11R, 11G, and 11B can each be configured to be different. Alternatively, two or more of sub-pixels 11R, 11G, and 11B can be configured to be equal or approximately equal.

[0060] A stripe array is applied to the pixel 110 shown in Figure 1A. The pixel 110 shown in Figure 1A is composed of three subpixels: subpixel 11R, subpixel 11G, and subpixel 11B. Subpixels 11R, 11G, and 11B each have light-emitting devices with different emission colors. Examples of subpixels 11R, 11G, and 11B include subpixels of three colors: red (R), green (G), and blue (B); and subpixels of three colors: yellow (Y), cyan (C), and magenta (M). Furthermore, the number of subpixel types is not limited to three, but can be four or more. Examples of four subpixels include subpixels of four colors: R, G, B, and white (W); subpixels of four colors: R, G, B, and Y; and subpixels of four colors: R, G, B, and infrared (IR).

[0061] In this specification, the row direction is sometimes referred to as the X direction, and the column direction as the Y direction. The X and Y directions intersect, for example, perpendicularly (see Figure 1A). Figure 1A shows an example where subpixels of different colors are arranged in the X direction, and subpixels of the same color are arranged in the Y direction.

[0062] Figure 1A shows an example where the connecting portion 140 is located on one side of the display portion in a top view (also called a plan view), but it is not particularly limited. The connecting portion 140 can be provided at least one location on the top, right, left, or bottom of the display portion in a top view, and can, for example, be provided so as to surround all four sides of the display portion. The top shape of the connecting portion 140 can be a strip, L-shape, U-shape, or frame shape, etc. Also, there can be one or more connecting portions 140.

[0063] [Configuration Example 1] Figure 1B shows a cross-sectional view between the dashed line X1 and X2 shown in Figure 1A. Figure 2 shows an enlarged view of a part of the cross-sectional view shown in Figure 1B, specifically the region including the light-emitting device 130R.

[0064] In Figure 1B, the display device 100 includes light-emitting devices 130R, 130G, and 130B. Light-emitting device 130R is a display element of sub-pixel 11R, light-emitting device 130G is a display element of sub-pixel 11G, and light-emitting device 130B is a display element of sub-pixel 11B. For example, light-emitting device 130R emits red (R) light, light-emitting device 130G emits green (G) light, and light-emitting device 130B emits blue (B) light.

[0065] Layers 107R, 107G, and 107B are provided on layer 101. A light-emitting device 130R is provided on layer 107R, a light-emitting device 130G is provided on layer 107G, and a light-emitting device 130B is provided on layer 107B. A protective layer 131 is provided so as to cover the light-emitting devices 130R, 130G, and 130B. A substrate 120 is bonded to the protective layer 131 by a resin layer 122. It is preferable that layers 107R, 107G, and 107B have an island-like shape or a convex shape.

[0066] Layer 101 has one or more transistors, capacitive elements, and wiring. Details of layer 101 will be described later.

[0067] The light-emitting device 130R includes a pixel electrode 111R on layer 107R, a pixel electrode 199R on pixel electrode 111R, an island-shaped layer 113R on pixel electrode 199R, a common layer 114 on layer 113R, and a common electrode 115 on the common layer 114. The pixel electrode 111R and the pixel electrode 199R are, for example, conductive layers.

[0068] The light-emitting device 130G includes a pixel electrode 111G on layer 107G, a pixel electrode 199G on pixel electrode 111G, an island-shaped layer 113G on pixel electrode 199G, a common layer 114 on layer 113G, and a common electrode 115 on the common layer 114. The pixel electrode 111G and the pixel electrode 199G are, for example, conductive layers.

[0069] The light-emitting device 130B includes a pixel electrode 111B on layer 107B, a pixel electrode 199B on pixel electrode 111B, an island-shaped layer 113B on pixel electrode 199B, a common layer 114 on layer 113B, and a common electrode 115 on the common layer 114. The pixel electrode 111B and the pixel electrode 199B are, for example, conductive layers.

[0070] For example, a highly reflective conductive layer can be used as the pixel electrode 199R, pixel electrode 199G, and pixel electrode 199B. Furthermore, a highly conductive layer can be used as the pixel electrode 111R, pixel electrode 111G, and pixel electrode 111B.

[0071] In a light-emitting device, one electrode functions as the anode and the other as the cathode. In the following explanation, we may use the example where the pixel electrode functions as the anode and the common electrode functions as the cathode.

[0072] In addition, in the stacked structure of pixel electrode 111R and pixel electrode 199R, pixel electrode 199R may mainly function as the anode, and pixel electrode 111R may mainly function as a conductive layer to enhance conductivity. Furthermore, in the stacked structure of pixel electrode 111G and pixel electrode 199G, pixel electrode 199G may mainly function as the anode, and pixel electrode 111G may mainly function as a conductive layer to enhance conductivity. Furthermore, in the stacked structure of pixel electrode 111B and pixel electrode 199B, pixel electrode 199B may mainly function as the anode, and pixel electrode 111B may mainly function as a conductive layer to enhance conductivity.

[0073] In the light-emitting device 130R, the pixel electrode 199R is provided so as to cover a portion of the side surface from the top surface of layer 107R. This suppresses variations in electrode width during etching when forming the pixel electrode 199R, thereby improving the quality of the display device. The variations in electrode width and their suppression will be described later in Figures 3A and 3B. Similarly, in the light-emitting device 130G, the pixel electrode 199G has a portion that is provided along the side surface of layer 107G. This suppresses side etching when forming the pixel electrode 199G, thereby improving the quality of the display device. Similarly, in the light-emitting device 130B, the pixel electrode 199B has a portion that is provided along the side surface of layer 107B. This suppresses side etching when forming the pixel electrode 199B, thereby improving the quality of the display device.

[0074] In the light-emitting device 130R, layer 113R and the common layer 114 can be collectively referred to as the EL layer. Similarly, in the light-emitting device 130G, layer 113G and the common layer 114 can be collectively referred to as the EL layer. Furthermore, in the light-emitting device 130B, layer 113B and the common layer 114 can be collectively referred to as the EL layer.

[0075] In this specification, among the EL layers of a light-emitting device, layers provided in an island-like manner for each light-emitting device are referred to as layer 113R, layer 113G, or layer 113B, and layers shared by multiple light-emitting devices are referred to as common layer 114. In this specification, the common layer 114 may also be omitted, and layers 113R, 113G, and 113B may be referred to as island-like EL layers or island-shaped EL layers.

[0076] Layers 113R, 113G, and 113B are separated from each other. By providing the EL layers in an island-like configuration for each light-emitting device, leakage current between adjacent light-emitting devices can be suppressed. This prevents unintended light emission caused by crosstalk, enabling the realization of a display device with extremely high contrast. In particular, it enables the realization of a display device with high current efficiency at low brightness levels.

[0077] Layer 109 is provided on layer 101. Layer 109 has a portion located between light-emitting device 130R and light-emitting device 130G, a portion located between light-emitting device 130G and light-emitting device 130B, and a portion located between light-emitting device 130B and light-emitting device 130R.

[0078] Between light-emitting device 130R and light-emitting device 130G, layer 109 is located between layer 107R, pixel electrode 111R and pixel electrode 199R, and between layer 107G, pixel electrode 111G and pixel electrode 199R. Also, between light-emitting device 130G and light-emitting device 130B, layer 109 is located between layer 107G, pixel electrode 111G and pixel electrode 199G, and between layer 107B, pixel electrode 111B and pixel electrode 199B. Also, between light-emitting device 130B and light-emitting device 130R, layer 109 is located between layer 107B, pixel electrode 111B and pixel electrode 199B, and between layer 107R, pixel electrode 111R and pixel electrode 199R.

[0079] It is preferable to use an insulating layer as layer 109. Layer 109 has the function of suppressing leakage current between pixel electrodes between adjacent light-emitting devices. Furthermore, by embedding layer 109 in the area on layer 101 where layers 107R, 107G, and 107B are not provided, the difference between the upper surface of the pixel electrodes formed on layers 107R, 107G, and 107B and the upper surface of layer 109 can be reduced. By providing layer 109, the unevenness of the surface to which layers are formed above the pixel electrodes can be reduced. Therefore, the coverage of layers to which are formed above the pixel electrodes can be improved. Improved coverage prevents, for example, the common electrode 115 from being cut or thinned due to large unevenness on the surface to which it is formed.

[0080] Layer 113R has a portion located on the pixel electrode 199R and a portion located on layer 109. Layer 113G has a portion located on the pixel electrode 199 and a portion located on layer 109. Layer 113B has a portion located on the pixel electrode 199 and a portion located on layer 109.

[0081] On layer 107R, pixel electrodes 111R and 199R are provided in order; on layer 107G, pixel electrodes 111G and 199G are provided in order; and on layer 107B, pixel electrodes 111G and 199B are provided in order.

[0082] The pixel electrode 111R has a portion located on layer 107R, a portion covering the side surface of layer 107R, and a portion covering the upper surface of layer 101. The pixel electrode 111R also has a portion located on layer 101, with its upper surface covered by layer 109. The pixel electrode 199R has a portion located on layer 107R with the pixel electrode 111R in between, and a portion facing the side surface of layer 107R with the pixel electrode 111R in between.

[0083] The pixel electrode 111G has a portion located on layer 107G, a portion covering the side surface of layer 107G, and a portion covering the upper surface of layer 101. The pixel electrode 111G also has a portion located on layer 101, with its upper surface covered by layer 109. The pixel electrode 199G has a portion located on layer 107G with the pixel electrode 111G in between, and a portion facing the side surface of layer 107G with the pixel electrode 111G in between.

[0084] The pixel electrode 111B has a portion located on layer 107B, a portion covering the side surface of layer 107B, and a portion covering the upper surface of layer 101. The pixel electrode 111B also has a portion located on layer 101, with its upper surface covered by layer 109. The pixel electrode 199B has a portion located on layer 107B with the pixel electrode 111B in between, and a portion facing the side surface of layer 107B with the pixel electrode 111B in between.

[0085] By processing the conductive film by etching, pixel electrodes 199R, 199G, and 199B can be formed.

[0086] Next, using Figures 3A and 3B, we will describe configurations with and without layer 107R.

[0087] Figure 3A shows an example in which the display device does not have a layer 107R, and the pixel electrode 199R is formed using a mask MSK_a.

[0088] Figure 3A shows the state of the pixel electrode 199R after etching. The ends of the pixel electrode 199R are located inward from the left and right ends of the mask MSK_a, respectively. During the etching process of the pixel electrode 199R, as shown by the arrows in Figure 3A, the ends of the pixel electrode 199R may be etched inward from the ends of the mask MSK_a. This type of etching that proceeds laterally is called side etching. In wet etching, etching tends to proceed isotropically, and side etching can occur during the formation of the pixel electrode 199R.

[0089] When side etching occurs, the width Wa of the pixel electrode 199R changes depending on the amount of etching that progresses laterally during side etching, resulting in variations in the width Wa.

[0090] As shown in Figure 3B, by providing layer 107R, variations in the width Wa of the pixel electrode 199R due to side etching can be reduced. In the configuration of Figure 3B, if etching continues after etching has progressed laterally due to side etching, etching will proceed upward in the portion formed along the side surface of layer 107R, as shown by the arrow in Figure 3B. When etching proceeds upward, the width Wa of the pixel electrode 199R does not depend on the amount of etching. Therefore, variations in width Wa can be reduced.

[0091] As etching progresses upward during the formation of the pixel electrode 199R, the height of the lower end of the pixel electrode 199R is higher than the lower surface of layer 107R. The pixel electrode 199R covers part of the side surface of layer 107R, from the upper surface to the lower surface of layer 107R. The end of the pixel electrode 199R is located between the upper and lower surfaces (or the formation surface) of layer 107R. It can also be expressed as being located between the height of the upper surface and the height of the lower surface (or the height of the formation surface) of layer 107R.

[0092] Furthermore, if etching during the formation of the pixel electrode 199R progresses not only to the region along the side surface of layer 107 but also to the region along the upper surface of layer 107R, then, as in Figure 3A, variations in the width Wa due to etching will occur. Therefore, it is preferable that the height of the lower end of the pixel electrode 199R be lower than the upper surface of layer 107R.

[0093] As shown in Figure 2, height H107 is the height from the top surface of layer 101 to the top surface of layer 107R, and height H199B is the height from the top surface of layer 101 to the bottom end of pixel electrode 199R. It is preferable that height H199B is lower than height H107. On the side surface of layer 107R, pixel electrode 199R covers an area higher than height H199B and does not cover an area lower than height H199B.

[0094] In Figure 2, it can also be said that the height H107 is the thickness of layer 107R. The height H107 is, for example, 50 nm or more, preferably 100 nm or more, more preferably 200 nm or more, and even more preferably 500 nm or more.

[0095] In the above description relating to Figures 2, 3A, and 3B, the descriptions relating to pixel electrode 199R, pixel electrode 111R, and layer 107R can be replaced with pixel electrode 199G, pixel electrode 111G, and layer 107G, or pixel electrode 199B, pixel electrode 111B, and layer 107B.

[0096] The stacked structures of pixel electrode 111R and pixel electrode 199R, the stacked structures of pixel electrode 111G and pixel electrode 199G, and the stacked structures of pixel electrode 111B and pixel electrode 199B can function as lower electrodes of a light-emitting device.

[0097] Alternatively, in the stacked structure of pixel electrode 111R and pixel electrode 199R, only pixel electrode 199R may be referred to as the lower electrode. Also, in the stacked structure of pixel electrode 111G and pixel electrode 199G, only pixel electrode 199G may be referred to as the lower electrode. Furthermore, in the stacked structure of pixel electrode 111B and pixel electrode 199B, only pixel electrode 199B may be referred to as the lower electrode.

[0098] Furthermore, the common electrode 115 can function as the upper electrode of the light-emitting device. It is preferable to use a light-transmitting conductive film for the electrode that extracts light, and a light-reflecting conductive film for the electrode that does not extract light. Examples of light emitted by the light-emitting device include visible light and infrared light.

[0099] Furthermore, a light-transmitting conductive film can also be used on the electrode that does not extract light. For example, in the light-emitting device shown in Figure 1B, if the lower electrode is made of a light-reflecting conductive film and the upper electrode is made of a light-transmitting conductive film, a light-transmitting conductive film can also be placed between the lower electrode and the EL layer. This allows the lower electrode to function as a semi-transparent and semi-reflective film.

[0100] In the configuration example shown in Figure 4A, the light-emitting device 130R has a conductive layer 135R between the pixel electrode 199R and layer 113R, the light-emitting device 130G has a conductive layer 135G between the pixel electrode 199G and layer 113G, and the light-emitting device 130B has a conductive layer 135B between the pixel electrode 199B and layer 113B. For example, the stacked structures of pixel electrode 111R and pixel electrode 199R, the stacked structures of pixel electrode 111G and pixel electrode 199G, and the stacked structures of pixel electrode 111B and pixel electrode 199B can be configured to reflect light, while the conductive layer 135R, conductive layer 135G, conductive layer 135B and common electrode 115 can be configured to transmit light. An enlarged view of a part of the cross-sectional view shown in Figure 4A is shown in Figure 4B.

[0101] Layer 113R has a portion located on the conductive layer 135R and a portion located on layer 109. Layer 113G has a portion located on the conductive layer 135G and a portion located on layer 109. Layer 113B has a portion located on the conductive layer 135B and a portion located on layer 109.

[0102] Between the light-emitting device 130R and light-emitting device 130G, layer 109 is located between layer 107R, pixel electrode 111R, pixel electrode 199R and conductive layer 135R, and between layer 107G, pixel electrode 111G, pixel electrode 199R and conductive layer 135G. Also, between the light-emitting device 130G and light-emitting device 130B, layer 109 is located between layer 107G, pixel electrode 111G, pixel electrode 199G and conductive layer 135G, and between layer 107B, pixel electrode 111B, pixel electrode 199B and conductive layer 135G. Also, between the light-emitting device 130B and light-emitting device 130R, layer 109 is located between layer 107B, pixel electrode 111B, pixel electrode 199B and conductive layer 135B, and between layer 107R, pixel electrode 111R, pixel electrode 199R and conductive layer 135R.

[0103] The conductive layer 135R has a portion located on layer 107R with the pixel electrode 111R and the pixel electrode 199R in between, and a portion facing the side surface of layer 107R with the pixel electrode 199R in between. The conductive layer 135R also covers the upper surface of the pixel electrode 199R and the side surface at the lower end. It can also be said that the conductive layer 135R is wrapped by the pixel electrode 111R. The conductive layer 135R can function as a protective film for the pixel electrode 199R. Specifically, for example, if a material that is not easily oxidized is used for the conductive layer 135R and a material that is relatively easily oxidized is used for the pixel electrode 199R, oxidation of the pixel electrode 199R can be suppressed in the etching process during the processing of layer 109 and layer 113R.

[0104] The conductive layer 135G has a portion located on layer 107G with the pixel electrodes 111G and 199G in between, and a portion facing the side surface of layer 107G with the pixel electrodes 111G and 199G in between. The conductive layer 135G also covers the upper surface of the pixel electrode 199G and the side surface at its lower end. It can also be said that the conductive layer 135G is wrapped by the pixel electrode 111G. The conductive layer 135G can function as a protective film for the pixel electrode 199G.

[0105] The conductive layer 135B has a portion located on layer 107B with the pixel electrodes 111B and 199B in between, and a portion facing the side surface of layer 107B with the pixel electrodes 111B and 199B in between. The conductive layer 135B also covers the upper surface of the pixel electrode 199B and the side surface at its lower end. It can also be said that the conductive layer 135B is wrapped by the pixel electrode 111B. The conductive layer 135B can function as a protective film for the pixel electrode 199B.

[0106] In this specification, when describing matters common to pixel electrodes 111R, 111G, and 111B, they may be referred to as pixel electrode 111. Similarly, when describing matters common to pixel electrodes 199R, 199G, and 199B, they may be referred to as pixel electrode 199. Furthermore, when describing matters common to layers 107R, 107G, and 107B, they may be referred to as layer 107. Similarly, when describing matters common to layers 113R, 113G, and 113B, they may be referred to as layer 113. In addition, for other components distinguished by letters, when describing matters common to them, symbols without letters may be used.

[0107] In Figures 1B, 4A, etc., when the stacked structure composed of pixel electrode 111 and pixel electrode 199 functions as a reflective electrode, for example, the pixel electrode 199 can be configured to have a conductive layer with high reflectivity. In that case, by configuring the pixel electrode 111 to have a conductive layer with high conductivity, a pixel electrode with both high reflectivity and high conductivity can be realized.

[0108] Furthermore, for example, when forming the pixel electrode 199 using wet etching, it may be possible to further increase the resolution of the display device by using a material that can be processed using anisotropic dry etching, which is suitable for microfabrication, as the pixel electrode 111.

[0109] In Figure 4A, layer 109 is located between layer 107R, pixel electrode 111R, pixel electrode 199R and conductive layer 135R, and between layer 107G, pixel electrode 111G, pixel electrode 199R and conductive layer 135G. Layer 109 is also located between layer 107G, pixel electrode 111G, pixel electrode 199G and conductive layer 135G, and between layer 107B, pixel electrode 111B, pixel electrode 199B and conductive layer 135B. Furthermore, layer 109 is located between light-emitting devices 130B and 130R, between layer 107B, pixel electrode 111B, pixel electrode 199B and conductive layer 135B, and between layer 107R, pixel electrode 111R, pixel electrode 199R and conductive layer 135R.

[0110] The pixel electrode 199R covers the upper surface of layer 107 and a portion of the side surface of layer 107R. The end of the pixel electrode 199R is located between the upper and lower surfaces (or forming surface) of layer 107R.

[0111] In Figure 4B, the pixel electrode 111R is in contact with the upper and side surfaces of layer 107R, and the pixel electrode 199R is in contact with the upper and a portion of the side surfaces of pixel electrode 111R. Here, the side surface of pixel electrode 111R that is in contact with pixel electrode 199R refers to the region of pixel electrode 111R that covers the side surface of layer 107R.

[0112] In Figure 4B, the pixel electrode 199R covers the region on the side surface of layer 107R that is higher than the height H199B, but does not cover the region that is lower than the height H199B. The pixel electrode 111R covers both the region on the side surface of layer 107R that is higher than the height H199B and the region that is lower than the height H199B.

[0113] The conductive layer placed between the pixel electrode 199 and layer 113 may be located on layer 109. In Figures 8A and 8B, which will be described later, conductive layer 137 is shown as a conductive layer placed between the pixel electrode 199 and layer 113 and located on layer 109.

[0114] An insulating layer can be suitably used as layer 109. It is preferable that layer 109 is not provided on the pixel electrode. Therefore, it is preferable that the height of the upper surface of layer 109 is lower than the height of the upper surface of the pixel electrode on layer 107, or, if a conductive layer 135 is provided on the pixel electrode, lower than the height of the upper surface of the conductive layer 135 on layer 107.

[0115] The height H109 shown in Figure 2 is the height from the top surface of layer 101 to the top surface of layer 109. The height H199T is the height from the top surface of layer 101 to the top surface of the pixel electrode 199 on layer 107. It is preferable that the height H109 is lower than the height H199T.

[0116] The height H135 shown in Figure 4 is the height from the top surface of layer 101 to the top surface of the conductive layer 135 on layer 107. It is preferable that the height H109 is lower than the height H135.

[0117] The conductivity of layer 107 is not particularly limited and can be, for example, an insulating layer, a semiconductor layer, or a conductive layer. One or more inorganic and organic materials can be used for layer 107. In particular, organic materials can be preferably used for layer 107.

[0118] It is preferable to use a photosensitive resin as the organic material. Suitable organic materials include acrylic resins, polyimide resins, epoxy resins, imide resins, polyamide resins, polyimidoamide resins, silicone resins, siloxane resins, benzocyclobutene resins, phenolic resins, and precursors of these resins. Alternatively, organic materials such as polyvinyl alcohol (PVA), polyvinyl butyral, polyvinylpyrrolidone, polyethylene glycol, polyglycerin, pullulan, water-soluble cellulose, or alcohol-soluble polyamide resins can be used. Furthermore, a photoresist can be used as the photosensitive resin. Positive or negative photosensitive resins can be used. In this specification, the term "acrylic resin" may refer not only to polymethacrylate esters or methacrylic resins, but also to acrylic polymers in a broad sense.

[0119] As layer 107, an insulating layer having an organic material can be suitably used. It is preferable to use a photosensitive resin as the organic material. For example, a photosensitive resin composition containing polyimide resin, acrylic resin, etc., can be used, and polyimide resin can be particularly suitably used.

[0120] Furthermore, either or both of an organic insulating layer and an inorganic insulating layer can be used as layer 109. Layer 109 can have a single-layer structure or a laminated structure.

[0121] As organic materials, the organic materials listed in layer 107 can be used. As inorganic materials, for example, oxides, nitrides, oxidized nitrides, and nitride oxides can be used. As oxides, for example, silicon oxide, aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, tantalum oxide, cerium oxide, zinc gallium oxide, and hafnium aluminate can be used. As nitrides, for example, silicon nitride and aluminum nitride can be used. As oxidized nitrides, for example, silicon oxidized nitride, aluminum oxidized nitride, gallium oxidized nitride, yttrium oxidized nitride, and hafnium oxidized nitride can be used. As nitride oxides, for example, silicon nitride and aluminum nitride can be used.

[0122] In this specification, the term "oxidogenic nitride" refers to a material whose composition contains more oxygen than nitrogen. The term "nitride oxide" refers to a material whose composition contains more nitrogen than oxygen.

[0123] An organic material can be used as the insulating layer 127. For example, the organic materials listed for layer 107 can be used.

[0124] An insulating layer 125 and an insulating layer 127 on the insulating layer 125 are provided in the region between adjacent light-emitting devices. In cross-sectional views such as Figure 1B, multiple insulating layers 125 and insulating layers 127 are shown, but when the display device 100 is viewed from above, the insulating layers 125 and insulating layers 127 are connected as one unit. In other words, the display device can be configured to have one insulating layer 125 and one insulating layer 127. The display device can also be configured to have multiple insulating layers 125 that are separated from each other, and multiple insulating layers 127 that are separated from each other.

[0125] As shown in Figure 1B, the insulating layers 125 and 127 cover both a portion of the upper surface and the sides of layers 113R, 113G, and 113B, thereby further preventing delamination of the EL layer and improving the reliability of the light-emitting device. Furthermore, it is possible to increase the manufacturing yield of the light-emitting device.

[0126] By using an inorganic insulating film as the insulating layer 125, it can have functions such as a barrier insulating layer against impurities.

[0127] The insulating layer 127 is provided on the insulating layer 125 so as to fill the recesses formed in the insulating layer 125. For example, an insulating layer having an organic material can be used as the insulating layer 127. The insulating layer 127 can be configured to overlap a portion of the upper surface and side surfaces of layers 113R, 113G, and 113B via the insulating layer 125. Preferably, the insulating layer 127 covers at least a portion of the side surfaces of the insulating layer 125.

[0128] By providing insulating layers 125 and 127, the gaps between adjacent island-shaped layers can be filled, thereby reducing the large height differences and irregularities on the formed surface of layers (e.g., carrier injection layers and common electrodes) on the island-shaped layers, making it flatter. Consequently, the coverage of the carrier injection layers and common electrodes can be improved.

[0129] The insulating layer 127, provided on the insulating layer 125, has the function of flattening the large height differences and irregularities in the insulating layer 125 formed between adjacent light-emitting devices. In other words, the presence of the insulating layer 127 has the effect of improving the flatness of the surface forming the common electrode 115.

[0130] Mask layers 118R, 118G, and 118B are formed by retaining a portion of the mask layer that was provided during the formation of layers 113R, 113G, and 113B, respectively. A display device according to one aspect of the present invention can be configured such that a portion of the mask layer used to protect the EL layer remains during its manufacture.

[0131] [Configuration Example 2] In the configuration shown in Configuration Example 1, a further conductive layer may be provided, which is a conductive layer for connecting to the transistor, capacitive element, or wiring provided on layer 101.

[0132] In the configurations shown in Figures 1B and 4A, a conductive layer can be provided between layer 101 and layer 107. Furthermore, it is preferable that this conductive layer be connected to a transistor, capacitive element, or wiring provided on layer 101.

[0133] The configuration shown in Figure 5A includes conductive layers 105R, 105G, and 105B in addition to the configuration shown in Figure 4A. Layer 101 also includes a substrate 103, an insulating layer 104 on the substrate 103, conductive layers 250R, 250G, 250B, plugs 256R, 256G, and 256B.

[0134] When layer 107 has an island-like shape, it is preferable that the conductive layer 105R has a portion that protrudes outward from layer 107R. For example, in a plan view, the conductive layer 105R has a portion that is located outside the periphery of layer 107R. In a plan view, it is preferable that layer 107R is enclosed within the conductive layer 105R.

[0135] When layer 107 has an island-like shape, it is preferable that the conductive layer 105G has a portion that protrudes outward from layer 107G. For example, in a plan view, the conductive layer 105G has a portion that is located outside the periphery of layer 107G. In a plan view, it is preferable that layer 107G is enclosed within the conductive layer 105G.

[0136] When layer 107 has an island-like shape, it is preferable that the conductive layer 105B has a portion that protrudes outward from layer 107B. For example, in a plan view, the conductive layer 105B has a portion that is located outside the periphery of layer 107B. In a plan view, it is preferable that layer 107B is enclosed within the conductive layer 105B.

[0137] Layer 101 has one or more transistors, capacitive elements, and wiring. Layer 101 can be provided with pixel circuits that control the driving of light-emitting devices 130R, 130G, and 130B. Light-emitting devices 130R, 130G, and 130B are each electrically connected to one or more transistors, capacitive elements, and wiring of layer 101. In Figure 5A, conductive layers 250R, 250G, and 250B are provided on the substrate 103. Conductive layers 250R, 250G, and 250B correspond to the electrodes of the transistors, electrodes of the capacitive elements, or wiring, respectively. An insulating layer 104 is provided on conductive layers 250R, 250G, and 250B.

[0138] The plug 256R is located on the conductive layer 250R and is provided so as to be embedded in the insulating layer 104. Preferably, the plug 256R is provided so as to be in contact with the upper surface of the conductive layer 250R. The conductive layer 105R is located on layer 101. Preferably, the conductive layer 105R is provided so as to be in contact with the plug 256R. The conductive layer 250R and the conductive layer 105R are electrically connected via the plug 256R.

[0139] The plug 256G is located on the conductive layer 250G and is provided so as to be embedded in the insulating layer 104. Preferably, the plug 256G is provided so as to be in contact with the upper surface of the conductive layer 250G. The conductive layer 105G is located on layer 101. Preferably, the conductive layer 105G is provided so as to be in contact with the plug 256G. The conductive layer 250G and the conductive layer 105G are electrically connected via the plug 256G.

[0140] The plug 256B is located on the conductive layer 250B and is provided so as to be embedded in the insulating layer 104. Preferably, the plug 256B is provided so as to be in contact with the upper surface of the conductive layer 250B. The conductive layer 105B is located on layer 101. Preferably, the conductive layer 105B is provided so as to be in contact with the plug 256B. The conductive layer 250B and the conductive layer 105B are electrically connected via the plug 256B.

[0141] A layer 107R is provided on the conductive layer 105R, and a pixel electrode 111R is provided on the layer 107R. Layer 107R has a region that is in contact with the upper surface of the conductive layer 105R. The pixel electrode 111R has a region that is in contact with the upper and side surfaces of layer 107R, as well as the upper surface of the conductive layer 105R. The pixel electrode 111R is electrically connected to the conductive layer 105R.

[0142] A layer 107G is provided on the conductive layer 105G, and a pixel electrode 111G is provided on the layer 107G. Layer 107G has a region that is in contact with the upper surface of the conductive layer 105G. The pixel electrode 111G has a region that is in contact with the upper and side surfaces of layer 107G, as well as the upper surface of the conductive layer 105G. The pixel electrode 111G is electrically connected to the conductive layer 105G.

[0143] A layer 107B is provided on the conductive layer 105B, and a pixel electrode 111B is provided on the layer 107B. Layer 107B has a region that is in contact with the upper surface of the conductive layer 105B. The pixel electrode 111B has a region that is in contact with the upper and side surfaces of layer 107B, as well as the upper surface of the conductive layer 105B. The pixel electrode 111B is also electrically connected to the conductive layer 105B.

[0144] This configuration allows the conductive layer 250 and the plug 256 connecting the conductive layer 250 to the conductive layer above it to be placed in overlapping position with the pixel electrode 199, which functions as the lower electrode of the light-emitting device. As a result, the light-emitting area of ​​the light-emitting device can be widened, and the aperture ratio of the sub-pixels can be increased. Furthermore, the resolution of the display device can be improved.

[0145] Figure 5B differs from Figure 5A mainly in that the display device does not have plugs 256R, 256G, and 256B, and the configuration of conductive layers 105R, 105G, and 105B is different. A magnified view of a part of the cross-sectional view shown in Figure 5B is shown in Figure 6.

[0146] The insulating layer 104 has an opening 257R that reaches the conductive layer 250R, an opening 257G that reaches the conductive layer 250G, and another opening 257G that reaches the conductive layer 250G.

[0147] The conductive layer 105R is provided so as to cover the opening 257R. The conductive layer 105R is in contact with the conductive layer 250R at the opening 257R and is electrically connected to the conductive layer 250R. The conductive layer 105G is provided so as to cover the opening 257G. The conductive layer 105G is in contact with the conductive layer 250G at the opening 257G and is electrically connected to the conductive layer 250G. The conductive layer 105B is provided so as to cover the opening 257B. The conductive layer 105B is in contact with the conductive layer 250B at the opening 257B and is electrically connected to the conductive layer 250B.

[0148] A recess is formed in the conductive layer 105R so as to cover the opening 257R. This recess is filled with layer 107R. Similarly, a recess is formed in the conductive layer 105G so as to cover the opening 257G. This recess is filled with layer 107G. A recess is formed in the conductive layer 105B so as to cover the opening 257B. This recess is filled with layer 107B.

[0149] The height H135 shown in Figure 6 is the height from the top surface of layer 101 to the top surface of the pixel electrode 199 on layer 107, and it is preferable that the height H109 is lower than the height H135. By making the height H109 lower than the height H135, the conductive layer 135 takes on a shape in which a portion protrudes from layer 109, and layers such as layer 113 formed on the conductive layer 135 can cover not only the top surface of the conductive layer 135 but also the sides of the protrusion, thereby improving coverage. Furthermore, layer 109 can be formed, for example, by forming a planarization film that will become layer 109, and then isotropically etching or polishing the film without using a mask or the like to remove the film from the conductive layer 135. At this time, by making the height of the top surface of layer 109 slightly lower than the height of the top surface of the portion of the conductive layer 135 located on layer 107, it is possible to prevent the film from remaining on the conductive layer 135.

[0150] In Figures 5A, 5B, etc., the end of the pixel electrode 111R can coincide with or roughly coincide with the end of the conductive layer 105R, the end of the pixel electrode 111G can coincide with or roughly coincide with the end of the conductive layer 105G, and the end of the pixel electrode 111B can coincide with or roughly coincide with the end of the conductive layer 105B. For example, when the pixel electrode 111 and the conductive layer 105 are processed using the same mask, their ends may coincide or roughly coincide. By processing using the same mask, the process can be simplified.

[0151] Furthermore, the edges of conductive layers 105R, 105G, and 105B may not coincide with the edges of pixel electrodes 111R, 111G, and 111B. By having them not coincide, for example, a step is created between the conductive layer 105 and the pixel electrode, which increases the contact area with the layer 109 provided between the light-emitting devices 130, and may improve the adhesion of the layer 109.

[0152] For example, when forming conductive layers and pixel electrodes using different masks, the edges may not align. Furthermore, as will be discussed later, depending on the etching method and conditions, the edges of the electrodes and conductive layers may not align even when using the same mask. By optimizing the etching methods and conditions for the pixel electrodes and conductive layers, the selectivity for etching with other films can be increased. Damage caused by the etching process can also be reduced.

[0153] Here, an example of a cross-sectional view between the dashed line Y1 and Y2 in Figure 1A is shown in Figure 5C.

[0154] As shown in Figure 5C, an opening 257p is provided in the insulating layer 104 that reaches the conductive layer 250p. The conductive layer 250p can be formed in the same process as, for example, conductive layer 250R, conductive layer 250G, and conductive layer 250B. A conductive layer 105p is provided so as to cover the opening 257p, a conductive layer 123 is provided on the conductive layer 105p, a conductive layer 199p is provided on the conductive layer 123, a conductive layer 135p is provided on the conductive layer 199p, and a common electrode 115 is provided on the conductive layer 135p. A layer 107p is provided between the conductive layer 105p and the conductive layer 123. Preferably, the connection portion 140 has a region in which the conductive layer 105p, conductive layer 123, conductive layer 135p, and common electrode 115 overlap in this order without any other layer (for example, layer 107p) in between. By increasing the area in which these conductive layers are in contact with each other, the electrical resistance of the connection portion 140 can be reduced. Layers 107p, 105p, 123, 199p, and 135p can be formed in the same process as layers 107R, 105R, 111R, 199R, and 135R.

[0155] Although Figure 5C shows an example where a common layer 114 is not provided between the conductive layer 135p and the common electrode 115, a common layer 114 may be provided.

[0156] Figure 7A shows an example in which the conductive layer placed between the pixel electrode 199 and layer 113 has a different structure from the conductive layer 135 shown in Figures 4A to 6. Specifically, the conductive layer placed between the pixel electrode 199 and layer 113 has a portion located on layer 109.

[0157] In the display device shown in Figure 7A, the light-emitting device 130R has a conductive layer 137R between the pixel electrode 199R and layer 113R, the light-emitting device 130G has a conductive layer 137G between the pixel electrode 199G and layer 113G, and the light-emitting device 130B has a conductive layer 137B between the pixel electrode 199B and layer 113B. For example, the stacked structures of pixel electrode 111R and pixel electrode 199R, the stacked structures of pixel electrode 111G and pixel electrode 199G, and the stacked structures of pixel electrode 111B and pixel electrode 199B can be configured to reflect light, while the conductive layer 137R, conductive layer 137G, conductive layer 137B and the common electrode 115 can be configured to transmit light. An enlarged view of a part of the cross-sectional view shown in Figure 7A is shown in Figure 7B.

[0158] The conductive layer 137R has a portion located on the pixel electrode 199R and a portion located on layer 109. Layer 113R is located on the conductive layer 137R. The conductive layer 137G has a portion located on the pixel electrode 199G and a portion located on layer 109. Layer 113G is located on the conductive layer 137G. The conductive layer 137B has a portion located on the pixel electrode 199B and a portion located on layer 109. Layer 113B is located on the conductive layer 137B.

[0159] The height H109 shown in Figure 7B is the height from the top surface of layer 101 to the top surface of layer 109. The height H199T is the height from the top surface of layer 101 to the top surface of the pixel electrode 199 on layer 107. It is preferable that the height H109 is lower than the height H199T.

[0160] Figure 8A also shows an example in which conductive layer 135 and conductive layer 137 are arranged sequentially between the pixel electrode 199 and layer 113.

[0161] In Figure 8A, the light-emitting device 130R includes a pixel electrode 111R on layer 107, a pixel electrode 199 on the pixel electrode 111R, a conductive layer 135 on the pixel electrode 199, a conductive layer 137 on the conductive layer 135, a layer 113R on the conductive layer 137, a common layer 114 on the layer 113R, and a common electrode 115 on the common layer 114. The light-emitting device 130G also includes a pixel electrode 111G on layer 107, a pixel electrode 199 on the pixel electrode 111G, a conductive layer 135 on the pixel electrode 199, a conductive layer 137 on the conductive layer 135, a layer 113G on the conductive layer 137, a common layer 114 on the layer 113G, and a common electrode 115 on the common layer 114. The light-emitting device 130B includes a pixel electrode 111B on layer 107, a pixel electrode 199 on pixel electrode 111B, a conductive layer 135 on pixel electrode 199, a conductive layer 137 on conductive layer 135, a layer 113B on conductive layer 137, a common layer 114 on layer 113B, and a common electrode 115 on common layer 114. Figure 8B shows an enlarged view of a part of the cross-sectional view shown in Figure 8A.

[0162] As the pixel electrodes 111, 199, conductive layer 135, conductive layer 137, and common electrode 115, which function as a pair of electrodes in the light-emitting device, metals, alloys, electrically conductive compounds, and mixtures thereof can be used as appropriate.

[0163] Examples of metals and alloys include aluminum, magnesium, titanium, chromium, manganese, iron, cobalt, nickel, copper, gallium, zinc, indium, tin, molybdenum, tantalum, tungsten, palladium, gold, platinum, silver, yttrium, neodymium, and alloys containing these metals in appropriate combinations. More specifically, examples of alloys include aluminum alloys such as aluminum, nickel, and lanthanum alloys (Al-Ni-La alloys), as well as silver alloys of silver and magnesium, and silver alloys such as silver, palladium, and copper alloys (Ag-Pd-Cu alloys, also written as APC).

[0164] Furthermore, elements belonging to Group 1 or Group 2 of the periodic table not exemplified above (for example, lithium, cesium, calcium, strontium), rare earth metals such as europium and ytterbium, and alloys containing these in appropriate combinations can also be used.

[0165] Examples of electrically conductive compounds include nitrides of metals or alloys, and oxides of metals or alloys (specifically, for example, oxide conductors described later).

[0166] Furthermore, examples of electrically conductive compounds include silicides such as nickel silicide.

[0167] Graphene may also be used as the electrode for the light-emitting device.

[0168] Preferably, at least one of the pixel electrode 199 and the pixel electrode 111 has a conductive layer with high reflectivity, and in particular, the pixel electrode 199 is preferably a conductive layer with high reflectivity. For example, a metal or alloy can be used as the conductive layer with high reflectivity. More specifically, for example, metals such as silver, aluminum, gold, platinum, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, palladium, and titanium, or alloys containing these metals, can be used.

[0169] A silver-containing alloy can be used as the pixel electrode 199. Silver-containing alloys have a high reflectivity for visible light, which can suitably improve the light extraction efficiency of the light-emitting device. It is particularly preferable to use an alloy of silver (Ag), palladium (Pd), and copper (Cu) (Ag-Pd-Cu alloy (APC)) as the pixel electrode 199.

[0170] Furthermore, the pixel electrode 199 is made of a material that can be processed using, for example, wet etching.

[0171] Furthermore, a highly reflective conductive layer may be used as the pixel electrode 111. The pixel electrode 111 and the conductive layer 105 preferably function as wiring, and it is preferable that they have a highly conductive layer. By using materials that can be processed using dry etching for the pixel electrode 111 and the conductive layer 105, miniaturization of the wiring can be achieved.

[0172] Aluminum has high reflectivity and can be suitably used as the pixel electrode 199 and the pixel electrode 111. Furthermore, due to its high conductivity, it can also be suitably used as the conductive layer 105.

[0173] On the other hand, aluminum can undergo galvanic corrosion when it comes into contact with metal or alloy oxides. Therefore, galvanic corrosion can be suppressed by forming a conductive layer of titanium, titanium nitride, or the like on the aluminum.

[0174] When aluminum is used as the pixel electrode 199, pixel electrode 111, or conductive layer 105, it is preferable to have a laminated structure with a conductive layer such as titanium or titanium nitride on top of the aluminum layer. For example, a three-layer laminated structure of titanium, aluminum on titanium, and titanium on aluminum may be used. For the pixel electrode 111 and conductive layer 105, for example, the metals, metal nitrides, alloys, etc. mentioned above can be used as appropriate. For example, titanium, tungsten, tantalum, aluminum, molybdenum, titanium nitride, tantalum nitride, etc. can be used. It is also possible to laminate two or more of these conductive layers. For the pixel electrode 111, it is preferable that the etching selectivity ratio is sufficiently high, that is, the etching rate is sufficiently low, under the etching conditions of the pixel electrode 199. When an Ag-Pd-Cu alloy is used as the pixel electrode 199, for example, by using titanium, tungsten, etc. as the uppermost layer of the pixel electrode 111, it can function as an etching stopper that suppresses etching of the underlying conductive layer.

[0175] For example, conductive layers having the function of transmitting light can be used as conductive layer 135, conductive layer 137, and common electrode 115. An oxide conductor can be used as the conductive layer having the function of transmitting light.

[0176] Examples of oxide conductors include indium oxide, zinc oxide, In-Sn oxide, In-Zn oxide, In-W oxide, In-W-Zn oxide, In-Ti oxide, In-Ti-Sn oxide, In-Sn-Si oxide (also called silicon-containing In-Sn oxide), zinc oxide with gallium added, In-Ga-Zn oxide, and In-Sn-Zn oxide. Since oxide conductors are resistant to oxidation, they can function as oxidation-suppressing layers by covering easily oxidized conductive layers. Specifically, for example, when an easily oxidized conductive layer is used as the pixel electrode 199, providing an oxide conductor to cover the pixel electrode 199 allows the oxide conductor to suppress the oxidation of the pixel electrode 199.

[0177] [Configuration Example 3] The display device shown in Figure 9A has a different shape for the conductive layer 105R than that shown in Figure 8B, etc.

[0178] In the etching process that forms layer 107, the exposed portion of the conductive layer 105 may be etched. In such cases, as shown in Figure 9A, for example, the thickness of the conductive layer 105 becomes thinner in the portion outside the portion covered by layer 107, resulting in a step. For example, in the portion SS enclosed by the dashed line in Figure 9A, a step is present in the conductive layer 105.

[0179] To reduce the step height, for example, the etching rate of the conductive layer 105 can be made sufficiently lower than the etching rate of layer 107 in the etching conditions for layer 107.

[0180] Furthermore, when a laminated structure is used as the conductive layer 105, a conductive layer that functions as an etching stopper can also be used, as shown in Figure 9B. The configuration shown in Figure 9B shows an example in which the conductive layer 105 has a laminated structure of three layers. In Figure 9B, the conductive layer 105R has a conductive layer 105Ra, a conductive layer 105Rb on the conductive layer 105Ra, and a conductive layer 105Rc on the conductive layer 105Rb.

[0181] Even if the conductive layer 105c is made of a material that is easily etched during the etching of layer 107, by using a material for the conductive layer 105Rb that has a sufficiently low etching rate compared to that of layer 107, it is possible to create a configuration in which the conductive layer 105Rb remains sufficiently thick.

[0182] [Configuration Example 4] When the display device has a conductive layer 105, the pixel electrodes 111 can be omitted. The display devices shown in Figures 10A and 10B differ from those in Figures 5B and 6 mainly in that they do not have pixel electrodes 111.

[0183] In Figure 10A, the light-emitting device 130R includes a pixel electrode 199 on layer 107, a conductive layer 135R on the pixel electrode 199, a layer 113R on the conductive layer 135R, a common layer 114 on layer 113R, and a common electrode 115 on the common layer 114. The light-emitting device 130G also includes a pixel electrode 199G on layer 107, a conductive layer 135G on the pixel electrode 199G, a layer 113G on the conductive layer 135G, a common layer 114 on layer 113G, and a common electrode 115 on the common layer 114. The light-emitting device 130B includes a pixel electrode 199B on layer 107, a conductive layer 135B on the pixel electrode 199B, a layer 113B on the conductive layer 135B, a common layer 114 on layer 113B, and a common electrode 115 on the common layer 114. Figure 10B shows an enlarged view of a portion of the cross-sectional view shown in Figure 10A.

[0184] In the configurations shown in Figures 10A and 10B, since there is no pixel electrode 111, the manufacturing process can be simplified. Furthermore, in the configurations shown in Figures 5B and 6, by using a material with excellent conductivity as the pixel electrode 111, the conductivity between the region in contact with the layer 113 at the lower electrode and the conductive layer 105 can be increased. In contrast, in the configurations shown in Figures 10A and 10B, the conductive layer 135 is in direct contact with the conductive layer 105, and can be considered to play a part in the role of the pixel electrode 111. It is preferable that the conductive layer 135R and the region on the upper surface of the conductive layer 105R that is not covered by layer 107 are in contact. It is also preferable that the conductive layer 135G and the region on the upper surface of the conductive layer 105G that is not covered by layer 107 are in contact. Furthermore, it is preferable that the conductive layer 135B and the region on the upper surface of the conductive layer 105B that is not covered by layer 107 are in contact.

[0185] [Shape of electrodes and conductive layers] The edges of the conductive layer 105, the pixel electrode 111, and the conductive layer 135 do not need to be aligned on their sides. Alternatively, the edges of the conductive layer 105, the pixel electrode 111, and the conductive layer 135 may be aligned or roughly aligned on their sides.

[0186] Figures 8A and 8B, shown above, illustrate an example where the edges of the conductive layer 105 and the pixel electrode 111 are aligned, and the side surface of the end of the conductive layer 135 is located inward from the side surface of the pixel electrode 111. However, the side surface of the end of the conductive layer 105 may be located inward from the other side surfaces. Alternatively, the side surface of the end of the pixel electrode 111 may be located inward from the other side surfaces.

[0187] Furthermore, the conductive layer 105, the pixel electrode 111, and the side surfaces of the ends of the conductive layer 135 may have a tapered shape.

[0188] Figures 33A to 34B show examples of various shapes of the conductive layer 105, the pixel electrode 111, and the edges of the conductive layer 135.

[0189] Figure 33A shows an example where the sides of the edges of the conductive layer 105, the pixel electrode 111, and the conductive layer 135 are aligned.

[0190] Figure 33B also shows an example in which the conductive layer 105, the pixel electrode 111, and the side surfaces of the ends of the conductive layer 135 have a tapered shape.

[0191] Figure 34A also shows an example where the side surface of the end of the pixel electrode 111 is located inward from the side surface of the end of the conductive layer 135 and the side surface of the end of the conductive layer 105. Although Figure 34A shows an example where each side surface has a tapered shape, one or more of the side surfaces of the conductive layer 105, the pixel electrode 111, and the conductive layer 135 may have a vertical shape.

[0192] Figure 34B also shows an example where the side surface of the end of the conductive layer 105 is located inward from the side surface of the end of the conductive layer 135 and the side surface of the end of the pixel electrode 111. Figure 34A shows an example where each side surface has a tapered shape, but one or more of the side surfaces of the conductive layer 105, the pixel electrode 111, and the conductive layer 135 may have a vertical shape.

[0193] [Characteristics of the components of the display device] A display device according to one aspect of the present invention can be a top-emission type that emits light in the direction opposite to the substrate on which the light-emitting device is formed, a bottom-emission type that emits light toward the substrate on which the light-emitting device is formed, or a dual-emission type that emits light on both sides.

[0194] Light-emitting device 130R emits red (R) light, light-emitting device 130G emits green (G) light, and light-emitting device 130B emits blue (B) light.

[0195] As the light-emitting device, it is preferable to use, for example, an OLED (Organic Light Emitting Diode) or a QLED (Quantum-dot Light Emitting Diode). Examples of light-emitting materials for the light-emitting device include fluorescent materials, phosphorescent materials, thermally activated delayed fluorescence (TADF) materials, and inorganic compounds (quantum dot materials, etc.). In addition, LEDs such as microLEDs (Light Emitting Diodes) can also be used as the light-emitting device.

[0196] The light-emitting device can emit light in the following colors: infrared, red, green, blue, cyan, magenta, yellow, or white. Furthermore, the color purity can be improved by adding a microcavity structure to the light-emitting device.

[0197] In Figure 1B and other figures, there is no insulating layer (also called a partition, bank, or spacer) covering the upper edge of the pixel electrode 111R between the pixel electrode 111R and layer 113R. Similarly, there is no insulating layer covering the upper edge of the pixel electrode 111G between the pixel electrode 111G and layer 113G. As a result, the spacing between adjacent light-emitting devices can be made extremely narrow. Consequently, a high-definition or high-resolution display device can be produced. Furthermore, a mask for forming the insulating layer becomes unnecessary, reducing the manufacturing cost of the display device.

[0198] By omitting an insulating layer covering the edges of the pixel electrodes between the pixel electrodes and the EL layer, in other words, by omitting an insulating layer between the pixel electrodes and the EL layer, light emission from the EL layer can be efficiently extracted. Therefore, a display device according to one aspect of the present invention can have extremely low viewing angle dependence. By reducing viewing angle dependence, the visibility of images in the display device can be improved. For example, in a display device according to one aspect of the present invention, the viewing angle (the maximum angle at which a constant contrast ratio is maintained when viewing the screen from an oblique direction) can be set to a range of 100° or more and less than 180°, preferably 150° or more and 170° or less. The above viewing angle can be applied to both vertical and horizontal viewing angles.

[0199] The light-emitting device of this embodiment can be a single structure (a structure having only one light-emitting unit) or a tandem structure (a structure having multiple light-emitting units). The light-emitting unit has at least one light-emitting layer.

[0200] Layers 113R, 113G, and 113B each have at least an emissive layer. Layer 113R has an emissive layer that emits red light, layer 113G has an emissive layer that emits green light, and layer 113B has an emissive layer that emits blue light. In other words, layer 113R has an emissive material that emits red light, layer 113G has an emissive material that emits green light, and layer 113B has an emissive material that emits blue light.

[0201] When using a tandem light-emitting device, it is preferable that layer 113R has a structure having multiple light-emitting units that emit red light, layer 113G has a structure having multiple light-emitting units that emit green light, and layer 113B has a structure having multiple light-emitting units that emit blue light. It is preferable to provide a charge generation layer between each light-emitting unit.

[0202] Each of layers 113R, 113G, and 113B may each have one or more of the following: a hole injection layer, a hole transport layer, a hole blocking layer, a charge generation layer, an electron blocking layer, an electron transport layer, and an electron injection layer.

[0203] For example, layers 113R, 113G, and 113B may each have a hole injection layer, a hole transport layer, an emissive layer, and an electron transport layer in that order. An electron blocking layer may also be present between the hole transport layer and the emissive layer. Furthermore, a hole blocking layer may be present between the electron transport layer and the emissive layer. Additionally, an electron injection layer may be present on the electron transport layer.

[0204] For example, layers 113R, 113G, and 113B may each have an electron injection layer, an electron transport layer, an emissive layer, and a hole transport layer in that order. Alternatively, a hole blocking layer may be present between the electron transport layer and the emissive layer. Furthermore, an electron blocking layer may be present between the hole transport layer and the emissive layer. Additionally, a hole injection layer may be present on the hole transport layer.

[0205] Thus, it is preferable that each of layers 113R, 113G, and 113B has an emissive layer and a carrier transport layer (electron transport layer or hole transport layer) on the emissive layer. Alternatively, it is preferable that each of layers 113R, 113G, and 113B has an emissive layer and a carrier block layer (hole block layer or electron block layer) on the emissive layer. Alternatively, it is preferable that each of layers 113R, 113G, and 113B has an emissive layer, a carrier block layer on the emissive layer, and a carrier transport layer on the carrier block layer. Since the surfaces of layers 113R, 113G, and 113B are exposed during the manufacturing process of the display device, by providing one or both of the carrier transport layer and the carrier block layer on the emissive layer, it is possible to suppress the exposure of the emissive layer to the outermost surface and reduce damage to the emissive layer. This can improve the reliability of the light-emitting device.

[0206] The heat resistance temperature of the compounds contained in layers 113R, 113G, and 113B is preferably 100°C to 180°C, preferably 120°C to 180°C, and more preferably 140°C to 180°C. For example, the glass transition temperature (Tg) of these compounds is preferably 100°C to 180°C, preferably 120°C to 180°C, and more preferably 140°C to 180°C.

[0207] In particular, it is preferable that the heat resistance temperature of the functional layer provided on the light-emitting layer is high. Furthermore, it is even more preferable that the heat resistance temperature of the functional layer provided in contact with the light-emitting layer is high. The high heat resistance of the functional layer makes it possible to effectively protect the light-emitting layer and reduce the damage to the light-emitting layer.

[0208] It is preferable that the heat-resistant temperature of the light-emitting layer be high. This helps to prevent damage to the light-emitting layer due to heat, which can reduce luminous efficiency and shorten its lifespan.

[0209] The light-emitting layer comprises a light-emitting substance (also called a light-emitting material, light-emitting compound, guest material, etc.) and an organic compound (also called a host material, etc.). Since the light-emitting layer contains more organic compounds than light-emitting substances, the glass transition temperature (Tg) of the organic compound can be used as an indicator of the heat resistance temperature of the light-emitting layer.

[0210] Layers 113R, 113G, and 113B may, for example, include a first light-emitting unit, a charge-generating layer on the first light-emitting unit, and a second light-emitting unit on the charge-generating layer.

[0211] The second light-emitting unit preferably has a light-emitting layer and a carrier transport layer (electron transport layer or hole transport layer) on the light-emitting layer. Alternatively, the second light-emitting unit preferably has a light-emitting layer and a carrier block layer (hole block layer or electron block layer) on the light-emitting layer. Alternatively, the second light-emitting unit preferably has a light-emitting layer, a carrier block layer on the light-emitting layer, and a carrier transport layer on the carrier block layer. Since the surface of the second light-emitting unit is exposed during the manufacturing process of the display device, by providing one or both of the carrier transport layer and the carrier block layer on the light-emitting layer, it is possible to suppress the exposure of the light-emitting layer to the outermost surface and reduce damage to the light-emitting layer. This can improve the reliability of the light-emitting device. When there are three or more light-emitting units, it is preferable that the light-emitting unit provided in the uppermost layer has a light-emitting layer and one or both of the carrier transport layer and the carrier block layer on the light-emitting layer.

[0212] The common layer 114 may have, for example, an electron injection layer or a hole injection layer. Alternatively, the common layer 114 may have an electron transport layer and an electron injection layer laminated together, or a hole transport layer and a hole injection layer laminated together. The common layer 114 is shared by the light-emitting device 130R, light-emitting device 130G, and light-emitting device 130B.

[0213] The island-like layers 113R, 113G, and 113B can be formed, for example, by photolithography without using a fine metal mask. A film to become layer 113R can be formed, and this film can be processed by photolithography to form the island-like layer 113R. The same applies to layers 113G and 113B. This makes it possible to form layers 113R, 113G, and 113B of a fine size, resulting in a high-resolution display device. As a display device according to one aspect of the present invention, for example, the resolution can be 2000 ppi or more, preferably 3000 ppi or more, more preferably 5000 ppi or more, and even more preferably 6000 ppi or more, and can be 20000 ppi or less, or 30000 ppi or less.

[0214] When using a fine metal mask, it is difficult to reduce the spacing between adjacent light-emitting devices to less than 10 μm. However, by using photolithography, in a process on a glass substrate, the spacing between adjacent light-emitting devices, adjacent EL layers, or adjacent pixel electrodes can be reduced to less than 10 μm, 5 μm or less, 3 μm or less, 2 μm or less, 1.5 μm or less, 1 μm or less, or 0.5 μm or less. Furthermore, by using an exposure system for LSIs, for example, in a process on a Si wafer, the spacing between adjacent light-emitting devices, adjacent EL layers, or adjacent pixel electrodes can be reduced to, for example, 500 nm or less, 200 nm or less, 100 nm or less, or even 50 nm or less. This significantly reduces the area of ​​the non-emitting region that may exist between two light-emitting devices, making it possible to approach 100% aperture ratio. For example, in a display device according to one aspect of the present invention, the aperture ratio can be 40% or more, 50% or more, 60% or more, 70% or more, 80% or more, and even 90% or more, while achieving less than 100%.

[0215] Furthermore, increasing the aperture ratio of a display device can improve its reliability. More specifically, using an organic EL device, if the lifespan of a display device with an aperture ratio of 10% is used as a baseline, the lifespan of a display device with an aperture ratio of 20% (i.e., twice the aperture ratio of the baseline) is approximately 3.25 times longer, and the lifespan of a display device with an aperture ratio of 40% (i.e., four times the aperture ratio of the baseline) is approximately 10.6 times longer. Thus, as the aperture ratio is increased, the current density flowing through the organic EL device required to obtain the same display can be reduced, making it possible to improve the lifespan of the display device. In one embodiment of the present invention, since the aperture ratio can be increased, the display quality of the display device can be improved. Moreover, as the aperture ratio of the display device is increased, the reliability (especially the lifespan) of the display device is significantly improved, which is an excellent effect.

[0216] In Figure 1B, etc., a mask layer 118R is located on layer 113R of the light-emitting device 130R, a mask layer 118G is located on layer 113G of the light-emitting device 130G, and a mask layer 118B is located on layer 113B of the light-emitting device 130B. Mask layer 118B is a portion of the mask layer that remained after being provided in contact with the upper surface of layer 113B when layer 113B was processed. Similarly, mask layer 118G is a portion of the mask layer that remained after being provided when layer 113G was formed, and mask layer 118R is a portion of the mask layer that remained after being provided when layer 113R was formed. Thus, a display device according to one embodiment of the present invention can be configured such that a portion of the mask layer used to protect the EL layer remains after being manufactured. Two or all of mask layers 118R, 118G, and 118B can be made of the same material, or different materials can be used for each other. In the following, mask layer 118R, mask layer 118G, and mask layer 118B may be collectively referred to as mask layer 118.

[0217] One end of the mask layer 118R (the end opposite to the light-emitting region, the outer end) is aligned with or approximately aligned with the end of layer 113R, and the other end of the mask layer 118R is located on layer 113R. Here, it is preferable that the other end of the mask layer 118R (the end on the light-emitting region side, the inner end) overlaps with the region where layer 113R and the pixel electrode 111R are in contact. In this case, the other end of the mask layer 118R is more likely to be formed on the approximately flat surface of layer 113R. The same applies to mask layers 118G and 118B. Furthermore, the mask layer 118 remains between the upper surface of the island-shaped EL layer (layer 113R, layer 113G, or layer 113B) and the insulating layer 125. The mask layer will be described in detail in Embodiment 2.

[0218] Each side of layer 113R, layer 113G, and layer 113B is covered by the insulating layer 125. The insulating layer 127 overlaps with each side of layer 113R, layer 113G, and layer 113B via the insulating layer 125.

[0219] By covering a portion of the upper surface and sides of layers 113R, 113G, and 113B with at least one of the insulating layer 125, insulating layer 127, and mask layer 118, contact between the common layer 114 (or common electrode 115) and the sides of layers 113R, 113G, and 113B is suppressed, thereby preventing a short circuit in the light-emitting device. This improves the reliability of the light-emitting device.

[0220] Preferably, the EL layer has a first region which is a light-emitting region (also called a light-emitting area) and a second region located outside the first region. The second region can also be called a dummy region or dummy area. The first region is located between the pixel electrode and the common electrode. The first region is covered by the mask layer during the manufacturing process of the display device, and is therefore subjected to very little damage. Thus, a light-emitting device with high luminous efficiency and a long lifespan can be realized. On the other hand, the second region includes the edge of the EL layer and its vicinity, and may be damaged by exposure to plasma during the manufacturing process of the display device. By not using the second region as a light-emitting region, variations in the characteristics of the light-emitting device can be suppressed. In Figure 1B, for example, the portion located on layer 109 is included in the second region of the EL layer.

[0221] Here, a configuration for forming island-like layers 113R, 113G, and 113B using photolithography is shown, but the present invention is not limited to this. For example, island-like layers 113R, 113G, and 113B can also be formed using a fine metal mask.

[0222] In Figure 1B and other figures, layers 113R, 113G, and 113B are shown to have the same thickness, but the present invention is not limited to this. The thicknesses of layers 113R, 113G, and 113B can also be different. For example, it is preferable to set the thicknesses so that the optical path length is such that the light emitted by each of layers 113R, 113G, and 113B is intensified. This makes it possible to realize a microcavity structure and improve the color purity of each light-emitting device.

[0223] As the insulating layer 127, an insulating layer having an organic material can be suitably used. Preferably, a photosensitive resin is used as the organic material, and for example, a photosensitive resin composition containing an acrylic resin is preferred.

[0224] The insulating layer 127 can also be made of a material that absorbs visible light. By absorbing the light emitted from the light-emitting device, the insulating layer 127 can suppress light leakage from the light-emitting device to adjacent light-emitting devices through the insulating layer 127. This improves the display quality of the display device. Furthermore, since the display quality can be improved without using a polarizing plate in the display device, the display device can be made lighter and thinner.

[0225] The insulating layer 125 can be an insulating layer having an inorganic material. For example, inorganic insulating films such as oxide insulating films, nitride insulating films, oxidative nitride insulating films, and nitride oxide insulating films can be used for the insulating layer 125. The insulating layer 125 can have a single-layer structure or a multilayer structure. Examples of oxide insulating films include silicon oxide film, aluminum oxide film, magnesium oxide film, indium gallium zinc oxide film, gallium oxide film, germanium oxide film, yttrium oxide film, zirconium oxide film, lanthanum oxide film, neodymium oxide film, hafnium oxide film, and tantalum oxide film. Examples of nitride insulating films include silicon nitride film and aluminum nitride film. Examples of oxidative nitride insulating films include silicon oxidative nitride film and aluminum oxidative nitride film. Examples of nitride oxide insulating films include silicon nitride film and aluminum nitride film. In particular, aluminum oxide is preferred because it has a high selectivity ratio with the EL layer during etching and has the function of protecting the EL layer in the formation of the insulating layer 127 described later. In particular, by applying an inorganic insulating film such as an aluminum oxide film, a hafnium oxide film, or a silicon oxide film formed by atomic layer deposition (ALD) to the insulating layer 125, it is possible to form an insulating layer 125 with fewer pinholes and excellent protection for the EL layer. Alternatively, the insulating layer 125 may have a laminated structure of a film formed by the ALD method and a film formed by the sputtering method. For example, the insulating layer 125 can have a laminated structure of an aluminum oxide film formed by the ALD method and a silicon nitride film formed by the sputtering method.

[0226] Preferably, the insulating layer 125 functions as a barrier insulating layer against at least one of water and oxygen. Furthermore, preferably, the insulating layer 125 has the function of suppressing the diffusion of at least one of water and oxygen. Also, preferably, the insulating layer 125 has the function of capturing or fixing (also known as gettering) at least one of water and oxygen.

[0227] In this specification, a barrier insulating layer refers to an insulating layer having barrier properties. In this specification, barrier properties refer to a function that makes it difficult for the target substance to diffuse, thereby suppressing the permeation of the substance through the film (also referred to as low permeability). Alternatively, it refers to a function that captures or fixes the target substance (also referred to as gettering).

[0228] The insulating layer 125 has the function of a barrier insulating layer or a gettering function, thereby suppressing the intrusion of impurities (typically at least one of water and oxygen) that could diffuse from the outside into each light-emitting device. This configuration makes it possible to provide a highly reliable light-emitting device and, furthermore, a highly reliable display device.

[0229] The insulating layer 125 preferably has a low impurity concentration. This prevents impurities from mixing from the insulating layer 125 into the EL layer and degrading the EL layer. Furthermore, by lowering the impurity concentration in the insulating layer 125, the barrier properties against at least one of water and oxygen can be improved. For example, it is desirable that the insulating layer 125 has a sufficiently low hydrogen concentration and a sufficiently low carbon concentration, preferably both.

[0230] Furthermore, the same material can be used for the insulating layer 125 and the mask layers 118B, 118G, and 118R. In this case, the boundary between any of the mask layers 118B, 118G, and 118R and the insulating layer 125 may become unclear and indistinguishable. Therefore, the insulating layer 125 may be identified as a single layer with any of the mask layers 118B, 118G, and 118R. In other words, it may be observed that a single layer is provided in contact with a part of the upper surface and side surface of each of the layers 113R, 113G, and 113B, and that the insulating layer 127 covers at least a part of the side surface of the single layer.

[0231] The insulating layer 104 can have a single-layer structure or a multi-layer structure.

[0232] As the insulating layer 104, either an inorganic insulating layer or an organic insulating layer, or both, can be used. Examples of materials that can be used for the organic insulating layer include acrylic resin and polyimide resin. Examples of materials that can be used for the inorganic insulating layer include oxides, nitrides, oxidized nitrides, and nitride oxides. Examples of oxides include silicon oxide, aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, tantalum oxide, cerium oxide, zinc gallium oxide, and hafnium aluminate. Examples of nitrides include silicon nitride and aluminum nitride. Examples of oxidized nitrides include silicon oxidized nitride, aluminum oxidized nitride, gallium oxidized nitride, yttrium oxidized nitride, and hafnium oxidized nitride. Examples of nitride oxides include silicon nitride and aluminum nitride.

[0233] In this specification, the term "oxidogenic nitride" refers to a material whose composition contains more oxygen than nitrogen. The term "nitride oxide" refers to a material whose composition contains more nitrogen than oxygen.

[0234] The aforementioned metals, alloys, electrically conductive compounds, and mixtures thereof can be used as the conductive layer 105, conductive layer 257, conductive layer 250, and plug 256 as appropriate.

[0235] The insulating layer 125 is preferably in contact with the respective sides of layers 113R, 113G, and 113B. By configuring the insulating layer 125 to be in contact with layers 113R, 113G, and 113B, peeling of the layers 113R, 113G, and 113B can be prevented. The close contact between the insulating layer 125 and layers 113B, 113G, or 113R provides the effect of fixing or bonding adjacent layers 113B, etc., to the insulating layer 125. This can improve the reliability of the light-emitting device. It can also improve the manufacturing yield of the light-emitting device.

[0236] As shown in Figure 1B and other figures, the insulating layers 125 and 127 cover both a portion of the upper surface and the sides of layers 113R, 113G, and 113B, thereby further preventing delamination of the EL layer and improving the reliability of the light-emitting device. Furthermore, it is possible to increase the manufacturing yield of the light-emitting device.

[0237] The insulating layer 127 is provided on the insulating layer 125 so as to fill the recesses formed in the insulating layer 125. The insulating layer 127 can be configured to overlap a portion of the upper surface and side surfaces of layers 113R, 113G, and 113B, respectively, via the insulating layer 125. Preferably, the insulating layer 127 covers at least a portion of the side surfaces of the insulating layer 125.

[0238] By providing insulating layers 125 and 127, the gaps between adjacent island-shaped layers can be filled, thereby reducing the large height differences and irregularities on the formed surface of layers (e.g., carrier injection layers and common electrodes) on the island-shaped layers, making it flatter. Consequently, the coverage of the carrier injection layers and common electrodes can be improved.

[0239] The common layer 114 and the common electrode 115 are provided on layers 113R, 113G, 113B, mask layer 118, insulating layer 125, and insulating layer 127. Before the insulating layers 125 and 127 are provided, a step difference exists due to the region where the pixel electrode and island-shaped EL layer are provided and the region where the pixel electrode and island-shaped EL layer are not provided (the region between light-emitting devices). In one embodiment of the present invention, the presence of the insulating layers 125 and 127 can flatten this step difference and improve the coverage of the common layer 114 and the common electrode 115. Therefore, connection failures due to step breaks can be suppressed. In addition, it is possible to suppress the local thinning of the common electrode 115 due to the step difference, which would increase its electrical resistance.

[0240] The upper surface of the insulating layer 127 preferably has a shape that is more flat, but it can also have a configuration that includes convex portions, convex curved surfaces, concave curved surfaces, or recesses. For example, the upper surface of the insulating layer 127 preferably has a convex curved shape with a large radius of curvature that is highly flat.

[0241] A mask layer 118R is provided in contact with a portion of the upper surface of layer 113R, a mask layer 118G is provided in contact with a portion of the upper surface of layer 113G, and a mask layer 118B is provided in contact with a portion of the upper surface of layer 113B. An insulating layer 125 is provided in contact with the upper and side surfaces of mask layer 118R, the upper and side surfaces of mask layer 118G, the upper and side surfaces of mask layer 118B, and the upper surface of layer 109. An insulating layer 127 is provided in contact with the upper and side surfaces of insulating layer 125. Furthermore, the insulating layer 127 overlaps with a portion of the upper and side surfaces of layer 113R, a portion of the upper and side surfaces of layer 113G, and a portion of the upper and side surfaces of layer 113B via the insulating layer 125. A common layer 114 is provided covering layer 113R, mask layer 118R, layer 113G, mask layer 118G, layer 113B, mask layer 118B, insulating layer 125, and insulating layer 127, and a common electrode 115 is provided on the common layer 114.

[0242] The insulating layer 127 is formed in the region between the two island-shaped EL layers (for example, the region between layer 113R and layer 113G). At this time, at least a portion of the insulating layer 127 is located between adjacent EL layers. By providing the insulating layer 127, the coverage of the island-shaped EL layers and the common layer 114 and common electrode 115 formed on the insulating layer 127 is improved, thereby preventing the formation of divisions in these layers and localized areas of thinness.

[0243] In cross-sectional view, the upper surface of the insulating layer 127 is preferably a convex curved shape. The convex curved shape of the upper surface of the insulating layer 127 is preferably a shape that bulges gently towards the center. Furthermore, it is preferable that the convex curved portion in the central part of the upper surface of the insulating layer 127 is continuously connected toward the edges. By making the insulating layer 127 such a shape, the common layer 114 and the common electrode 115 can be formed on the entire insulating layer 127 with high coverage.

[0244] By providing insulating layers 127 and 125, the common layer 114 and common electrode 115 can be formed with high coverage. This prevents the formation of divided areas and locally thin areas in the common layer 114 and common electrode 115. Therefore, connection failures caused by divided areas and increases in electrical resistance caused by locally thin areas can be suppressed between each light-emitting device in the common layer 114 and common electrode 115. As a result, the display device according to one aspect of the present invention can improve display quality.

[0245] It is preferable that the light-emitting devices 130R, 130G, and 130B have a protective layer 131. Providing the protective layer 131 can improve the reliability of the light-emitting devices. The protective layer 131 can be a single layer or a multilayer structure.

[0246] The conductivity of the protective layer 131 is not required. At least one of an insulating film, a semiconductor film, and a conductive film can be used as the protective layer 131.

[0247] The presence of an inorganic film in the protective layer 131 prevents oxidation of the common electrode 115 and suppresses the intrusion of impurities (such as moisture and oxygen) into the light-emitting device, thereby suppressing degradation of the light-emitting device and improving the reliability of the display device.

[0248] For example, inorganic insulating films such as oxide insulating films, nitride insulating films, oxidoxide-nitriding insulating films, and nitride-oxide insulating films can be used for the protective layer 131. Specific examples of these inorganic insulating films are given in the description of the insulating layer 125. In particular, the protective layer 131 preferably has a nitride insulating film or a nitride-oxide insulating film, and more preferably a nitride insulating film.

[0249] The protective layer 131 may also be an inorganic film containing In-Sn oxide (ITO), In-Zn oxide, Ga-Zn oxide, Al-Zn oxide, or indium gallium zinc oxide (also known as In-Ga-Zn oxide, IGZO). The inorganic film is preferably highly resistive, and more specifically, it is preferably more resistive than the common electrode 115. The inorganic film may further contain nitrogen.

[0250] When the light emitted from a light-emitting device is extracted via a protective layer 131, it is preferable that the protective layer 131 has high transmittance to visible light. For example, ITO, IGZO, and aluminum oxide are preferred because they are inorganic materials with high transmittance to visible light.

[0251] As the protective layer 131, for example, a laminated structure of an aluminum oxide film and a silicon nitride film on the aluminum oxide film, or a laminated structure of an aluminum oxide film and an IGZO film on the aluminum oxide film can be used. By using such a laminated structure, it is possible to suppress the penetration of impurities (water, oxygen, etc.) into the EL layer.

[0252] Furthermore, the protective layer 131 may have an organic film. For example, the protective layer 131 may have both an organic film and an inorganic film. Examples of organic materials that can be used for the protective layer 131 include organic insulating materials that can be used for layers 107, 109, and the insulating layer 127.

[0253] The protective layer 131 may have a two-layer structure formed using different film deposition methods. Specifically, the first layer of the protective layer 131 may be formed using the ALD method, and the second layer of the protective layer 131 may be formed using the sputtering method.

[0254] A light-shielding layer may be provided on the surface of the substrate 120 facing the resin layer 122. Various optical components can also be placed on the outside of the substrate 120. Examples of optical components include polarizing plates, phase difference plates, light diffusion layers (such as diffusion films), anti-reflective layers, and light-collecting films. Furthermore, surface protection layers such as an antistatic film to suppress dust adhesion, a water-repellent film to prevent dirt from adhering, a hard coat film to suppress scratches during use, and an impact-absorbing layer may be placed on the outside of the substrate 120. For example, a glass layer or a silica layer (SiO₂) may be used as the surface protection layer. ｘ By providing a protective layer, surface contamination and scratching can be suppressed, which is preferable. Furthermore, DLC (diamond-like carbon), aluminum oxide (AlO2) can be used as the surface protective layer. ｘ), polyester-based materials, or polycarbonate-based materials may be used. It is preferable to use a material with high transmittance to visible light for the surface protective layer. Furthermore, it is preferable to use a material with high hardness for the surface protective layer.

[0255] The substrates 120 and 103 of the display device can be made of glass, quartz, ceramics, sapphire, resin, metal, alloy, semiconductor, or the like.

[0256] The substrate on the side that extracts light from the light-emitting device uses a material that transmits the light. Using a flexible substrate increases the flexibility of the display device, enabling a flexible display. Alternatively, a polarizing plate may be used as the substrate.

[0257] As substrates 120 and 103, polyester resins such as polyethylene terephthalate (PET) and polyethylene naphthalate (PEN), polyacrylonitrile resin, acrylic resin, polyimide resin, polymethyl methacrylate resin, polycarbonate (PC) resin, polyethersulfone (PES) resin, polyamide resin (nylon, aramid, etc.), polysiloxane resin, cycloolefin resin, polystyrene resin, polyamide-imide resin, polyurethane resin, polyvinyl chloride resin, polyvinylidene chloride resin, polypropylene resin, polytetrafluoroethylene (PTFE) resin, ABS resin, cellulose nanofiber, etc. may be used. Glass of a thickness sufficient to provide flexibility may also be used for substrate 120.

[0258] Furthermore, when a circular polarizing plate is superimposed on a display device, it is preferable to use a substrate with high optical isotropy for the substrate of the display device. A substrate with high optical isotropy has low birefringence (or a small amount of birefringence).

[0259] For substrates with high optical isotropy, the absolute value of the retardation (phase difference) is preferably 30 nm or less, more preferably 20 nm or less, and even more preferably 10 nm or less.

[0260] Examples of films with high optical isotropy include triacetylcellulose (TAC, also known as cellulose triacetate) film, cycloolefin polymer (COP) film, cycloolefin copolymer (COC) film, and acrylic film.

[0261] When a film is used as the substrate, the film may absorb water, which could cause changes in the shape of the display device, such as wrinkles. Therefore, it is preferable to use a film with a low water absorption rate as the substrate. For example, it is preferable to use a film with a water absorption rate of 1% or less, more preferable to use a film with a water absorption rate of 0.1% or less, and even more preferable to use a film with a water absorption rate of 0.01% or less.

[0262] Various types of curing adhesives can be used as the resin layer 122, including UV-curing adhesives, reaction-curing adhesives, thermosetting adhesives, and anaerobic adhesives. Examples of these adhesives include epoxy resins, acrylic resins, silicone resins, phenolic resins, polyimide resins, imide resins, PVC (polyvinyl chloride) resins, PVB (polyvinyl butyral) resins, and EVA (ethylene vinyl acetate) resins. Materials with low moisture permeability, such as epoxy resins, are particularly preferred. Two-component mixed resins may also be used. Adhesive sheets may also be used.

[0263] [Modification 1] In the configuration example described above, the display device is shown to have a layer 109, but it is also possible to have a configuration in which the display device does not have a layer 109.

[0264] The display device shown in Figure 11A differs from that in Figure 5B mainly in that it does not have layer 109. Also, the absence of layer 109 results in different shapes for layer 113, insulating layer 125, insulating layer 127, etc.

[0265] [Modification 2] In the configuration example described above, there is no insulating layer (also called a partition, bank, or spacer) covering the upper edge of the lower electrode between the lower electrode of the light-emitting device 130R and layer 113R. Similarly, there is no insulating layer covering the upper edge of the lower electrode between the lower electrode of the light-emitting device 130G and layer 113G, and there is no insulating layer covering the upper edge of the lower electrode between the lower electrode of the light-emitting device 130B and layer 113B.

[0266] The display device shown in Figure 11B has an insulating layer 129 that covers the upper end of the lower electrode of the light-emitting device. The insulating layer 129 has portions that cover the end of the conductive layer 105R, the end of the pixel electrode 111R, and the end of the conductive layer 135R, portions that cover the end of the conductive layer 105G, the end of the pixel electrode 111G, and the end of the conductive layer 135G, and portions that cover the end of the conductive layer 105B, the end of the pixel electrode 111B, and the end of the conductive layer 135B.

[0267] The insulating layer 129 covers the sides and top surfaces of the ends of the pixel electrode 111R, the ends of the pixel electrode 111G, the ends of the pixel electrode 111B, the ends of the conductive layer 135R, the ends of the conductive layer 135G, and the ends of the conductive layer 135B.

[0268] Each of layers 113R, 113G, and 113B has a portion located on the insulating layer 129.

[0269] [Modification 3] Figures 12A and 12B show an example of the configuration of conductive layers connecting the conductive layers 250R, 250G, and 250B of layer 101 to the light-emitting devices 130R, 130G, and 130B, in a case where the display device does not have conductive layers 105R, 105G, and 105B.

[0270] In Figure 12A, the conductive layer 250R and the pixel electrode 111R are electrically connected via the plug 256R. Also, the conductive layer 250G and the pixel electrode 111G are electrically connected via the plug 256G. The conductive layer 250B and the pixel electrode 111B are electrically connected via the plug 256R.

[0271] Plug 256R is provided so as to have a portion that does not overlap with layer 107R, and in that portion it contacts the pixel electrode 111R. Plug 256G is provided so as to have a portion that does not overlap with layer 107G, and in that portion it contacts the pixel electrode 111G. Plug 256B is provided so as to have a portion that does not overlap with layer 107B, and in that portion it contacts the pixel electrode 111B.

[0272] In Figure 12B, the pixel electrode 111R is positioned to cover the opening 257R. The pixel electrode 111G is positioned to cover the opening 257G. Furthermore, the pixel electrode 111B is positioned to cover the opening 257B.

[0273] In the insulating layer 104, the opening 257R is provided so as to have a portion that does not overlap with layer 107R. The opening 257G is provided so as to have a portion that does not overlap with layer 107G. The opening 257B is provided so as to have a portion that does not overlap with layer 107B.

[0274] [Manufacturing Method] Next, a method for manufacturing a display device according to one embodiment of the present invention will be described below. Note that descriptions of the materials and formation methods of each element may be omitted if they are the same as those described in Embodiment 1. Furthermore, the details of the configuration of the light-emitting device will be described in Embodiment 4.

[0275] An example of a method for manufacturing the display device shown in Figure 8A will be explained using Figures 13A to 18B.

[0276] Thin films (insulating films, semiconductor films, and conductive films, etc.) that constitute display devices can be formed using sputtering, chemical vapor deposition (CVD), vacuum deposition, pulsed laser deposition (PLD), atomic layer deposition (ALD), and other methods. CVD methods include plasma enhanced CVD (PECVD) and thermal CVD. One type of thermal CVD is metal-organic CVD (MOCVD).

[0277] Thin films (insulating films, semiconductor films, conductive films, etc.) that constitute a display device can be formed by wet film deposition methods such as spin coating, dip coating, spray coating, inkjet printing, dispensing, screen printing, offset printing, doctor knife method, slit coating, roll coating, curtain coating, or knife coating.

[0278] In particular, vacuum processes such as vapor deposition and solution processes such as spin coating and inkjet can be used to fabricate light-emitting devices. Examples of vapor deposition methods include physical vapor deposition (PVD) methods such as sputtering, ion plating, ion beam deposition, molecular beam deposition, and vacuum deposition, as well as chemical vapor deposition (CVD). Functional layers included in the EL layer (hole injection layer, hole transport layer, hole blocking layer, light-emitting layer, electron blocking layer, electron transport layer, electron injection layer, charge generation layer, etc.) can be formed by vapor deposition (vacuum deposition, etc.), coating methods (dip coating, die coating, bar coating, spin coating, spray coating, etc.), and printing methods (inkjet, screen printing, offset printing, flexographic printing, gravure, or microcontact printing, etc.).

[0279] When processing the thin films that constitute the display device, photolithography or similar methods can be used. Alternatively, thin films can be processed by nanoimprint lithography, sandblasting, lift-off methods, etc. Furthermore, island-shaped thin films can be directly formed using a film deposition method that utilizes a shielding mask such as a metal mask.

[0280] There are two main methods of photolithography. One method involves forming a resist mask on the thin film to be processed, then processing the thin film by etching or other means, and finally removing the resist mask. The other method involves forming a photosensitive thin film, then exposing and developing it to process the thin film into the desired shape.

[0281] In photolithography, the light used for exposure can be, for example, i-line (wavelength 365 nm), g-line (wavelength 436 nm), h-line (wavelength 405 nm), or a mixture thereof. Other light sources such as ultraviolet light, KrF laser light, or ArF laser light can also be used. Exposure can also be performed using immersion lithography. Furthermore, extreme ultraviolet (EUV) light or X-rays can be used as the light source for exposure. An electron beam can also be used instead of light for exposure. Using extreme ultraviolet light, X-rays, or an electron beam is preferable because it allows for extremely fine processing. Note that a photomask is not required when exposure is performed by scanning a beam such as an electron beam.

[0282] For etching thin films, methods such as dry etching, wet etching, and sandblasting can be used.

[0283] First, conductive films that will become conductive layers 250R, 250G, and 250B are formed on the substrate 103, and these are then processed to form conductive layers 250R, 250G, and 250B. Sputtering is preferably used to form these conductive films.

[0284] Next, an insulating film that will become an insulating layer 104 is formed on the substrate 103, conductive layer 250R, conductive layer 250G, and conductive layer 250B. The insulating film can preferably be formed using sputtering or PECVD. The insulating layer 104 is formed by creating openings 257R reaching the conductive layer 250R, openings 257G reaching the conductive layer 250G, and openings 257B reaching the conductive layer 250B in the insulating film.

[0285] Next, conductive films 105f, which will become conductive layers 105R, 105G, and 105B, are formed on the insulating layer 104, conductive layer 250R, conductive layer 250G, and conductive layer 250B. Sputtering can be suitably used to form the conductive films 105f.

[0286] Next, layers 107R, 107G, and 107B are formed on the conductive film 105f.

[0287] Next, a mask film, which will be the mask layer HM, is formed on the conductive film 105f and film 107f, and a resist mask MSK1 is formed on the mask film. The resist mask MSK1 is provided in the region where layers 107R, 107G, and 107B are provided.

[0288] Using the resist mask MSK1 as a mask, a mask film that will become the mask layer HM is processed to form the mask layer HM (Figure 13A).

[0289] Next, remove the resist mask MSK1.

[0290] Next, the mask layer HM is used as a mask to process the film 107f, forming layers 107R, 107G, and 107B. Then the mask layer HM is removed (Figure 13B).

[0291] The mask layer HM functions as a hard mask when forming layers 107R, 107G, and 107B. The conductivity of the mask layer HM is not particularly limited. It is preferable to use a material for the mask layer HM that has high resistance in the formation of layers 107R, 107G, and 107B, specifically a material with a high etching selectivity ratio with layers 107R, 107G, and 107B. For example, metals, metal oxides, etc., can be used for the mask layer HM.

[0292] Next, conductive film 111f, which will become pixel electrodes 111R, 111G, and 111B, is formed on conductive film 105f, layer 107R, layer 107G, and layer 107B. For the formation of conductive film 111f, sputtering or vacuum deposition can be suitably used, for example. Here, titanium is formed using the sputtering method. Alternatively, a three-layer laminated structure of titanium, aluminum on titanium, and titanium on aluminum may be used.

[0293] Next, a conductive film 199f is formed on the conductive film 111f. Various methods capable of forming thin films can be used to form the conductive film 199f. Here, for example, an Ag-Pd-Cu alloy is formed using the sputtering method.

[0294] Next, a resist mask MSK2 is formed on the conductive film 199f (Figure 13C).

[0295] Next, the conductive film 199f is processed using the resist mask MSK2 as a mask to form the pixel electrode 199R, pixel electrode 199G, and pixel electrode 199B (Figure 14A).

[0296] Wet etching can be used to process the conductive film 199f. In particular, when using an Ag-Pd-Cu alloy as the conductive film 199f, wet etching is preferable.

[0297] As previously mentioned in Figures 3A and 3B, in wet etching, etching tends to proceed isotropically, and in the processing of the conductive film 199f, etching may penetrate inward beyond the edge of the resist mask MSK2. In this case, the etching may remove a portion of the portion of the conductive film 199f that covers layers 107R, 107G, and 107B. In a method for manufacturing a display device according to one embodiment of the present invention, since the conductive film 199f has portions formed along the sides of layers 107R, 107G, and 107B, even if etching proceeds inward beyond the edge of the resist mask MSK2, variations in the electrode width of the pixel electrodes 199R, 199G, and 199B can be suppressed.

[0298] Next, remove the MSK2 resist mask.

[0299] Next, conductive films 135R, 135G, and 135B are formed on conductive films 105f, 111f, 199R, 199G, and 199B, respectively (Figure 14B).

[0300] Next, conductive films 135f, 111f, and 105f are processed to form conductive layers 135R, 135G, 135B, 111R, 111G, 111B, 105R, 105G, and 105B (Figure 14C). Dry etching is preferably used to form these conductive layers. Wet etching can also be used to form these conductive layers.

[0301] By processing the conductive film 135f, conductive film 111f, and conductive film 105f in the same process, the productivity of the display device can be increased and manufacturing costs can be reduced. Furthermore, the edges of the conductive layer 105R and the pixels 111R can be aligned or approximately aligned, the edges of the conductive layer 105G and the pixels 111G can be aligned or approximately aligned, and the edges of the conductive layer 105B and the pixels 111B can be aligned or approximately aligned. As an example, wet etching is used for processing the conductive film 135f, and highly anisotropic dry etching is used for etching the conductive films 111f and 105f.

[0302] Even when etching is performed using the same mask, the edges of the conductive layers may not coincide depending on the etching conditions. For example, when dry etching and wet etching are combined, the edges may not coincide. Also, when using wet etching, the sides of the edges may become tapered. Furthermore, even when using dry etching, depending on the etching conditions, the dimensions of the mask may decrease during the etching process (sometimes called mask recession), and the edges may be located inward.

[0303] Next, a film 109f, which will become layer 109, is formed on the insulating layer 104, conductive layer 135R, conductive layer 135G, conductive layer 135B, and conductive layer 135p (Figure 15A).

[0304] Next, a portion of the film 109f is removed to expose the conductive layer 135R, conductive layer 135G, and conductive layer 135B, thereby forming layer 109. Layer 109 can be formed using a dry etching method or a chemical mechanical polishing (CMP) method.

[0305] Next, conductive films 137f, which will become conductive layers 137R, 137G, and 137B, are formed on layer 109, conductive layer 135R, conductive layer 135G, and conductive layer 135B (Figure 15B).

[0306] Next, a film 113b and a mask film 118b are formed on the conductive film 137f (Figure 16A). Film 113b is a film that becomes layer 113B and contains a light-emitting material that emits blue light. A mask layer can also be formed by processing the mask film 118b. Layer 113B can then be processed using this mask layer.

[0307] As described above, in one embodiment of the present invention, a heat-resistant material is used for the light-emitting device. Specifically, the heat resistance temperature of the compounds contained in the film 113b is preferably 100°C to 180°C, preferably 120°C to 180°C, and more preferably 140°C to 180°C. This improves the reliability of the light-emitting device. It also allows for an increase in the upper limit of the temperature that can be applied during the manufacturing process of the display device. Therefore, the range of materials and forming methods used in the display device can be broadened, leading to improved manufacturing yield and reliability.

[0308] The film 113b can be formed, for example, by a vapor deposition method, specifically by a vacuum vapor deposition method. Alternatively, the film 113b can be formed by methods such as a transfer method, a printing method, an inkjet method, or a coating method.

[0309] The mask film can also have a laminated structure. Furthermore, when the mask film has a laminated structure, after forming the laminated structure of the mask layer using film 113b, some of the layers of the laminated structure, specifically one or more upper layers, may be removed.

[0310] By providing a mask layer on the film 113b, damage to the film 113b during the manufacturing process of the display device can be reduced, thereby improving the reliability of the light-emitting device.

[0311] The mask film 118b is a film that has high resistance to the processing conditions of film 113b, specifically a film that has a high etching selectivity ratio with film 113b.

[0312] The mask film 118b is formed at a temperature lower than the heat resistance temperature of film 113b. The substrate temperature when forming the mask film 118b is typically 200°C or lower, preferably 150°C or lower, more preferably 120°C or lower, more preferably 100°C or lower, and even more preferably 80°C or lower.

[0313] Examples of indicators for heat resistance temperature include the glass transition temperature (Tg), softening point, melting point, thermal decomposition temperature, and 5% weight loss temperature. For example, the glass transition temperature (Tg) of the material in each layer constituting the EL layer can be used as an indicator for heat resistance temperature. In the case of a mixed layer consisting of multiple materials, for example, the glass transition temperature of the most abundant material can be used. Alternatively, the lowest glass transition temperature among the multiple materials can be used.

[0314] As described above, in one embodiment of the present invention, a heat-resistant material is used for the light-emitting device. Therefore, the substrate temperature when forming the mask film can be set to 100°C or higher, 120°C or higher, or 140°C or higher. For example, the higher the deposition temperature of the inorganic insulating film, the denser and more barrier-oriented the film can be. Therefore, by forming the mask film at such a temperature, the damage to the film 113b can be further reduced, and the reliability of the light-emitting device can be improved.

[0315] It is preferable to use a mask film 118b that can be removed by a wet etching method. By using a wet etching method, the damage to the film 113b during processing of the mask film 118b can be reduced compared to when a dry etching method is used.

[0316] For the formation of the mask film 118b, for example, sputtering, ALD (including thermal ALD and PEALD), CVD, and vacuum deposition can be used. Alternatively, it can be formed using the wet film formation method described above.

[0317] For example, one or more of the following can be used as the mask film 118b: a metal film, an alloy film, a metal oxide film, a semiconductor film, an organic insulating film, and an inorganic insulating film.

[0318] For example, the mask film 118b can be made of a metallic material such as gold, silver, platinum, magnesium, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, palladium, titanium, aluminum, yttrium, zirconium, and tantalum, or an alloy material containing such a metallic material. In particular, it is preferable to use a low-melting-point material such as aluminum or silver. Using a metallic material capable of shielding ultraviolet rays for the mask film 118b is preferable because it can suppress the irradiation of the film 113b with ultraviolet rays, thereby suppressing the deterioration of the film 113b.

[0319] Using a metal film or alloy film for the mask film 118b is preferable because it can suppress plasma damage to the film 113b and thus suppress the degradation of the film 113b. Specifically, it is possible to suppress plasma damage to the film 113b in processes such as dry etching and ashing.

[0320] The mask film 118b can be made from metal oxides such as In-Ga-Zn oxide, indium oxide, In-Zn oxide, In-Sn oxide, indium titanium oxide (In-Ti oxide), indium tin zinc oxide (In-Sn-Zn oxide), indium titanium zinc oxide (In-Ti-Zn oxide), indium gallium tin zinc oxide (In-Ga-Sn-Zn oxide), or silicon-containing indium tin oxide.

[0321] In addition, element M (where M is one or more selected from aluminum, silicon, boron, yttrium, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium) can be used instead of gallium.

[0322] As the mask film, a film containing a material that has light-shielding properties against light, especially ultraviolet light, can be used. For example, a film that reflects ultraviolet light or a film that absorbs ultraviolet light can be used. Various materials can be used as the light-shielding material, such as metals, insulators, semiconductors, and metalloids that have light-shielding properties against ultraviolet light. However, since part or all of the mask film will be removed in a later process, it is preferable that the film be processable by etching, and in particular, that it has good processability.

[0323] For example, semiconductor materials such as silicon or germanium can be used as materials with high affinity to semiconductor manufacturing processes. Alternatively, oxides or nitrides of the above semiconductor materials can be used. Alternatively, nonmetallic materials such as carbon, or compounds thereof, can be used. Alternatively, metals such as titanium, tantalum, tungsten, chromium, and aluminum, or alloys containing one or more of these, can be used. Alternatively, oxides containing the above metals such as titanium oxide or chromium oxide, or nitrides such as titanium nitride, chromium nitride, or tantalum nitride can be used.

[0324] By using a mask film containing a material that has light-shielding properties against ultraviolet light, it is possible to suppress the irradiation of the EL layer with ultraviolet light during the exposure process. By suppressing damage to the EL layer from ultraviolet light, the reliability of the light-emitting device can be improved.

[0325] Furthermore, a film containing a material that has light-shielding properties against ultraviolet rays can be used as the material for the insulating film 125f described later to achieve the same effect.

[0326] Various inorganic insulating films that can be used for the protective layer 131 can be used as the mask film 118b. In particular, oxide insulating films are preferred because they have higher adhesion to the film 113b compared to nitride insulating films. For example, inorganic insulating materials such as aluminum oxide, hafnium oxide, and silicon oxide can be used for the mask film 118b. For example, an aluminum oxide film can be formed as the mask film 118b using the ALD method. Using the ALD method is preferable because it reduces damage to the substrate (especially the EL layer).

[0327] For example, the mask film 118b can have a two-layer structure, with an inorganic insulating film (e.g., an aluminum oxide film) formed using the ALD method for the lower layer, and an inorganic film (e.g., an In-Ga-Zn oxide film, a silicon film, or a tungsten film) formed using the sputtering method for the upper layer.

[0328] The mask film 118b may have the same inorganic insulating film as the insulating layer 125 that will be formed later.

[0329] Organic materials can be used for the mask film 118b. For example, as the organic material, a material that is soluble in a chemically stable solvent for the film located at least at the top of the film 113b can be used. Materials that are soluble in water or alcohol are particularly suitable. When forming such a film, it is preferable to apply the material by a wet film formation method while it is dissolved in a solvent such as water or alcohol, and then perform a heat treatment to evaporate the solvent. At this time, performing the heat treatment under a reduced pressure atmosphere is preferable because it allows the solvent to be removed at a low temperature and in a short time, thereby reducing thermal damage to the film 113b.

[0330] As the mask membrane 118b, a material with higher water solubility than the membrane 113b can be used. For example, a material that dissolves in an aqueous solution containing hydrofluoric acid (HF) can be used as the mask membrane 118b. Alternatively, a material that dissolves in an aqueous solution containing tetramethylammonium hydroxide (abbreviated as TMAH) can be used as the mask membrane 118b.

[0331] Specifically, tris(8-quinolinolato)aluminum(III) (abbreviation: Alq ３ ), bis(10-hydroxybenzo[h]quinolinato)beryllium(II) (abbreviation: BeBq) ２Metal complexes such as bis(2-methyl-8-quinolinolato)(4-phenylphenololato)aluminum(III) (abbreviated as BAlq), bis(8-quinolinolato)zinc(II) (abbreviated as Znq), bis[2-(2-benzoxazollyl)phenololato]zinc(II) (abbreviated as ZnPBO), and bis[2-(2-benzothiazolyl)phenololato]zinc(II) (abbreviated as ZnBTZ) can be used in the mask film 118b.

[0332] When the mask film 118b has a two-layer structure, it is preferable to use a water-soluble material for the lower layer and an inorganic film for the upper layer.

[0333] For example, as the lower layer of the mask film 118b, Alq ３ A film can be used, with an In-Ga-Zn oxide film, a silicon film, or a tungsten film as the upper layer.

[0334] Because the mask film 118b is made of a water-soluble material, even if the properties of the material change during the manufacturing process, for example, the mask film 118b can be removed from layer 113B to form the light-emitting device 130B. Furthermore, the mask film 118b that has been exposed to plasma or the like during the manufacturing process can be removed. In addition, the mask film 118b can mitigate the influence that plasma or the like has on components located on the layer 101 side of the mask film 118b during the manufacturing process. Furthermore, it can protect layer 113B from damage incurred during the manufacturing process. As a result, a novel display device with superior convenience, usefulness, and reliability can be provided.

[0335] The mask film 118b can be made of resins such as polyvinyl alcohol (PVA), polyvinyl butyral, polyvinylpyrrolidone, polyethylene glycol, polyglycerin, pullulan, water-soluble cellulose, alcohol-soluble polyamide resin, or fluororesin such as perfluoropolymer.

[0336] For example, an organic film (e.g., a PVA film) formed using either a vapor deposition method or the wet film formation method described above can be used as the lower layer of the mask film 118b, and an inorganic film (e.g., a silicon nitride film) formed using a sputtering method can be used as the upper layer.

[0337] In the display device according to one aspect of the present invention, a part of the mask film may remain as a mask layer.

[0338] Subsequently, the mask film 118b is processed to form a mask layer.

[0339] Here, a case where the mask film 118b has a two-layer structure of the mask film 118b_1 and the mask film 118b_2 on the mask film 118b_1 will be described. First, a resist mask MSK3 is formed on the mask film 118b (FIG. 16A). Then, the mask film 118b_2 is processed using the resist mask MSK3 to form a mask layer 118C. Then, the resist mask MSK3 is removed (FIG. 16B).

[0340] Subsequently, using the mask layer 118C as a mask, the mask film 118b_1 is processed to form a mask layer 118B, and then the film 113b is processed to form a layer 113B (FIG. 16C).

[0341] The mask film 118b can be processed by a wet etching method or a dry etching method. The processing of the mask film 118b is preferably performed by anisotropic etching.

[0342] By using the wet etching method, the damage applied to the film 113b during the processing of the mask film 118b can be reduced as compared with the case of using the dry etching method. When using the wet etching method, for example, it is preferable to use a developer, an aqueous solution of tetramethylammonium hydroxide (TMAH), dilute hydrofluoric acid, oxalic acid, phosphoric acid, acetic acid, nitric acid, or a mixed solution containing two or more of these.

[0343] When using the dry etching method for processing the mask film 118b, the deterioration of the film 113b can be suppressed by not using a gas containing oxygen as the etching gas. When using the dry etching method, for example, CF ４ , C ４ F ８ , SF ６ , CHF ３ , Cl ２ , H ２ O, BCl ３It is preferable to use a gas containing noble gases such as He as the etching gas.

[0344] For example, if the mask film 118b is a two-layer structure consisting of mask film 118b_1 and mask film 118b_2, and an aluminum oxide film formed using the ALD method is used as the mask film 118b_1, then CHF ３ and He, or CHF ３ and He and CH ４ Using this method, the mask film 118b_1 can be processed by dry etching. Furthermore, when an In-Ga-Zn oxide film formed by sputtering is used as the mask film 118b_2, the mask film 118b_2 can be processed by wet etching using diluted phosphoric acid. Alternatively, CH ４ It can be processed by dry etching using Ar. Alternatively, the mask film 118b_2 can be processed by wet etching using diluted phosphoric acid. Furthermore, when a tungsten film formed by sputtering is used as the mask film 118b_2, SF ６ CF ４ and O ２ , or CF ４ and Cl ２ and O ２ Using this method, the mask film 118b_2 can be processed by dry etching.

[0345] As a result, as shown in Figure 16C, the laminated structure of layer 113B, mask layer 118B, and mask layer 118C remains on the conductive film 137f. In addition, a portion of the conductive film 137f is exposed.

[0346] The conductive film 137f (later conductive layers 137R, 137G, and 135B) functions not only as an etching stopper when forming layer 113B, but also as an optical adjustment layer. It is preferable to use a material for the conductive film 137f that has high resistance in the formation of layer 113B, specifically a material with a high selectivity ratio for etching with layer 113B. When processing film 113b, layer 109 is covered with the conductive film 137f, and the surface of layer 109 is not exposed to etching gas or etching solution. This prevents the thickness of layer 109 from becoming thinner. The materials that can be used for the conductive film 137f are as described above.

[0347] The film 113b is preferably processed using an anisotropic etching method. In particular, an anisotropic dry etching method is preferred. Alternatively, a wet etching method may also be used.

[0348] When processing the film 113b using a dry etching method, the surface of the display device being manufactured is exposed to plasma. It is preferable to use a metal film or alloy film for one or both of the mask layer 118B and the mask layer 118C, as this can suppress plasma damage to the remaining portion of the film 113b (the portion that becomes layer 113B) and thus suppress deterioration of layer 113B. In particular, it is preferable to use a metal film or alloy film for the mask layer 118C, and a tungsten film or a molybdenum film can be suitably used.

[0349] When using a dry etching method to process the film 113b, the degradation of the film 113b can be suppressed by not using an oxygen-containing gas as the etching gas.

[0350] It is also possible to use an etching gas containing oxygen. By using an etching gas containing oxygen, the etching rate can be increased. Therefore, etching can be performed under low power conditions while maintaining a sufficiently fast etching rate. This suppresses damage to the film 113b. Furthermore, it suppresses problems such as the adhesion of reaction products generated during etching.

[0351] When using the dry etching method, for example, H ２ CF４ , C ４ F ８ SF ６ CHF ３ , Cl ２ H ２ O, BCl ３ It is preferable to use a gas containing one or more of the noble gases such as He, Ar, etc., as the etching gas. Alternatively, it is preferable to use a gas containing one or more of these and oxygen as the etching gas. Alternatively, oxygen gas can be used as the etching gas. Specifically, for example, H ２ and Ar-containing gas, or CF ４ A gas containing He can be used as an etching gas. Also, for example, CF ４ Gases containing , He, and oxygen can be used as etching gases. Also, for example, H ２ Gases containing Ar and gases containing oxygen can be used as etching gases.

[0352] As a dry etching apparatus, a dry etching apparatus having a high-density plasma source can be used. A dry etching apparatus having a high-density plasma source can be, for example, an inductively coupled plasma (ICP) etching apparatus. Alternatively, a capacitively coupled plasma (CCP) etching apparatus having parallel plate electrodes can be used. A capacitively coupled plasma etching apparatus having parallel plate electrodes can be configured to apply a high-frequency voltage to one electrode of the parallel plate electrodes. Alternatively, it can be configured to apply multiple different high-frequency voltages to one electrode of the parallel plate electrodes. Alternatively, it can be configured to apply a high-frequency voltage of the same frequency to each of the parallel plate electrodes. Alternatively, it can be configured to apply high-frequency voltages of different frequencies to each of the parallel plate electrodes.

[0353] The conductive film 137f covers the conductive layer 135, the pixel electrode 199, and the pixel electrode 111, allowing subsequent processes to be carried out without exposing these conductive layers and electrodes. If the top surface, sides, etc., of these conductive layers and electrodes are exposed, corrosion may occur during etching processes, etc. In particular, corrosion is likely to occur when an Ag-Pd-Cu alloy is used as the pixel electrode 199. The conductive film 137f can suppress such corrosion.

[0354] Furthermore, in the configuration shown in Figures 15C to 16C, since the pixel electrode 199 is covered by the conductive layer 135, even if the conductive film 137f is not provided, the corrosion can be suppressed because the conductive layer 135 covers the pixel electrode 199.

[0355] Products generated by corrosion can be unstable; for example, in the case of wet etching, they may dissolve in the solution, and in the case of dry etching, there is a concern that they may be scattered into the atmosphere. Dissolution of the products into the solution or scattering into the atmosphere may cause the products to adhere to the treated surface and the sides of layer 113B, for example, adversely affecting the properties of the light-emitting device or potentially forming leak paths between multiple light-emitting devices.

[0356] Furthermore, by covering layer 109 with the conductive film 137f, layers 113B, 113G, and 113R can be processed without exposing layer 109. When an organic material is used as layer 109, it may be difficult to sufficiently reduce the etching rate of layer 109 during the etching of layers 113B, 113G, and 113R. By covering layer 109 with the conductive film 137f, the reduction or disappearance of the film thickness of layer 109 during processing of layers 113B, 113G, and 113R can be suppressed, and the common layer 114 and common electrode 115 can be formed on a more flat surface.

[0357] Next, film 113g and mask film 118g are formed on the conductive film 137f (Figure 17A). Film 113g is a film that becomes layer 113G and contains a light-emitting material that emits green light. Here, the mask film 118g has a two-layer structure.

[0358] Next, a resist mask is formed on the mask film 118g, and the upper layer of the mask film 118g is processed using the resist mask to form a mask layer 118H. After that, the resist mask is removed. Subsequently, the lower layer of the mask film 118g is processed using the mask layer 118H to form a mask layer 118G, and the film 113g is processed to form layer 113G. As a result, a laminated structure of layer 113G, mask layer 118G, and mask layer 118H remains on the conductive film 137f.

[0359] The film 113g can be formed by a method similar to that used for forming film 113b. The structure, materials, and formation method of the mask film 118g can refer to the conditions applicable to mask film 118b.

[0360] When processing the film 113g using the dry etching method, the surface of the display device being manufactured is exposed to plasma. It is preferable to use a metal film or alloy film for one or both of the mask layer 118B and the mask layer 118C, as this can suppress damage to layer 113B by plasma and thus suppress deterioration of layer 113B.

[0361] Next, a film 113r, which will become layer 113R, and a mask film 118r, which will become mask layer 118R, are formed on the conductive film 137f (Figure 17B). Film 113r contains a light-emitting material that emits red light. Here, the mask film 118r has a two-layer structure.

[0362] Next, a resist mask is formed on the mask film 118r, and the upper layer of the mask film 118r is processed using the resist mask to form a mask layer 118S (not shown). After that, the resist mask is removed. Subsequently, the lower layer of the mask film 118r is processed using the mask layer 118S to form a mask layer 118R, and the film 113r is processed to form layer 113R. As a result, a laminated structure of layer 113R, mask layer 118R, and mask layer 118S remains on the conductive film 137f.

[0363] The film 113r can be formed in the same manner as the method used to form the film 113b. The material and formation method of the mask film 118r are the same as the conditions applicable to the mask film 118b.

[0364] When processing the film 113r using the dry etching method, the surface of the display device being manufactured is exposed to plasma. It is preferable that one or both of the mask layer 118B and the mask layer 118G have a metal film or alloy film, as this can suppress damage to layers 113B and 113G by plasma and suppress deterioration of layers 113B and 113G.

[0365] Furthermore, it is preferable that the sides of layers 113B, 113G, and 113R are perpendicular or approximately perpendicular to the surface to be formed (in this case, the upper surface of the conductive film 137f). For example, it is preferable that the angle between the surface to be formed and these sides be 60 degrees or more and 90 degrees or less.

[0366] As described above, the distance between two adjacent layers of layers 113B, 113G, and 113R formed using photolithography can be narrowed to 8 μm or less, 5 μm or less, 3 μm or less, 2 μm or less, or 1 μm or less. Here, this distance can be defined, for example, as the distance between two adjacent opposing ends of layers 113B, 113G, and 113R. By narrowing the distance between the island-shaped EL layers in this way, a display device with high resolution and a large aperture ratio can be provided.

[0367] Next, it is preferable to remove mask layer 118C, mask layer 118H, and mask layer 118H (Figure 17C). In particular, when conductive materials are used as these mask layers, removing them can suppress the generation of leakage current and the formation of capacitance.

[0368] The removal of mask layers 118C, 118H, and 118S can be performed using the same method as for the formation of mask layers 118C, 118H, and 118S. In particular, by using a wet etching method, the damage to layers 113B, 113G, and 113R can be reduced compared to when a dry etching method is used.

[0369] The mask layer 118C, mask layer 118H, and mask layer 118S can be removed by dissolving them in a solvent such as water or alcohol. Examples of alcohols include ethyl alcohol, methyl alcohol, isopropyl alcohol (IPA), or glycerin.

[0370] Next, a portion of the conductive film 137f is removed using mask layers 118B, 118G, and 118R as masks to form conductive layers 137R, 137G, and 137B (Figure 18A). The formation of conductive layers 137R, 137G, and 137B can preferably be done using a wet etching method. By using a wet etching method, the damage to layers 113B, 113G, and 113R during the formation of conductive layers 137R, 137G, and 137B can be reduced compared to when using a dry etching method.

[0371] After forming conductive layers 137R, 137G, and 137B, a drying treatment can be performed to remove water contained in layers 113B, 113G, and 113R, and water adsorbed on the surfaces of layers 113B, 113G, and 113R. For example, a heat treatment can be performed in an inert gas atmosphere such as a nitrogen atmosphere or a reduced pressure atmosphere. The heat treatment can be performed at a substrate temperature of 50°C to 200°C, preferably 60°C to 150°C, and more preferably 70°C to 120°C. A reduced pressure atmosphere is preferable because it allows drying at a lower temperature.

[0372] Next, an insulating film 125f, which will become the insulating layer 125, is formed so as to cover layer 109, conductive layer 137G, conductive layer 137B, conductive layer 137R, layer 113B, layer 113G, layer 113R, mask layer 118B, mask layer 118G, and mask layer 118R. Subsequently, an insulating film 127f is formed on the insulating film 125f (Figure 18B).

[0373] An insulating film 127f is formed in contact with the upper surface of the insulating film 125f. Therefore, it is preferable that the upper surface of the insulating film 125f has high adhesion to the resin composition used for the insulating film 127f (for example, a photosensitive resin composition containing an acrylic resin). In order to improve the adhesion, it is preferable to perform surface treatment to hydrophobize (or enhance the hydrophobicity) the upper surface of the insulating film 125f. For example, it is preferable to perform treatment using a silylating agent such as hexamethyldisilazane (HMDS). By hydrophobizing the upper surface of the insulating film 125f in this way, the insulating film 127f can be formed with high adhesion.

[0374] The insulating film 125f and the insulating film 127f are preferably formed by a film formation method that causes less damage to the layers 113B, 113G, and 113R. In particular, since the insulating film 125f is formed in contact with the side surfaces of the layers 113B, 113G, and 113R, it is preferably formed by a film formation method that causes less damage to the layers 113B, 113G, and 113R than the insulating film 127f.

[0375] The insulating film 125f and the insulating film 127f are each formed at a temperature lower than the heat resistance temperature of the layers 113B, 113G, and 113R. Also, by increasing the substrate temperature during the film formation of the insulating film 125f, even if the thickness is thin, a film with a low impurity concentration and high barrier properties against at least one of water and oxygen can be obtained.

[0376] The substrate temperature when forming the insulating film 125f and the insulating film 127f is preferably 60°C or higher, 80°C or higher, 100°C or higher, or 120°C or higher, and 200°C or lower, 180°C or lower, 160°C or lower, 150°C or lower, or 140°C or lower, respectively.

[0377] As described above, in the display device according to one aspect of the present invention, a material with high heat resistance is used for the light-emitting device. Therefore, the substrate temperature when forming the insulating film 125f and the insulating film 127f can be set to 100°C or higher, 120°C or higher, or 140°C or higher, respectively. For example, the higher the film formation temperature of the inorganic insulating film, the denser and higher the barrier property the film can be. Therefore, by forming the insulating film 125f at such a temperature, the damage applied to the layer 113B, the layer 113G, and the layer 113R can be further reduced, and the reliability of the light-emitting device can be enhanced.

[0378] As the insulating film 125f, it is preferable to form an insulating film having a thickness of 3 nm or more, 5 nm or more, or 10 nm or more, and 200 nm or less, 150 nm or less, 100 nm or less, or 50 nm or less within the above range of the substrate temperature.

[0379] The insulating film 125f is preferably formed, for example, using the ALD method. By using the ALD method, film formation damage can be reduced, and it is preferable because a film with high coating property can be formed. As the insulating film 125f, for example, it is preferable to form an aluminum oxide film using the ALD method.

[0380] The insulating film 125f can also be formed using a sputtering method, a CVD method, or a PECVD method, which have a higher film formation rate than the ALD method. Thereby, a highly reliable display device can be manufactured with high productivity.

[0381] The insulating film 127f is preferably formed using the above-described wet film formation method. The insulating film 127f is preferably formed, for example, by spin coating using a photosensitive resin, and more specifically, it is preferable to form it using a photosensitive resin composition containing an acrylic resin.

[0382] It is preferable to perform a heat treatment (also called pre-baking) after the formation of the insulating film 127f. The temperature of the heat treatment is lower than the heat resistance temperature of layers 113B, 113G, and 113R. The substrate temperature during the heat treatment is preferably 50°C to 200°C, more preferably 60°C to 150°C, and even more preferably 70°C to 120°C. This makes it possible to remove the solvent contained in the insulating film 127f.

[0383] Next, visible light or ultraviolet light is irradiated onto a portion of the insulating film 127f to expose that portion of the insulating film 127f. For example, when a positive-type photosensitive resin composition containing acrylic resin is used for the insulating film 127f, visible light or ultraviolet light is irradiated onto a region where the insulating layer 127 will not be formed in a later step. The width of the insulating layer 127 can be controlled by the region that is exposed at this stage.

[0384] The light used for exposure preferably includes the i-line (wavelength 365 nm). Furthermore, the light used for exposure may also include at least one of the g-line (wavelength 436 nm) and the h-line (wavelength 405 nm).

[0385] Next, development is performed to form the insulating layer 127. Then, using the insulating layer 127 as a mask, a portion of the insulating film 125f, mask layer 118B, mask layer 118G, and mask layer 118R is removed. As a result, the insulating layer 125 is formed, and openings are created in each of the mask layers 118B, mask layer 118G, and mask layer 118R, exposing the upper surfaces of layers 113G, 113G, and 113R (Figure 18C).

[0386] The insulating layer 127 is formed in the region surrounding layer 113R, the region surrounding layer 113G, and the region surrounding layer 113B. When an acrylic resin is used for the insulating film 127f, it is preferable to use an alkaline solution as the developer, for example, an aqueous solution of tetramethylammonium hydroxide (TMAH) can be used.

[0387] Furthermore, after development, a process can be carried out to remove the residue (so-called scum) from the development process. For example, the residue can be removed by ashing using oxygen plasma. After each of the development processes described below, a process to remove the residue can also be carried out.

[0388] Furthermore, etching can be performed to adjust the surface height of the insulating layer 127. The insulating layer 127 can be processed, for example, by ashing using oxygen plasma.

[0389] It is preferable to perform a heat treatment (also called post-bake) after development. By performing the heat treatment, the side surface of the insulating layer 127 can be made tapered. The heat treatment should be performed at a temperature lower than the heat resistance temperature of the EL layer. The heat treatment can be performed at a substrate temperature of 50°C to 200°C, preferably 60°C to 150°C, and more preferably 70°C to 130°C. The heating atmosphere can be, for example, an atmospheric atmosphere or an inert gas atmosphere. Alternatively, the heating atmosphere can be an atmospheric pressure atmosphere or a reduced pressure atmosphere. A reduced pressure atmosphere is preferable because it allows drying at a lower temperature. It is preferable to use a higher substrate temperature for the heat treatment in this step than for the heat treatment (pre-bake) after the formation of the insulating film 127f. This improves the adhesion between the insulating layer 127 and the insulating layer 125, and also improves the corrosion resistance of the insulating layer 127.

[0390] The insulating film 125f, mask layer 118B, mask layer 118G, and mask layer 118R can be processed using either a dry etching method or a wet etching method. It is preferable to use the same material for the insulating film 125f as for the mask layers 118B, 118G, and 118R, as this allows the processing to be performed in a single step.

[0391] When using the dry etching method, it is preferable to use a chlorine-based gas. As a chlorine-based gas, Cl ２ , BCl ３ SiCl ４ , and CCl ４These can be used individually or in mixtures of two or more gases. In addition, oxygen gas, hydrogen gas, helium gas, and argon gas can be used individually or in mixtures of two or more gases with the chlorine-based gas. By using dry etching, thin areas of the mask layers 118B, 118G, and 118R can be formed with good in-plane uniformity.

[0392] When using the dry etching method, by-products generated during dry etching may accumulate on the upper and side surfaces of the insulating layer 127. As a result, components contained in the etching gas, components contained in the insulating film 125f, and components contained in the mask layer 118B, mask layer 118G, and mask layer 118R may be present in the insulating layer 127.

[0393] It is preferable to use a wet etching method for processing the insulating film 125f, mask layer 118B, mask layer 118G, and mask layer 118R. By using a wet etching method, damage to layers 113B, 113G, and 113R can be reduced compared to when a dry etching method is used. For example, an alkaline solution can be used as the etchant for wet etching. For example, an aqueous solution of tetramethylammonium hydroxide (TMAH), which is an alkaline solution, can be suitably used for wet etching of an aluminum oxide film.

[0394] As described above, by providing insulating layer 127, insulating layer 125, mask layer 118B, mask layer 118G, and mask layer 118R, connection failures caused by the divided portion and increases in electrical resistance caused by locally thinner portions can be suppressed between each light-emitting device in the common layer 114 and common electrode 115. As a result, a display device according to one embodiment of the present invention can improve display quality.

[0395] After exposing a portion of layers 113B, 113G, and 113R, further heat treatment can be performed. This heat treatment can remove water contained in the EL layer and water adsorbed on the surface of the EL layer. In addition, this heat treatment may change the shape of the insulating layer 127. Specifically, the insulating layer 127 may spread to cover at least one of the following: the edge of the insulating layer 125, the edges of the mask layers 118B, 118G, and 118R, and the upper surfaces of layers 113B, 113G, and 113R. For example, the heat treatment can be performed in an inert gas atmosphere or a reduced pressure atmosphere. The heat treatment can be performed at a substrate temperature of 50°C to 200°C, preferably 60°C to 150°C, and more preferably 70°C to 120°C. A reduced pressure atmosphere is preferable because it allows for dehydration at a lower temperature. However, it is preferable to appropriately set the temperature range for the above heat treatment, taking into consideration the heat resistance temperature of the EL layer. Furthermore, considering the heat resistance temperature of the EL layer, a temperature range of 70°C to 120°C is particularly preferred within the above temperature range.

[0396] If the etching process for the insulating layer 125 and the mask layer is performed all at once after post-baking, side etching may cause the insulating layer 125 and the mask layer beneath the edges of the insulating layer 127 to disappear, forming a cavity. This cavity can cause unevenness on the surface forming the common layer 114 and the common electrode 115, making it easier for the common layer 114 and the common electrode 115 to break down. Therefore, it is preferable to perform the etching process for the insulating layer 125 and the mask layer separately, before and after post-baking.

[0397] Next, a common layer 114 and a common electrode 115 are formed in this order on the insulating layer 127, layer 113B, layer 113G, and layer 113R, and then a protective layer 131 is formed. After that, the substrate 120 is bonded onto the protective layer 131 using the resin layer 122, thereby producing the display device shown in Figure 8A.

[0398] The common layer 114 can be formed by, for example, a vapor deposition method (including vacuum deposition), a transfer method, a printing method, an inkjet method, or a coating method.

[0399] The common electrode 115 can be formed, for example, by sputtering or vacuum deposition. Alternatively, a film formed by deposition and a film formed by sputtering can be laminated together.

[0400] The protective layer 131 can be formed by, for example, vacuum deposition, sputtering, CVD, or ALD.

[0401] As described above, in the method for manufacturing the display device of this embodiment, the island-shaped layers 113B, 113G, and 113R are not formed using a fine metal mask, but rather by depositing a film on one surface and processing the film. Therefore, the island-shaped layers can be formed with a uniform thickness. This makes it possible to realize a high-definition display device or a display device with a high aperture ratio. Furthermore, even if the resolution or aperture ratio is high and the distance between subpixels is extremely short, it is possible to suppress contact between layers 113B, 113G, and 113R in adjacent subpixels. Therefore, it is possible to suppress the generation of leakage current between subpixels. This prevents unintended light emission caused by crosstalk, and makes it possible to realize a display device with extremely high contrast.

[0402] In this explanation, we have described an example in which layers 113B, 113G, and 113R are formed in that order, but the order of formation is not particularly limited.

[0403] By providing an insulating layer 127 having a tapered shape at its end between adjacent island-shaped EL layers, it is possible to suppress the occurrence of step breaks during the formation of the common electrode 115 and to prevent the formation of locally thin areas in the common electrode 115. This suppresses connection failures caused by the divided areas and increases in electrical resistance caused by locally thin areas in the common layer 114 and the common electrode 115. Therefore, a display device according to one aspect of the present invention can achieve both high resolution and high display quality.

[0404] This embodiment can be combined with other embodiments as appropriate.

[0405] (Embodiment 2) In this embodiment, a display device according to an aspect of the present invention will be described with reference to FIGS. 19 and 20.

[0406] [Pixel Layout] In this embodiment, mainly, a pixel layout different from that in FIG. 1A will be described. The arrangement of sub-pixels is not particularly limited, and various methods can be applied. Examples of the arrangement of sub-pixels include a stripe arrangement, an S-stripe arrangement, a matrix arrangement, a delta arrangement, a Bayer arrangement, and a pentile arrangement.

[0407] In this embodiment, the upper surface shape of the sub-pixel shown in the figure corresponds to the upper surface shape of the light-emitting region (or light-receiving region).

[0408] Examples of the upper surface shape of the sub-pixel include polygons such as triangles, quadrilaterals (including rectangles and squares), pentagons, shapes in which the corners of these polygons are rounded, ellipses, or circles.

[0409] The circuit layout constituting the sub-pixel is not limited to the range of the sub-pixel shown in the figure, and can also be arranged outside thereof.

[0410] An S-stripe arrangement is applied to the pixel 110 shown in FIG. 19A. The pixel 110 shown in FIG. 19A is composed of three sub-pixels: a sub-pixel 110a, a sub-pixel 110b, and a sub-pixel 110c.

[0411] The pixel 110 shown in FIG. 19B has a sub-pixel 110a having a substantially trapezoidal upper surface shape with rounded corners, a sub-pixel 110b having a substantially triangular upper surface shape with rounded corners, and a sub-pixel 110c having a substantially quadrangular or substantially hexagonal upper surface shape with rounded corners. Also, the sub-pixel 110b has a larger light-emitting area than the sub-pixel 110a. Thus, the shape and size of each sub-pixel can be determined independently. For example, the size of a sub-pixel having a highly reliable light-emitting device can be made smaller.

[0412] A pentile arrangement is applied to the pixels 124a and 124b shown in FIG. 19C. FIG. 19C shows an example in which pixels 124a having sub-pixels 110a and 110b and pixels 124b having sub-pixels 110b and 110c are alternately arranged.

[0413] Pixels 124a and 124b shown in Figures 19D to 19F have a delta array applied. Pixel 124a has two subpixels (subpixels 110a and 110b) in the top row (1st row) and one subpixel (subpixel 110c) in the bottom row (2nd row). Pixel 124b has one subpixel (subpixel 110c) in the top row (1st row) and two subpixels (subpixels 110a and 110b) in the bottom row (2nd row).

[0414] Figure 19D shows an example where each subpixel has a roughly square top shape with rounded corners, Figure 19E shows an example where each subpixel has a circular top shape, and Figure 19F shows an example where each subpixel has a roughly hexagonal top shape with rounded corners.

[0415] In Figure 19F, each subpixel is located inside a densely arranged hexagonal region. When focusing on one subpixel, it is arranged so that it is surrounded by six other subpixels. Furthermore, subpixels that emit light of the same color are not adjacent to each other. For example, when focusing on subpixel 110a, three subpixels 110b and three subpixels 110c are arranged alternately around it.

[0416] Figure 19G shows an example where the subpixels of each color are arranged in a zigzag pattern. Specifically, in a top view, the upper edges of two subpixels aligned in the row direction (for example, subpixel 110a and subpixel 110b, or subpixel 110b and subpixel 110c) are offset.

[0417] In each pixel shown in Figures 19A to 19G, it is preferable, for example, that sub-pixel 110a be sub-pixel R that emits red light, sub-pixel 110b be sub-pixel G that emits green light, and sub-pixel 110c be sub-pixel B that emits blue light. However, the configuration of the sub-pixels is not limited to this, and the colors emitted by the sub-pixels and their order can be determined as appropriate. For example, sub-pixel 110b can be sub-pixel R that emits red light, and sub-pixel 110a can be sub-pixel G that emits green light.

[0418] In photolithography, the finer the pattern being processed, the more significant the effects of light diffraction become. This compromises the fidelity of the transfer of the photomask pattern through exposure, making it difficult to process the resist mask into the desired shape. Therefore, even if the photomask pattern is rectangular, patterns with rounded corners are likely to be formed. Consequently, the top surface shape of subpixels may be a polygon with rounded corners, an ellipse, or a circle.

[0419] Furthermore, in a method for manufacturing a display device according to one aspect of the present invention, the EL layer is processed into an island shape using a resist mask. The resist film formed on the EL layer needs to be cured at a temperature lower than the heat resistance temperature of the EL layer. Therefore, depending on the heat resistance temperature of the EL layer material and the curing temperature of the resist material, the curing of the resist film may be insufficient. A resist film that is not sufficiently cured may take a shape that deviates from the desired shape during processing. As a result, the top surface shape of the EL layer may become a polygon with rounded corners, an ellipse, or a circle. For example, if an attempt is made to form a resist mask with a square top surface, a resist mask with a circular top surface may be formed, resulting in a circular top surface shape for the EL layer.

[0420] Furthermore, in order to achieve the desired shape of the upper surface of the EL layer, a technique (OPC (Optical Proximity Correction) technique) can be used to pre-correct the mask pattern so that the design pattern and the transferred pattern match. Specifically, in the OPC technique, a correction pattern is added to the corners of the shape on the mask pattern.

[0421] As shown in Figures 20A to 20I, a pixel can be configured to have four types of subpixels.

[0422] The pixels 110 shown in Figures 20A to 20C are arranged in a stripe pattern.

[0423] Figure 20A shows an example where each subpixel has a rectangular top surface shape, Figure 20B shows an example where each subpixel has a top surface shape formed by connecting two semicircles and a rectangle, and Figure 20C shows an example where each subpixel has an elliptical top surface shape.

[0424] The pixels 110 shown in Figures 20D to 20F are arranged in a matrix array.

[0425] Figure 20D shows an example where each subpixel has a square top surface shape, Figure 20E shows an example where each subpixel has a roughly square top surface shape with rounded corners, and Figure 20F shows an example where each subpixel has a circular top surface shape.

[0426] Figures 20G and 20H show an example in which one pixel 110 is composed of 2 rows and 3 columns.

[0427] The pixel 110 shown in Figure 20G has three subpixels (subpixels 110a, 110b, and 110c) in the top row (1st row) and one subpixel (subpixel 110d) in the bottom row (2nd row). In other words, pixel 110 has subpixel 110a in the left column (1st column), subpixel 110b in the middle column (2nd column), subpixel 110c in the right column (3rd column), and subpixel 110d extending across these three columns.

[0428] The pixel 110 shown in Figure 20H has three subpixels (subpixels 110a, 110b, and 110c) in the top row (1st row) and three subpixels 110d in the bottom row (2nd row). In other words, the pixel 110 has subpixels 110a and 110d in the left column (1st column), subpixels 110b and 110d in the middle column (2nd column), and subpixels 110c and 110d in the right column (3rd column). As shown in Figure 20H, by aligning the arrangement of subpixels in the top row and the bottom row, it becomes possible to efficiently remove dust and other debris that may occur during the manufacturing process. Therefore, a display device with high display quality can be provided.

[0429] Figure 20I shows an example where one pixel 110 is composed of 3 rows and 2 columns.

[0430] The pixel 110 shown in Figure 20I has a sub-pixel 110a in the top row (1st row), a sub-pixel 110b in the middle row (2nd row), a sub-pixel 110c spanning from the 1st to the 2nd row, and one sub-pixel (sub-pixel 110d) in the bottom row (3rd row). In other words, the pixel 110 has sub-pixels 110a and 110b in the left column (1st column), a sub-pixel 110c in the right column (2nd column), and a sub-pixel 110d spanning these two columns.

[0431] The pixel 110 shown in Figures 20A to 20I is composed of four subpixels: subpixel 110a, subpixel 110b, subpixel 110c, and subpixel 110d.

[0432] Sub-pixels 110a, 110b, 110c, and 110d can each be configured to have a light-emitting device with a different emission color. Examples of sub-pixels 110a, 110b, 110c, and 110d include sub-pixels of four colors: R, G, B, and white (W); sub-pixels of four colors: R, G, B, and Y; or sub-pixels of R, G, B, and infrared (IR).

[0433] In each pixel 110 shown in Figures 20A to 20I, it is preferable, for example, that sub-pixel 110a be a sub-pixel R that emits red light, sub-pixel 110b be a sub-pixel G that emits green light, sub-pixel 110c be a sub-pixel B that emits blue light, and sub-pixel 110d be one of the following: sub-pixel W that emits white light, sub-pixel Y that emits yellow light, or sub-pixel IR that emits near-infrared light. With such a configuration, in the pixels 110 shown in Figures 20G and 20H, the layout of R, G, and B becomes a stripe arrangement, which can improve the display quality. Also, in the pixels 110 shown in Figure 20I, the layout of R, G, and B becomes a so-called S-stripe arrangement, which can improve the display quality.

[0434] Pixel 110 may have subpixels that have light-receiving devices.

[0435] In each pixel 110 shown in Figures 20A to 20I, one of the sub-pixels 110a to 110d can be a sub-pixel having a light-receiving device.

[0436] In each pixel 110 shown in Figures 20A to 20I, it is preferable, for example, that sub-pixel 110a be a sub-pixel R that emits red light, sub-pixel 110b be a sub-pixel G that emits green light, sub-pixel 110c be a sub-pixel B that emits blue light, and sub-pixel 110d be a sub-pixel S having a light-receiving device. With such a configuration, in the pixels 110 shown in Figures 20G and 20H, the layout of R, G, and B becomes a stripe arrangement, which can improve the display quality. Also, in the pixels 110 shown in Figure 20I, the layout of R, G, and B becomes a so-called S-stripe arrangement, which can improve the display quality.

[0437] The wavelength of light detected by the sub-pixel S, which has a light-receiving device, is not particularly limited. The sub-pixel S can be configured to detect either visible light or infrared light, or both.

[0438] As shown in Figures 20J and 20K, a pixel can be configured to have five types of subpixels.

[0439] Figure 20J shows an example where one pixel 110 is composed of two rows and three columns.

[0440] Pixel 110, shown in Figure 20J, has three subpixels (subpixel 110a, subpixel 110b, and subpixel 110c) in the top row (1st row) and two subpixels (subpixel 110d and subpixel 110e) in the bottom row (2nd row). In other words, pixel 110 has subpixels 110a and 110d in the left column (1st column), subpixel 110b in the middle column (2nd column), subpixel 110c in the right column (3rd column), and subpixel 110e extending from the 2nd to the 3rd column.

[0441] Figure 20K shows an example where one pixel 110 is composed of a 3x2 grid.

[0442] The pixel 110 shown in Figure 20K has a sub-pixel 110a in the top row (1st row), a sub-pixel 110b in the middle row (2nd row), a sub-pixel 110c spanning from the 1st to the 2nd row, and two sub-pixels (sub-pixels 110d and 110e) in the bottom row (3rd row). In other words, the pixel 110 has sub-pixels 110a, 110b, and 110d in the left column (1st column), and sub-pixels 110c and 110e in the right column (2nd column).

[0443] In each pixel 110 shown in Figures 20J and 20K, it is preferable, for example, that sub-pixel 110a be sub-pixel R that emits red light, sub-pixel 110b be sub-pixel G that emits green light, and sub-pixel 110c be sub-pixel B that emits blue light. With such a configuration, in the pixel 110 shown in Figure 20J, the layout of R, G, and B becomes a stripe arrangement, which can improve the display quality. Also, in the pixel 110 shown in Figure 20K, the layout of R, G, and B becomes a so-called S-stripe arrangement, which can improve the display quality.

[0444] In each pixel 110 shown in Figures 20J and 20K, it is preferable to apply a sub-pixel S having a light-receiving device to at least one of the sub-pixels 110d and 110e. When light-receiving devices are used for both sub-pixels 110d and 110e, the configurations of the light-receiving devices can be made different from each other. For example, the wavelength ranges of the light they detect can be made at least partially different. Specifically, one of the sub-pixels 110d and 110e can have a light-receiving device that mainly detects visible light, and the other can have a light-receiving device that mainly detects infrared light.

[0445] In each pixel 110 shown in Figures 20J and 20K, it is preferable to apply a sub-pixel S having a light-receiving device to one of the sub-pixels 110d and 110e, and a sub-pixel having a light-emitting device that can be used as a light source to the other. For example, it is preferable that one of the sub-pixels 110d and 110e is a sub-pixel IR that emits infrared light, and the other is a sub-pixel S having a light-receiving device that detects infrared light.

[0446] In a pixel having sub-pixels R, G, B, IR, and S, an image can be displayed using sub-pixels R, G, and B, while sub-pixel IR is used as a light source to detect the reflected infrared light emitted by sub-pixel IR at sub-pixel S.

[0447] As described above, in one aspect of the present invention, a display device can be configured to have pixels having subpixels with light-emitting devices, and various layouts can be applied to these pixels. Furthermore, in one aspect of the present invention, a display device can be configured to have pixels having both light-emitting devices and light-receiving devices. In this case as well, various layouts can be applied.

[0448] This embodiment can be combined with other embodiments as appropriate.

[0449] (Embodiment 3) This embodiment describes a display device according to one aspect of the present invention.

[0450] The display device of this embodiment can be a high-definition display device. Therefore, the display device of this embodiment can be used, for example, as a display unit for information terminals (wearable devices) such as wristwatches and bracelets, as well as as a display unit for wearable devices that can be worn on the head, such as VR devices such as head-mounted displays (HMDs) and AR devices such as glasses.

[0451] The display device of this embodiment can be a high-resolution display device or a large-screen display device. Therefore, the display device of this embodiment can be used in electronic devices with relatively large screens, such as television equipment, desktop or notebook personal computers, computer monitors, digital signage, and large game machines such as pachinko machines, as well as in the display units of digital cameras, digital video cameras, digital photo frames, mobile phones, portable game consoles, personal information terminals, and audio playback devices.

[0452] [Display device 100G] Figure 21A shows a top view of the display device 100G.

[0453] The display device 100G has a configuration in which substrate 152 and substrate 151 are bonded together with a sealing material 712.

[0454] The display device 100G includes a display unit 162, a connection unit 140, a circuit 164, a circuit 704, wiring 165, an FPC terminal unit 708, etc. Figure 21A shows an example in which IC 173 and FPC 172 are mounted on the display device 100G. Therefore, the configuration shown in Figure 21 can also be described as a display module having the display device 100G, an IC (integrated circuit), and an FPC.

[0455] The connection portion 140 is provided on the outside of the display portion 162. The connection portion 140 can be provided along one or more sides of the display portion 162. There can be one or more connection portions 140. Figure 21A shows an example in which the connection portion 140 is provided so as to surround all four sides of the display portion. At the connection portion 140, the common electrode of the light-emitting device and the conductive layer are electrically connected, and a potential can be supplied to the common electrode.

[0456] Circuit 164 functions, for example, as a scan line driving circuit. Similarly, circuit 704 functions, for example, as a signal line driving circuit.

[0457] Signals and power are supplied to the display unit 162, circuit 164, and circuit 704, respectively, via the FPC 172 and wiring 165. These signals and power are input to the FPC 172 from an external source or from IC 173.

[0458] Figure 21A shows an example in which IC 173 is provided on the substrate 151 using a COG (Chip On Glass) method or a COF (Chip On Film) method, etc. IC 173 can be an IC having, for example, a scan line drive circuit or a signal line drive circuit. When IC 173 functions as a signal line drive circuit, circuit 704 can be configured to include at least one of the following: a protection circuit, a buffer circuit, a demultiplexer circuit, etc.

[0459] Furthermore, the display device 100G and the display module can be configured without an IC. Alternatively, the IC can be mounted on the FPC using a COF (Core-on-Fiber) method or the like.

[0460] [Display Device 100H] The display device 100H shown in Figure 21B is an example of a configuration where the substrate 151 is flexible. The display device shown in Figure 21B can be used as a flexible display.

[0461] In Figure 21B, the display device 100H has pixel sections 702 that are not rectangular in shape, but have arc-shaped corners. A pair of circuits 164 can function as gate driver circuits and are provided on both sides of the display section 162. The circuits 164 are also provided along the arc-shaped contours at the corners of the display section 162.

[0462] In Figure 21B, the substrate 151 has a protruding shape in the area where the FPC 172 is installed. Also, a portion of the substrate 151, including the FPC terminal portion 708, can be folded back to the other side in region P2. By folding the substrate 151 back, the display device 100H can be mounted on the electronic device with the FPC 172 overlapping the back of the display unit 162, thereby saving space in the electronic device.

[0463] [Example of Display Device Configuration 1] Figure 22 shows an example of a cross-section when a portion of the display device 100G is cut, including a part of the area containing the FPC 172, a part of the circuit 164, a part of the display unit 162, a part of the connection unit 140, and a part of the area including the end.

[0464] The display device 100G shown in Figure 22 has a transistor 201, a transistor 205, a light-emitting device 130R that emits red light, a light-emitting device 130G that emits green light, and a light-emitting device 130B that emits blue light, etc., between the substrate 151 and the substrate 152.

[0465] Figure 22 shows an example of applying the configuration of pixel electrode 111R, pixel electrode 111G, pixel electrode 111B, pixel electrode 199R, pixel electrode 199G, pixel electrode 199B, conductive layer 105R, conductive layer 105G, conductive layer 105B, layer 107R, layer 107G, layer 107B, conductive layer 135R, conductive layer 135G, conductive layer 135B, conductive layer 137R, conductive layer 137G, and conductive layer 137B shown in Figure 8A.

[0466] The conductive layer 105R is connected to the conductive layer 222b of the transistor 205 through openings provided in the insulating layers 214, 215, and 213. Layer 107R is provided on the conductive layer 105R, and pixel electrodes 111R and 199R are provided so as to cover the conductive layer 105R and layer 107R. Recesses are formed in the conductive layer 105R so as to cover the openings provided in the insulating layers 214, 215, and 213. These recesses are filled with layer 107R. The same applies to pixel electrodes 111G, 199G, conductive layers 105G and 107G, and pixel electrodes 111B, 199B, conductive layers 105B and 107B, so a detailed explanation is omitted.

[0467] A layer 109 is provided between adjacent light-emitting devices 130. It is also preferable to provide a layer 109 in the circuit 164. By providing a layer 109 in the circuit 164, it is possible to suppress the incidence of ambient light and light emitted from the light-emitting devices on the transistors (in this case, transistors 201) in the circuit 164, thereby suppressing fluctuations in the electrical characteristics of the transistors due to light. Therefore, a highly reliable circuit 164 (for example, a scan line driving circuit) can be made, resulting in a highly reliable display device.

[0468] The upper surfaces and sides of layers 113B, 113G, and 113R are covered by insulating layers 125 and 127, respectively. A mask layer 118B is located between layer 113B and insulating layer 125. A mask layer 118G is located between layer 113G and insulating layer 125, and a mask layer 118R is located between layer 113R and insulating layer 125. A common layer 114 is provided on layers 113B, 113G, 113R, and insulating layers 125 and 127, and a common electrode 115 is provided on the common layer 114. The common layer 114 and the common electrode 115 are each a continuous film provided in common to multiple light-emitting devices.

[0469] A protective layer 131 is provided on the light-emitting devices 130R, 130G, and 130B. The protective layer 131 and the substrate 152 are bonded via a resin layer 142. A light-shielding layer 117 is provided on the substrate 152. For sealing the light-emitting devices, a solid sealing structure or a hollow sealing structure can be applied. In Figure 22, the space between the substrate 152 and the substrate 151 is filled with the resin layer 142, and a solid sealing structure is applied. Alternatively, the space can be filled with an inert gas (such as nitrogen or argon), and a hollow sealing structure can be applied. In this case, the resin layer 142 may be provided so as not to overlap with the light-emitting devices. Furthermore, the space may be filled with a resin different from the frame-shaped resin layer 142.

[0470] The protective layer 131 is provided at least on the display unit 162, and preferably so as to cover the entire display unit 162. It is preferable that the protective layer 131 covers not only the display unit 162, but also the connection unit 140 and the circuit 164. Furthermore, it is preferable that the protective layer 131 extends to the edges of the display device 100G. On the other hand, in the connection unit 204, there is a portion where the protective layer 131 is not provided in order to electrically connect the FPC 172 and the conductive layer 166.

[0471] In the connection portion 140, the insulating layer 213, insulating layer 215, and insulating layer 214 are provided with openings that reach the conductive layer 168. The conductive layer 105p is provided so as to cover the openings. The conductive layer 168 can be formed, for example, in the same process as the conductive layer 222a and conductive layer 222b of the transistor 205.

[0472] A connection portion 204 is provided in the region of substrate 151 where substrate 152 does not overlap. At the connection portion 204, wiring 165 is electrically connected to FPC 172 via conductive layer 105p, conductive layer 166, conductive layer 167, conductive layer 135q, conductive layer 137q, and connection layer 242. Conductive layer 105q can be formed in the same process as conductive layer 105R, conductive layer 105G, and conductive layer 105B, for example. Conductive layer 166 can be formed in the same process as pixel electrode 111R, pixel electrode 111G, and pixel electrode 111B, for example. Conductive layer 167 can be formed in the same process as pixel electrode 199R, pixel electrode 199G, and pixel electrode 199B, for example. Layer 107q is provided between conductive layer 105q and conductive layer 166. Layer 107q can be formed, for example, in the same process as layers 107R, 107G, and 107B. Conductive layer 135q can be formed, for example, in the same process as conductive layer 135R, conductive layer 135G, and conductive layer 135B. Conductive layer 137q can be formed, for example, in the same process as conductive layer 137R, conductive layer 137G, and conductive layer 137B. On the upper surface of the connection portion 204, the conductive layer 137q is exposed. This allows the connection portion 204 and the FPC 172 to be electrically connected via the connection layer 242.

[0473] For example, after forming the protective layer 131 over the entire surface of the display device 100G, the conductive layer 137q can be exposed by removing the area of ​​the protective layer 131 that overlaps with the conductive layer 137q using a mask.

[0474] A laminated structure of at least one organic layer and a conductive layer may be provided on the conductive layer 137q, and a protective layer 131 may be provided on the laminated structure. Then, a starting point for peeling (a portion that triggers peeling) may be formed on the laminated structure using a laser or a sharp blade (e.g., a needle or cutter), and the laminated structure and the protective layer 131 on it may be selectively removed, exposing the conductive layer 137q. For example, the protective layer 131 can be selectively removed by pressing an adhesive roller against the substrate 151 and moving the roller relatively while rotating it. Alternatively, an adhesive tape may be attached to the substrate 151 and peeled off. Due to the low adhesion between the organic layer and the conductive layer, or the low adhesion between the organic layers themselves, separation occurs at the interface between the organic layer and the conductive layer, or within the organic layer. This allows for the selective removal of the region of the protective layer 131 that overlaps with the conductive layer 137q. If any organic layer remains on the conductive layer 137q, it can be removed with an organic solvent or the like.

[0475] As the organic layer, for example, at least one organic layer (a layer that functions as a light-emitting layer, a carrier block layer, a carrier transport layer, or a carrier implantation layer) can be used in any of layers 113B, 113G, and 113R. The organic layer may be formed simultaneously with the deposition of any of layers 113B, 113G, and 113R, or it may be provided separately. The conductive layer can be formed using the same process and materials as the common electrode 115. For example, it is preferable to form an ITO film as both the common electrode 115 and the conductive layer. When a laminated structure is used for the common electrode 115, at least one layer from among the layers constituting the common electrode 115 is provided as the conductive layer.

[0476] The upper surface of the conductive layer 137q may be covered with a mask to prevent the protective layer 131 from being formed on the conductive layer 137q. As the mask, for example, a metal mask (area metal mask) may be used, or an adhesive or suction tape or film may be used. By forming the protective layer 131 with the mask in place and then removing the mask, the conductive layer 137q can be kept exposed even after the protective layer 131 has been formed.

[0477] Using this method, a region of the connection portion 204 where the protective layer 131 is not provided can be formed, and in that region, the conductive layer 137q and the FPC 172 can be electrically connected via the connecting layer 242.

[0478] In this example, a configuration in which conductive layers 135q and 137q are provided on the connection portion 204 is shown, but the present invention is not limited to this. The connection portion 204 may also be configured without one or both of the conductive layers 135q and 137q. If neither the conductive layer 135q nor the conductive layer 137q is provided on the connection portion 204, the conductive layer 166 will be exposed on the upper surface of the connection portion 204, and the conductive layer 166 will be in contact with the connection layer 242.

[0479] The display device 100G is a top-emission type. The light emitted by the light-emitting device is emitted towards the substrate 152. It is preferable to use a material with high transmittance to visible light for the substrate 152. The pixel electrodes contain a material that reflects visible light, and the counter electrodes (common electrodes 115) contain a material that transmits visible light.

[0480] The display device 100G may have a polarizing plate. The polarizing plate can be placed, for example, on the substrate 152.

[0481] The laminated structure from the substrate 151 to the insulating layer 214 corresponds to layer 101 in Embodiment 1.

[0482] Both transistors 201 and 205 are formed on the substrate 151. These transistors can be formed by the same process.

[0483] On the substrate 151, insulating layers 211, 213, 215, and 214 are provided in this order. A portion of insulating layer 211 functions as a gate insulating layer for each transistor. A portion of insulating layer 213 functions as a gate insulating layer for each transistor. Insulating layer 215 is provided covering the transistors. Insulating layer 214 is provided covering the transistors and functions as a planarization layer. The number of gate insulating layers and insulating layers covering the transistors are not limited and can be a single layer or two or more layers, respectively.

[0484] It is preferable to use a material that does not easily allow impurities such as water and hydrogen to diffuse into at least one layer of the insulating layer covering the transistor. This allows the insulating layer to function as a barrier layer. With such a configuration, the diffusion of impurities from the outside into the transistor can be effectively suppressed, thereby improving the reliability of the display device.

[0485] It is preferable to use inorganic insulating films as insulating layers 211, 213, and 215, respectively. Examples of inorganic insulating films that can be used include silicon nitride film, silicon oxynitride film, silicon oxide film, silicon nitride film, aluminum oxide film, and aluminum nitride film. Alternatively, hafnium oxide film, yttrium oxide film, zirconium oxide film, gallium oxide film, tantalum oxide film, magnesium oxide film, lanthanum oxide film, cerium oxide film, and neodymium oxide film can be used. Furthermore, two or more of the above insulating films can be laminated and used.

[0486] An organic insulating layer is preferred for the insulating layer 214, which functions as a planarization layer. Examples of materials that can be used for the organic insulating layer include acrylic resin, polyimide resin, epoxy resin, polyamide resin, polyimidoamide resin, siloxane resin, benzocyclobutene resin, phenol resin, and precursors of these resins. The insulating layer 214 can also be a laminated structure of an organic insulating layer and an inorganic insulating layer. The outermost layer of the insulating layer 214 preferably functions as an etching protection layer. This makes it possible to suppress the formation of recesses in the insulating layer 214 when forming the conductive layer 105R, pixel electrode 111R, or conductive layer 135R. Alternatively, recesses may be provided in the insulating layer 214 when processing the conductive layer 105R, pixel electrode 111R, or conductive layer 135R.

[0487] Transistors 201 and 205 have a conductive layer 221 that functions as a gate, an insulating layer 211 that functions as a gate insulating layer, conductive layers 222a and 222b that function as source and drain, a semiconductor layer 231, an insulating layer 213 that functions as a gate insulating layer, and a conductive layer 223 that functions as a gate. Here, the same hatching pattern is applied to multiple layers obtained by processing the same conductive film. The insulating layer 211 is located between the conductive layer 221 and the semiconductor layer 231. The insulating layer 213 is located between the conductive layer 223 and the semiconductor layer 231.

[0488] The transistor structure of the display device of this embodiment is not particularly limited. For example, planar transistors, staggered transistors, inverse staggered transistors, etc., can be used. Furthermore, either a top-gate or bottom-gate transistor structure may be used. Alternatively, gates may be provided above and below the semiconductor layer in which the channel is formed.

[0489] Transistors 201 and 205 employ a configuration in which a semiconductor layer on which a channel is formed is sandwiched between two gates. The transistors can be driven by connecting the two gates and supplying them with the same signal. Alternatively, the threshold voltage of the transistors can be controlled by applying a potential to control the threshold voltage to one of the two gates and a potential to drive the other gate.

[0490] This section describes materials that can be used in the semiconductor layer of a transistor.

[0491] The semiconductor material is not particularly limited. For example, semiconductors made of elemental materials or compound semiconductors can be used. Examples of semiconductors made of elemental materials include silicon and germanium. Examples of compound semiconductors include gallium arsenide and silicon germanium. Other examples of compound semiconductors include organic semiconductors, nitride semiconductors, and oxide semiconductors (OS). These semiconductor materials may contain impurities as dopants.

[0492] The crystallinity of the semiconductor material is not particularly limited, and any amorphous semiconductor, single-crystal semiconductor, or semiconductor having crystalline properties other than single crystal (microcrystalline semiconductor, polycrystalline semiconductor, or semiconductor having a crystalline region in part) can be used. Using a single-crystal semiconductor or a semiconductor having crystalline properties is preferable because it can suppress the degradation of transistor characteristics.

[0493] The semiconductor layer can be made of, for example, silicon. Examples of silicon include single-crystal silicon, polycrystalline silicon, microcrystalline silicon, and amorphous silicon. An example of polycrystalline silicon is low-temperature polysilicon (LTPS). Transistors using amorphous silicon for the channel formation region can be formed on large glass substrates and can be manufactured at low cost. Transistors using polycrystalline silicon for the channel formation region have high field-effect mobility and can operate at high speeds. Transistors using microcrystalline silicon for the channel formation region have higher field-effect mobility than transistors using amorphous silicon and can operate at high speeds. Note that transistors using silicon for the channel formation region are sometimes referred to as Si transistors, and transistors using LTPS for the channel formation region are sometimes referred to as LTPS transistors.

[0494] It is preferable to use a metal oxide (hereinafter also referred to as an oxide semiconductor) that exhibits semiconductor properties for the semiconductor layer. Transistors using oxide semiconductors (hereinafter also referred to as OS transistors) have extremely high field-effect mobility compared to transistors using amorphous silicon. Furthermore, OS transistors have a remarkably low off-current and can retain the charge stored in a capacitor connected in series with the transistor for a long period of time. In addition, by applying OS transistors, the power consumption of the display device can be reduced. When a metal oxide is used for the semiconductor layer, the semiconductor layer can be called a metal oxide layer or a metal oxide film.

[0495] To increase the luminescence brightness of a light-emitting device included in a pixel circuit, it is necessary to increase the amount of current flowing through the light-emitting device. To achieve this, the source-drain voltage of the drive transistor included in the pixel circuit must be increased. Compared to Si transistors, OS transistors have a higher breakdown voltage between their source and drain, allowing a higher voltage to be applied to the source-drain of an OS transistor. Therefore, by using an OS transistor as the drive transistor in the pixel circuit, the amount of current flowing through the light-emitting device can be increased, thereby increasing the luminescence brightness of the light-emitting device.

[0496] When a transistor operates in the saturation region, an OS transistor exhibits a smaller change in source-drain current in response to a change in gate-source voltage than a Si transistor. Therefore, by using an OS transistor as the driving transistor in a pixel circuit, the current flowing between the source and drain can be precisely controlled by the change in gate-source voltage, thereby controlling the amount of current flowing to the light-emitting device. This allows for an increase in the number of grayscale levels in the pixel circuit.

[0497] In terms of the saturation of the current flowing when a transistor operates in the saturation region, OS transistors can supply a more stable current (saturation current) than Si transistors, even when the source-drain voltage gradually increases. Therefore, by using OS transistors as driving transistors, a stable current can be supplied to the light-emitting device even if there are variations in the current-voltage characteristics of the EL device. In other words, when operating in the saturation region, OS transistors can stabilize the luminescence brightness of the light-emitting device because the change in source-drain current is small even when the source-drain voltage is high.

[0498] As described above, by using OS transistors in the drive transistors included in the pixel circuit, it is possible to achieve "suppression of black level floating," "increase in luminescence brightness," "multi-gradation," and "suppression of variations in light-emitting devices."

[0499] All of the transistors in the display unit 162 may be OS transistors, all of the transistors in the display unit 162 may be Si transistors, or some of the transistors in the display unit 162 may be OS transistors and the rest may be Si transistors.

[0500] For example, by using both an LTPS transistor and an OS transistor in the display unit 162, a display device with low power consumption and high driving capability can be realized. Furthermore, a configuration combining an LTPS transistor and an OS transistor is sometimes referred to as LTPO. As a more preferable example, it is preferable to apply an OS transistor to a transistor that functions as a switch for controlling conduction and non-conduction between wires, and an LTPS transistor to a transistor that controls current.

[0501] For example, one of the transistors in the display unit 162 functions as a transistor for controlling the current flowing to the light-emitting device, and can also be called a drive transistor. One of the source and drain of the drive transistor is connected to the pixel electrode of the light-emitting device. It is preferable to use an LTPS transistor for the drive transistor. This makes it possible to increase the current flowing to the light-emitting device in the pixel circuit.

[0502] On the other hand, the other transistor in the display unit 162 functions as a switch for controlling the selection and deselection of pixels, and can also be called a selection transistor. The gate of the selection transistor is connected to the gate line, and one of the source and drain is connected to the source line (signal line). It is preferable to use an OS transistor for the selection transistor. This makes it possible to maintain the gradation of pixels even when the frame frequency is significantly low (for example, 1 fps or less), and thus power consumption can be reduced by stopping the driver when displaying a still image.

[0503] Thus, a display device according to one aspect of the present invention can combine a high aperture ratio, high resolution, high display quality, and low power consumption.

[0504] One embodiment of the present invention is a display device having an OS transistor and an MML (metal maskless) structured light-emitting device. This configuration makes it possible to extremely reduce the leakage current that can flow through the transistor and the leakage current that can flow between adjacent light-emitting devices (also called lateral leakage current or side leakage current). Furthermore, with this configuration, when an image is displayed on the display device, the observer can observe one or more of the following: image sharpness, image clarity, high saturation, and high contrast ratio. Moreover, by having an extremely low leakage current that can flow through the transistor and lateral leakage current between light-emitting devices, it is possible to achieve a display with minimal light leakage (so-called black level floating) that may occur when displaying black.

[0505] In particular, even among MML-structured light-emitting devices, applying the aforementioned SBS structure results in a configuration where the layers between light-emitting devices (for example, an organic layer used in common between light-emitting devices, also called a common layer) are separated, thus eliminating or significantly reducing side leakage. Furthermore, since the SBS structure allows for the optimization of materials and configurations for each light-emitting element, the range of material and configuration selection is broadened, making it easier to improve brightness and reliability.

[0506] This section describes metal oxides that can be used in semiconductor layers.

[0507] The metal oxide used in the semiconductor layer preferably contains indium. For example, indium oxide can be suitably used as the metal oxide. Alternatively, for example, gallium oxide or zinc oxide can be used as the metal oxide. Alternatively, the metal oxide preferably contains one or both of indium and zinc. Alternatively, the metal oxide preferably has one or more elements selected from indium, element M, and zinc. Element M is a metallic or metalloid element with a high bond energy with oxygen, for example, a metallic or metalloid element with a higher bond energy with oxygen than indium. Specific examples of element M include aluminum, gallium, tin, yttrium, titanium, vanadium, chromium, manganese, iron, cobalt, nickel, zirconium, molybdenum, hafnium, tantalum, tungsten, lanthanum, cerium, neodymium, magnesium, calcium, strontium, barium, boron, silicon, germanium, and antimony. The element M present in the metal oxide is preferably one or more of the above elements, more preferably one or more selected from gallium, aluminum, tin, and yttrium, and even more preferably one or more of gallium, aluminum, and tin. These elements are more preferred because they have high bonding energy with oxygen and their ionic radii are similar to those of indium or zinc. Furthermore, tin is more preferred because its tetravalent state can increase carrier mobility. In this specification, metallic elements and metalloid elements are sometimes collectively referred to as "metallic elements," and the "metallic elements" described in this specification may include metalloid elements.

[0508] Examples of metal oxides include indium zinc oxide (In-Zn oxide, also known as IZO®), indium tin oxide (In-Sn oxide, also known as ITO), indium titanium oxide (In-Ti oxide), indium gallium oxide (In-Ga oxide), indium tungsten oxide (In-W oxide, also known as IWO), indium gallium aluminum oxide (In-Ga-Al oxide), indium gallium tin oxide (In-Ga-Sn oxide, also known as IGTO), gallium zinc oxide (Ga-Zn oxide, also known as GZO), and aluminum zinc oxide (Al-Zn oxide). Other suitable materials include indium aluminum zinc oxide (also written as AZO), indium aluminum zinc oxide (In-Al-Zn oxide, also written as IAZO), indium tin zinc oxide (In-Sn-Zn oxide, also written as ITZO®), indium titanium zinc oxide (In-Ti-Zn oxide), indium gallium zinc oxide (In-Ga-Zn oxide, also written as IGZO), indium gallium tin zinc oxide (In-Ga-Sn-Zn oxide, also written as IGZTO), indium gallium aluminum zinc oxide (In-Ga-Al-Zn oxide, also written as IGAZO, IGZAO, or IAGZO), etc. Alternatively, silicon-containing indium tin oxide (also written as ITSO), gallium tin oxide (Ga-Sn oxide), aluminum tin oxide (Al-Sn oxide), etc.

[0509] Furthermore, the metal oxide can be composed of one or more metal elements with high periodic numbers in the periodic table, either in place of indium or in addition to indium. The greater the overlap of the metal element orbitals, the greater the carrier conduction in the metal oxide tends to be. Therefore, by including metal elements with high periodic numbers, the field-effect mobility of the transistor can be increased. Examples of metal elements with high periodic numbers include those belonging to the 5th period and those belonging to the 6th period. Specifically, these metal elements include yttrium, zirconium, silver, cadmium, tin, antimony, barium, lead, bismuth, lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium. Lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium are called light rare earth elements.

[0510] Metal oxides may contain one or more nonmetallic elements. The presence of nonmetallic elements in metal oxides can increase carrier concentration or reduce the band gap, potentially improving the field-effect mobility of transistors. Examples of nonmetallic elements include carbon, nitrogen, phosphorus, sulfur, selenium, fluorine, chlorine, bromine, and hydrogen.

[0511] By increasing the ratio of indium atoms to the sum of all metal element atoms in the metal oxide, the field-effect mobility of the transistor can be increased. Furthermore, this allows for a transistor with a high on-current, resulting in a transistor that operates at high speed.

[0512] In this specification, the ratio of the number of indium atoms to the sum of the total number of atoms of all contained metal elements may be referred to as the indium content. The same applies to other metal elements. If element M contains multiple elements, the sum of the ratios of the number of atoms of element M to the sum of the total number of atoms of all contained metal elements may be referred to as the element M content.

[0513] Transistors using metal oxides with a high indium content in their semiconductor layer have high field-effect mobility, allowing them to achieve a large on-current even with a small channel width. Therefore, the transistor's footprint can be reduced. By using metal oxides with a high indium content in the semiconductor layer of the pixel circuit, the footprint of the pixel circuit can be reduced, enabling a high-resolution display device. Furthermore, by using metal oxides with a high indium content in the semiconductor layer of the drive circuit (scan line drive circuit and signal line drive circuit), the footprint of the drive circuit can be reduced, enabling a narrow-bezel display device.

[0514] By increasing the zinc content in a metal oxide, a highly crystalline metal oxide is obtained, which suppresses the diffusion of impurities within the metal oxide. Therefore, fluctuations in the electrical characteristics of the transistor are suppressed, and reliability can be improved.

[0515] By increasing the content of element M in the metal oxide, a metal oxide with a large band gap can be obtained. This allows for the formation of oxygen vacancies (V) in the metal oxide. Ｏ The formation of oxygen deficiency (V) is suppressed, and oxygen deficiency (V) is inhibited. Ｏ Carrier generation caused by ) is suppressed. Therefore, the shift in the transistor's threshold voltage is suppressed, and the drain current (hereinafter also referred to as the cutoff current) that flows when the gate voltage (Vg) is 0V can be reduced, making it possible to create a normally-off transistor. In addition, it is possible to create a transistor with a small off current. Furthermore, fluctuations in the transistor's electrical characteristics are suppressed, and reliability can be improved.

[0516] By using a metal oxide with a large band gap in the semiconductor layer, oxygen vacancies (V) can be created in the semiconductor layer by light. Ｏ The formation of ) is suppressed, and the shift in the transistor's threshold voltage can be suppressed. Therefore, a transistor with high reliability against light can be made. A metal oxide having element M can be suitably used in the semiconductor layer of a transistor provided in a region where light can be incident (for example, a display unit).

[0517] Here, in metal oxides, oxygen deficiency (V Ｏ A defect in which hydrogen has entered (hereinafter referred to as V Ｏ The H (denoted as H) functions as a donor, and electrons, which are carriers, may be generated. When a metal oxide is used in the semiconductor layer, the V of the channel formation region Ｏ It is preferable to reduce H as much as possible and make it high-purity intrinsic or substantially high-purity intrinsic. In this way, V Ｏ To obtain a metal oxide with sufficiently reduced H content, impurities such as water and hydrogen must be removed from the metal oxide (sometimes referred to as dehydration and dehydrogenation treatment), and oxygen must be supplied to the metal oxide to eliminate oxygen deficiency (V). Ｏ It is important to repair ). Ｏ By using a metal oxide with sufficiently reduced impurities such as H in the channel formation region, a transistor with stable electrical characteristics can be produced.

[0518] It is preferable to use a crystalline metal oxide for the semiconductor layer. Examples of crystalline metal oxide structures include single-crystal structures, polycrystalline structures, CAAC (c-axis aligned crystal) structures, and microcrystalline (nc: nano-crystal) structures. By using a crystalline metal oxide, the defect level density in the semiconductor layer can be reduced, enabling the realization of a highly reliable semiconductor device. On the other hand, by using a metal oxide with low crystallinity, it is possible to realize a transistor that can carry a large current.

[0519] The semiconductor layer preferably has high crystallinity, and is preferably polycrystalline or monocrystalline. A polycrystalline indium oxide film is preferably used as the semiconductor layer, and a monocrystalline indium oxide film is more preferably used.

[0520] The crystallinity of a semiconductor layer can be analyzed, for example, by X-ray diffraction (XRD), transmission electron microscopy (TEM), or electron diffraction (ED). Alternatively, a combination of these methods can be used for analysis.

[0521] Single-crystal films are particularly preferred because they do not have grain boundaries, thus suppressing carrier scattering at grain boundaries and enabling transistors with high field-effect mobility. Compared to microcrystalline and amorphous films, polycrystalline films can reduce carrier scattering and enable transistors with high field-effect mobility. When using a polycrystalline film as the semiconductor layer, it is preferable that the grain size of the crystals contained in the semiconductor layer is large. By using a polycrystalline film with large grain size, the number of crystal grain boundaries located in the channel formation region can be reduced, and the length of the crystal grain boundaries located in the channel formation region can be shortened, thus enabling transistors with high field-effect mobility. Furthermore, it is preferable to have a small number of crystal grain boundaries that intersect with the direction of drain current flow (also known as the channel length direction) in the channel formation region. Note that even with a polycrystalline film, if there are no crystal grain boundaries located in the channel formation region, the same effects as a single-crystal film can be achieved.

[0522] The grain size and grain boundaries of the crystal grains contained in the semiconductor layer can be analyzed, for example, by transmission electron microscopy (TEM), scanning transmission electron microscopy (STEM), or electron backscatter diffraction (EBSD or EBSP). Alternatively, a combination of these methods can be used for analysis.

[0523] In this specification, a grain boundary refers to, for example, the boundary between adjacent grains with different crystal orientations. Therefore, in this specification, boundaries between adjacent grains with the same crystal orientation are not included in grain boundaries. For example, even if a boundary is observed between two grains in a TEM image, if the crystal orientations of those two grains are the same or nearly the same, the boundary may not be called a grain boundary. Also, in EBSD, if the difference in crystal orientation between adjacent measurement points is small (for example, if the difference in crystal orientation is less than 5 degrees), these measurement points can be considered to belong to the same grain.

[0524] Furthermore, if the semiconductor layer is thin, it may not be possible to evaluate its crystallinity and grain size.

[0525] It is preferable to use CAAC-OS or nc-OS for the semiconductor layer.

[0526] CAAC-OS has multiple layered crystals. The c-axis of these crystals is oriented in the direction normal to the surface to be formed. Preferably, the semiconductor layer has layered crystals that are parallel or approximately parallel to the surface to be formed. As a result, the layered crystals of the semiconductor layer are formed parallel or approximately parallel to the channel length direction of the transistor, making it possible to create a transistor with a large on-current.

[0527] By using a highly crystalline metal oxide in the semiconductor layer, the defect level density in the semiconductor layer can be reduced. On the other hand, by using a less crystalline metal oxide, it is possible to realize a transistor that can conduct large currents.

[0528] The semiconductor layer can also utilize a layered material that functions as a semiconductor. A layered material is a general term for a group of materials having a layered crystalline structure. A layered crystalline structure is a structure in which layers formed by covalent or ionic bonds are stacked via weaker bonds than covalent or ionic bonds, such as van der Waals bonds. Layered materials have high electrical conductivity within a unit layer, that is, high two-dimensional electrical conductivity. By using a material that functions as a semiconductor and has high two-dimensional electrical conductivity in the channel formation region, it is possible to provide a transistor with a large on-current.

[0529] Examples of the above-mentioned layered materials include graphene, silicene, and chalcogenides. Chalcogenides are compounds containing chalcogens (elements belonging to Group 16). Examples of chalcogenides include transition metal chalcogenides and Group 13 chalcogenides. Specifically, a transition metal chalcogenide applicable as a channel formation region in transistors is molybdenum sulfide (typically MoS ２ ), molybdenum selenide (typically MoSe ２ ), molybdenum tellurium (typically MoTe ２ ), tungsten sulfide (typically WS２ ), tungsten selenide (typically WSe ２ ), tungsten tellurium (typically WTe ２ ), hafnium sulfide (typically HfS ２ ), hafnium selenide (typically HfSe ２ ), zirconium sulfide (typically ZrS ２ ), zirconium selenide (typically ZrSe ２ ) are some examples.

[0530] The transistors in circuit 164 and the transistors in display unit 162 may have the same structure or different structures. The structures of the multiple transistors in circuit 164 may all be the same or there may be two or more different structures. Similarly, the structures of the multiple transistors in display unit 162 may all be the same or there may be two or more different structures.

[0531] All of the transistors in the display unit 162 may be OS transistors, all of the transistors in the display unit 162 may be Si transistors, or some of the transistors in the display unit 162 may be OS transistors and the rest may be Si transistors.

[0532] For example, by using both an LTPS transistor and an OS transistor in the display unit 162, a display device with low power consumption and high driving capability can be realized. Furthermore, a configuration combining an LTPS transistor and an OS transistor is sometimes referred to as LTPO. As a more preferable example, it is preferable to apply an OS transistor to a transistor that functions as a switch for controlling conduction and non-conduction between wires, and an LTPS transistor to a transistor that controls current.

[0533] For example, one of the transistors in the display unit 162 functions as a transistor for controlling the current flowing to the light-emitting device, and can also be called a drive transistor. One of the source and drain of the drive transistor is electrically connected to the pixel electrode of the light-emitting device. It is preferable to use an LTPS transistor for the drive transistor. This makes it possible to increase the current flowing to the light-emitting device in the pixel circuit.

[0534] On the other hand, the other transistor in the display unit 162 functions as a switch for controlling the selection and deselection of pixels, and can also be called a selection transistor. The gate of the selection transistor is electrically connected to the gate line, and one of the source and drain is electrically connected to the source line (signal line). It is preferable to use an OS transistor for the selection transistor. This makes it possible to maintain the gradation of pixels even when the frame frequency is significantly reduced (for example, 1 fps or less), and thus power consumption can be reduced by stopping the driver when displaying a still image.

[0535] Thus, a display device according to one aspect of the present invention can combine a high aperture ratio, high resolution, high display quality, and low power consumption.

[0536] Furthermore, one embodiment of the present invention is a display device having an OS transistor and a light-emitting device with an MML (metal maskless) structure. This configuration makes it possible to extremely reduce the leakage current that can flow through the transistor and the leakage current that can flow between adjacent light-emitting devices (also called lateral leakage current or side leakage current). With this configuration, when an image is displayed on the display device, the observer can observe one or more of the following: image sharpness, image clarity, high saturation, and high contrast ratio. Moreover, by having an extremely low leakage current that can flow through the transistor and lateral leakage current between light-emitting devices, it is possible to achieve a display with as little light leakage (so-called black floating) that may occur when displaying black as possible.

[0537] In particular, even among MML-structured light-emitting devices, applying the aforementioned SBS structure results in a configuration where the layers provided between light-emitting devices (for example, an organic layer used in common between light-emitting devices, also called a common layer) are separated, thus eliminating or significantly reducing side leakage.

[0538] Figures 24A and 24B show other examples of transistor configurations.

[0539] Transistors 209 and 210 each have a conductive layer 221 that functions as a gate, an insulating layer 211 that functions as a gate insulating layer, a semiconductor layer 231 having a channel forming region 231i and a pair of low-resistance regions 231n, a conductive layer 222a connected to one of the pair of low-resistance regions 231n, a conductive layer 222b connected to the other of the pair of low-resistance regions 231n, an insulating layer 225 that functions as a gate insulating layer, a conductive layer 223 that functions as a gate, and an insulating layer 215 covering the conductive layer 223. The insulating layer 211 is located between the conductive layer 221 and the channel forming region 231i. The insulating layer 225 is located at least between the conductive layer 223 and the channel forming region 231i. Furthermore, an insulating layer 218 covering the transistor may be provided.

[0540] In the transistor 209 shown in Figure 24A, an example is shown where the insulating layer 225 covers the top and side surfaces of the semiconductor layer 231. The conductive layers 222a and 222b are connected to the low-resistance region 231n through openings provided in the insulating layers 225 and 215, respectively. Of the conductive layers 222a and 222b, one functions as a source and the other functions as a drain.

[0541] On the other hand, in the transistor 210 shown in Figure 24B, the insulating layer 225 overlaps with the channel formation region 231i of the semiconductor layer 231, but does not overlap with the low-resistance region 231n. For example, the structure shown in Figure 24B can be fabricated by processing the insulating layer 225 using the conductive layer 223 as a mask. In Figure 24B, an insulating layer 215 is provided covering the insulating layer 225 and the conductive layer 223, and the conductive layer 222a and the conductive layer 222b are connected to the low-resistance region 231n, respectively, through openings in the insulating layer 215.

[0542] It is preferable to provide a light-shielding layer 117 on the surface of the substrate 152 that faces the substrate 151. The light-shielding layer 117 can be provided between adjacent light-emitting devices, at connection points 140, and in circuits 164, etc. In addition, various optical components can be arranged on the outside of the substrate 152.

[0543] Substrates 151 and 152 can each be made of materials that can be used for substrate 120.

[0544] The resin layer 142 can be made of the same material used for the resin layer 122.

[0545] The connecting layer 242 can be made of an anisotropic conductive film (ACF), an anisotropic conductive paste (ACP), or the like.

[0546] Figure 23 shows an example of a transistor configuration different from those shown in Figures 22, 24A, and 24B.

[0547] The transistors 201V and 205V shown in Figure 23 have a conductive layer 221 that functions as a gate, an insulating layer 211 that functions as a gate insulating layer, a semiconductor layer 231, a conductive layer 222a, and a conductive layer 222b. Conductive layer 222a functions as one of the source and drain, and conductive layer 222b functions as the other of the source and drain.

[0548] An insulating layer 160 is provided on the conductive layer 222a, and a conductive layer 222b is provided on the insulating layer 160. The conductive layer 222b and the insulating layer 160 have openings that reach the conductive layer 222a. The semiconductor layer 231 is provided so as to cover the openings and is in contact with the conductive layer 222a at the openings. The semiconductor layer 231 is also in contact with the side surfaces of the insulating layer 160 and the conductive layer 222b. Preferably, the semiconductor layer 231 is in contact not only with the side surfaces of the conductive layer 222b but also with the upper surface of the conductive layer 222b. The region of the semiconductor layer 231 in contact with the conductive layer 222a functions as one of the source region and the drain region, and the region in contact with the conductive layer 222b functions as the other of the source region and the drain region. In the semiconductor layer 231, the channel-forming region is located between the source region and the drain region. An insulating layer 211 is provided on a semiconductor layer 231, and a conductive layer 221 is provided on the insulating layer 211. The conductive layer 221 has a region that overlaps with the semiconductor layer 231 via the insulating layer 211 at its opening.

[0549] In transistors 201V and 205V, the source electrode and drain electrode are located at different heights relative to the surface of the substrate 151, which is the surface to be formed, and the drain current flows perpendicular to, or approximately perpendicular to, the surface of the substrate 151. In other words, the channel length direction has a component in the height direction (vertical direction), so transistors 201V and 205V can also be called VFETs (Vertical Field Effect Transistors), vertical transistors, vertical channel transistors, or vertical channel type transistors, respectively.

[0550] The channel lengths of transistors 201V and 205V can be controlled by the thickness of the insulating layer (in this case, insulating layer 160) sandwiched between the source electrode and the drain electrode. Therefore, transistors 201V and 205V with channel lengths shorter than the minimum exposure dimension of the exposure apparatus used for manufacturing the transistors can be manufactured with high precision. By shortening the channel lengths of transistors 201V and 205V, the on-current can be increased. This makes it possible to create a display device that operates at high speed.

[0551] Transistors 201V and 205V can each have their source electrode, semiconductor layer, and drain electrode stacked on top of each other. Therefore, compared to so-called planar transistors in which these are arranged in a planar manner, the occupied area can be significantly reduced. By applying VFETs to the pixel circuits of a display device, the occupied area of ​​the pixel circuits can be reduced, enabling a high-definition display device. Furthermore, by applying VFETs to the drive circuits of a display device (for example, one or both of the gate line drive circuit and the source line drive circuit), the occupied area of ​​the drive circuits can be reduced, enabling a narrow-bezel display device.

[0552] The insulating layer 160 can be in a laminated structure. Figure 24C shows an example configuration having an insulating layer 160, an insulating layer 160a, an insulating layer 160b on the insulating layer 160a, and an insulating layer 160c on the insulating layer 160b.

[0553] At least the region of the semiconductor layer 231 that is in contact with the insulating layer 160b functions as the channel formation region of the transistor 206. It is preferable that the insulating layer 160b releases oxygen when heat is applied. This reduces the oxygen deficiency (V) in the channel formation region. Ｏ : Oxygen Vaccine), and oxygen deficiency (V Ｏ A defect in which hydrogen has entered (hereinafter referred to as V Ｏ This can reduce (also written as H). It is preferable to use an oxide insulating film as the insulating layer 160b. For example, a silicon oxide film or a silicon oxide nitride film can be suitably used as the insulating layer 160b.

[0554] The insulating layer 160a and insulating layer 160c function as barrier layers that prevent oxygen from detaching from the insulating layer 160b to the insulating layer 160a side and the insulating layer 160c side, respectively. By sandwiching the insulating layer 160b between the insulating layer 160a and the insulating layer 160c, the amount of oxygen supplied from the insulating layer 160b to the channel formation region can be increased, thereby reducing oxygen deficiency (V) in the channel formation region. Ｏ ) and V ＯH can be efficiently reduced. Therefore, a transistor with good electrical characteristics and high reliability can be obtained. The insulating layer 160a and the insulating layer 160c can each be made of the same material that can be used for the insulating layer 332.

[0555] The transistor 208 shown in Figure 24D has an insulating layer 225 that functions as a gate insulating layer and a conductive layer 223 that functions as a gate. Figure 24D shows an example configuration in which the conductive layer 223 is located between the insulating layer 160a and the insulating layer 160b. The insulating layer 160, the conductive layer 223 and the conductive layer 222b have an opening that reaches the conductive layer 222a. The insulating layer 225 is provided along the side wall of the opening. A semiconductor layer 231 is provided on the insulating layer 225. The semiconductor layer 231 has a region sandwiched between the conductive layer 221 via the insulating layer 211 and the conductive layer 223 via the insulating layer 225.

[0556] Furthermore, the display device can also be configured as a bottom-emission type.

[0557] In a bottom-emission configuration, the light emitted by the light-emitting device is emitted towards the substrate 151. It is preferable to use a material with high transparency to visible light for the substrate 151. On the other hand, the light transmittance of the material used for the substrate 152 is not a requirement.

[0558] A light-shielding layer may be formed between the substrate 151 and the transistor 201, and between the substrate 151 and the transistor 205.

[0559] In a bottom-emission type configuration, it is preferable to use materials with high transmittance to visible light for each of the conductive layers 105R, 105G, 105B, 111R, 111G, 111B, 135R, 135G, 135B, 137R, 137G, and 137B. It is also preferable to use a material that reflects visible light for the common electrode 115.

[0560] The display device 100G shown in Figure 25 differs from that in Figure 22 mainly in that it has a light receiving device 150.

[0561] The light-receiving device 150 includes a pixel electrode 111S, a layer 113S on the pixel electrode 111S, a common layer 114 on the layer 113S, and a common electrode 115 on the common layer 114. The layer 113S has at least an active layer.

[0562] The conductive layer 105S is connected to the conductive layer 222b of the transistor 205 through openings provided in the insulating layers 214, 215, and 213. A layer 107S is provided on the conductive layer 105S, and a pixel electrode 111S is provided so as to cover the conductive layer 105S and the layer 107S. A recess is formed in the conductive layer 105S so as to cover the openings provided in the insulating layers 214, 215, and 213. This recess is filled with layer 107S.

[0563] A portion of the upper surface and sides of layer 113S are covered by insulating layers 125 and 127. A mask layer 118S is located between layer 113S and insulating layer 125. A common layer 114 is provided on layer 113S and insulating layers 125 and 127, and a common electrode 115 is provided on the common layer 114. The common layer 114 is a continuous film provided in common to both the light-receiving device and the light-emitting device.

[0564] The display device shown in Figure 25 can, for example, apply the pixel layout shown in Figures 20A to 20K, as described in Embodiment 3. Furthermore, for details of the display device having a light-receiving device, refer to Embodiments 1 and 6.

[0565] [Example of Display Device Configuration 2] By using flexible substrates as substrate 151 and substrate 152, the configurations shown in Figures 22, 23, and 25 can also be applied to the display device 100H shown in Figure 21B.

[0566] When applying the configurations shown in Figures 22, 23, and 25 to the display device 100H, a polarizing plate can be used instead of the substrate 152.

[0567] Furthermore, when applying the configurations shown in Figures 22, 23, and 25 to the display device 100H, the substrate 152 does not need to be provided. In this case, the light-emitting device can be sealed with the resin layer 142.

[0568] Figure 26 shows an example configuration including region P2 when the configuration shown in Figure 22 is applied to the display device 100H shown in Figure 21B.

[0569] The configuration shown in Figure 26 has a support 742, a resin layer 743, and an insulating layer 744 instead of the substrate 151. Alternatively, it may have a support 749 instead of the substrate 152.

[0570] A transistor or the like is provided on the insulating layer 744. An adhesive layer may also be provided between the support 742 and the resin layer 743.

[0571] The display device 100H can be folded in region P2 located between the display unit 162 and the connection unit 204 where the FPC 172 and the like are provided. As shown in Figure 26, by not providing the support units 742 and 749 in region P2, a part of the display device 100H can be folded with an extremely small radius of curvature.

[0572] Because region P2 has an insulating layer 125, a protective layer 131, etc., it is possible to suppress the diffusion of impurities such as moisture into the transistors, light-emitting elements, etc. of the display device 100H.

[0573] Although Figure 26 shows an example in which layer 107q is not provided at the connection portion 204, it is also possible to configure it with layer 107q. Furthermore, in the configurations shown in Figures 22, 23, and 25, it is also possible to configure it in which layer 107q is not provided at the connection portion 204.

[0574] Although Figure 26 shows an example where region P2 and its vicinity do not have layers 109, insulating layer 125, and insulating layer 127, region P2 and its vicinity may have layer 109 as shown in Figure 35A. Also, region P2 and its vicinity may have insulating layers 125 and insulating layer 127 as shown in Figure 35B. Furthermore, region P2 may have layers 109, insulating layer 125, and insulating layer 127 as shown in Figure 35C. By making the layer provided on region P2 thicker, it is possible to suppress the diffusion of impurities such as moisture into the transistors, light-emitting elements, etc. of the display device 100H. Also, by making the layer provided on region P2 thinner, it may become easier to bend.

[0575] Furthermore, region P2 can also be configured to have a resin layer 142.

[0576] This embodiment can be combined with other embodiments as appropriate.

[0577] (Embodiment 4) This embodiment describes an indium oxide film that can be used in the semiconductor layer of a transistor in a display device according to one aspect of the present invention. In this specification, indium oxide having at least a crystalline portion or crystalline region in the film is referred to as crystalline indium oxide (crystal IO) or crystalline indium oxide (crystalline IO). For example, crystal IO or crystalline IO can be single-crystal indium oxide, polycrystalline indium oxide, microcrystalline indium oxide, etc.

[0578] Indium oxide is a semiconductor material with completely different physical properties from oxide semiconductors such as In-Ga-Zn oxide (hereinafter also referred to as IGZO) and zinc oxide.

[0579] The carrier concentration dependence of the hole (Hall) mobility of indium oxide, silicon, and IGZO is described. Figure 36A shows silicon (Si) and indium oxide (InO Ｘ Figure 36B is a schematic diagram of the carrier concentration dependence of hole mobility with respect to IGZO.

[0580] First, as indicated by the arrows in Figure 36B, IGZO tends to exhibit higher hole mobility as the carrier concentration increases. On the other hand, as indicated by the arrows in Figure 36A, indium oxide tends to exhibit higher hole mobility as the carrier concentration decreases (see Non-Patent Literature 1). This trend is similar to that of silicon, where the lower the concentration of dopants (impurities) in the material, the less impurity scattering occurs and the higher the hole mobility. In other words, the higher the purity and intrinsic nature of indium oxide, the higher its hole mobility. From these results, it can be said that indium oxide, unlike IGZO, is a material with physical properties similar to silicon. Note that the properties of indium oxide shown in Figure 36A are assumed to be those of a single crystal. Therefore, when indium oxide is not a single crystal (for example, polycrystalline), the properties may differ from those shown in Figure 36A.

[0581] In Figure 36A, the low carrier concentration range R1 exhibits extremely high hole mobility, making it a suitable carrier concentration range for, for example, the channel formation region of a transistor. For example, in the case of indium oxide, the range R1 has a carrier concentration of 1 × 10⁻⁶. １５ cm −３ This range includes, for example, 1 × 10 １４ cm −３ The above is 1 x 10 １８ cm −３ The range is as follows: By sufficiently reducing the carrier concentration, the hole mobility value can be increased to 270 cm⁻¹. ２ It is expected that the concentration can be increased to approximately / (V·s). In addition, in indium oxide, the region where the carrier concentration is in the range R1 may contain elements that lower the carrier concentration. Examples of elements that lower the carrier concentration include magnesium, calcium, zinc, cadmium, and copper. By substituting these elements for indium, the carrier concentration can be lowered. Other examples of elements that lower the carrier concentration include nitrogen, phosphorus, arsenic, and antimony. For example, by substituting nitrogen, phosphorus, arsenic, or antimony for oxygen, the carrier concentration can be lowered.

[0582] On the other hand, the range R2 with high carrier concentration has low electrical resistance and can be said to be a suitable range of carrier concentration for applications such as the source and drain regions of a transistor, or for resistors or transparent conductive films. The range R2 is when the carrier concentration value is 1 × 10⁻⁶. ２０ cm −３ This range includes, for example, 1 × 10 １９ cm −３ The above is 1 x 10 ２２ cm −３ The range is as follows: By making the carrier concentration sufficiently high, the resistivity can be increased to 1 × 10⁻⁶. −４ It is expected that the level can be reduced to below Ω·cm.

[0583] Furthermore, in the indium oxide, the region where the carrier concentration is in the range R2 may contain elements that increase the carrier concentration. For example, it is preferable to include elements common to the source and drain electrodes of the transistor. Examples of elements that increase the carrier concentration include titanium, zirconium, hafnium, tantalum, tungsten, molybdenum, tin, silicon, and boron. In particular, it is more preferable to use elements in which the oxide is conductive or semiconducting.

[0584] In this way, indium oxide uses regions with low carrier concentrations for the transistor's channel formation region and regions with high carrier concentrations for the transistor's source and drain regions. In other words, indium oxide can be said to be an oxide in which valence electron control is possible. In IGZO, however, strain can form in the source and drain regions due to stress on the electrodes in contact with the IGZO, sometimes resulting in the formation of an n-type region. On the other hand, unlike IGZO, indium oxide allows for valence electron control, so it does not require the formation of strain in the film as in IGZO. Less strain in the film is expected to improve reliability. For example, by creating regions with carrier concentrations in the range R1 and range R2 shown in Figure 36A within the indium oxide film, a so-called n-i-n junction (a junction between an n-type region, an i-type region, and an n-type region) can be created. Valence electron control in silicon transistors is generally known. On the other hand, valence electron control in indium oxide transistors is a novel technological concept that would not normally be conceived. By applying the above technical concept, the indium oxide transistor described herein has two or more, preferably three or more, more preferably four or more, and most preferably five of the following features (1) to (5): (1) High on-current (in other words, high mobility). (2) Low off-current. (3) Normally off is possible. (4) High reliability. (5) High cutoff frequency (fT). For example, the indium oxide transistor described herein has high mobility, low off-current, and is normally off. This transistor is different from a transistor that is high mobility and normally on.

[0585] Next, we will describe indium oxide films applied to transistors. Indium oxide films are preferably crystalline (i.e., they have crystal grains). Examples of films with crystal grains include single-crystal films, polycrystalline films, or amorphous films containing crystal grains (also called microcrystalline films). In particular, polycrystalline films are preferred for indium oxide films, and single-crystal films are more preferred. Single-crystal films do not have crystal grain boundaries. Impurities that inhibit carrier flow (typically insulating impurities, insulating oxides, etc.) tend to segregate at crystal grain boundaries. By using single-crystal films, carrier scattering at crystal grain boundaries can be suppressed, enabling the realization of transistors exhibiting high field-effect mobility. Furthermore, it has the excellent effect of suppressing variations in transistor characteristics caused by these crystal grain boundaries.

[0586] Furthermore, polycrystalline films are preferable because they can reduce carrier scattering and exhibit high field-effect mobility compared to microcrystalline or amorphous films. When using polycrystalline films, it is preferable to use films with the largest possible grain size and few grain boundaries. In a transistor to which a polycrystalline indium oxide film is applied, if there are no grain boundaries in the channel formation region, or if no grain boundaries are observed, the channel formation region is located within the single-crystal region contained in the polycrystalline film, and therefore it can be considered a transistor to which single-crystal indium oxide is applied. The crystallinity of indium oxide can be analyzed, for example, by X-ray diffraction (XRD), transmission electron microscopy (TEM), or electron diffraction (ED). Alternatively, a combination of these methods may be used for analysis.

[0587] Furthermore, in this specification, a semiconductor layer in which no grain boundaries are observed in the channel-forming region, a semiconductor layer in which the channel-forming region is contained within a single crystal grain, or a semiconductor layer in which the direction of the crystal axes is the same in at least two regions within the channel-forming region can be called a single crystal film. In addition, a semiconductor layer in which, within a single crystal grain in the channel-forming region, the direction of other crystal axes changes continuously with respect to a certain crystal axis or crystal orientation as the axis of rotation can be called a single crystal film.

[0588] The channel formation region refers to the area within the semiconductor layer that overlaps with (or faces) the gate electrode via the gate insulating layer, and is located between the region in contact with the source electrode and the region in contact with the drain electrode. The current path in the channel formation region is the shortest distance between the source electrode and the drain electrode. Therefore, the crystal grains, grain boundaries, crystal axes, and crystal orientation in the channel formation region can be confirmed by cross-sectional observation including the semiconductor layer, source electrode, and drain electrode.

[0589] The indium oxide film in the channel-forming region is preferable to have a low impurity concentration. Impurities in the indium oxide film in the channel-forming region can act as a scattering source for carriers, and thus can cause a decrease in field-effect mobility. Furthermore, these impurities can also inhibit the crystal growth of the indium oxide film. Examples of impurities in the indium oxide film include boron and silicon. The concentration of these impurities in the indium oxide film is preferably 0.1% or less, and more preferably 0.01% (100 ppm) or less. Note that carbon, hydrogen, and other elements may be contained in the deposition gas or precursor during film formation, and may remain in the indium oxide film in higher concentrations than the above-mentioned impurities. The indium oxide film in the channel-forming region may also contain elements that can become trivalent cations like indium, as long as the crystal maintains a cubic crystal structure (Bixbite type). Examples include group 13 elements of the periodic table such as gallium and aluminum, and group 3 elements of the periodic table. Since these elements mainly exist as trivalent cations in oxides, the carrier concentration of indium oxide can be kept low.

[0590] By using such an indium oxide film in a transistor, the field-effect mobility of the transistor can be increased to 50 cm². ２ / (V·s) or more, preferably 100 cm ２ / (V·s) or more, more preferably 150 cm ２ / (V·s) or more, more preferably 200 cm ２ / (V·s) or more, more preferably 250 cm ２ It can be set to (V・s) or more.

[0591] One of the characteristics of indium oxide films is that they have higher oxygen permeability (diffusivity) compared to IGZO films. As shown in Figure 36C, indium oxide films (InO Ｘ Oxygen (O) diffusing into the indium oxide film passes through the indium oxide film, and oxygen molecules (O) ２ It is released as water molecules (H) by reacting with hydrogen contained in the membrane. ２ It may also be released as O. Furthermore, oxygen deficiencies (V) can form in the membrane. Ｏ If oxygen atoms are present, diffusing oxygen atoms will fill the oxygen deficiency. Indium oxide films allow oxygen to diffuse easily, so they can be said to fill oxygen deficiencies more easily than IGZO films.

[0592] Thus, because indium oxide films are more likely to reduce oxygen vacancies in the film compared to IGZO films, applying such indium oxide films to transistors makes it possible to realize transistors with extremely high reliability.

[0593] As shown in Figure 36C, the indium oxide film diffuses hydrogen. Hydrogen diffusing into the indium oxide film from the outside permeates the indium oxide film and forms hydrogen molecules (H ２ It is released as ) or, by reacting with oxygen contained in the membrane, it is released as water molecules.

[0594] A transistor using an indium oxide film is an accumulation-type transistor with electrons as majority carriers. Assuming that the relaxation time of carriers is a constant value, the smaller the effective mass of electrons (carriers), the higher the electron mobility. That is, by using indium oxide with a small effective mass of electrons in a transistor, the on-current or field-effect mobility of the transistor can be increased.

[0595] Table 1 shows the effective masses of single-crystalline indium oxide (here, In ２ O ３ ) and single-crystalline silicon (Si), respectively. As shown in Table 1, indium oxide is characterized by a small effective mass of electrons and a large effective mass of holes. In addition, the effective mass of electrons in indium oxide hardly depends on the crystal orientation. Therefore, by using crystalline indium oxide in a transistor, a transistor with a high field-effect mobility and a high frequency characteristic (also called f characteristic) can be realized. Furthermore, since the effective mass of holes is large, a transistor with an extremely small off-current can be realized. For example, by applying an indium oxide film to a vertical transistor, the off-current per 1 μm channel width can be 1 fA (1×10 −１５ A) or less, or 1 aA (1×10 −１８ A) or less at an environment of 125 °C, and 1 aA (1×10 −１８ A) or less, or 1 zA (1×10 −２１ A) or less at room temperature (25 °C). Also, as shown in Table 1, since indium oxide has a smaller effective mass of electrons and a larger effective mass of holes than silicon, it is possible to realize a transistor with a higher field-effect mobility and a lower off-current than a Si transistor.

[0596]

[0597] It is preferable to provide a seed layer so as to contact at least a part of the crystalline indium oxide film. It is preferable to use a material containing crystals having a small difference in lattice constant (also referred to as lattice mismatch) with indium oxide for the seed layer. Thereby, the crystallinity of the indium oxide film can be improved. Note that a substrate (for example, a single crystal substrate) may be used as one of the layers contacting at least a part of the crystalline indium oxide film.

[0598] As one method for evaluating the degree of lattice mismatch, there is a method using the value of lattice mismatch shown below. The lattice mismatch degree Δa [%] of the crystal of the formed film (here, the indium oxide film) with respect to the crystal of the seed layer is Δa = ((L １ −L ２ ) / L ２ ) × 100. Here, L １ is the length of the unit lattice vector or the lattice constant of the crystal of the formed film, and L ２ is the length of the unit lattice vector or the lattice constant of the crystal of the seed layer.

[0599] The lattice mismatch degree Δa between the seed layer and the indium oxide film is preferably as small as possible in terms of its absolute value, and most preferably 0. For example, Δa can be −5% or more and 5% or less, preferably −4% or more and 4% or less, more preferably −3% or more and 3% or less, and still more preferably −2% or more and 2% or less.

[0600] Here, the crystal of indium oxide has a cubic structure (bixbyite type). For example, the crystal of yttria stabilized zirconia (YSZ) can have a cubic structure (fluorite type). The lattice mismatch degree of the crystal of indium oxide with respect to the crystal of cubic-structured YSZ is within the range of −2% or more and 2% or less, and a single crystal film of indium oxide can be epitaxially grown on a YSZ substrate.

[0601] Furthermore, the crystal structure of the seed layer and the crystal structure of the indium oxide film do not necessarily have to be the same in terms of crystal system or crystal orientation. For example, a film with a hexagonal or trigonal crystal structure can be used beneath an indium oxide film with a cubic crystal structure. For example, by setting the crystal orientation of the surface of the seed layer to

[001] and the crystal orientation of the underside of the indium oxide film to

[111] , the requirements related to crystal orientation necessary for epitaxial growth can be met. Examples of hexagonal or trigonal crystals include wurtzite-type structures and YbFe. ２ O ４ Type structure, Yb ２ Fe ３ O ７ These include type structures and their modified type structures. YbFe ２ O ４ Type structure or Yb ２ Fe ３ O ７ An example of a crystal having a type structure is IGZO.

[0602] This embodiment can be implemented in appropriate combination with other embodiments described herein, at least in part.

[0603] (Embodiment 5) This embodiment describes a light-emitting device that can be used in a display device according to one aspect of the present invention.

[0604] As shown in Figure 27A, the light-emitting device has an EL layer 763 between a pair of electrodes (lower electrode 761 and upper electrode 762). The EL layer 763 can be composed of multiple layers, such as layer 780, light-emitting layer 771, and layer 790.

[0605] The light-emitting layer 771 has at least a light-emitting substance (also called a light-emitting material).

[0606] When the lower electrode 761 is the anode and the upper electrode 762 is the cathode, layer 780 has one or more of the following: a layer containing a material with high hole injection properties (hole injection layer), a layer containing a material with high hole transport properties (hole transport layer), and a layer containing a material with high electron blocking properties (electron blocking layer). Similarly, layer 790 has one or more of the following: a layer containing a material with high electron injection properties (electron injection layer), a layer containing a material with high electron transport properties (electron transport layer), and a layer containing a material with high hole blocking properties (hole blocking layer). When the lower electrode 761 is the cathode and the upper electrode 762 is the anode, layers 780 and 790 have the opposite configurations to those described above.

[0607] A configuration having a layer 780, a light-emitting layer 771, and a layer 790 provided between a pair of electrodes can function as a single light-emitting unit, and in this specification, the configuration shown in Figure 27A is referred to as a single structure.

[0608] Figure 27B shows a modified example of the EL layer 763 of the light-emitting device shown in Figure 27A. Specifically, the light-emitting device shown in Figure 27B has a layer 781 on the lower electrode 761, a layer 782 on the layer 781, a light-emitting layer 771 on the layer 782, a layer 791 on the light-emitting layer 771, a layer 792 on the layer 791, and an upper electrode 762 on the layer 792.

[0609] When the lower electrode 761 is the anode and the upper electrode 762 is the cathode, for example, layer 781 can be a hole injection layer, layer 782 a hole transport layer, layer 791 an electron transport layer, and layer 792 an electron injection layer. Also, when the lower electrode 761 is the cathode and the upper electrode 762 is the anode, layer 781 can be an electron injection layer, layer 782 an electron transport layer, layer 791 a hole transport layer, and layer 792 a hole injection layer. By using such a layer structure, carriers can be efficiently injected into the light-emitting layer 771, and the efficiency of carrier recombination within the light-emitting layer 771 can be increased.

[0610] As shown in Figures 27C and 27D, a configuration in which multiple light-emitting layers (light-emitting layers 771, 772, and 773) are provided between layer 780 and layer 790 is also a variation of the single structure. Although Figures 27C and 27D show an example with three light-emitting layers, the light-emitting layers in a single-structure light-emitting device may be two, four or more. Furthermore, a single-structure light-emitting device may have a buffer layer between the two light-emitting layers.

[0611] As shown in Figures 27E and 27F, a configuration in which multiple light-emitting units (light-emitting units 763a and 763b) are connected in series via a charge generation layer 785 (also called an intermediate layer) is referred to as a tandem structure in this specification. The tandem structure can also be called a stacked structure. A tandem structure enables a light-emitting device capable of high-brightness emission. Furthermore, compared to a single structure, the tandem structure reduces the current required to obtain the same brightness, thereby improving reliability.

[0612] Figures 27D and 27F show examples in which the display device has a layer 764 that overlaps with the light-emitting device. Figure 27D shows an example in which layer 764 overlaps with the light-emitting device shown in Figure 27C, and Figure 27F shows an example in which layer 764 overlaps with the light-emitting device shown in Figure 27E. In Figures 27D and 27F, a conductive film that transmits visible light is used for the upper electrode 762 in order to extract light to the upper electrode 762 side.

[0613] As layer 764, either or both of a color conversion layer and a color filter (coloring layer) can be used.

[0614] In Figures 27C and 27D, the light-emitting layers 771, 772, and 773 may be made of light-emitting materials that emit light of the same color, or even the same light-emitting material. For example, light-emitting materials that emit blue light may be used for the light-emitting layers 771, 772, and 773. In subpixels that emit blue light, the blue light emitted by the light-emitting device can be extracted. In subpixels that emit red light and subpixels that emit green light, a color conversion layer is provided as layer 764 as shown in Figure 27D, which converts the blue light emitted by the light-emitting device into longer wavelength light, allowing for the extraction of red or green light.

[0615] The light-emitting layers 771, 772, and 773 may each be made of different colored light-emitting materials. By mixing the light emitted by the light-emitting layers 771, 772, and 773, a configuration can be achieved in which white light emission is obtained. For example, a single-structure light-emitting device preferably has a light-emitting layer having a light-emitting material that emits blue light, and a light-emitting layer having a light-emitting material that emits visible light with a longer wavelength than blue.

[0616] For example, if a single-structure light-emitting device has three light-emitting layers, it is preferable that it has a light-emitting layer having a light-emitting material that emits red (R) light, a light-emitting layer having a light-emitting material that emits green (G) light, and a light-emitting layer having a light-emitting material that emits blue (B) light. The stacking order of the light-emitting layers can be R, G, B from the anode side, or R, B, G from the anode side, etc. In this case, a buffer layer may be provided between R and G or B.

[0617] For example, if a single-structure light-emitting device has two light-emitting layers, it is preferable that one layer has a light-emitting material that emits blue light, and the other layer has a light-emitting material that emits yellow light.

[0618] A color filter may be provided as layer 764, as shown in Figure 27D. By passing white light through the color filter, light of the desired color can be obtained.

[0619] A light-emitting device that emits white light preferably contains two or more types of light-emitting materials. To obtain white light emission, it is preferable to select two light-emitting materials whose emission colors are complementary, or to select two or more light-emitting materials whose combined emission results in white light. For example, when obtaining white light emission using two light-emitting layers, a light-emitting device that emits white light as a whole can be obtained by ensuring that the emission colors of the two light-emitting layers are complementary. Also, when obtaining white light emission using three or more light-emitting layers, it is preferable to configure the device so that the emission colors of the three or more light-emitting layers combine to emit white light as a whole.

[0620] In Figures 27E and 27F, the light-emitting layer 771 and the light-emitting layer 772 may be made of light-emitting materials that emit light of the same color, or even the same light-emitting material may be used for both.

[0621] For example, in a light-emitting device having subpixels that emit light of each color, a light-emitting material that emits blue light may be used in the light-emitting layer 771 and the light-emitting layer 772. In the subpixel that emits blue light, the blue light emitted by the light-emitting device can be extracted. In addition, in the subpixel that emits red light and the subpixel that emits green light, by providing a color conversion layer as layer 764 as shown in Figure 27F, the blue light emitted by the light-emitting device can be converted into longer wavelength light, and red or green light can be extracted.

[0622] When using light-emitting devices with the configuration shown in Figure 27E or Figure 27F for sub-pixels that emit light of each color, different light-emitting materials may be used for each sub-pixel. Specifically, in a light-emitting device for a sub-pixel that emits red light, light-emitting materials that emit red light may be used for both the light-emitting layer 771 and the light-emitting layer 772. Similarly, in a light-emitting device for a sub-pixel that emits green light, light-emitting materials that emit green light may be used for both the light-emitting layer 771 and the light-emitting layer 772. In a light-emitting device for a sub-pixel that emits blue light, light-emitting materials that emit blue light may be used for both the light-emitting layer 771 and the light-emitting layer 772. A display device with such a configuration can be said to have a tandem structure light-emitting device and an SBS structure. Therefore, it can combine the advantages of both the tandem structure and the SBS structure. This enables high-brightness light emission and realizes a highly reliable light-emitting device.

[0623] In Figures 27E and 27F, different luminescent materials with different emission colors may be used for the luminescent layer 771 and the luminescent layer 772. When the light emitted by the luminescent layer 771 and the light emitted by the luminescent layer 772 are complementary colors, white light emission is obtained. A color filter may be provided as layer 764 as shown in Figure 27F. By passing white light through the color filter, light of a desired color can be obtained.

[0624] In Figures 27E and 27F, examples are shown in which the light-emitting unit 763a has one light-emitting layer 771 and the light-emitting unit 763b has one light-emitting layer 772, but the design is not limited to this. The light-emitting unit 763a and the light-emitting unit 763b may each have two or more light-emitting layers.

[0625] Figures 27E and 27F illustrate a light-emitting device having two light-emitting units, but it is not limited to this. The light-emitting device may have three or more light-emitting units.

[0626] Specifically, when using a tandem light-emitting device, a two-stage tandem structure having a light-emitting unit that emits yellow light and a light-emitting unit that emits blue light, a two-stage tandem structure having a light-emitting unit that emits red and green light and a light-emitting unit that emits blue light, a three-stage tandem structure having a light-emitting unit that emits blue light, a light-emitting unit that emits yellow, yellow-green, or green light, and a light-emitting unit that emits blue light in that order, or a three-stage tandem structure having a light-emitting unit that emits blue light, a light-emitting unit that emits yellow, yellow-green, or green light, a light-emitting unit that emits red light, and a light-emitting unit that emits blue light in that order. For example, the number of layers and color order of the light-emitting unit can be, from the anode side, a two-layer structure of B and Y, a two-layer structure of B and light-emitting unit X, a three-layer structure of B, Y, B, or a three-layer structure of B, X, B. The number of layers and color order of the light-emitting layers in light-emitting unit X can be, from the anode side, a two-layer structure of R and Y, a two-layer structure of R and G, a two-layer structure of G and R, a three-layer structure of G, R, G, or a three-layer structure of R, G, R. In addition, other layers may be provided between the two light-emitting layers.

[0627] Furthermore, in Figures 27C and 27D, as shown in Figure 27B, layer 780 and layer 790 may each be independently constructed as a laminated structure consisting of two or more layers.

[0628] In Figures 27E and 27F, the light-emitting unit 763a has layer 780a, light-emitting layer 771, and layer 790a, and the light-emitting unit 763b has layer 780b, light-emitting layer 772, and layer 790b.

[0629] When the lower electrode 761 is the anode and the upper electrode 762 is the cathode, layers 780a and 780b each have one or more of the following: a hole injection layer, a hole transport layer, and an electron blocking layer. Similarly, layers 790a and 790b each have one or more of the following: an electron injection layer, an electron transport layer, and a hole blocking layer. When the lower electrode 761 is the cathode and the upper electrode 762 is the anode, layers 780a and 790a have the opposite configurations to those described above, and layers 780b and 790b also have the opposite configurations to those described above.

[0630] When the lower electrode 761 is the anode and the upper electrode 762 is the cathode, for example, layer 780a may have a hole injection layer and a hole transport layer on the hole injection layer, and may further have an electron blocking layer on the hole transport layer. Layer 790a may have an electron transport layer and may further have a hole blocking layer between the light-emitting layer 771 and the electron transport layer. Layer 780b may have a hole transport layer and may further have an electron blocking layer on the hole transport layer. Layer 790b may have an electron transport layer and an electron injection layer on the electron transport layer, and may further have a hole blocking layer between the light-emitting layer 772 and the electron transport layer. When the lower electrode 761 is the cathode and the upper electrode 762 is the anode, for example, layer 780a may have an electron injection layer and an electron transport layer on the electron injection layer, and may further have a hole blocking layer on the electron transport layer. Furthermore, layer 790a may have a hole transport layer and an electron blocking layer between the light-emitting layer 771 and the hole transport layer. Also, layer 780b may have an electron transport layer and an electron blocking layer on the electron transport layer. Also, layer 790b may have a hole transport layer and a hole injection layer on the hole transport layer and an electron blocking layer between the light-emitting layer 772 and the hole transport layer.

[0631] When fabricating a tandem light-emitting device, two light-emitting units are stacked with a charge generation layer 785 in between. The charge generation layer 785 has at least a charge generation region. When a voltage is applied between a pair of electrodes, the charge generation layer 785 has the function of injecting electrons into one of the two light-emitting units and holes into the other.

[0632] Next, we will describe materials that can be used in light-emitting devices.

[0633] Of the lower electrode 761 and the upper electrode 762, the electrode that extracts light preferably uses a conductive film that transmits visible light. Furthermore, it is preferable to use a conductive film that reflects visible light on the electrode that does not extract light. In addition, if the display device has a light-emitting device that emits infrared light, it is preferable to use a conductive film that transmits both visible light and infrared light on the electrode that extracts light, and a conductive film that reflects both visible light and infrared light on the electrode that does not extract light.

[0634] A conductive film that transmits visible light can also be used on the electrode that does not extract light. In this case, it is preferable to place the electrode between the reflective layer and the EL layer 763. In other words, the light emitted from the EL layer 763 can be reflected by the reflective layer and extracted from the display device.

[0635] It is preferable that the light-emitting device has a microcavity structure. Therefore, it is preferable that one of the pair of electrodes in the light-emitting device is a semitransmissive / semi-reflective electrode that transmits and reflects visible light, and the other is a reflective electrode that reflects visible light. By having a microcavity structure in the light-emitting device, the light emitted from the light-emitting layer can be resonated between the two electrodes, thereby strengthening the light emitted from the light-emitting device.

[0636] Furthermore, the semi-transparent / semi-reflective electrode can have a laminated structure consisting of a conductive layer that can be used as a reflective electrode and a conductive layer that can be used as an electrode that transmits visible light (also called a transparent electrode).

[0637] The light transmittance of the transparent electrode shall be 40% or more. For example, it is preferable to use an electrode with a visible light transmittance (light with a wavelength of 400 nm or more and less than 750 nm) of 40% or more for the transparent electrode of a light-emitting device. The visible light reflectance of the semi-transparent and semi-reflective electrodes shall be 10% or more and 95% or less, preferably 30% or more and 80% or less. The visible light reflectance of the reflective electrode shall be 40% or more and 100% or less, preferably 70% or more and 100% or less. Furthermore, the electrical resistivity of these electrodes shall be 1 × 10⁻⁶ −２ A value of Ωcm or less is preferable.

[0638] A light-emitting device has at least a light-emitting layer. Furthermore, a light-emitting device may have layers other than the light-emitting layer, including materials with high hole injection properties, materials with high hole transport properties, hole-blocking materials, materials with high electron transport properties, electron-blocking materials, materials with high electron injection properties, or bipolar materials (materials with high electron and hole transport properties). For example, a light-emitting device may have, in addition to the light-emitting layer, one or more layers from among a hole injection layer, a hole transport layer, a hole-blocking layer, a charge generation layer, an electron-blocking layer, an electron transport layer, and an electron injection layer.

[0639] The light-emitting device can use either low-molecular-weight compounds or high-molecular-weight compounds, and can also contain inorganic compounds. The layers constituting the light-emitting device can be formed by methods such as vapor deposition (including vacuum deposition), transfer, printing, inkjet, and coating.

[0640] The light-emitting layer has one or more types of light-emitting materials. The light-emitting materials may include substances that exhibit light-emitting colors such as blue, purple, blue-violet, green, yellow-green, yellow, orange, or red, as appropriate. Furthermore, materials that emit near-infrared light may also be used as light-emitting materials.

[0641] Examples of luminescent materials include fluorescent materials, phosphorescent materials, TADF materials, and quantum dot materials.

[0642] Examples of fluorescent materials include pyrene derivatives, anthracene derivatives, triphenylene derivatives, fluorene derivatives, carbazole derivatives, dibenzothiophene derivatives, dibenzofuran derivatives, dibenzoquinoxaline derivatives, quinoxaline derivatives, pyridine derivatives, pyrimidine derivatives, phenanthrene derivatives, and naphthalene derivatives.

[0643] Examples of phosphorescent materials include organometallic complexes having a 4H-triazole skeleton, 1H-triazole skeleton, imidazole skeleton, pyrimidine skeleton, pyrazine skeleton, or pyridine skeleton (especially iridium complexes), organometallic complexes using phenylpyridine derivatives having electron-withdrawing groups as ligands (especially iridium complexes), platinum complexes, and rare earth metal complexes.

[0644] The light-emitting layer may contain one or more types of organic compounds (host material, assist material, etc.) in addition to the light-emitting substance (guest material). One or more types of organic compounds may include materials with high hole transport properties (hole transport materials) and / or materials with high electron transport properties (electron transport materials). As the hole transport material, one of the materials with high hole transport properties that can be used in the hole transport layer, as described later, may be used. As the electron transport material, one of the materials with high electron transport properties that can be used in the electron transport layer, as described later, may be used. Furthermore, one or more types of organic compounds may include bipolar materials or TADF materials.

[0645] The light-emitting layer preferably comprises, for example, a phosphorescent material and a combination of a hole-transporting material and an electron-transporting material that readily forms an excitation complex. This configuration allows for efficient emission using ExTET (Exciplex-Triplet Energy Transfer), which is energy transfer from the excitation complex to the light-emitting substance (phosphorescent material). By selecting a combination that forms an excitation complex that exhibits emission overlapping with the wavelength of the lowest-energy absorption band of the light-emitting substance, energy transfer becomes smoother, and light emission can be obtained efficiently. This configuration simultaneously achieves high efficiency, low-voltage operation, and a long lifespan for the light-emitting device.

[0646] The hole injection layer is a layer that injects holes from the anode into the hole transport layer, and is a layer containing a material with high hole injection capabilities. Examples of materials with high hole injection capabilities include aromatic amine compounds and composite materials containing hole transport materials and acceptor materials (electron-accepting materials).

[0647] As the hole-transporting material, a highly hole-transporting substance that can be used in the hole-transporting layer, as described later, can be used.

[0648] As acceptor materials, for example, oxides of metals belonging to groups 4 through 8 of the periodic table can be used. Specifically, these include molybdenum oxide, vanadium oxide, niobium oxide, tantalum oxide, chromium oxide, tungsten oxide, manganese oxide, and rhenium oxide. Among these, molybdenum oxide is particularly preferred because it is stable in the atmosphere, has low hygroscopicity, and is easy to handle. Organic acceptor materials containing fluorine can also be used. Furthermore, organic acceptor materials such as quinodimethane derivatives, chloranil derivatives, and hexaazatriphenylene derivatives can also be used.

[0649] For example, as a material with high hole injection properties, a material containing a hole transport material and an oxide of a metal belonging to Group 4 to Group 8 of the periodic table (typically molybdenum oxide) can be used.

[0650] The hole transport layer is a layer that transports holes injected from the anode by the hole injection layer to the light-emitting layer. The hole transport layer is a layer containing a hole-transporting material. The hole-transporting material is 1 × 10 −６ cm ２ A material having a hole mobility of 1 / Vs or higher is preferred. However, any material that has higher hole transport capabilities than electron transport can also be used. Preferred hole transport materials are those with high hole transport capabilities, such as π-electron-rich heteroaromatic compounds (e.g., carbazole derivatives, thiophene derivatives, furan derivatives, etc.) and aromatic amines (compounds having an aromatic amine skeleton).

[0651] The electron blocking layer is provided in contact with the light-emitting layer. The electron blocking layer is a layer containing a material that has hole-transporting properties and is capable of blocking electrons. Among the hole-transporting materials mentioned above, a material that has electron-blocking properties can be used for the electron blocking layer.

[0652] Because electron-blocking layers possess hole-transporting properties, they can also be called hole-transporting layers. Furthermore, among hole-transporting layers, those that exhibit electron-blocking properties can also be called electron-blocking layers.

[0653] The electron transport layer is a layer that transports electrons injected from the cathode by the electron injection layer to the light-emitting layer. The electron transport layer is a layer containing an electron-transporting material. The electron-transporting material is 1 × 10 −６ cm ２ A substance having an electron mobility of 1 / Vs or higher is preferred. However, any substance that has higher electron transport capabilities than holes can also be used. As electron transport materials, in addition to metal complexes having a quinoline skeleton, metal complexes having a benzoquinoline skeleton, metal complexes having an oxazole skeleton, metal complexes having a thiazole skeleton, etc., substances with high electron transport capabilities such as oxadiazole derivatives, triazole derivatives, imidazole derivatives, oxazole derivatives, thiazole derivatives, phenanthroline derivatives, quinoline derivatives having a quinoline ligand, benzoquinoline derivatives, quinoxaline derivatives, dibenzoquinoxaline derivatives, pyridine derivatives, bipyridine derivatives, pyrimidine derivatives, and other π-electron-deficient heteroaromatic compounds containing nitrogen-containing heteroaromatic compounds can be used.

[0654] The hole-blocking layer is provided in contact with the light-emitting layer. The hole-blocking layer is a layer containing a material that has electron-transporting properties and is capable of blocking holes. Among the electron-transporting materials mentioned above, a material that has hole-blocking properties can be used for the hole-blocking layer.

[0655] Because hole-blocking layers possess electron-transporting properties, they can also be called electron-transporting layers. Furthermore, among electron-transporting layers, those that exhibit hole-blocking properties can also be called hole-blocking layers.

[0656] The electron injection layer is a layer that injects electrons from the cathode into the electron transport layer, and is a layer containing a material with high electron-injection properties. Alkali metals, alkaline earth metals, or compounds thereof can be used as the material with high electron-injection properties. Composite materials containing both electron-transporting materials and donor materials (electron-donating materials) can also be used as the material with high electron-injection properties.

[0657] For materials with high electron injection potential, it is preferable that the LUMO level differs from the work function value of the material used as the cathode (specifically, 0.5 eV or less).

[0658] The electron injection layer contains, for example, lithium, cesium, ytterbium, lithium fluoride (LiF), cesium fluoride (CsF), and calcium fluoride (CaF). ｘ (where X is any number), 8-(quinolinolato)lithium (abbreviation: Liq), 2-(2-pyridyl)phenolatritium (abbreviation: LiPP), 2-(2-pyridyl)-3-pyridinolatritium (abbreviation: LiPPy), 4-ph...

Claims

The light-emitting device includes a first electrode on a first insulating layer, an EL layer on the first electrode, and a second electrode on the EL layer. The first electrode covers a portion of the upper and side surfaces of the first insulating layer. The end of the first electrode is located between the upper and lower surfaces of the first insulating layer. Display device. 　 In claim 1, The material has a conductive layer located between the first electrode and the EL layer, The conductive layer covers the upper and side surfaces of the first insulating layer with the first electrode in between. The conductive layer covers the end of the first electrode. Display device. 　 The light-emitting device includes a conductive layer on a first insulating layer, a first electrode on the conductive layer, an EL layer on the first electrode, and a second electrode on the EL layer. The conductive layer is in contact with the upper and side surfaces of the first insulating layer. The first electrode is in contact with the upper surface and a portion of the side surface of the conductive layer, The end of the first electrode is located between the upper and lower surfaces of the first insulating layer. Display device. 　 In claim 3, The first electrode covers a region on the side surface of the first insulating layer that is higher than the first height, and does not cover a region that is lower than the first height. The conductive layer covers a region on the side surface of the first insulating layer that is higher than the first height and a region that is lower than the first height. Display device. 　 In claim 3, The present invention has a second conductive layer located between the first electrode and the EL layer, The second conductive layer covers the upper and side surfaces of the first insulating layer with the first electrode in between. The second conductive layer covers the end of the first electrode. Display device. 　 In any one of claims 1 to 5, The first insulating layer has an island-like or convex shape, Display device. 　 In any one of claims 1 to 5, The first electrode comprises an Ag-Pd-Cu alloy, Display device. 　 In claim 2, The first electrode comprises an Ag-Pd-Cu alloy, The conductive layer comprises one or more selected from indium oxide, zinc oxide, In-Sn oxide, In-Zn oxide, In-W oxide, In-W-Zn oxide, In-Ti oxide, In-Ti-Sn oxide, silicon-containing In-Sn oxide, gallium-doped zinc oxide, In-Ga-Zn oxide, and In-Sn-Zn oxide. Display device. 　 In claim 2, The first electrode comprises an Ag-Pd-Cu alloy, The conductive layer comprises one or more selected from indium oxide, zinc oxide, In-Sn oxide, In-Zn oxide, In-W oxide, In-W-Zn oxide, In-Ti oxide, In-Ti-Sn oxide, silicon-containing In-Sn oxide, gallium-doped zinc oxide, In-Ga-Zn oxide, and In-Sn-Zn oxide. Display device. 　 In claim 5, The first electrode comprises an Ag-Pd-Cu alloy, The conductive layer contains titanium, The second conductive layer comprises one or more selected from indium oxide, zinc oxide, In-Sn oxide, In-Zn oxide, In-W oxide, In-W-Zn oxide, In-Ti oxide, In-Ti-Sn oxide, silicon-containing In-Sn oxide, gallium-doped zinc oxide, In-Ga-Zn oxide, and In-Sn-Zn oxide. Display device. 　 A second insulating layer is formed on the first insulating layer. A first conductive layer is formed so as to cover the upper and side surfaces of the second insulating layer. A second conductive layer is formed on the first conductive layer. A first mask is formed on the second conductive layer. Using the first mask, a portion of the second conductive layer is removed to expose a portion of the upper surface of the first conductive layer and form a third conductive layer. A fourth conductive layer is formed on the first conductive layer and the third conductive layer. A second mask is formed on the fourth conductive layer. A fifth conductive layer is formed by removing a portion of the fourth conductive layer using the second mask. A sixth conductive layer is formed by removing a portion of the first conductive layer using the second mask or the fifth conductive layer as a mask. An EL layer is formed on the fifth conductive layer. A common electrode is formed on the EL layer, The fourth conductive layer is formed so as to be in contact with a portion of the upper surface of the exposed first conductive layer, The third conductive layer is formed by removing a portion of the second conductive layer using wet etching. Method for manufacturing a display device. 　 In claim 11, As a result of the wet etching, a portion of the second conductive layer that covers the side surface of the second insulating layer is removed. Method for manufacturing a display device.

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