An A / D conversion device and method with a full-range dynamic self-checking function

Abstract

The present invention relates to an A / D conversion device and method with a full-range dynamic self-checking function. The device includes an MCU chip, an FPGA chip, a reference voltage generation circuit, a two-way selector, and an A / D conversion circuit. The input end of the reference voltage generation circuit is connected to the output end of the FPGA chip. The output end of the reference voltage generation circuit and the output end of the FPGA chip are respectively connected to the input ends of the two-way selector. The output end of the two-way selector and the output end of the FPGA chip are respectively connected to the input ends of the A / D conversion circuit. The output end of the A / D conversion circuit is connected to the input end of the MCU chip, and the output end of the MCU chip is connected to the input end of the FPGA chip. Compared with the prior art, the present invention has the advantages of high integration, high precision, and a full-range dynamic self-checking function, etc.

Description

Technical Field

[0001] The present invention relates to an A / D conversion device and method, and more particularly to an A / D conversion device and method with a full-range dynamic self-checking function. Background Art

[0002] During the operation of subway vehicles, it is necessary to effectively detect the operating status of vehicle signal devices. The traditional method for detecting vehicle signal devices is to qualitatively detect the level range of signal devices. Generally, it is stipulated that the area greater than the high threshold voltage (such as 0.7 times the highest level) is classified as high level, and the area lower than the low threshold voltage (such as 0.3 times the highest level) is classified as low level. When the input level is between the high and low threshold voltages (such as greater than 0.3 times and less than 0.7 times), the circuit cannot distinguish and can only be regarded as noise. With the continuous development of rail transit methods, corresponding signal devices have also made great progress. Merely qualitatively detecting the signal level range has gradually failed to meet our requirements. We need a quantitative detection of the signal level range of signal devices. Therefore, it is necessary to introduce an A / D conversion device into the detection circuit.

[0003] Currently, common A / D conversion devices have the following technical defects:

[0004] Due to design limitations, the number of A / D conversion circuits in a traditional A / D conversion device is generally very limited, and the integration level is not high, which is not suitable for occasions such as subway vehicles that need to detect the status of a large number of vehicle signal devices;

[0005] Traditional A / D conversion devices usually do not have an error detection function and cannot know whether the device itself has a fault. In the case of a fault, the A / D conversion device is very likely to send incorrect information to the system, unable to correctly identify the current state of the vehicle, thereby reducing the system availability and even affecting the train operation safety;

[0006] With the progress of technology, some A / D conversion devices have introduced a self-checking function, but the self-checking technologies adopted are all for self-checking against a fixed reference voltage, which is inconsistent with the actual working conditions, so the effectiveness of self-checking is not high;

[0007] In actual use, due to the characteristics of the material, after long-term operation, there is a certain probability that the leakage current of the A / D conversion device will increase due to aging, resulting in poor accuracy of A / D conversion. There has been no effective solution to this problem. Summary of the Invention

[0008] The object of the present invention is to provide an A / D conversion device and method with a full-range dynamic self-checking function, high integration level and high precision, in order to overcome the defects existing in the above-mentioned prior art.

[0009] The object of the present invention can be achieved by the following technical solutions:

[0010] An A / D conversion device with a full-range dynamic self-checking function, comprising an MCU chip, an FPGA chip, a reference voltage generation circuit, a two-way selector, and an A / D conversion circuit. The input end of the reference voltage generation circuit is connected to the output end of the FPGA chip. The output end of the reference voltage generation circuit and the output end of the FPGA chip are respectively connected to the input ends of the two-way selector. The output end of the two-way selector and the output end of the FPGA chip are respectively connected to the input end of the A / D conversion circuit. The output end of the A / D conversion circuit is connected to the input end of the MCU chip, and the output end of the MCU chip is connected to the input end of the FPGA chip.

[0011] Preferably, the MCU chip is used to implement the overall function, and after judging the digital quantity output by the A / D, it is sent to the host computer.

[0012] Preferably, the FPGA chip sends a digital quantity to the reference voltage generation circuit at a specified moment according to the control command of the MCU, and sends a strobe signal to the two-way selector and a chip select signal to the A / D conversion circuit.

[0013] Preferably, the reference voltage generation circuit is used to generate a reference voltage for self-checking, and converts the digital quantity sent by the FPGA into a reference voltage and sends it to the two-way selector.

[0014] Preferably, the reference voltage generation circuit includes a D / A conversion chip, a voltage division circuit, and a voltage follower connected in sequence;

[0015] Wherein the voltage division circuit includes a resistor R1 and a resistor R2 connected in sequence. The resistor R1 is connected to the D / A conversion chip. The voltage follower includes a first operational amplifier and a resistor R3. The resistor R3 is connected in parallel between the input end and the output end of the first operational amplifier. The input end of the first operational amplifier is connected between the resistor R1 and the resistor R2;

[0016] The analog voltage signal output by the D / A conversion chip needs to be output after voltage division and shaping. The resistor R1 and the resistor R2 constitute the voltage division circuit, and the amplification factor of this voltage division circuit is R2 / (R1 + R2); According to the range of the analog voltage to be detected, the resistance values of the resistor R1 and the resistor R2 are set so that when the FPGA chip outputs a digital quantity of 0xFFF, the magnitude of the reference voltage output by the reference voltage generation circuit is exactly the same as the maximum value of the analog voltage to be detected. In this way, the digital quantity range 0x000~0xFFF output by the FPGA chip is consistent with the range of the analog voltage to be detected, and thus the full-range dynamic self-checking function can be realized.

[0017] Preferably, the one - of - two selector sends the reference voltage or the voltage to be detected to the A / D conversion circuit according to the strobe signal sent by the FPGA chip.

[0018] Preferably, the A / D conversion circuit is responsible for the conversion function from analog quantity to digital quantity, converts the input analog voltage value into a digital quantity, and then sends it to the MCU chip.

[0019] Preferably, the A / D conversion circuit includes a voltage input terminal, a negative - feedback amplification circuit, an A / D conversion chip, and an SPI interface connected in sequence;

[0020] The negative - feedback amplification circuit includes a second operational amplifier, a resistor R4, a resistor R5, and a resistor R6. The voltage input terminal is connected to one input terminal of the second operational amplifier through the resistor R4. The other input terminal of the second operational amplifier is respectively connected to one end of the resistor R5 and one end of the resistor R6. The other end of the resistor R5 is grounded. The other end of the resistor R6 is connected to the output terminal of the second operational amplifier. The output terminal of the second operational amplifier is connected to the input terminal of the A / D conversion chip;

[0021] Before the analog voltage enters the A / D conversion chip, it needs to pass through the negative - feedback amplification circuit. The amplification factor of this negative - feedback amplification circuit is (R5 + R6) / R5. According to the range of the analog voltage to be detected, the resistance values of the resistors R1 and R2 are set so that after the maximum value of the analog voltage to be detected is amplified by (R5 + R6) / R5 times, it is exactly equal to the reference voltage VREF of the A / D conversion chip.

[0022] Preferably, the MCU chip accesses the FPGA chip through the internal PMP module. The PMP module is a 16 - bit parallel I / O module of the MCU, dedicated to communicating with communication peripherals, LCDs, external storage devices, and various parallel devices of the FPGA.

[0023] A method using the A / D conversion device with a full - range dynamic self - detection function as described above includes the following steps:

[0024] Step 1, after the device is started, the MCU chip performs an initialization operation;

[0025] Step 2: After the initialization of the MCU chip is completed, the self-check operation begins. The MCU chip sends a reference voltage setting command to the FPGA chip. The command contains a command code and the digital quantity 0x0FF corresponding to the first reference voltage value. After receiving this command, the FPGA chip sends the digital quantity 0x0FF corresponding to the reference voltage value to the reference voltage generation circuit. Then, through the D / A conversion and voltage division shaping of the reference voltage generation circuit, finally, the reference voltage value corresponding to the digital quantity 0x0FF, which is 1.5V / 16 = 0.09375V, is generated.

[0026] Step 3: The MCU chip sends a selector strobe command to the FPGA chip. The command contains a command code and the data 0x000001. After receiving this command, the FPGA chip sets the strobe signal Select_1 of the first selector to logic 1, so that the first selector will select the output to the reference voltage.

[0027] Step 4: The MCU chip sends an AD chip strobe command to the FPGA chip. The command contains a command code and the data 0x000001. After receiving this command, the FPGA chip sets the chip select signal CS_1 of the first A / D chip to logic 1. Then, the MCU collects the data of the first A / D chip through the SPI interface.

[0028] Step 5: For this reference voltage, the MCU chip determines whether the self-check of all 24 A / D conversion circuits has been completed. If the self-check of all 24 circuits is completed, go to Step 6; otherwise, return to Step 3, and at the same time, shift the data in the selector strobe command and the AD chip strobe command to the left by 1 bit, that is, continue to perform the self-check on the next A / D conversion circuit.

[0029] Step 6: The MCU chip determines whether the self-check of all 16 reference voltage values has been completed. If the self-check of all 16 reference voltage values is completed, go to Step 7; otherwise, return to Step 2, and at the same time, set the digital quantity in the reference voltage setting command to the next reference voltage value.

[0030] Step 7: After the self-check is completed, the MCU chip sends a self-check completion command to the FPGA chip. After receiving the self-check completion command, the FPGA chip will perform the following operations: (1) Send the digital quantity 0x000 to the reference voltage generation circuit to clear the reference voltage value; (2) Set the strobe signals of all 24 selectors to logic 0, so that the selectors all select the output to the voltage to be detected; (3) Set the chip select signals of all A / D chips to logic 0.

[0031] Step 8, the MCU chip will first perform a data acquisition. Since the chip select signals of all A / D chips are set to logic 0 at this moment, the acquired data is the leakage current value. If the leakage current detection passes, the MCU chip will send a digital quantity acquisition command to the FPGA chip. After receiving the digital quantity acquisition command, the FPGA chip will successively activate the chip select signals of the 24th A / D chip, enabling the MCU chip to poll and acquire the data of the 24 A / D chips.

[0032] Compared with the prior art, the present invention has the following advantages:

[0033] 1. It can perform A / D conversion on 24 analog voltages simultaneously, with high integration, and is very suitable for occasions such as subway vehicles that require detecting the status of a large number of vehicle signal devices;

[0034] 2. The 24 A / D conversion circuits in the device are all connected to the SPI bus. The MCU only needs to use one SPI port to acquire the data of the 24 A / D conversions, saving the pin resources of the MCU;

[0035] 3. Introduce the full-range dynamic self-checking technology. The reference voltage is dynamically adjustable and can cover the entire range of the analog voltage to be detected. After detecting a fault in the A / D conversion device, it can alarm in time to avoid misoperation caused by the failure of the A / D conversion device;

[0036] 4. Introduce the leakage current detection technology, which can detect the leakage current fault of the A / D conversion device in real time, preventing the leakage current from increasing due to aging after the A / D conversion device has been running for a long time, resulting in poor accuracy of the A / D conversion. Description of the Drawings

[0037] Figure 1 It is a schematic structural diagram of the A / D conversion device of the present invention;

[0038] Figure 2 It is a circuit diagram of the reference voltage generation circuit of the present invention;

[0039] Figure 3 It is a circuit diagram of the A / D conversion circuit of the present invention;

[0040] Figure 4 It is a working flow chart of the A / D conversion device of the present invention. Detailed Embodiments

[0041] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0042] As shown Figure 1 in the figure, the A / D conversion device with a full-range dynamic self-checking function of the present invention mainly includes the following key parts: an MCU chip, an FPGA chip, a reference voltage generation circuit, a two-way selector, and an A / D conversion circuit.

[0043] The functions of each part are as follows.

[0044] MCU chip: Responsible for realizing the overall function, judging the digital quantity output by the A / D and sending it to the host computer.

[0045] FPGA chip: According to the control command of the MCU, send the digital quantity to the reference voltage generation circuit at the specified moment, and send the strobe signal to the two-way selector and the chip select signal to the A / D conversion circuit.

[0046] Reference voltage generation circuit: Used to generate the reference voltage for self-checking, and convert it into the reference voltage according to the digital quantity sent by the FPGA and send it to the two-way selector.

[0047] Two-way selector: According to the strobe signal sent by the FPGA, send the reference voltage or the voltage to be detected to the A / D conversion circuit.

[0048] A / D conversion circuit: Responsible for the conversion function from analog quantity to digital quantity, convert the input analog voltage value into a digital quantity, and then send it to the MCU.

[0049] As shown Figure 2 in the figure, it is the reference voltage generation circuit. It includes: a D / A conversion chip, a voltage dividing circuit composed of resistors R1 and R2, an operational amplifier, and a voltage follower composed of R3.

[0050] The signal output by the FPGA is a digital signal itself, representing the magnitude of the voltage to be output. To correctly convert it into the required analog reference voltage, D / A conversion needs to be designed. The D / A conversion chip is selected with 12-bit precision and serial input through the SPI interface. The clock and enable signals of the SPI interface are both sent by the FPGA. Its D / A conversion relationship is shown in Table 1.

[0051] Table 1

[0052]

[0053] The analog voltage signal output by the D / A conversion needs to be divided and shaped before output. Among them, resistors R1 and R2 form a voltage division circuit, and the amplification factor of this voltage division circuit is R2 / (R1 + R2). According to the range of the analog voltage to be detected, the resistance values of resistors R1 and R2 are set so that when the FPGA outputs the digital quantity 0xFFF, the magnitude of the reference voltage output by the reference voltage generation circuit is exactly the same as the maximum value of the analog voltage to be detected. In this way, the digital quantity range 0x000 - 0xFFF output by the FPGA is consistent with the range of the analog voltage to be detected, and thus the full-range dynamic self-checking function proposed by the present invention can be realized.

[0054] As Figure 3 shown, it is a schematic diagram of the A / D conversion circuit. It includes: an A / D conversion chip, and a negative feedback amplification circuit composed of an operational amplifier and resistors R4, R5, and R6.

[0055] The A / D conversion chip is selected with 12-bit precision and outputs serially through a 12-bit SPI interface. The clock and enable signals of the SPI interface are both sent by the MCU, and its A / D conversion relationship is shown in Table 2.

[0056] Table 2

[0057]

[0058] Before the analog voltage is input to the A / D chip, it needs to pass through a negative feedback amplification circuit composed of an operational amplifier and resistors R4, R5, and R6. The amplification factor of this amplification circuit is (R5 + R6) / R5. According to the range of the analog voltage to be detected, the resistance values of resistors R1 and R2 are set so that after the maximum value of the analog voltage to be detected is amplified by (R5 + R6) / R5 times, it is exactly equal to the reference voltage VREF of the A / D chip, which can further improve the accuracy of the A / D conversion.

[0059] The MCU chip accesses the FPGA chip through the internal PMP module.

[0060] PMP (Parallel Master Port) is a 16-bit parallel I / O module of the MCU, which is dedicated to communicating with various parallel devices such as communication peripherals, LCDs, external storage devices, and FPGAs. Due to the diversity of parallel peripheral interfaces, the PMP module has high configurability.

[0061] The main features of the PMP module include:

[0062] Up to 16 programmable address lines;

[0063] Up to 2 chip select lines;

[0064] Programmable strobe options;

[0065] Address auto - increment / auto - decrement;

[0066] Programmable address / data multiplexing;

[0067] Polarity of programmable control signals;

[0068] Support for traditional parallel slave ports;

[0069] Support for enhanced parallel slave ports;

[0070] Schmitt trigger or TTL input buffer;

[0071] Programmable wait states.

[0072] The basic working principle of the present invention is as follows:

[0073] The A / D conversion device provided by the present invention will perform a full - range dynamic self - test when powered on. Only when the self - test passes can the subsequent A / D conversion function be executed. If the self - test fails, an alarm message will be generated and the device will stop working. At the same time, according to different actual application environments, the A / D conversion device can also perform a full - range dynamic self - test periodically during operation, so as to detect faults in the device in real time.

[0074] During the A / D conversion process of the A / D conversion device provided by the present invention, the MCU will collect data from 24 A / D conversion circuits in turn by means of polling. Before each polling, the MCU will first perform a leakage current detection. Only when the value of the leakage current detection meets the requirements will the subsequent data collection be executed. Otherwise, an alarm message will be generated and the device will stop working.

[0075] Assume that the range of the analog voltage to be detected is 0V - 1.5V, and the reference voltage VREF of the D / A chip and the A / D chip is 3.3V. It can be calculated that R2 / (R1 + R2) in the reference voltage generation circuit = 1.5V / 3.3V, and (R5 + R6) / R5 in the A / D conversion circuit = 3.3V / 1.5V. Therefore, the resistance values are selected as follows: R1 = 3KΩ, R2 = 3.6KΩ, R5 = 3KΩ, R6 = 3.6KΩ.

[0076] Set the number of reference voltage values to be self - tested as 16. Then the corresponding relationship between the digital quantities and analog quantities of these 16 reference voltages is shown in Table 3.

[0077] Table 3

[0078] Digital quantity Analog quantity Digital quantity Analog quantity 0x0FF 0.09375V 0x8FF 0.84425V 0x1FF 0.1875V 0x9FF 0.938V 0x2FF 0.28125V 0xAFF 1.03175V 0x3FF 0.375V 0xBFF 1.1255V 0x4FF 0.46875V 0xCFF 1.21925V 0x5FF 0.5625V 0xDFF 1.313V 0x6FF 0.65675V 0xEFF 1.40675V 0x7FF 0.75V 0xFFF 1.5V

[0079] As Figure 4As shown in the figure, an A / D conversion method with a full-range dynamic self-checking function, the method comprising the following steps:

[0080] Step 1, after the device is started, the MCU performs initialization operations, including: configuring the phase-locked loop, configuring all ports as digital ports, interrupt initialization, PMP module initialization, SPI bus initialization, and finally setting the number of reference voltage values to be self-checked, assuming the number is set to 16;

[0081] Step 2, after the MCU initialization is completed, the self-checking operation starts. The MCU sends a set_voltage (reference voltage setting) command to the FPGA, and the command contains a command code and the digital quantity 0x0FF corresponding to the first reference voltage value. After receiving the command, the FPGA sends the digital quantity 0x0FF corresponding to the reference voltage value to the reference voltage generation circuit, and then through the D / A conversion and voltage division shaping of the reference voltage generation circuit, finally generates the reference voltage value 1.5V / 16 = 0.09375V corresponding to the digital quantity 0x0FF;

[0082] Step 3, the MCU sends a choose_mux (selector strobe) command to the FPGA, and the command contains a command code and the data 0x000001. After receiving the command, the FPGA sets the strobe signal Select_1 of the first selector to logic 1, so that the first selector will select the output to the reference voltage;

[0083] Step 4, the MCU sends a choose_AD (AD chip strobe) command to the FPGA, and the command contains a command code and the data 0x000001. After receiving the command, the FPGA sets the chip select signal CS_1 of the first A / D chip to logic 1, and then the MCU collects the data of the first A / D chip through the SPI interface;

[0084] Step 5, for this reference voltage, the MCU determines whether the self-check of all 24 A / D conversion circuits has been completed. If the self-check of all 24 circuits is completed, it enters Step 6; otherwise, it returns to Step 3, and at the same time shifts the data in the choose_mux (selector strobe) command and the choose_AD (AD chip strobe) command left by 1 bit, that is, continues to perform self-check on the next A / D conversion circuit;

[0085] Step 6, the MCU determines whether the self-check of all 16 reference voltage values has been completed. If the self-check of all 16 reference voltage values is completed, it enters Step 7; otherwise, it returns to Step 2, and at the same time sets the digital quantity in the set_voltage (reference voltage setting) command to the next reference voltage value;

[0086] Step 7, after the self-check is completed, the MCU will send a test_done (self-check completed) command to the FPGA. After receiving the test_done (self-check completed) command, the FPGA will perform the following operations: (1) Send the digital quantity 0x000 to the reference voltage generation circuit to clear the reference voltage value; (2) Set all the strobe signals of the 24-channel selector to logic 0, so that the selector will output and select the voltage to be detected; (3) Set all the chip select signals of the A / D chip to logic 0;

[0087] Step 8, the MCU will first perform a data acquisition. Since the chip select signals of the A / D chip are all set to logic 0 at this moment, the acquired data is the leakage current value. If the leakage current detection passes, the MCU will send a data_sample (digital quantity acquisition) command to the FPGA. After receiving the data_sample (digital quantity acquisition) command, the FPGA will sequentially activate the chip select signals of the 24th A / D chip, so that the MCU can poll and acquire the data of the 24 A / D chips.

[0088] As described above, it is only the specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present invention can easily think of various equivalent modifications or substitutions, and these modifications or substitutions should all be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claims.

Claims

1. An A / D conversion device with a full-range dynamic self-checking function, characterized in that, It includes an MCU chip, an FPGA chip, a reference voltage generation circuit, a two - way selector, and an A / D conversion circuit. The input end of the reference voltage generation circuit is connected to the output end of the FPGA chip. The output end of the reference voltage generation circuit and the output end of the FPGA chip are respectively connected to the input ends of the two - way selector. The output end of the two - way selector and the output end of the FPGA chip are respectively connected to the input ends of the A / D conversion circuit. The output end of the A / D conversion circuit is connected to the input end of the MCU chip, and the output end of the MCU chip is connected to the input end of the FPGA chip; The reference voltage generation circuit is used to generate a reference voltage for self - testing, and convert the digital quantity sent from the FPGA into a reference voltage and send it to the two - way selector. The reference voltage generation circuit includes a D / A conversion chip, a voltage - dividing circuit, and a voltage follower connected in sequence; Among them, the voltage - dividing circuit includes a resistor R1 and a resistor R2 connected in sequence. The resistor R1 is connected to the D / A conversion chip. The voltage follower includes a first operational amplifier and a resistor R3. The resistor R3 is connected in parallel between the input end and the output end of the first operational amplifier. The input end of the first operational amplifier is connected between the resistor R1 and the resistor R2; The analog voltage signal output by the D / A conversion chip needs to be output after voltage - dividing and shaping. Among them, the resistor R1 and the resistor R2 constitute the voltage - dividing circuit, and the amplification factor of this voltage - dividing circuit is R2 / (R1 + R2). According to the range of the analog voltage to be detected, the resistance values of the resistor R1 and the resistor R2 are set so that when the FPGA chip outputs a digital quantity of 0xFFF, the magnitude of the reference voltage output by the reference voltage generation circuit is exactly the same as the maximum value of the analog voltage to be detected. In this way, the digital quantity range of 0x000 - 0xFFF output by the FPGA chip is consistent with the range of the analog voltage to be detected, and thus the full - range dynamic self - testing function can be realized; The 24 - channel A / D conversion circuits are all connected to the SPI bus, and the MCU collects 24 - channel A / D conversion data through an SPI port. The leakage current detection technology is introduced to detect the leakage current fault of the A / D conversion device in real time.

2. The A / D conversion device with a full-range dynamic self-checking function according to claim 1, characterized in that, The MCU chip is used to realize the overall function, judge the digital quantity output by the A / D and send it to the upper computer.

3. The A / D conversion device with a full-range dynamic self-checking function according to claim 1, characterized in that, The FPGA chip sends a digital quantity to the reference voltage generation circuit at a specified moment according to the control command of the MCU, and sends a strobe signal to the two - way selector and a chip - select signal to the A / D conversion circuit.

4. The A / D conversion device with a full-range dynamic self-checking function according to claim 1, characterized in that, The two - way selector sends the reference voltage or the voltage to be detected to the A / D conversion circuit according to the strobe signal sent by the FPGA chip.

5. The A / D conversion device with a full-range dynamic self-checking function according to claim 1, characterized in that, The A / D conversion circuit is responsible for the function of converting analog quantity to digital quantity, converting the input analog voltage value into a digital quantity, and then sending it to the MCU chip.

6. The A / D conversion device with a full-range dynamic self-checking function according to claim 1 or 5, characterized in that, The A / D conversion circuit includes a voltage input end, a negative - feedback amplification circuit, an A / D conversion chip, and an SPI interface connected in sequence; The described negative feedback amplifier circuit includes a second operational amplifier, resistor R4, resistor R5, and resistor R6. The voltage input terminal is connected to one input terminal of the second operational amplifier through resistor R4. The other input terminal of the second operational amplifier is respectively connected to one end of resistor R5 and one end of resistor R6. The other end of resistor R5 is grounded, and the other end of resistor R6 is connected to the output terminal of the second operational amplifier. The output terminal of the second operational amplifier is connected to the input terminal of the A / D conversion chip; Before the analog voltage is input into the A / D conversion chip, it needs to pass through a negative feedback amplifier circuit. The amplification factor of this negative feedback amplifier circuit is (R5 + R6) / R5. According to the range of the analog voltage to be detected, the resistance values of resistor R1 and resistor R2 are set so that after the maximum value of the analog voltage to be detected is amplified by (R5 + R6) / R5 times, it is exactly equal to the reference voltage VREF of the A / D conversion chip.

7. The A / D conversion device with a full-range dynamic self-checking function according to claim 1, characterized in that, The described MCU chip accesses the FPGA chip through the internal PMP module. The PMP module is a 16-bit parallel I / O module of the MCU, dedicated to communicating with communication peripherals, LCDs, external storage devices, and various parallel devices of the FPGA.

8. A method using the A / D conversion device with a full-range dynamic self-checking function according to claim 1, characterized in that, It includes the following steps: Step 1, after the device is started, the MCU chip performs an initialization operation; Step 2, after the initialization of the MCU chip is completed, it starts the self-check operation. The MCU chip sends a reference voltage setting command to the FPGA chip. The command contains a command code and the digital quantity 0x0FF corresponding to the first reference voltage value. After receiving this command, the FPGA chip sends the digital quantity 0x0FF corresponding to the reference voltage value to the reference voltage generation circuit. Then, through the D / A conversion and voltage division shaping of the reference voltage generation circuit, finally, the reference voltage value corresponding to the digital quantity 0x0FF, which is 1.5V / 16 = 0.09375V, is generated; Step 3, the MCU chip sends a selector strobe command to the FPGA chip. The command contains a command code and the data 0x000001. After receiving this command, the FPGA chip sets the strobe signal Select_1 of the first selector to logic 1, so that the first selector will select the output to the reference voltage; Step 4, the MCU chip sends an AD chip strobe command to the FPGA chip. The command contains a command code and the data 0x000001. After receiving this command, the FPGA chip sets the chip select signal CS_1 of the first A / D chip to logic 1. Then, the MCU collects the data of the first A / D chip through the SPI interface; Step 5, for this reference voltage, the MCU chip determines whether the self-check of all 24 A / D conversion circuits has been completed. If the self-check of all 24 circuits is completed, it enters Step 6; otherwise, it returns to Step 3, and at the same time, shifts the data in the selector strobe command and the AD chip strobe command to the left by 1 bit, that is, continues to perform the self-check on the next A / D conversion circuit; Step 6, the MCU chip determines whether the self-check of all 16 reference voltage values has been completed. If the self-check of all 16 reference voltage values has been completed, proceed to Step 7; Otherwise, return to Step 2, and at the same time set the digital quantity in the reference voltage setting command to the next reference voltage value; Step 7, when the self-check is over, the MCU chip will send a self-check completion command to the FPGA chip. After receiving the self-check completion command, the FPGA chip will perform the following operations: (1) Send the digital quantity 0x000 to the reference voltage generation circuit to clear the reference voltage value; (2) Set all the strobe signals of the 24-channel selector to logic 0, so that the selector will output the strobe to the voltage to be detected; (3) Set all the chip select signals of the A / D chip to logic 0; Step 8, the MCU chip will first perform a data acquisition. Since the chip select signal of the A / D chip is set to logic 0 at this moment, the acquired data is the leakage current value. If the leakage current detection passes, the MCU chip will send a digital quantity acquisition command to the FPGA chip. After receiving the digital quantity acquisition command, the FPGA chip will sequentially activate the chip select signals of the 24th A / D chip, so that the MCU chip can poll and acquire the data of the 24 A / D chips.

Images