Pixel and organic light emitting display device including the same

Abstract

A pixel comprises: an organic light emitting diode (OLED); a first transistor located between a driving power supply and a first node, a gate of the first transistor being connected to a control line; a second transistor located between the first node and a second node, a gate of the second transistor being connected to a second electrode of a seventh transistor; a third transistor located between the second node and an anode electrode of the OLED, a gate of the third transistor being connected to the control line; a fourth transistor located between the first node and a data line; a fifth transistor located between the second node and a storage capacitor; a sixth transistor located between an initialization power supply and the anode electrode, gates of the fourth to sixth transistors being connected to a scan line; a seventh transistor connected to the initialization power supply and the gate of the second transistor, the seventh transistor having a gate connected to another scan line, and all transistors being oxide semiconductor thin film transistors.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] The entire contents of Korean Patent Application No. 10-2018-0071088, entitled “Pixel and Organic Light Emitting Display Device Comprising the Same” filed on June 20, 2018 in the Korean Intellectual Property Office are incorporated herein by reference. Technical Field

[0003] Embodiments relate to a pixel and an organic light emitting display device including the pixel. Background Art

[0004] The organic light emitting device displays an image using an organic light emitting diode (OLED), which generates light through the recombination of electrons and holes. Such an organic light emitting device has an advantage of having a fast response speed while being driven with low power consumption.

[0005] The organic light emitting device has a plurality of pixels connected to a plurality of data lines and a plurality of scan lines, and each pixel includes an organic light emitting diode and a driving transistor for controlling the amount of current flowing to the organic light emitting diode. Summary of the invention

[0006] According to one aspect, a pixel includes: an organic light emitting diode; a first transistor having a first electrode connected to a driving power supply, a second electrode connected to a first node, and a gate electrode connected to a light emitting control line; a second transistor connected between the first node and the second node, and the gate electrode of the second transistor is connected to the second electrode of a seventh transistor; a third transistor connected between the second node and an anode electrode of the organic light emitting diode, and the gate electrode of the third transistor is connected to the light emitting control line; a fourth transistor connected between the first node and a data line, and the gate electrode of the fourth transistor is connected to a first scan line; a fifth transistor connected between the second node and a storage capacitor, and the gate electrode of the fifth transistor is connected to the first scan line; a sixth transistor connected between an initialization power supply and the anode electrode of the organic light emitting diode, and the gate electrode of the sixth transistor is connected to the first scan line; a seventh transistor having a first electrode connected to the initialization power supply, a second electrode connected to the gate electrode of the second transistor, and a gate electrode connected to the second scan line; and a storage capacitor connected between the driving power supply and the fifth transistor, wherein the first transistor to the seventh transistor are formed by P-type oxide semiconductor thin film transistors.

[0007] According to one aspect, a pixel includes: an organic light emitting diode; a first transistor including a first electrode connected to a driving power supply, a second electrode connected to a first node, and a gate electrode connected to a second node; a second transistor connected between a data line and the second node, and a gate electrode of the second transistor is connected to a second scan line; a third transistor connected between the first node and a reference voltage line, and a gate electrode of the third transistor is connected to a third scan line; a fourth transistor connected between the first node and an anode electrode of the organic light emitting diode, and a gate electrode of the fourth transistor is connected to the first scan line; and a storage capacitor connected between the first node and the second node, wherein the first transistor to the fourth transistor are oxide semiconductor thin film transistors.

[0008] According to one aspect, a pixel includes: an organic light emitting diode; a first transistor including a first electrode connected to a second electrode of a fourth transistor, a second electrode connected to a first node, and a gate connected to a second node; a second transistor connected between a data line and the second node, and a gate electrode of the second transistor is connected to a first scan line; a third transistor connected between the first node and a reference voltage line, and a gate electrode of the third transistor is connected to a third scan line; a fourth transistor including a first electrode connected to a driving power supply, a second electrode connected to the first electrode of the first transistor, and a gate electrode connected to a second scan line; and a storage capacitor connected between the first node and the second node, wherein the first transistor to the fourth transistor are oxide semiconductor thin film transistors.

[0009] According to one aspect, a pixel includes: an organic light emitting diode; a first transistor including a first electrode connected to a second electrode of a fifth transistor, a second electrode connected to a first node, and a gate electrode connected to a second node; a second transistor connected between a data line and the second node, and a gate electrode of the second transistor is connected to a second scan line; a third transistor connected between the first node and a reference voltage line, and a gate electrode of the third transistor is connected to a fourth scan line; a fourth transistor connected between the first node and an anode electrode of the organic light emitting diode, and a gate electrode of the fourth transistor is connected to the first scan line; a fifth transistor having a first electrode connected to a driving power supply, a second electrode connected to the first electrode of the first transistor, and a gate electrode connected to a third scan line; and a storage capacitor connected between the first node and the second node, wherein the first transistor to the fifth transistor are oxide semiconductor thin film transistors.

[0010] According to one aspect, an organic light-emitting display device includes: an organic light-emitting display panel, including multiple data lines, multiple scan lines and multiple pixels; a data driver, driving the multiple data lines by supplying data voltages to the multiple data lines; a scan driver, driving the multiple scan lines in sequence by supplying scan signals to the multiple scan lines in sequence; and a controller, controlling the data driver and the scan driver by supplying control signals to the data driver and the scan driver, wherein the transistor included in each of the multiple pixels is formed only by oxide semiconductor thin film transistors. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Features will become apparent to those skilled in the art by describing in detail exemplary embodiments with reference to the accompanying drawings, in which:

[0012] Figure 1 A view showing an organic light emitting display device according to an exemplary embodiment;

[0013] Figure 2 A diagram showing a structure of a pixel according to an exemplary embodiment;

[0014] Figure 3 A diagram showing a structure of a pixel according to an exemplary embodiment;

[0015] Figure 4 A diagram showing a structure of a pixel according to an exemplary embodiment;

[0016] Figure 5 A diagram showing a structure of a pixel according to an exemplary embodiment; and

[0017] Figure 6 A diagram illustrating a structure of a pixel according to an exemplary embodiment. DETAILED DESCRIPTION

[0018] Hereinafter, example embodiments will be described with reference to the accompanying drawings.

[0019] Figure 1 An organic light emitting display device according to an exemplary embodiment is shown. Figure 1 , the organic light emitting display device 100 according to an exemplary embodiment may include an organic light emitting display panel 110, a data driver 120, a scan driver 130, and a controller 140. The organic light emitting display panel 110 may include a plurality of data lines DL, a plurality of scan lines SL, and a plurality of pixels P.

[0020] The plurality of pixels P in the organic light emitting display panel 110 may include circuit elements, such as transistors. Each pixel P may include an organic light emitting diode OLED and a circuit element (such as a driving transistor for driving the organic light emitting diode OLED). Figures 2 to 6 The structure of a pixel according to an exemplary embodiment is described in more detail.

[0021] The data driver 120 may drive the plurality of data lines DL by supplying data voltages to the plurality of data lines DL. According to an example, the data driver 120 may include at least one source driver integrated circuit SDIC for driving the plurality of data lines DL.

[0022] The scan driver 130 may sequentially drive the plurality of scan lines SL by sequentially supplying scan signals to the plurality of scan lines SL. According to an example, the scan driver 130 may include at least one gate driver integrated circuit GDIC on the organic light emitting display panel 110, for example, a gate-in-panel (GIP) type. In this case, the GIP may be implemented by low temperature polysilicon (LTPS), and thus it may have a high driving characteristic with high electron mobility.

[0023] The controller 140 may control the data driver 120 and the scan driver 130 by supplying control signals to the data driver 120 and the scan driver 130. Specifically, the controller 140 may receive various timing signals including a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, an input data enable DE signal, a clock signal CLK, etc. together with the image data from an external source (e.g., a host system).

[0024] The controller 140 may generate a data driving control signal DCS and a scan driving control signal SCS in response to the received timing signal, and may supply the data driving control signal DCS to the data driver 120, and supply the scan driving control signal SCS to the scan driver 130. In addition, the controller 140 may realign image data supplied from an external source, and supply the image data to the data driver 120.

[0025] The scan driver 130 may sequentially supply a scan signal of a turn-on voltage or a turn-off voltage to the plurality of scan lines SL according to the control of the controller 140. When a portion of the scan lines are driven by the scan driver 130, the data driver 120 may convert image data received from the controller 140 into analog data voltages and supply the data voltages to the plurality of data lines DL.

[0026] Figure 1 The data driver 120 is shown to be located at one side (eg, upper side or lower side) of the organic light emitting display panel 110 . Alternatively, the data driver 120 may be located at both sides (eg, upper side and lower side) of the organic light emitting display panel 110 .

[0027] in addition, Figure 1The scan driver 130 is shown to be located at one side (eg, left or right) of the organic light emitting display panel 110 , but is not limited thereto. Alternatively, the scan driver 130 may be located at both sides (eg, left and right) of the organic light emitting display panel 110 .

[0028] Figure 2 2 shows a structure of a pixel according to an exemplary embodiment. Figure 2 , a case where a pixel is located on the i-th scan line and is connected to the m-th data line is shown, but the embodiment is not limited thereto. Figure 2 , a pixel according to an exemplary embodiment may include an organic light emitting diode OLED and a pixel circuit 20 .

[0029] An anode electrode of the organic light emitting diode OLED may be connected to the pixel circuit 20 , and may generate light of a predetermined brightness corresponding to an amount of current supplied from the pixel circuit 20 .

[0030] The pixel circuit 20 may control the amount of current flowing from the driving power source ELVDD to the organic light emitting diode OLED in response to the data signal Dm. In this case, the pixel circuit 20 may include first to seventh transistors M1 to M7 and a storage capacitor Cst.

[0031] A first electrode of the first transistor M1 may be connected to a driving power source ELVDD, and a second electrode of the first transistor M1 may be connected to a first node N1. In addition, a gate electrode of the first transistor M1 may be connected to a light emission control line EL. When a light emission control signal Ei is supplied to the light emission control line EL, the first transistor M1 may be turned off, and when the light emission control signal Ei is not supplied to the light emission control line EL, the first transistor M1 may be turned on. The first transistor M1 may control the amount of current flowing from the driving power source ELVDD to the organic light emitting diode OLED in response to the light emission control signal Ei.

[0032] The second transistor M2 may be connected between the first node N1 and the second node N2. A gate electrode of the second transistor M2 may be connected to a second electrode of the seventh transistor M7.

[0033] The third transistor M3 may be connected between the second node N2 and the anode electrode of the organic light emitting diode OLED. The gate electrode of the third transistor M3 may be connected to the light emission control line EL. When the light emission control signal Ei is supplied to the light emission control line EL, the third transistor M3 may be turned off, and when the light emission control signal Ei is not supplied to the light emission control line EL, the third transistor M3 may be turned on.

[0034] The fourth transistor M4 may be connected between the first node N1 and the data line DL. A gate electrode of the fourth transistor M4 may be connected to the first scan line SL1. When the first scan signal Sli is supplied to the first scan line SL1, the fourth transistor M4 may be turned on. When the fourth transistor M4 is turned on, the data line DL may be electrically connected to the first node N1.

[0035] The fifth transistor M5 may be connected between the second node N2 and the storage capacitor Cst. The gate electrode of the fifth transistor M5 may be connected to the first scan line SL1. When the first scan signal Sli is supplied to the first scan line SL1, the fifth transistor M5 may be turned on. When the fifth transistor M5 is turned on, the storage capacitor Cst may be electrically connected to the second node N2.

[0036] The sixth transistor M6 may be connected between the initialization power supply Vint and the anode electrode of the organic light emitting diode OLED. The gate electrode of the sixth transistor M6 may be connected to the first scan line SL1. When the first scan signal Sli is supplied to the first scan line SL1, the sixth transistor M6 may be turned on. When the sixth transistor M6 is turned on, the initialization power supply Vint may be supplied to the anode electrode of the organic light emitting diode OLED.

[0037] A first electrode of the seventh transistor M7 may be connected to an initialization power supply Vint, and a second electrode of the seventh transistor M7 may be connected to a gate electrode of the second transistor M2. The gate electrode of the seventh transistor M7 may be connected to the second scan line SL2. When the second scan signal S2i is supplied to the second scan line SL2, the seventh transistor M7 may be turned on. When the seventh transistor M7 is turned on, the initialization power supply Vint may be supplied to the gate electrode of the second transistor M2.

[0038] The storage capacitor Cst may be connected between the driving power source ELVDD and the fifth transistor M5 .

[0039] The first to seventh transistors M1 to M7 may be formed of P-type oxide semiconductor thin film transistors. In this case, the material of the channel layer of the P-type oxide semiconductor thin film transistor may include: indium tin gallium zinc oxide (InSnGaZnO) based material as a quaternary metal oxide; indium gallium zinc oxide (InGaZnO) based material, indium tin zinc oxide (InSnZnO) based material, indium aluminum zinc oxide (InAlZnO) based material, indium hafnium zinc oxide (InHfZnO) based material, tin gallium zinc oxide (SnGaZnO) based material, aluminum gallium zinc oxide (AlGaZnO) based material, tin aluminum zinc oxide (SnAlZnO) based material as a ternary metal oxide; indium zinc oxide (InZnO) based material, tin zinc oxide (SnZnO) based material, indium magnesium oxide (InMgO) based material, indium gallium oxide (InGaO) based material as a binary metal oxide; indium oxide (INO) based material, tin oxide (SnO) based material, zinc oxide (ZnO) based material, etc. The composition ratio of each element contained in each of the above-mentioned oxide semiconductor materials is not limited to a specific ratio but may be changed.

[0040] In addition, according to an exemplary embodiment, the P-type oxide semiconductor may have a back channel etch (BCE) or etch stop layer (ESL) form in which the gate layer is a lower portion of the channel layer. Alternatively, the P-type oxide semiconductor may have a self-aligned structure in which the gate layer is disposed on the channel layer and the gate insulating film.

[0041] Therefore, when the first transistor M1 to the seventh transistor M7 are formed by oxide semiconductor thin film transistors, the voltage fluctuation caused by the leakage current can be relatively reduced, and the driving can be performed at a relatively low scan rate. In addition, by forming all of the first transistor M1 to the seventh transistor M7 with P-type oxide semiconductor thin film transistors, since it is not necessary to provide a separate wiring (for example, a clock wiring for an N-type oxide semiconductor thin film transistor), the power consumption can be further reduced.

[0042] A method of achieving high brightness by setting a driving voltage to a low level or a method of driving an organic light emitting display device at a low scan rate is used, thereby relatively reducing power consumption.

[0043] Specifically, the organic light-emitting device can output high brightness with reduced power consumption by setting the driving voltage to low or by using a low scan rate. However, when a thin film transistor (TFT) made of low temperature polycrystalline silicon (LTPS) is used, it is difficult to drive the TFT with a low scan rate due to the leakage current in the pixel. However, according to an embodiment, by using an oxide semiconductor thin film transistor, driving at a low scan rate can be achieved with significantly reduced leakage current. In addition, by using a P-type oxide semiconductor thin film transistor, a simpler structure can be achieved and power consumption can be further reduced.

[0044] Figure 3 is a diagram showing a structure of a pixel according to an example embodiment. Figure 3 , a pixel according to an exemplary embodiment may include an organic light emitting diode OLED and a pixel circuit 30 .

[0045] An anode electrode of the organic light emitting diode OLED may be connected to the pixel circuit 30 , and may generate light of a predetermined brightness corresponding to an amount of current supplied from the pixel circuit 30 .

[0046] The pixel circuit 30 may control the amount of current flowing from the driving power source ELVDD to the organic light emitting diode OLED in response to the data signal. In this case, the pixel circuit 30 may include a first transistor M1 to a fourth transistor M4 and a storage capacitor Cst. Compared with the pixel circuit 20, the pixel circuit 30 may have fewer transistors, and the pixel circuit 30 may be connected to a reference voltage line (RVL) and a third scan line SL3 instead of the light emission control line EL.

[0047] The first transistor M1 may include a first electrode connected to the driving power source ELVDD, a second electrode connected to the first node N1, and a gate electrode connected to the second node N2. The first transistor M1 may operate as a driving transistor (DRT) driving the organic light emitting diode OLED by supplying a driving current to the organic light emitting diode OLED.

[0048] The second transistor M2 may be connected between the data line DL and the second node N2. The gate electrode of the second transistor M2 may be connected to the second scan line SL2. When the second scan signal S2i is supplied to the second scan line SL2, the second transistor M2 may be turned on. When the second transistor M2 is turned on, the data line DL may be electrically connected to the second node N2. The second transistor M2 may operate as a switching transistor (SWT) for transmitting a data signal to a second node N2, wherein the second node N2 corresponds to the gate electrode of the first transistor M1.

[0049] The third transistor M3 may be connected between the first node N1 and a reference voltage line RVL for supplying a reference voltage Vr. A gate electrode of the third transistor M3 may be connected to a third scan line SL3. When a third scan signal S3i is supplied to the third scan line SL3, the third transistor M3 may be turned on. When the third transistor M3 is turned on, the first node N1 may be electrically connected to the reference voltage line RVL. The third transistor M3 may operate as a sensing transistor (SENT) for electrically connecting the reference voltage line RVL and the first node N1.

[0050] The fourth transistor M4 may be connected between the first node N1 and the anode electrode of the organic light emitting diode OLED. A gate electrode of the fourth transistor M4 may be connected to the first scan line SL1. When the first scan signal Sli is supplied to the first scan line SL1, the fourth transistor M4 may be turned on.

[0051] The storage capacitor Cst may be connected between the first node N1 and the second node N2 .

[0052] The first transistor M1 to the fourth transistor M4 can be formed by a P-type or N-type oxide semiconductor thin film transistor, so that the voltage fluctuation caused by the leakage current can be relatively reduced, and the driving can be performed with a relatively low scan rate. Alternatively, all of the first transistor M1 to the fourth transistor M4 can be formed by a P-type oxide semiconductor thin film transistor. Therefore, since there is no need to provide a separate wiring (for example, a clock wiring for an N-type oxide semiconductor thin film transistor), power consumption can be further reduced.

[0053] Figure 4 is a diagram showing a structure of a pixel according to an example embodiment. Figure 4 , a pixel according to an exemplary embodiment may include an organic light emitting diode OLED and a pixel circuit 40 .

[0054] An anode electrode of the organic light emitting diode OLED may be connected to the pixel circuit 40 , and may generate light of a predetermined brightness corresponding to an amount of current supplied from the pixel circuit 40 .

[0055] The pixel circuit 40 may control the amount of current flowing from the driving power source ELVDD to the organic light emitting diode OLED in response to the data signal. In this case, the pixel circuit 40 may include a first transistor M1 to a fourth transistor M4 and a storage capacitor Cst. The number of transistors in the pixel circuit 40 may be the same as the number of transistors in the pixel circuit 30, and may be connected to the same line as the pixel circuit 30, but may have a different configuration from the pixel circuit 30.

[0056] The first electrode of the first transistor M1 may be connected to the second electrode of the fourth transistor M4, and the second electrode of the first transistor M1 may be connected to the first node N1. In addition, the gate electrode of the first transistor M1 may be connected to the second node N2. The first transistor M1 may operate as a driving transistor (DRT) that drives the organic light emitting diode OLED by supplying a driving current to the organic light emitting diode OLED.

[0057] The second transistor M2 may be connected between the data line DL and the second node N2. The gate electrode of the second transistor M2 may be connected to the first scan line SL1. When the first scan signal Sli is supplied to the first scan line SL1, the second transistor M2 may be turned on. When the second transistor M2 is turned on, the data line DL may be electrically connected to the second node N2. The second transistor M2 may operate as a switching transistor (SWT) for transmitting a data signal to a second node N2, wherein the second node N2 corresponds to the gate electrode of the first transistor M1.

[0058] The third transistor M3 may be connected between the first node N1 and a reference voltage line RVL for supplying a reference voltage Vr. A gate electrode of the third transistor M3 may be connected to a third scan line SL3. When a third scan signal S3i is supplied to the third scan line SL3, the third transistor M3 may be turned on. When the third transistor M3 is turned on, the first node N1 may be electrically connected to the reference voltage line RVL. The third transistor M3 may operate as a sensing transistor (SENT) for electrically connecting the reference voltage line RVL and the first node N1.

[0059] The fourth transistor M4 may include a first electrode connected to the driving power source ELVDD, a second electrode connected to the first electrode, and a gate electrode connected to the second scan line SL2. When the second scan signal S2i is supplied to the second scan line SL2, the fourth transistor M4 may be turned on. When the fourth transistor M4 is turned on, the driving power source ELVDD may be electrically connected to the first electrode of the first transistor M1.

[0060] The storage capacitor Cst may be connected between the first node N1 and the second node N2 .

[0061] The first to fourth transistors M1 to M4 may be formed of P-type or N-type oxide semiconductor thin film transistors, so that voltage fluctuation due to leakage current may be relatively reduced and driving may be performed at a relatively low scan rate.

[0062] Alternatively, the first to fourth transistors M1 to M4 may all be formed of P-type oxide semiconductor thin film transistors. Therefore, since it is not necessary to provide a separate wiring (eg, a clock wiring for an N-type oxide semiconductor thin film transistor), power consumption may be further reduced.

[0063] Figure 5 is a diagram showing a structure of a pixel according to an example embodiment. Figure 5 , a pixel according to an exemplary embodiment may include an organic light emitting diode OLED and a pixel circuit 50 .

[0064] An anode electrode of the organic light emitting diode OLED may be connected to the pixel circuit 50 , and may generate light of a predetermined brightness corresponding to an amount of current supplied from the pixel circuit 50 .

[0065] The pixel circuit 50 may control the amount of current flowing from the driving power source ELVDD to the organic light emitting diode OLED in response to the data signal. In this case, the pixel circuit 50 may include a first transistor M1 to a fifth transistor M5 and a storage capacitor Cst. Compared with the pixel circuits 30 and 40, the pixel circuit 50 may include an additional transistor and may be additionally connected to the fourth scan line SL4.

[0066] The first transistor M1 may include a first electrode connected to the second electrode of the fifth transistor M5, a second electrode connected to the first node N1, and a gate electrode connected to the second node N2. The first transistor M1 may operate as a driving transistor (DRT) driving the organic light emitting diode OLED by supplying a driving current to the organic light emitting diode OLED.

[0067] The second transistor M2 may be connected between the data line DL and the second node N2. The gate electrode of the second transistor M2 may be connected to the second scan line SL2. When the second scan signal S2i is supplied to the second scan line SL2, the second transistor M2 may be turned on. When the second transistor M2 is turned on, the data line DL may be electrically connected to the second node N2. The second transistor M2 may operate as a switching transistor (SWT) for transmitting a data signal to a second node N2, wherein the second node N2 corresponds to the gate electrode of the first transistor M1.

[0068] The third transistor M3 may be connected between the first node N1 and a reference voltage line RVL for supplying a reference voltage Vr. A gate electrode of the third transistor M3 may be connected to a fourth scan line SL4. When a fourth scan signal S4i is supplied to the fourth scan line SL4, the third transistor M3 may be turned on. When the third transistor M3 is turned on, the first node N1 may be electrically connected to the reference voltage line RVL. The third transistor M3 may operate as a sensing transistor (SENT) for electrically connecting the reference voltage line RVL and the first node N1.

[0069] The fourth transistor M4 may be connected between the first node N1 and the anode electrode of the organic light emitting diode OLED. A gate electrode of the fourth transistor M4 may be connected to the first scan line SL1. When the first scan signal Sli is supplied to the first scan line SL1, the fourth transistor M4 may be turned on.

[0070] The fifth transistor M5 may include a first electrode connected to the driving power source ELVDD, a second electrode connected to the first electrode of the first transistor M1, and a gate electrode connected to the third scan line SL3. When the third scan signal S3i is supplied to the third scan line SL3, the fifth transistor M5 may be turned on. When the fifth transistor M5 is turned on, the driving power source ELVDD may be electrically connected to the first electrode of the first transistor M1.

[0071] The storage capacitor Cst may be connected between the first node N1 and the second node N2 .

[0072] The first to fifth transistors M1 to M5 may be formed of P-type or N-type oxide semiconductor thin film transistors, so that voltage fluctuation due to leakage current may be relatively reduced and driving may be performed at a relatively low scan rate.

[0073] Alternatively, the first to fifth transistors M1 to M5 may be formed of P-type oxide semiconductor thin film transistors. Therefore, since it is not necessary to provide a separate wiring (eg, a clock wiring for an N-type oxide semiconductor thin film transistor), power consumption may be further reduced.

[0074] Figure 6 is a diagram showing a structure of a pixel according to an example embodiment. Figure 6 , a pixel according to an exemplary embodiment may include an organic light emitting diode OLED and a pixel circuit 60 .

[0075] An anode electrode of the organic light emitting diode OLED may be connected to the pixel circuit 60 , and may generate light of a predetermined brightness corresponding to an amount of current supplied from the pixel circuit 60 .

[0076] The pixel circuit 60 may control the amount of current flowing from the driving power source ELVDD to the organic light emitting diode OLED in response to the data signal. In this case, the pixel circuit 60 may include first to fourth transistors M1 to M4 and a storage capacitor Cst. The pixel circuit 60 has the same transistor arrangement as the pixel circuit 30, but is not connected to the third scan line SL3.

[0077] In the pixel circuit 60, the gate electrodes of the second transistor M2 and the third transistor M3 can be connected to the same second scan line SL2 to use the second scan signal S2i in common. Figure 3 The structure of the pixel circuit 30 shown in FIG. 1 is the same, so a repeated description thereof will be omitted.

[0078] The structure of the pixel circuit 60 is not necessarily limited to this. For example, Figure 6 The structure of the pixel circuit 60 in the embodiment may have the same Figure 4 or Figure 5 In other words, although Figure 6 is shown as Figure 3 The pixel circuit 30 shown in FIG. 1 is modified so that the second transistor M2 and the third transistor M3 are connected to the second scan line SL2 to use the second scan signal S2i in common. Figure 4 The pixel circuit 40 and Figure 5 The pixel circuit 50 shown is modified in such a manner that the second transistor M2 and the third transistor M3 are connected to the same scan line to use the same scan signal in common.

[0079] According to exemplary embodiments, a pixel capable of relatively reducing power consumption and an organic light emitting display device including the pixel may be provided.

[0080] Example embodiments have been disclosed herein, and although specific terms are employed, they are used and will be interpreted only in a general descriptive sense, and not for limiting purposes. In some cases, as of the time of filing of this application, it is clear to those skilled in the art that, unless otherwise expressly stated, features, characteristics, and / or elements described in conjunction with a particular embodiment may be used alone or in combination with features, characteristics, and / or elements described in conjunction with other embodiments. Therefore, it will be understood by those skilled in the art that various changes in form and detail may be made without departing from the spirit and scope of the invention as set forth in the appended claims.

Claims

1. A pixel comprising: Organic light-emitting diodes; a first transistor including a first electrode connected to the second electrode of the fifth transistor, a second electrode connected to the first node, and a gate electrode connected to the second node; a second transistor connected between the data line and the second node, and a gate electrode of the second transistor connected to a second scan line; a third transistor connected between the first node and a reference voltage line, and a gate electrode of the third transistor connected to a fourth scan line; a fourth transistor connected between the first node and an anode electrode of the organic light emitting diode, a gate electrode of the fourth transistor being connected to a first scan line, and the fourth transistor being turned on when a first scan signal is supplied to the first scan line; a fifth transistor having a first electrode connected to a driving power source, a second electrode connected to the first electrode of the first transistor, and a gate electrode connected to a third scan line; as well as a storage capacitor connected between the first node and the second node, Wherein, the first transistor to the fifth transistor are oxide semiconductor thin film transistors.

2. The pixel according to claim 1, wherein: The first to fifth transistors are P-type oxide semiconductor thin film transistors.

3. The pixel according to claim 2, wherein: The channel layer of the P-type oxide semiconductor thin film transistor is formed by at least one of the following: Indium tin gallium zinc oxide InSnGaZnO based materials as quaternary metal oxides; Indium gallium zinc oxide InGaZnO-based materials, indium tin zinc oxide InSnZnO-based materials, indium aluminum zinc oxide InAlZnO-based materials, indium hafnium zinc oxide InHfZnO-based materials, tin gallium zinc oxide SnGaZnO-based materials, aluminum gallium zinc oxide AlGaZnO-based materials, tin aluminum zinc oxide SnAlZnO-based materials as ternary metal oxides; Indium zinc oxide InZnO-based materials, tin zinc oxide SnZnO-based materials, indium magnesium oxide InMgO-based materials, indium gallium oxide InGaO-based materials as binary metal oxides; Indium oxide InO based materials, tin oxide SnO based materials and zinc oxide ZnO based materials.

4. An organic light emitting display device, comprising: An organic light emitting display panel, comprising a plurality of data lines, a plurality of scanning lines and a plurality of pixels; a data driver driving the plurality of data lines by supplying data voltages to the plurality of data lines; a scan driver that sequentially drives the plurality of scan lines by sequentially supplying scan signals to the plurality of scan lines; and a controller for controlling the data driver and the scan driver by supplying control signals to the data driver and the scan driver, wherein the transistor included in each of the plurality of pixels is formed only of an oxide semiconductor thin film transistor, Wherein, each pixel of the plurality of pixels comprises: Organic light-emitting diodes; a first transistor including a first electrode connected to the second electrode of the fifth transistor, a second electrode connected to the first node, and a gate electrode connected to the second node; a second transistor connected between the data line and the second node, and a gate electrode of the second transistor connected to a second scan line; a third transistor connected between the first node and a reference voltage line, and a gate electrode of the third transistor connected to a fourth scan line; a fourth transistor connected between the first node and an anode electrode of the organic light emitting diode, a gate electrode of the fourth transistor being connected to a first scan line, and the fourth transistor being turned on when a first scan signal is supplied to the first scan line; a fifth transistor including a first electrode connected to a driving power source, a second electrode connected to the first electrode of the first transistor, and a gate electrode connected to a third scan line; and A storage capacitor is connected between the first node and the second node.

5. The organic light emitting display device according to claim 4, wherein: The second scan line and the fourth scan line are the same scan line.

6. The organic light emitting display device according to claim 4, wherein: The scan driver is implemented as a gate-in-panel GIP type low temperature polysilicon LTPS.

7. The organic light emitting display device according to claim 4, wherein: The scan driver is located on one side or two opposite sides of the organic light emitting display panel.

8. The organic light emitting display device according to claim 4, wherein: The data driver is located on one side or two opposite sides of the organic light emitting display panel.

9. The organic light emitting display device according to claim 4, wherein: The first to fifth transistors are P-type oxide semiconductor thin film transistors.

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