A low power consumption RS485 communication interface circuit

By designing the combination of switch S1 and MOS tubes in the RS485 circuit to control the working current of the driver and receiver, the high power consumption problem of the existing RS485 circuit in the reception mode is solved, and a low power consumption RS485 communication interface circuit is realized.

CN110765050BActive Publication Date: 2025-05-02WUXI JINGMING ELECTRONIC TECH CO LTD
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Patent Information

Application Number
CN201810840628.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2018-07-27
Publication Date
2025-05-02
Estimated Expiration
2038-07-27

AI Technical Summary

Technical Problem

The existing RS485 circuit has a high operating current in the reception mode and cannot meet the needs of high power consumption such as battery power supply.

Method used

A low-power RS485 communication interface circuit is designed, and the operating current of the driver D is controlled by using the switch S1 to control the operating current of the driver D and the receiver R by using the first MOS tube M1, the second MOS tube M2, and the third MOS tube M3 to achieve low power consumption in the receiving state of the circuit.

Benefits of technology

It realizes low power consumption in the reception mode, and the total static operating current of the circuit without load is ICC1<2uA, meeting the power consumption requirements in battery power supply and other occasions.

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Abstract

The invention provides a low-power consumption RS485 communication interface circuit, comprising: a driver, wherein a first end of the driver is connected to a first interface line, a second end of the driver is connected to a second interface line, a third end of the driver is connected to a DI interface, and a fourth end of the driver is connected to a DE interface; a receiver, wherein a first end of the receiver is connected to the first interface line, a second end of the receiver is connected to the second interface line, a third end of the receiver is connected to an R0 interface, and a fourth end of the receiver is connected to an RE interface; a first MOS tube, wherein a drain of the first MOS tube is connected to a power supply, and a source of the first MOS tube is connected to a grid of the first MOS tube; a second MOS tube, wherein a drain of the second MOS tube is connected to a power supply, and a grid of the second MOS tube is connected to a grid of the first MOS tube; a third MOS tube, wherein a drain of the third MOS tube is connected to a power supply, and a grid of the third MOS tube is connected to a grid of the first MOS tube and a grid of the second MOS tube, and a source of the third MOS tube is connected to a fifth end of the receiver; and a switch, wherein a first end of the switch is connected to a source of the second MOS tube, and a second end of the switch is connected to a fifth end of the driver; wherein the switch is controlled to be opened and closed by the DE interface.
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Description

Technical Field

[0001] The invention relates to the field of communications, and in particular to a low-power RS485 communication interface circuit. Background Art

[0002] RS485 communication is an international universal serial port standard. It is widely used because of its simple structure, low price, appropriate communication distance and data transmission rate. RS485 has 4-wire full-duplex mode and 2-wire half-duplex mode. Based on cost considerations, the half-duplex mode is basically used at present.

[0003] The RS485 circuit in half-duplex mode can work in sending mode or receiving mode; in actual use, the half-duplex RS485 circuit is in receiving mode for a long time, and the working current of the circuit in receiving mode is basically equal to the actual working current of the circuit; the current RS485 circuit is not specially optimized for the working current in receiving mode, and the working current in receiving mode and sending mode are both between 0.5mA and 2mA, which cannot meet the needs in some occasions with high requirements on circuit power consumption, such as battery power supply. Summary of the invention

[0004] The present invention aims to overcome at least one of the above-mentioned drawbacks and provide a low-power RS485 communication interface circuit, so that the circuit is suitable for battery-powered applications and other occasions with high requirements on circuit power consumption.

[0005] To achieve the above object, the technical solution of the present invention is specifically implemented as follows:

[0006] One aspect of the present invention provides a low-power RS485 communication interface circuit, comprising: a first interface line A; a second interface line B; a driver D, a first end of the driver D is connected to the first interface line A, a second end of the driver D is connected to the second interface line B, a third end of the driver D is connected to the DI interface, and a fourth end of the driver D is connected to the DE interface; a receiver R, a first end of the receiver R is connected to the first interface line A, a second end of the receiver R is connected to the second interface line B, a third end of the receiver R is connected to the R0 interface, and a fourth end of the receiver R is connected to the RE interface; a first MOS tube M1, a drain of the first MOS tube M1 is connected to a power supply VCC, and the first MOS tube M1 The source of the second MOS tube M2 is connected to the gate of the first MOS tube M1; the second MOS tube M2, the drain of the second MOS tube M2 is connected to the power supply VCC, and the gate of the second MOS tube M2 is connected to the gate of the first MOS tube M1; the third MOS tube M3, the drain of the third MOS tube M3 is connected to the power supply VCC, the gate of the third MOS tube M3 is connected to the gate of the first MOS tube M1 and the gate of the second MOS tube M2, and the source of the third MOS tube M3 is connected to the fifth end of the receiver R; the switch S1, the first end of the switch S1 is connected to the source of the second MOS tube M2, and the second end of the switch S1 is connected to the fifth end of the driver D; wherein the switch S1 is controlled to be opened and closed by the DE interface.

[0007] Among them, the first MOS tube M1 is a P-channel MOS tube; the second MOS tube M2 is a P-channel MOS tube; and the third MOS tube M3 is a P-channel MOS tube.

[0008] It is set that I1=I2=I3; wherein I1 is the current output by the first MOS tube M1, I2 is the current output by the second MOS tube M2, and I3 is the current output by the third MOS tube M3.

[0009] Among them, when VCC = 3.6V, I1 is set to 0.4uA.

[0010] Among them, the static operating current IR of the receiver R is set to 3×I3; the static operating current ID of the driver D is set to <200×I2; when VCC=3.6V, I1 is set to <0.5uA; in the receiving mode, the total static operating current ICC1 of the circuit without load is =I1+IR; in the driving mode, the total static operating current ICC2 of the circuit without load is =I1+IR+ID.

[0011] When VCC=3.6V, in the receiving mode, the total static operating current ICC1 of the circuit without load is set to be less than 2uA.

[0012] When VCC=3.6V, ICC1 is set to 1.6uA.

[0013] It can be seen from the technical solution provided by the present invention that the low-power RS485 communication interface circuit provided by the embodiment of the present invention can utilize the switch S1 to disconnect the switch S1 and turn off the working current of the driver D when the driver is not working; utilize the first MOS tube M1, the second MOS tube M2, and the third MOS tube M3 to control the working current of the driver D and the receiver R; and can cooperate with the driver D and the receiver R with optimized working current to achieve the purpose of low power consumption in the receiving state of the circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative work.

[0015] Figure 1 A schematic diagram of the structure of a low-power RS485 communication interface circuit provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0016] The embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0017] Figure 1 The structure diagram of the low power consumption RS485 communication interface circuit provided by the embodiment of the present invention is shown in FIG. Figure 1 The low-power RS485 communication interface circuit provided by the embodiment of the present invention includes:

[0018] First interface line A;

[0019] The second interface line B;

[0020] Driver D, a first end of the driver D is connected to the first interface line A, a second end of the driver D is connected to the second interface line B, a third end of the driver D is connected to the DI interface, and a fourth end of the driver D is connected to the DE interface;

[0021] A receiver R, a first end of the receiver R is connected to the first interface line A, a second end of the receiver R is connected to the second interface line B, a third end of the receiver R is connected to the R0 interface, and a fourth end of the receiver R is connected to the RE interface;

[0022] A first MOS tube M1, wherein a drain of the first MOS tube M1 is connected to a power source VCC, and a source of the first MOS tube M1 is connected to a gate of the first MOS tube M1;

[0023] A second MOS tube M2, wherein the drain of the second MOS tube M2 is connected to the power supply VCC, and the gate of the second MOS tube M2 is connected to the gate of the first MOS tube M1;

[0024] A third MOS tube M3, a drain of the third MOS tube M3 is connected to the power supply VCC, a gate of the third MOS tube M3 is connected to the gate of the first MOS tube M1 and the gate of the second MOS tube M2, and a source of the third MOS tube M3 is connected to the fifth end of the receiver R;

[0025] A switch S1, wherein a first end of the switch S1 is connected to a source of the second MOS tube M2, and a second end of the switch S1 is connected to a fifth end of the driver D;

[0026] Among them, the switch S1 is controlled to open or close by the DE interface.

[0027] Specifically, the present invention includes a driver D, a receiver R, a first MOS transistor M1, a second MOS transistor M2, a third MOS transistor M3 and a switch S1. Among them:

[0028] As an optional implementation of the embodiment of the present invention, the first MOS transistor M1 is a P-channel MOS transistor; the second MOS transistor M2 is a P-channel MOS transistor; and the third MOS transistor M3 is a P-channel MOS transistor.

[0029] As an optional implementation of the embodiment of the present invention, I1=I2=I3 is set; wherein I1 is the current output by the first MOS tube M1, I2 is the current output by the second MOS tube M2, and I3 is the current output by the third MOS tube M3. Preferably, when VCC=3.6V, I1 can be set to 0.4uA.

[0030] The static operating current ID of the driver D is composed of the current I2 output by the second MOS tube M2 and the current mirrored by I2.

[0031] The static operating current IR of the receiver R is composed of the current I3 output by the third MOS tube M3 and the current mirrored by I3.

[0032] The first MOS transistor M1 , the second MOS transistor M2 and the third MOS transistor M3 form a CMOS current mirror, wherein I1 = I2 = I3 .

[0033] Switch S1 is controlled by DE. When DE is at a logic low level, switch S1 is disconnected. At this time, I2 cannot be input to driver D, and the static working current of driver D is 0. When DE is at a logic high level, switch S1 is turned on. At this time, I2 is input to driver D, and the static current of driver D is ID.

[0034] When the circuit is in receiving mode, the switch S1 is disconnected through the DE interface, at which time the receiver R is working, the driver D is turned off, and the total static working current ICC1 of the circuit is equal to I1+IR.

[0035] When the circuit is in the driving mode, the switch S1 is closed through the DE interface, at which time the receiver R is turned off, the driver D is working, and the total static working current ICC2 of the circuit is I1+IR+ID.

[0036] As an optional implementation of an embodiment of the present invention, the quiescent operating current IR of the receiver R is set to 3×I3; the quiescent operating current ID of the driver D is set to <200×I2; when VCC=3.6V, I1 is set to <0.5uA; in receiving mode, the total quiescent operating current ICC1 of the circuit without load is =I1+IR; in driving mode, the total quiescent operating current ICC2 of the circuit without load is =I1+IR+ID. As an optional implementation of an embodiment of the present invention, when VCC=3.6V, in receiving mode, the total quiescent operating current ICC1 of the circuit without load is set to <2uA. Preferably, when VCC=3.6V, ICC1 is set to 1.6uA. Specifically, the static operating current IR of the low-power receiver R designed by the present invention is 3×I3; the static operating current ID of the low-power driver D designed is <200×I2; the designed bias I1 is I1<0.5uA when VCC=3.6V, typically 0.4uA; when the circuit is at VCC=3.6V and in receiving mode, the total static operating current ICC1 of the circuit without load is ICC1=I1+IR<2uA, typically 1.6uA; when the circuit is at VCC=3.6V and in driving mode, the total static operating current ICC2 of the circuit without load is ICC2=I1+IR+ID<102uA.

[0037] Therefore, the low-power RS485 communication interface circuit provided by the embodiment of the present invention can use the switch S1 to disconnect the switch S1 and turn off the working current of the driver D when the driver is not working; use the first MOS tube M1, the second MOS tube M2, and the third MOS tube M3 to control the working current of the driver D and the receiver R; and can cooperate with the driver D and the receiver R with optimized working current to achieve the purpose of low power consumption in the receiving state of the circuit.

[0038] Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, segment or portion of code that includes one or more executable instructions for implementing the steps of a specific logical function or process, and the scope of the preferred embodiments of the present invention includes alternative implementations in which functions may not be performed in the order shown or discussed, including performing functions in a substantially simultaneous manner or in the reverse order depending on the functions involved, which should be understood by those skilled in the art to which the embodiments of the present invention belong.

[0039] A person skilled in the art may understand that all or part of the steps in the method for implementing the above-mentioned embodiment may be completed by instructing related hardware through a program, and the program may be stored in a computer-readable storage medium, which, when executed, includes one or a combination of the steps of the method embodiment.

[0040] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0041] The above embodiments are only descriptions of the preferred implementation modes of the present invention, and are not intended to limit the scope of the present invention. Without departing from the design spirit of the present invention, various modifications and improvements made to the technical solutions of the present invention by ordinary engineering and technical personnel in the field should fall within the protection scope determined by the claims of the present invention.

Claims

1. A low power consumption RS485 communication interface circuit, characterized in that: include: First interface line A; The second interface line B; A driver D, wherein a first end of the driver D is connected to the first interface line A, a second end of the driver D is connected to the second interface line B, a third end of the driver D is connected to the DI interface, and a fourth end of the driver D is connected to the DE interface; A receiver R, a first end of the receiver R is connected to the first interface line A, a second end of the receiver R is connected to the second interface line B, a third end of the receiver R is connected to the R0 interface, and a fourth end of the receiver R is connected to the RE interface; A first MOS transistor M1, wherein a drain of the first MOS transistor M1 is connected to a power source VCC, and a source of the first MOS transistor M1 is connected to a gate of the first MOS transistor M1; A second MOS transistor M2, wherein a drain of the second MOS transistor M2 is connected to a power supply VCC, and a gate of the second MOS transistor M2 is connected to a gate of the first MOS transistor M1; a third MOS tube M3, wherein the drain of the third MOS tube M3 is connected to the power supply VCC, the gate of the third MOS tube M3 is connected to the gate of the first MOS tube M1 and the gate of the second MOS tube M2, and the source of the third MOS tube M3 is connected to the fifth end of the receiver R; A switch S1, wherein a first end of the switch S1 is connected to a source of the second MOS transistor M2, and a second end of the switch S1 is connected to a fifth end of the driver D; The switch S1 is opened and closed by the DE interface.

2. The circuit according to claim 1, characterized in that The first MOS tube M1 is a P-channel MOS tube; The second MOS transistor M2 is a P-channel MOS transistor; The third MOS transistor M3 is a P-channel MOS transistor.

3. The circuit according to claim 1 or 2, characterized in that: Set I1=I2=I3; wherein I1 is the current output by the first MOS tube M1, I2 is the current output by the second MOS tube M2, and I3 is the current output by the third MOS tube M3.

4. The circuit according to claim 3, characterized in that When VCC=3.6V, I1 is set to 0.4uA.

5. The circuit according to claim 3, characterized in that Set the static operating current IR of the receiver R to be 3×I3; Setting the static operating current ID of the driver D to be less than 200×I2; When VCC = 3.6V, set I1 < 0.5uA; In receiving mode, the circuit has no load and the total static operating current ICC1 = I1 + IR; In driving mode, the circuit has no load and the total static operating current ICC2 = I1 + IR + ID.

6. The circuit according to claim 5, characterized in that When VCC=3.6V, in the receiving mode, the circuit is set to have a total no-load static operating current ICC1<2uA.

7. The circuit according to claim 6, characterized in that When VCC=3.6V, ICC1 is set to 1.6uA.

Citation Information

Patent Citations

  • Low -power consumption RS485 communication interface circuit

    CN208384565U