Organic light-emitting display device

Abstract

An organic light-emitting display device is provided. The organic light-emitting display device includes a display panel and an optical module. The display panel includes a substrate, a light-emitting structure, and a first wall structure. The substrate has an opening region, a peripheral region surrounding the opening region, and a display region surrounding the peripheral region. A first groove is defined in the peripheral region, and an opening is defined in the opening region. The light-emitting structure is disposed on the substrate in the display region. The first wall structure is disposed inside the first groove of the substrate. The optical module is disposed in the opening.

Description

Technical Field

[0001] Exemplary embodiments generally relate to an organic light emitting display device. More specifically, embodiments of the invention relate to an organic light emitting display device including an optical module disposed in a part of a display area. Background Art

[0002] Since flat panel display (“FPD”) devices are lighter and thinner than cathode ray tube (“CRT”) display devices, FPD devices are widely used as display devices of electronic devices. FPD devices generally include liquid crystal display (“LCD”) devices and organic light emitting display (“OLED”) devices.

[0003] An OLED device may have a display area for displaying an image and a non-display area in which a gate driver, a data driver, wirings, and an optical module (e.g., a camera module, a motion recognition sensor, etc.) are disposed. Recently, an OLED device has been developed in which an optical module is disposed in an opening formed in a part of the display area. Summary of the Invention

[0004] In an organic light emitting display (“OLED”) device in which an optical module is disposed in an opening formed in a part of the display area, a blocking pattern for blocking water, moisture, etc. that can penetrate into the display area positioned adjacent to the optical module may be formed outside where the optical module is disposed. However, the blocking pattern may be easily damaged due to external impact or stress during a manufacturing process. When the blocking pattern is damaged, defects of pixels included in the OLED device may occur.

[0005] Exemplary embodiments provide an OLED device including an optical module disposed in a part of a display area.

[0006] According to an exemplary embodiment of the invention, an OLED device includes a display panel and an optical module. In such an embodiment, the display panel includes a substrate, a light emitting structure, and a first wall structure. In such an embodiment, the substrate has an opening area, a peripheral area surrounding the opening area, and a display area surrounding the peripheral area, wherein a first groove is defined in the peripheral area, and an opening is defined in the opening area. In such an embodiment, the light emitting structure is disposed on the substrate in the display area, the first wall structure is disposed inside the first groove of the substrate, and the optical module is disposed in the opening.

[0007] In an exemplary embodiment, the first groove may include: a first sidewall, positioned adjacent to the opening region; and a second sidewall, opposite to the first sidewall. In such an embodiment, the first wall structure may include a first wall pattern and a second wall pattern. In such an embodiment, the first wall pattern may be spaced apart from the first sidewall and may surround the first sidewall, and the second wall pattern may be spaced apart from the second sidewall and may surround the first wall pattern.

[0008] In an exemplary embodiment, the distance between the first wall pattern and the first sidewall may be equal to the distance between the second wall pattern and the second sidewall.

[0009] In an exemplary embodiment, the upper surface of the first wall structure may be lower than the upper surface of the substrate.

[0010] In an exemplary embodiment, the substrate may include: a first organic layer; a first barrier layer disposed on the first organic layer; a second organic layer disposed on the first barrier layer; and a second barrier layer disposed on the second organic layer. In such an embodiment, the first opening may be defined as passing through the second organic layer in the peripheral region, and the second opening overlapping with the first opening may be defined as passing through the second barrier layer.

[0011] In an exemplary embodiment, the first opening and the second opening may jointly define the first groove of the substrate.

[0012] In an exemplary embodiment, the light-emitting structure may include: a lower electrode; a light-emitting layer disposed on the lower electrode; and an upper electrode disposed on the light-emitting layer.

[0013] In an exemplary embodiment, the upper electrode may extend from the display region into the peripheral region and may be partially disposed in the peripheral region.

[0014] In an exemplary embodiment, the upper electrode may be separated in the space between the first wall structure and the sidewall of the second organic layer defined by the first opening.

[0015] In an exemplary embodiment, the upper electrode within the first groove may be disposed on at least a portion of the side surface of the second organic layer, at least a portion of the upper surface of the first wall structure, the side surface of the first wall structure not opposite to the side surface of the second organic layer, and the first barrier layer.

[0016] In an exemplary embodiment, the first wall structure may have a first height from the upper surface of the first barrier layer to the upper surface of the first wall structure, and the second organic layer may have a second height from the upper surface of the first barrier layer to the upper surface of the second organic layer. The first height may be smaller than the second height.

[0017] In an exemplary embodiment, the first wall structure may be disposed on the first barrier layer and may be spaced apart from the sidewall of the second organic layer defined by the first opening. In such an embodiment, the distance between the first wall structure and the second organic layer may be defined as a first distance.

[0018] In an exemplary embodiment, the first distance may be greater than the thickness of the upper electrode.

[0019] In an exemplary embodiment, the OLED device may further include a thin film encapsulation structure disposed on the light-emitting structure. In such an embodiment, the thin film encapsulation structure may include: a first thin film encapsulation layer disposed on the upper electrode, a second thin film encapsulation layer disposed on the first thin film encapsulation layer, and a third thin film encapsulation layer disposed on the second thin film encapsulation layer. In such an embodiment, the first thin film encapsulation layer may include a flexible inorganic material, the second thin film encapsulation layer may include a flexible organic material, and the third thin film encapsulation layer may include a flexible inorganic material.

[0020] In an exemplary embodiment, the first thin film encapsulation layer and the third thin film encapsulation layer may extend in a direction from the display area to the peripheral area and may be disposed in the peripheral area.

[0021] In other words, the first thin film encapsulation layer may be continuously disposed in the space between the first wall structure and the sidewall of the second organic layer defined by the first opening.

[0022] In an exemplary embodiment, the first thin film encapsulation layer may be disposed in the space between the first wall structure and the sidewall of the second organic layer.

[0023] In an exemplary embodiment, the optical module may be in contact with the side surface of the substrate, the side surface of the upper electrode, the side surface of the first thin film encapsulation layer, and the side surface of the third thin film encapsulation layer at the boundary between the peripheral area and the opening area.

[0024] In an exemplary embodiment, the substrate may further include a second groove. In such an embodiment, the second groove may surround the first groove and may be defined in the peripheral area.

[0025] In an exemplary embodiment, the display panel may further include a second wall structure disposed inside the second groove of the substrate.

[0026] According to an exemplary embodiment of the invention, an OLED device includes a wall structure disposed inside a groove. The wall structure may be formed using a second organic layer and may have a relatively large size. In such an embodiment, the wall structure may be a relatively robust structure against external shocks or stresses during the manufacturing process. In such an embodiment, since the size of the second opening of the second barrier layer is relatively increased, the photoresist used to form the wall structure can be easily removed. That is, the first thin film encapsulation (TFE) layer and the third TFE layer can be easily disposed inside the groove in the peripheral region. Therefore, the OLED device can easily prevent water, moisture, etc. from penetrating into the semiconductor element and the light-emitting structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] The above and other features of the invention will become more apparent by describing in detail exemplary embodiments of the invention with reference to the drawings, in which:

[0028] Figure 1 is a perspective view showing an organic light emitting display (“OLED”) device according to an exemplary embodiment;

[0029] Figure 2 is showing Figure 1 a plan view of the OLED device;

[0030] Figure 3 and Figure 4 is a perspective view for describing an opening defined in the Figure 1 OLED device;

[0031] Figure 5 is Figure 2 a magnified plan view corresponding to region “A” of;

[0032] Figure 6 is a cross-sectional view taken along line I-I' of Figure 5 ;

[0033] Figure 7A is Figure 6 a magnified plan view corresponding to region “B” of;

[0034] Figure 7B is showing an exemplary embodiment of an OLED device corresponding to Figure 6 a partial magnified plan view;

[0035] Figure 7C is showing Figure 6 a partial magnified plan view of an alternative exemplary embodiment of the OLED device corresponding to;

[0036] Figure 8 is showing Figure 6 a cross-sectional view of the wall structure;

[0037] Figures 9 to 16 is a cross-sectional view showing a method of manufacturing an OLED device according to an exemplary embodiment; and

[0038] Figure 17 is a cross-sectional view showing an OLED device according to an alternative exemplary embodiment. Detailed Description

[0039] Now, the invention will be described more fully hereinafter with reference to the accompanying drawings in which various embodiments are shown. However, the invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Like reference numerals always denote like elements.

[0040] It will be understood that when an element is referred to as being "connected to" another element, the element can be directly connected to the other element, or intervening elements may be present therebetween. In contrast, when an element is referred to as being "directly connected to" another element, there are no intervening elements.

[0041] It will be understood that although the terms "first", "second", "third", etc. may be used herein to describe various elements, components, regions, layers, and / or sections, these elements, components, regions, layers, and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, or section from another element, component, region, layer, or section. Thus, without departing from the teachings herein, the "first element", "first component", "first region", "first layer", or "first section" discussed below may be referred to as a second element, second component, second region, second layer, or second section.

[0042] The terms used herein are for the purpose of describing particular embodiments only and are not intended to be limiting. As used herein, unless the context clearly dictates otherwise, the singular forms "a", "an", and "the" as well as "at least one" are also intended to include the plural forms. "Or" means "and / or". As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items. "At least one of A and B" means "A or B". It will also be understood that when the terms "comprises", "comprising", and / or their variants are used in this specification, it indicates the presence of the stated features, regions, wholes, steps, operations, elements, and / or components, but does not preclude the presence or addition of one or more other features, regions, wholes, steps, operations, elements, components, and / or groups thereof.

[0043] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will also be understood that terms, such as those defined in a general dictionary, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and this disclosure, and will not be interpreted in an idealized or overly formal sense.

[0044] Here, exemplary embodiments are described with reference to cross-sectional views that are schematic views of idealized embodiments. As such, variations in the shape of the views due to, for example, manufacturing techniques and / or tolerances are to be expected. Accordingly, the embodiments described herein should not be construed as being limited to the specific shapes of the regions as shown herein, but will include, for example, differences in shape due to manufacturing. For example, regions shown or described as flat may generally have rough and / or non-linear features. Additionally, sharp corners shown may be rounded. Thus, the regions shown in the figures are schematic in nature, and their shapes are not intended to show the exact shape of the regions and are not intended to limit the scope of the claims.

[0045] Hereinafter, embodiments of the invention will be explained in detail with reference to the drawings.

[0046] Figure 1 is a perspective view showing an organic light emitting display (“OLED”) device according to an exemplary embodiment, Figure 2 shows Figure 1 a plan view of the OLED device. Figure 3 and Figure 4 are perspective views for describing openings defined in the Figure 1 OLED device.

[0047] Referring to Figure 1 , Figure 2 , Figure 3 and Figure 4 , exemplary embodiments of the OLED device 100 may include a display panel 200, an optical module 700, etc. The display panel 200 may have a first surface S1 and a second surface S2. Here, an image may be displayed through the first surface S1, and the second surface S2 may be opposite to the first surface S1. The optical module 700 may be disposed on one side of the display panel 200. The OLED device 100 may have a short side extending in a first direction D1 and a long side extending in a second direction D2 that intersects the first direction D1. The thickness direction of the OLED device 100 may be perpendicular to the first direction D1 and the second direction D2.

[0048] The display panel 200 may have a display area 10, an opening area 20, and a peripheral area 30. Here, the peripheral area 30 may surround the opening area 20, and the display area 10 may surround the peripheral area 30. Optionally, the display area 10 may not completely surround the peripheral area 30. As Figure 3 and Figure 4 shown, the display panel 200 may have an opening 910 defined in the opening area 20.

[0049] The display area 10 may include a plurality of sub-pixel areas (not shown). The sub-pixel areas may be arranged in the display area 10 substantially in a matrix form. Sub-pixel circuits (e.g., Figure 6 semiconductor element 250) may be disposed in each sub-pixel area of the display area 10, and an OLED (e.g., Figure 6 light-emitting structure 300) may be disposed on the sub-pixel circuit. Here, the OLED may also represent an organic light-emitting diode. An image may be displayed in the display area 10 through the sub-pixel circuit and the OLED.

[0050] For example, in one exemplary embodiment, a first sub-pixel circuit, a second sub-pixel circuit, and a third sub-pixel circuit may be disposed in the sub-pixel area, and a first OLED, a second OLED, and a third OLED may be disposed on the first sub-pixel circuit, the second sub-pixel circuit, and the third sub-pixel circuit. The first sub-pixel circuit may be coupled to (or connected to) the first OLED capable of emitting red light, the second sub-pixel circuit may be coupled to the second OLED capable of emitting green light. The third sub-pixel circuit may be coupled to the third OLED capable of emitting blue light.

[0051] In an exemplary embodiment, the first OLED may be disposed to overlap with the first sub-pixel circuit, the second OLED may be disposed to overlap with the second sub-pixel circuit. The third OLED may be disposed to overlap with the third sub-pixel circuit. In an alternative exemplary embodiment, the first OLED may be disposed to overlap with a part of the first sub-pixel circuit and a part of a sub-pixel circuit different from the first sub-pixel circuit, the second OLED may be disposed to overlap with a part of the second sub-pixel circuit and a part of a sub-pixel circuit different from the second sub-pixel circuit. In such an embodiment, the third OLED may be disposed to overlap with a part of the third sub-pixel circuit and a part of a sub-pixel circuit different from the third sub-pixel circuit.

[0052] In such an embodiment, the first OLED, the second OLED, and the third OLED may be arranged using, for example, an RGB stripe method in which quadrilaterals of the same size are sequentially arranged, an S stripe method including a blue OLED having a relatively large area, a WRGB method further including a white OLED, a Pentile method in which an RG-GB pattern is repeatedly arranged, and the like.

[0053] In an exemplary embodiment, at least one driving transistor, at least one switching transistor, and at least one capacitor may be disposed in each sub-pixel region.

[0054] In an exemplary embodiment, the shape of the display area 10 has a quadrilateral planar shape, but is not limited thereto. Optionally, the shape of the display area 10 may have, for example, a triangular planar shape, a rhombic planar shape, a polygonal planar shape, a circular planar shape, a racetrack planar shape, or an elliptical planar shape.

[0055] The optical module 700 may be disposed in the opening 910. For example, in one exemplary embodiment, the optical module 700 may include a camera module for capturing (or recognizing) an image of a target, a face recognition sensor module for sensing a user's face, a pupil recognition sensor module for sensing a user's pupil, an acceleration and geomagnetic sensor module for determining the movement of the OLED device 100, a proximity and infrared sensor module for detecting the proximity to the OLED device 100, or a light intensity sensor module for measuring the brightness when left in a pocket or a bag, and the like. In an exemplary embodiment, functional modules such as a vibration module for indicating an incoming call alert, a speaker module for outputting sound, etc. may be disposed in the opening 910.

[0056] In an exemplary embodiment, the shape of each of the opening area 20 and the peripheral area 30 has a circular or hollow circular planar shape, but is not limited thereto. Optionally, the shape of each of the opening area 20 and the peripheral area 30 may have, for example, a triangular planar shape, a rhombic planar shape, a polygonal planar shape, a quadrilateral planar shape, a racetrack planar shape, or an elliptical planar shape.

[0057] Figure 5 is Figure 2 a magnified plan view corresponding to the region “A” of Figure 6 is Figure 5 a cross-sectional view taken along line I-I' of Figure 7A is Figure 6 a magnified plan view corresponding to the region “B” of Figure 7B is a Figure 6 partial magnified plan view showing an exemplary embodiment of the OLED device corresponding to Figure 7C is a Figure 6Partial enlarged plan view of an optional exemplary embodiment of the corresponding OLED device Figure 8 shows Figure 6 a cross-sectional view of the wall structure

[0058] Referring to Figure 5 、 Figure 6 、 Figure 7A and Figure 8 ,Exemplary embodiments of the display panel 200 may include a substrate 110, a semiconductor element 250, a planarization layer 270, a light-emitting structure 300, a pixel defining layer 310, a thin film encapsulation ("TFE") structure 450, a wall structure 800, etc. In such an embodiment, the substrate 110 may include a first organic layer 111, a first barrier layer 112, a second organic layer 113, and a second barrier layer 114. In such an embodiment, when the display panel 200 has a display area 10, an opening area 20, and a peripheral area 30, the substrate 110 may be divided into a display area 10, an opening area 20, and a peripheral area 30. The semiconductor element 250 may include an active layer 130, a gate insulating layer 150, a gate electrode 170, an insulating interlayer 190, a source electrode 210, and a drain electrode 230, and the light-emitting structure 300 may include a lower electrode 290, a light-emitting layer 330, and an upper electrode 340. In such an embodiment, the TFE structure 450 may include a first TFE layer 451, a second TFE layer 452, and a third TFE layer 453, and the wall structure 800 may include a first wall pattern 810 and a second wall pattern 820.

[0059] In an exemplary embodiment, the display panel 200 may further include a groove 930 defined in or formed in the peripheral area 30, and the wall structure 800 may be disposed inside the groove 930. In such an embodiment, when the OLED device 100 includes the wall structure 800, the OLED device 100 may prevent water, moisture, etc. from penetrating into the semiconductor element 250 and the light-emitting structure 300.

[0060] In an exemplary embodiment, as described above, the substrate 110 includes a first organic layer 111. The first organic layer 111 may include a flexible organic material. In an exemplary embodiment, the first organic layer 111 may include a random copolymer or a block copolymer. In such an embodiment, the first organic layer 111 may have high transparency, a low thermal expansion coefficient, and a high glass transition temperature. In an exemplary embodiment, the first organic layer 111 includes an imide group, so that the heat resistance, chemical resistance, wear resistance, and electrical properties of the first organic layer 111 can be very high. For example, in one exemplary embodiment, the first organic layer 111 may include polyimide.

[0061] The first barrier layer 112 may be disposed over the entire first organic layer 111. The first barrier layer 112 may block moisture or water that permeates through the first organic layer 111. The first barrier layer 112 may include a flexible inorganic material. In an exemplary embodiment, the first barrier layer 112 may include silicon oxide, silicon nitride, etc. For example, in one exemplary embodiment, the first barrier layer 112 may include silicon oxide (SiO), silicon nitride (SiN), silicon oxynitride (SiON), silicon oxycarbide (SiOC), silicon carbonitride (SiCN), aluminum oxide (AlO), aluminum nitride (AlN), tantalum oxide (TaO), hafnium oxide (HfO), zirconium oxide (ZrO), or titanium oxide (TiO), etc.

[0062] The second organic layer 113 may be disposed over the first barrier layer 112. In an exemplary embodiment, the second organic layer 113 may have a first opening in the peripheral region 30. For example, in one exemplary embodiment, the first opening may expose the upper surface of the first barrier layer 112 located in the peripheral region 30. The second organic layer 113 may include a flexible organic material. In an exemplary embodiment, the second organic layer 113 may include a random copolymer or a block copolymer. For example, in one exemplary embodiment, the second organic layer 113 may include polyimide.

[0063] The second barrier layer 114 may be disposed over the second organic layer 113. The second barrier layer 114 may block moisture or water that permeates through the second organic layer 113. In an exemplary embodiment, the second barrier layer 114 may have a second opening in the peripheral region 30, and the second opening may overlap with the first opening. For example, in one exemplary embodiment, the second opening may expose the upper surface of the first barrier layer 112 located in the peripheral region 30. The second barrier layer 114 may include a flexible inorganic material. For example, in an exemplary embodiment, the second barrier layer 114 may include SiO or SiN.

[0064] In such an embodiment, the substrate 110 includes the first organic layer 111, the first barrier layer 112, the second organic layer 113, and the second barrier layer 114. In an exemplary embodiment, the first opening and the second opening may define a groove 930 of the substrate 110 (or the display panel 200).

[0065] In an exemplary embodiment, the substrate 110 includes four layers, but is not limited thereto. For example, in one exemplary embodiment, the substrate 110 may include a single layer or at least two layers.

[0066] In an exemplary embodiment, a buffer layer (not shown) may be disposed on a substrate 110 (e.g., a second barrier layer 114). The buffer layer may be disposed on the entire substrate 110 except for the peripheral region 30. The buffer layer may effectively prevent metal atoms and / or impurities from diffusing from the substrate 110 into the semiconductor element 250 and the light-emitting structure 300. In such an embodiment, the buffer layer may control the rate of heat transfer in the crystallization process for forming the active layer 130, thereby obtaining a substantially uniform active layer 130. In addition, the buffer layer may improve the surface flatness of the substrate 110 when the surface of the substrate 110 is relatively irregular. Depending on the type of the substrate 110, at least two buffer layers may be disposed on the substrate 110, or the buffer layer may be omitted. For example, in one exemplary embodiment, the buffer layer may include an organic material or an inorganic material.

[0067] The active layer 130 may be disposed in the display region 10 on the substrate 110. The active layer 130 may include an oxide semiconductor, an inorganic semiconductor (e.g., amorphous silicon, polycrystalline silicon, etc.), or an organic semiconductor, etc.

[0068] The gate insulating layer 150 may be disposed on the active layer 130. The gate insulating layer 150 may cover the active layer 130 in the display region 10 on the substrate 110 and may not be disposed in the peripheral region 30. That is, the gate insulating layer 150 may be disposed only in the display region 10 on the substrate 110. For example, in one exemplary embodiment, the gate insulating layer 150 may sufficiently cover the active layer 130 on the substrate 110 and may have a substantially flat upper surface without steps around the active layer 130. Optionally, the gate insulating layer 150 may cover the active layer 130 on the substrate 110 and may be disposed to have a substantially uniform thickness along the contour of the active layer 130. For example, the gate insulating layer 150 may include a silicon compound or a metal oxide. Optionally, the gate insulating layer 150 may have a multi-layer structure including a plurality of insulating layers. For example, in one exemplary embodiment, the insulating layers may have different thicknesses from each other or include different materials from each other.

[0069] The gate electrode 170 may be disposed in the display area 10 on the gate insulating layer 150. The gate electrode 170 may be disposed on a portion of the gate insulating layer 150 under which the active layer 130 is disposed. The gate electrode 170 may include a metal, a metal alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, etc. For example, in one exemplary embodiment, the gate electrode 170 may include gold (Au), silver (Ag), aluminum (Al), platinum (Pt), nickel (Ni), titanium (Ti), palladium (Pd), magnesium (Mg), calcium (Ca), lithium (Li), chromium (Cr), tantalum (Ta), tungsten (W), copper (Cu), molybdenum (Mo), scandium (Sc), neodymium (Nd), iridium (Ir), an aluminum alloy, aluminum nitride (AlN), a silver alloy, tungsten nitride (WN), a copper alloy, a molybdenum alloy, titanium nitride (TiN), chromium nitride (CrN), tantalum nitride (TaN), strontium ruthenium oxide (SRO), zinc oxide (ZnO), indium tin oxide (“ITO”), tin oxide (SnO), indium oxide (InO), gallium oxide (GaO), indium zinc oxide (“IZO”), etc. These materials may be used alone or in their appropriate combinations. Optionally, the gate electrode 170 may have a multi-layer structure including multiple layers.

[0070] The insulating interlayer 190 may be disposed on the gate electrode 170. The insulating interlayer 190 may cover the gate electrode 170 in the display area 10 on the gate insulating layer 150, and may not be disposed in the peripheral area 30. That is, the insulating interlayer 190 may be disposed only in the display area 10 on the gate insulating layer 150. For example, in one exemplary embodiment, the insulating interlayer 190 may sufficiently cover the gate electrode 170 on the gate insulating layer 150, and may have a substantially flat upper surface without steps around the gate electrode 170. Optionally, the insulating interlayer 190 may cover the gate electrode 170 on the gate insulating layer 150, and may be disposed to have a substantially uniform thickness along the contour of the gate electrode 170. The insulating interlayer 190 may include a silicon compound, a metal oxide, etc. Optionally, the insulating interlayer 190 may have a multi-layer structure including multiple insulating layers. The insulating layers may have different thicknesses from each other or include different materials from each other.

[0071] The source electrode 210 and the drain electrode 230 may be disposed in the display area 10 on the insulating interlayer 190. The source electrode 210 may be connected to the source region of the active layer 130 via a contact hole formed by removing a first portion of the gate insulating layer 150 and the insulating interlayer 190. The drain electrode 230 may be connected to the drain region of the active layer 130 via a contact hole formed by removing a second portion of the gate insulating layer 150 and the insulating interlayer 190. Each of the source electrode 210 and the drain electrode 230 may include a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, etc. These materials may be used alone or in their appropriate combinations. In an exemplary embodiment, each of the source electrode 210 and the drain electrode 230 may have a multi-layer structure including a plurality of layers. Thus, a semiconductor element 250 including the active layer 130, the gate insulating layer 150, the gate electrode 170, the insulating interlayer 190, the source electrode 210, and the drain electrode 230 may be provided.

[0072] In an exemplary embodiment, the semiconductor element 250 has a top-gate structure, but is not limited thereto. In an alternative exemplary embodiment, the semiconductor element 250 may have a bottom-gate structure.

[0073] In an exemplary embodiment, the display panel 200 includes one semiconductor element, but is not limited thereto. In an alternative exemplary embodiment, the display panel 200 may include at least one semiconductor element and at least one capacitor.

[0074] A planarization layer 270 may be disposed on the insulating interlayer 190, the source electrode 210, and the drain electrode 230. The planarization layer 270 may cover the source electrode 210 and the drain electrode 230 in the display area 10 on the insulating interlayer 190, and may not be disposed in the peripheral area 30. That is, the planarization layer 270 may be disposed only in the display area 10 on the insulating interlayer 190. For example, in an exemplary embodiment, the planarization layer 270 may be disposed with a high thickness in the display area 10. In this case, the planarization layer 270 may have a substantially flat upper surface, and a planarization process may also be performed on the planarization layer 270 to achieve a flat upper surface of the planarization layer 270. Alternatively, the planarization layer 270 may be disposed with a substantially uniform thickness along the contours of the source electrode 210 and the drain electrode 230 in the display area 10 on the insulating interlayer 190. The planarization layer 270 may include an organic material or an inorganic material. In an exemplary embodiment, the planarization layer 270 may include an organic material.

[0075] The lower electrode 290 may be disposed in the display area 10 on the planarization layer 270. The lower electrode 290 may be connected to the drain electrode 230 via a contact hole formed by removing a part of the planarization layer 270. Additionally, the lower electrode 290 may be electrically connected to the semiconductor element 250. For example, the lower electrode 290 may include a metal, a metal alloy, a metal nitride, a conductive metal oxide, or a transparent conductive material. These materials may be used alone or in their suitable combinations. In an exemplary embodiment, the lower electrode 290 may have a multi-layer structure including a plurality of layers.

[0076] In an exemplary embodiment, the wall structure 800 may be disposed in the peripheral area 30 on the first barrier layer 112. The wall structure 800 may be disposed along the contour of the outside of the opening area 20. In such an embodiment, the wall structure 800 may surround the optical module 700. In such an embodiment, the wall structure 800 may be disposed inside the groove 930 of the substrate 110. Here, the groove 930 may include a first sidewall 931 positioned adjacent to the opening area 20 and a second sidewall 932 positioned opposite (or facing) the first sidewall 931 (refer to Figure 8 ). For example, in one exemplary embodiment, the first sidewall 931 may be defined as the first sidewall of the first opening of the second organic layer 113 (or the second opening of the second barrier layer 114), and the second sidewall 932 may be defined as the second sidewall of the first opening of the second organic layer 113 opposite to the first sidewall.

[0077] In an exemplary embodiment, as Figure 5 , Figure 6 and Figure 8As shown, the wall structure 800 may include a first wall pattern 810 and a second wall pattern 820. Each of the first wall pattern 810 and the second wall pattern 820 may have a planar shape of a hollow circle. The first wall pattern 810 may be spaced apart from the first sidewall 931 by a first distance d1 and may substantially surround the first sidewall 931. Here, the space where the first wall pattern 810 is spaced apart from the first sidewall 931 by the first distance d1 may be defined as a first space 950. The second wall pattern 820 may be spaced apart from the second sidewall 932 by the first distance d1 and may substantially surround the first wall pattern 810. Here, the space where the second wall pattern 820 is spaced apart from the second sidewall 932 by the first distance d1 may be defined as a second space 970. For example, in an exemplary embodiment, the first distance d1 by which the first wall pattern 810 is spaced apart from the first sidewall 931 may be substantially equal to the distance by which the second wall pattern 820 is spaced apart from the second sidewall 932, and the first distance d1 may be greater than the thickness of the upper electrode 340. In such an embodiment, if the first distance d1 is smaller than the thickness of the upper electrode 340, the upper electrode 340 may not be disconnected or separated in the first space 950 and the second space 970. In other words, the upper electrode 340 may be integrally formed in the peripheral region 30. In this case, the integrally formed upper electrode 340 may be used as a penetration path for water and / or moisture. Therefore, in such an embodiment, the first distance d1 is greater than the thickness of the upper electrode 340. In an exemplary embodiment, when viewed in a plan view in the thickness direction of the substrate 110 or the OLED device, the diameter of the second wall pattern 820 may be greater than the diameter of the first wall pattern 810. In addition, the upper surface of the wall structure 800 may be positioned lower than the upper surface of the substrate 110 (or the upper surface of the second organic layer 113). The wall structure 800 may have a first height H1 from the upper surface of the first barrier layer 112 to the upper surface of the wall structure 800, and the second organic layer 113 may have a second height H2 from the upper surface of the first barrier layer 112 to the upper surface of the second organic layer 113. The first height H1 may be smaller than the second height H2. In such an embodiment, if the first height H1 is equal to or greater than the second height H2, the upper electrode 340 may not be separated in the first space 950 and the second space 970. In other words, the upper electrode 340 may be integrally formed in the peripheral region 30. In this case, the integrally formed upper electrode 340 may be used as a penetration path for water and / or moisture. Therefore, in an exemplary embodiment, the first height H1 may be determined to be smaller than the second height H2 such that the upper electrode 340 is disconnected or separated in the first space 950 and the second space 970.

[0078] The wall structure 800 may include an inorganic material or an organic material. In an exemplary embodiment, the wall structure 800 may include an organic material. For example, in one exemplary embodiment, the wall structure 800 may include, for example, a photoresist, a polyacrylic resin, a polyimide resin, a polyamide resin, a silicone resin, an acrylic resin, or an epoxy resin.

[0079] The pixel defining layer 310 may be disposed in the display area 10 on the planarization layer 270 and may not be disposed in the peripheral area 30. In an exemplary embodiment, the pixel defining layer 310 may be disposed only in the display area 10. For example, in one exemplary embodiment, the pixel defining layer 310 may cover both sides of the lower electrode 290 and may expose a part of the upper surface of the lower electrode 290. The pixel defining layer 310 may include an organic material or an inorganic material. For example, in one exemplary embodiment, the pixel defining layer 310 may include an organic material.

[0080] The light emitting layer 330 may be disposed in the display area 10 on the part of the lower electrode 290 exposed by the pixel defining layer 310. The light emitting layer 330 may be formed of at least one of light emitting materials capable of generating light of different colors according to sub-pixels (e.g., red light, blue light, and green light, etc.). Optionally, by stacking a plurality of light emitting materials capable of generating different colors of light such as red light, green light, and blue light, etc., the light emitting layer 330 may generally generate white light. In such an embodiment, a color filter may be disposed on the light emitting layer 330. The color filter may include a red color filter, a green color filter, and a blue color filter. Optionally, the color filter may include a yellow color filter, a cyan color filter, and a magenta color filter. The color filter may include, for example, a photosensitive resin or a color photoresist.

[0081] In an exemplary embodiment, as Figure 7BAs shown, the light-emitting layer 330 may be disposed in the peripheral region 30. In a conventional OLED device, when the light-emitting layer 330 is disposed in the peripheral region 30, the light-emitting layer 330 disposed under the upper electrode 340 in the peripheral region 30 may be used as a permeation path for water and / or moisture. In this case, the semiconductor element 250 and the light-emitting structure 300 positioned adjacent to the peripheral region 30 in the display region 10 may be damaged due to water and / or moisture. In an exemplary embodiment of the invention, as described above, the display panel 200 includes a first wall pattern 810 spaced apart from the first sidewall 931 and a second wall pattern 820 spaced apart from the second sidewall 932, such that the light-emitting layer 330 can be disconnected or separated in the first space 950 and the second space 970. In such an embodiment, since the light-emitting layer 330 is separated in the first space 950 and the second space 970, the permeation path of the light-emitting layer 330 can be effectively blocked. Therefore, although the light-emitting layer 330 is disposed in the peripheral region 30, defects of the pixels included in the OLED device 100 do not occur. In an exemplary embodiment, when the light-emitting layer 330 is disposed under the upper electrode 340, the first distance d1 may be relatively increased such that each of the light-emitting layer 330 and the upper electrode 340 is separated in the first space 950 and the second space 970.

[0082] Referring to Figure 5 , Figure 6 , Figure 7A and Figure 8, the upper electrode 340 may be disposed on the pixel defining layer 310 and the light emitting layer 330 in a part of the peripheral region 30 and the display region 10. In an exemplary embodiment, the upper electrode 340 may extend from the display region 10 into the peripheral region 30 in the first direction D1 and may be partially disposed in the peripheral region 30. For example, in one exemplary embodiment, the upper electrode 340 may be separated in a first space 950 spaced apart from a first sidewall (e.g., the first sidewall 931) of the second organic layer 113 defined by a first opening of the second organic layer 113 and the first wall pattern 810, and may be separated in a second space 970 spaced apart from a second sidewall (e.g., the second sidewall 932) of the second organic layer 113 defined by the first opening of the second organic layer 113 and the second wall pattern 820. In such an embodiment, the upper electrode 340 inside the groove 930 may be disposed on at least a part of each of two lateral side surfaces of the second barrier layer 114, at least a part of two lateral side surfaces of the second organic layer 113, at least a part of the upper surface of the wall structure 800, an inner surface of the wall structure 800 that is not opposite to the two lateral side surfaces of the second organic layer 113 (e.g., a side surface facing the first wall pattern 810 and the second wall pattern 820), and the first barrier layer 112. In an exemplary embodiment, since the display panel 200 includes the first wall pattern 810 spaced apart from the first sidewall 931 and the second wall pattern 820 spaced apart from the second sidewall 932, the upper electrode 340 may be separated in the first space 950 and the second space 970, so that the upper electrode 340 may not be used as a permeation path for water and / or moisture due to the separation of the upper electrode 340. The upper electrode 340 may include, for example, a metal, a metal alloy, a metal nitride, a conductive metal oxide, or a transparent conductive material. These materials may be used alone or in their appropriate combinations. In an exemplary embodiment, the upper electrode 340 may have a multi-layer structure including multiple layers. Accordingly, a light emitting structure 300 including the lower electrode 290, the light emitting layer 330, and the upper electrode 340 may be provided.

[0083] In an exemplary embodiment, as Figure 7BAs shown, the cover layer 345 may be disposed on the upper electrode 340. In such an embodiment, the cover layer 345 may be disposed in the peripheral region 30. In a conventional OLED device, when the cover layer 345 is disposed in the peripheral region 30, the cover layer 345 disposed on the upper electrode 340 in the peripheral region 30 may be used as a permeation path for water and / or moisture. In this case, the semiconductor element 250 and the light-emitting structure 300 positioned in the display region 10 adjacent to the peripheral region 30 may be damaged due to water and / or moisture. In an exemplary embodiment of the invention, since the display panel 200 includes the first wall pattern 810 spaced apart from the first sidewall 931 and the second wall pattern 820 spaced apart from the second sidewall 932, the cover layer 345 may be separated in the first space 950 and the second space 970. In such an embodiment, since the cover layer 345 is separated in the first space 950 and the second space 970, the permeation path of the cover layer 345 may be blocked. Therefore, although the cover layer 345 is disposed in the peripheral region 30, defects of the pixels included in the OLED device 100 do not occur. However, when the cover layer 345 is disposed on the upper electrode 340, the first distance d1 may be relatively increased such that each of the cover layer 345 and the upper electrode 340 is separated in the first space 950 and the second space 970. The cover layer 345 may protect the light-emitting structure 300 and may include an organic material or an inorganic material. For example, in one exemplary embodiment, the cover layer 345 may include, for example, a triamine derivative, an arylenediamine derivative, 4,4'-N,N'-dicarbazole-biphenyl ("CBP"), or tris(8-hydroxyquinoline)aluminum ("Alq3").

[0084] Referring to Figure 5 , Figure 6 , Figure 7A and Figure 8 , the first TFE layer 451 may be disposed on the upper electrode 340 in the display region 10 and the peripheral region 30. The first TFE layer 451 may cover the upper electrode 340 in the display region 10 and may be disposed to have a substantially uniform thickness along the contour of the upper electrode 340 and extend in the peripheral region 30. The first TFE layer 451 may be disposed along the contour of the upper electrode 340 in the peripheral region 30. The first TFE layer 451 may effectively prevent the light-emitting structure 300 from deterioration caused by the permeation of moisture, water, oxygen, etc. In addition, the first TFE layer 451 may protect the light-emitting structure 300 from external impacts. The first TFE layer 451 may include a flexible inorganic material.

[0085] In an exemplary embodiment, as Figure 7CAs shown, the first TFE layer 451 may be disposed in the first space 950 and the second space 970. In such an embodiment, since the first TFE layer 451 disposed in the first space 950 and the second space 970 can support the first wall pattern 810 and the second wall pattern 820, the first TFE layer 451 can effectively prevent the wall structure 800 from separating from the first barrier layer 112.

[0086] Referring to Figure 5 , Figure 6 , Figure 7A and Figure 8 , the second TFE layer 452 may be disposed in the display area 10 on the first TFE layer 451 and may not be disposed in the peripheral area 30. In such an embodiment, the second TFE layer 452 may be disposed only in the display area 10. The second TFE layer 452 may improve the flatness of the display panel 200 and may protect the light-emitting structure 300. The second TFE layer 452 may include a flexible organic material.

[0087] The third TFE layer 453 may be disposed in the display area 10 and the peripheral area 30 on the second TFE layer 452. The third TFE layer 453 may cover the second TFE layer 452 in the display area 10, may be disposed with a substantially uniform thickness along the contour of the second TFE layer 452, and may extend in the peripheral area 30. The third TFE layer 453 may cover the first TFE layer 451 in the peripheral area 30 and may be disposed with a substantially uniform thickness along the contour of the first TFE layer 451. Together with the first TFE layer 451, the third TFE layer 453 can effectively prevent the light-emitting structure 300 from being deteriorated due to the penetration of moisture, water, oxygen, etc. In addition, together with the first TFE layer 451 and the second TFE layer 452, the third TFE layer 453 can protect the light-emitting structure 300 from external impacts. The third TFE layer 453 may include a flexible inorganic material. Accordingly, a TFE structure 450 including the first TFE layer 451, the second TFE layer 452, and the third TFE layer 453 may be provided. Optionally, the TFE structure 450 may have a five-layer structure in which the first TFE layer to the fifth TFE layer are stacked layer by layer or a seven-layer structure in which the first TFE layer to the seventh TFE layer are stacked layer by layer.

[0088] Since the conventional OLED device has an enlarged lower opening in the recessed area, the upper electrode 340 is separated in the peripheral area 30. In such a conventional OLED device, the enlarged lower opening may have an undercut shape, and the second organic layer 113 with an opening having a first width and the second barrier layer 114 with an opening having a second width may be formed in the peripheral area 30. Here, the first width may be larger than the second width, and the first opening may overlap with the second opening. The second barrier layer 114 positioned adjacent to the second opening may be defined as a tip, and the upper electrode 340 may be separated by the tip in the peripheral area 30. However, the tip may be easily damaged by external shocks or stresses during the manufacturing process (such as the removal of the top and / or bottom protective films, etc.). When the tip is damaged, defects of the pixels included in the conventional OLED device may occur. In addition, residues of photoresist for patterning the metal layer may not be completely removed within the enlarged lower opening. When the first TFE layer 451 is formed, a layer separation phenomenon may occur. Furthermore, due to the residue of the photoresist, defects of the conventional OLED device may occur in subsequent processes.

[0089] An exemplary embodiment of the OLED device 100 includes a wall structure 800 disposed inside the recess 930. The wall structure 800 may be formed using the second organic layer 113 and may have a relatively large size. In such an embodiment, the wall structure 800 may be a structure that is relatively robust against external shocks or stresses during the manufacturing process. In such an embodiment, since the size of the second opening of the second barrier layer 114 is relatively increased, the photoresist used to form the wall structure 800 can be easily removed. That is, the first TFE layer 451 and the third TFE layer 453 can be easily disposed in the recess 930 of the peripheral area 30. Therefore, the OLED device 100 can effectively prevent or block the penetration of water, moisture, etc. into the semiconductor element 250 and the light-emitting structure 300.

[0090] Figures 9 to 16 is a cross-sectional view showing a method of manufacturing an OLED device according to an exemplary embodiment.

[0091] Referring to Figure 9 , a rigid glass substrate 105 may be provided or prepared. The first organic layer 111 may be provided or formed on the rigid glass substrate 105. The first organic layer 111 may be formed over the entire rigid glass substrate 105, and the first organic layer 111 may be formed using a flexible organic material such as polyimide.

[0092] The first barrier layer 112 may be disposed or formed over the entire first organic layer 111. The first barrier layer 112 may block moisture or water that penetrates through the first organic layer 111. The first barrier layer 112 may be formed of a flexible inorganic material such as silicon oxide, silicon nitride, etc. For example, in an exemplary embodiment, the first barrier layer 112 may include SiO, SiN, SiON, SiOC, SiCN, AlO, AlN, TaO, HfO, ZrO, TiO, etc.

[0093] The second organic layer 113 may be disposed or formed over the first barrier layer 112. The second organic layer 113 may be formed over the entire first barrier layer 112, and the second organic layer 113 may be formed of a flexible organic material such as polyimide.

[0094] The second barrier layer 114 may be disposed or formed over the entire second organic layer 113. The second barrier layer 114 may block moisture or water that penetrates through the second organic layer 113. The second barrier layer 114 may be formed of a flexible inorganic material such as SiO, SiN, etc.

[0095] Thus, a substrate 110 including the first organic layer 111, the first barrier layer 112, the second organic layer 113, and the second barrier layer 114 may be formed.

[0096] Since the substrate 110 is relatively thin and flexible, the substrate 110 may be formed on the rigid glass substrate 105 to assist in the formation of the upper structure (e.g., semiconductor elements and light-emitting structures, etc.) of the substrate 110. For example, in an exemplary embodiment, after the upper structure is formed on the substrate 110, the rigid glass substrate 105 may be removed. In other words, since the first organic layer 111 and the second organic layer 113 and the first barrier layer 112 and the second barrier layer 114 are relatively thin and flexible, it may be difficult to directly form the upper structure on the first organic layer 111 and the second organic layer 113 and the first barrier layer 112 and the second barrier layer 114. Therefore, the upper structure is formed on the substrate 110 and the rigid glass substrate 105, and then after the rigid glass substrate 105 is removed, the first organic layer 111 and the second organic layer 113 and the first barrier layer 112 and the second barrier layer 114 may be used as the substrate 110.

[0097] A buffer layer (not shown) may be provided or formed on a substrate 110 (e.g., a second barrier layer 114). The buffer layer may be formed on the entire substrate 110 except for the peripheral region 30. The buffer layer may effectively prevent the diffusion of metal atoms and / or impurities from the substrate 110. In addition, the buffer layer may control the rate of heat transfer in the crystallization process for forming the active layer 130, thereby obtaining a substantially uniform active layer 130. Further, when the surface of the substrate 110 is relatively irregular, the buffer layer may improve the surface flatness of the substrate 110. Depending on the type of the substrate 110, at least two buffer layers may be provided on the substrate 110, or the buffer layer may be omitted. For example, in an exemplary embodiment, the buffer layer may be formed of an organic material or an inorganic material.

[0098] Referring Figure 10 , the active layer 130 may be provided or formed in the display region 10 on the substrate 110. The active layer 130 may be formed of an oxide semiconductor, an inorganic semiconductor, an organic semiconductor, etc.

[0099] A gate insulating layer 150 may be provided or formed on the active layer 130. The gate insulating layer 150 may cover the active layer 130 in the display region 10 on the substrate 110 and may extend in the peripheral region 30. For example, in an exemplary embodiment, the gate insulating layer 150 may sufficiently cover the active layer 130 on the substrate 110 and may have a substantially flat upper surface without steps around the active layer 130. Optionally, the gate insulating layer 150 may cover the active layer 130 on the substrate 110 and may be formed to have a substantially uniform thickness along the contour of the active layer 130. The gate insulating layer 150 may be formed of a silicon compound, a metal oxide, etc. Optionally, the gate insulating layer 150 may have a multilayer structure including a plurality of insulating layers. For example, in an exemplary embodiment, the insulating layers may have different thicknesses from each other or include different materials from each other.

[0100] The gate electrode 170 may be provided or formed on the gate insulating layer 150 in the display area 10. The gate electrode 170 may be formed on a portion of the gate insulating layer 150 under which the active layer 130 is positioned. The gate electrode 170 may be formed using a metal, metal alloy, metal nitride, conductive metal oxide, transparent conductive material, etc. For example, in an exemplary embodiment, the gate electrode 170 may include Au, Ag, Al, Pt, Ni, Ti, Pd, Mg, Ca, Li, Cr, Ta, W, Cu, Mo, Sc, Nd, Ir, aluminum alloy, AlN, silver alloy, WN, copper alloy, molybdenum alloy, TiN, CrN, TaN, SRO, ZnO, ITO, SnO, InO, GaO, IZO, etc. These materials may be used alone or in their appropriate combinations. Optionally, the gate electrode 170 may have a multi-layer structure including a plurality of layers.

[0101] An insulating interlayer 190 may be provided or formed on the gate electrode 170. The insulating interlayer 190 may cover the gate electrode 170 in the display area 10 on the gate insulating layer 150 and may extend in the peripheral area 30. That is, the insulating interlayer 190 may be formed on the entire gate insulating layer 150. For example, in an exemplary embodiment, the insulating interlayer 190 may sufficiently cover the gate electrode 170 on the gate insulating layer 150 and may have a substantially flat upper surface without steps around the gate electrode 170. Optionally, the insulating interlayer 190 may cover the gate electrode 170 on the gate insulating layer 150 and may be formed to have a substantially uniform thickness along the contour of the gate electrode 170. The insulating interlayer 190 may be formed using a silicon compound, metal oxide, etc. Optionally, the insulating interlayer 190 may have a multi-layer structure including a plurality of insulating layers. The insulating layers may have different thicknesses from each other or include different materials from each other.

[0102] Refer to Figure 11, source electrodes 210 and drain electrodes 230 may be provided or formed on the insulating interlayer 190 in the display area 10. The source electrode 210 may be connected to the source region of the active layer 130 via a contact hole formed by removing a first portion of the gate insulating layer 150 and the insulating interlayer 190. The drain electrode 230 may be connected to the drain region of the active layer 130 via a contact hole formed by removing a second portion of the gate insulating layer 150 and the insulating interlayer 190. Each of the source electrode 210 and the drain electrode 230 may include a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, etc. These materials may be used alone or in their appropriate combinations. In an exemplary embodiment, each of the source electrode 210 and the drain electrode 230 may have a multi-layer structure including a plurality of layers. Thus, a semiconductor element 250 including the active layer 130, the gate insulating layer 150, the gate electrode 170, the insulating interlayer 190, the source electrode 210, and the drain electrode 230 may be formed.

[0103] A planarization layer 270 may be provided or formed on the insulating interlayer 190, the source electrode 210, and the drain electrode 230. The planarization layer 270 may cover the source electrode 210 and the drain electrode 230 in the display area 10 on the insulating interlayer 190, and the planarization layer 270 may not be formed in the peripheral area 30. That is, the planarization layer 270 may be formed only in the display area 10 on the insulating interlayer 190. For example, in an exemplary embodiment, the planarization layer 270 may be formed to have a high thickness in the display area 10. In such an embodiment, the planarization layer 270 may have a substantially flat upper surface, and a planarization process may also be performed on the planarization layer 270 to achieve a flat upper surface of the planarization layer 270. Alternatively, the planarization layer 270 may be formed to have a substantially uniform thickness along the contours of the source electrode 210 and the drain electrode 230 in the display area 10 on the insulating interlayer 190. The planarization layer 270 may include an organic material or an inorganic material. In an exemplary embodiment, the planarization layer 270 may be formed using an organic material.

[0104] A lower electrode 290 may be provided or formed on the planarization layer 270 in the display area 10. The lower electrode 290 may be connected to the drain electrode 230 via a contact hole formed by removing a portion of the planarization layer 270. Additionally, the lower electrode 290 may be electrically connected to the semiconductor element 250. The lower electrode 290 may be formed using a metal, a metal alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, etc. These materials may be used alone or in their appropriate combinations. In an exemplary embodiment, the lower electrode 290 may have a multi-layer structure including a plurality of layers.

[0105] After forming the lower electrode 290, the gate insulating layer 150 and the interlayer insulating layer 190 positioned in the peripheral region 30 may be removed. After removing the gate insulating layer 150 and the interlayer insulating layer 190 positioned in the peripheral region 30, a photoresist formed using a halftone mask may be formed in the peripheral region 30.

[0106] Referring to Figure 12 , a groove 930 may be formed in a part of the peripheral region 30 of the substrate 110 by using the photoresist, and a wall structure 800 may be formed inside the groove 930. For example, in one exemplary embodiment, the groove 930 may be defined by a first opening of the second organic layer 113 and a second opening of the second barrier layer 114. In an exemplary embodiment, the groove 930 and the wall structure 800 may be formed simultaneously (or synchronously). For example, in one exemplary embodiment, the wall structure 800 may be formed along the contour of the outside of the opening region 20 (refer to Figure 5 ). The groove 930 may include a first sidewall 931 positioned adjacent to the opening region 20 and a second sidewall 932 positioned opposite to the first sidewall 931 (refer to Figure 8 ). The wall structure 800 may include a first wall pattern 810 and a second wall pattern 820. Each of the first wall pattern 810 and the second wall pattern 820 may have a planar shape of a hollow circle. The first wall pattern 810 may be spaced apart from the first sidewall 931 by a first distance d1 and may substantially surround the first sidewall 931. Here, the space where the first wall pattern 810 is spaced apart from the first sidewall 931 by the first distance d1 may define a first space 950. The second wall pattern 820 may be spaced apart from the second sidewall 932 by the first distance d1 and may substantially surround the first wall pattern 810. Here, the space where the second wall pattern 820 is spaced apart from the second sidewall 932 by the first distance d1 may define a second space 970. The upper surface of the wall structure 800 may be positioned lower than the upper surface of the substrate 110 (or the upper surface of the second organic layer 113). The wall structure 800 may have a first height H1 from the upper surface of the first barrier layer 112 to the upper surface of the wall structure 800, and the second organic layer 113 may have a second height H2 from the upper surface of the first barrier layer 112 to the upper surface of the second organic layer 113. The first height H1 may be smaller than the second height H2. In other words, the shape of the photoresist may be determined such that the wall structure 800 has the first height H1. The wall structure 800 may include an inorganic material or an organic material. In an exemplary embodiment, the wall structure 800 may be formed using an organic material. For example, in one exemplary embodiment, the wall structure 800 may include a photoresist, a polyacrylic resin, a polyimide resin, a polyamide resin, a silicone resin, an acrylic resin, an epoxy resin, etc.

[0107] In an exemplary embodiment, asFigure 13A and Figure 13B As shown in Figure 13B , the shape of the wall structure 800 can be determined according to the type of photoresist. In such an embodiment, a wall structure 800 of Figure 13A can be formed using a positive photoresist, or a wall structure 800 of Figure 13B can be formed using a negative photoresist. In an exemplary embodiment, as shown in Figure 13B , the groove 930 may have an opening with an enlarged lower portion (e.g., in the shape of an undercut). In such an embodiment, the light-emitting layer, the upper electrode, the cover layer, etc., which will be described below, can be easily separated in the first space 950 and the second space 970. Accordingly, a penetration path of water and / or moisture, etc., can be blocked.

[0108] Referring to Figure 14 , the pixel defining layer 310 may be provided or formed on the planarization layer 270 in the display area 10, but the pixel defining layer 310 may not be formed in the peripheral area 30. That is, the pixel defining layer 310 may be formed only in the display area 10. For example, in one exemplary embodiment, the pixel defining layer 310 may cover both sides of the lower electrode 290 and may expose a part of the upper surface of the lower electrode 290. The pixel defining layer 310 may include an organic material or an inorganic material. In an exemplary embodiment, the pixel defining layer 310 may be formed using an organic material.

[0109] The light-emitting layer 330 may be provided or formed on the part of the lower electrode 290 exposed by the pixel defining layer 310 in the display area 10. The light-emitting layer 330 may be formed using at least one of light-emitting materials capable of generating light of different colors according to sub-pixels (e.g., red light, blue light, and green light, etc.). Optionally, by stacking a plurality of light-emitting materials capable of generating different colors of light such as red light, green light, and blue light, etc., the light-emitting layer 330 may generally generate white light. In such an embodiment, a color filter may be provided on the light-emitting layer 330. The color filter may include a red color filter, a green color filter, and a blue color filter. Optionally, the color filter may include a yellow color filter, a cyan color filter, and a magenta color filter. The color filter may be formed using a photosensitive resin, a color photoresist, etc.

[0110] In an optional exemplary embodiment, a light-emitting layer 330 may also be disposed or formed in the peripheral region 30. In such an embodiment, because of the first wall pattern 810 spaced apart from the first sidewall 931 and the second wall pattern 820 spaced apart from the second sidewall 932, the light-emitting layer 330 may be separated in the first space 950 and the second space 970. That is, since the light-emitting layer 330 is separated in the first space 950 and the second space 970, the penetration path of the light-emitting layer 330 can be blocked. Therefore, although the light-emitting layer 330 is formed in the peripheral region 30, defects of the pixels included in the OLED device do not occur.

[0111] An upper electrode 340 may be disposed or formed on the pixel defining layer 310 and the light-emitting layer 330 in a part of the peripheral region 30 and the display region 10. In an exemplary embodiment, the upper electrode 340 may extend from the display region 10 to the peripheral region 30 in the first direction D1 and may be partially formed in the peripheral region 30. For example, in one exemplary embodiment, the upper electrode 340 may be separated in the first space 950 where the first wall pattern 810 is spaced apart from the first sidewall (e.g., the first sidewall 931) defined by the first opening of the second organic layer 113 of the second organic layer 113, and may be separated in the second space 970 where the second wall pattern 820 is spaced apart from the second sidewall (e.g., the second sidewall 932) defined by the first opening of the second organic layer 113 of the second organic layer 113. In such an embodiment, the upper electrode 340 located inside the groove 930 may be formed on at least a part of each of the two lateral side surfaces of the second barrier layer 114, at least a part of each of the two lateral side surfaces of the second organic layer 113, at least a part of the upper surface of the wall structure 800, the inner surface of the wall structure 800 that is not opposite to the two lateral side surfaces of the second organic layer 113 (e.g., the side surface facing the first wall pattern 810 and the second wall pattern 820), and the first barrier layer 112. The upper electrode 340 may be formed using a metal, a metal alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, etc. These materials may be used alone or in their appropriate combinations. In an exemplary embodiment, the upper electrode 340 may have a multi-layer structure including a plurality of layers. Therefore, a light-emitting structure 300 including the lower electrode 290, the light-emitting layer 330, and the upper electrode 340 may be formed.

[0112] A capping layer (not shown) may be provided or formed on the upper electrode 340. That is, the capping layer may be formed in the peripheral region 30. In such an embodiment, due to the first wall pattern 810 spaced apart from the first sidewall 931 and the second wall pattern 820 spaced apart from the second sidewall 932, the capping layer may be separated in the first space 950 and the second space 970. That is, since the capping layer is separated in the first space 950 and the second space 970, the penetration path of the capping layer may be blocked. Therefore, although the capping layer is formed in the peripheral region 30, defects of the pixels included in the OLED device do not occur. The capping layer may protect the light-emitting structure 300 and may include an organic material or an inorganic material. For example, in one exemplary embodiment, a triamine derivative, an arylenediamine derivative, CBP, Alq3, etc. may be used to form the capping layer.

[0113] Referring to Figure 15 , a first TFE layer 451 may be provided or formed on the upper electrode 340 in the display region 10 and the peripheral region 30. The first TFE layer 451 may cover the upper electrode 340 in the display region 10, may be formed to have a substantially uniform thickness along the contour of the upper electrode 340, and may extend in the peripheral region 30. The first TFE layer 451 may be formed along the contour of the upper electrode 340 in the peripheral region 30. The first TFE layer 451 may effectively prevent the light-emitting structure 300 from being deteriorated due to the penetration of moisture, water, oxygen, etc. In such an embodiment, the first TFE layer 451 may protect the light-emitting structure 300 from external impact. The first TFE layer 451 may be formed of a flexible inorganic material.

[0114] A second TFE layer 452 may be provided or formed on the first TFE layer 451 in the display region 10, and the second TFE layer 452 may not be formed in the peripheral region 30. That is, the second TFE layer 452 may be formed only in the display region 10. The second TFE layer 452 may improve the flatness of the display panel and may protect the light-emitting structure 300. The second TFE layer 452 may be formed of a flexible organic material.

[0115] The third TFE layer 453 may be provided or formed on the second TFE layer 452 in the display area 10 and the peripheral area 30. The third TFE layer 453 may cover the second TFE layer 452 in the display area 10, may be formed to have a substantially uniform thickness along the contour of the second TFE layer 452, and may extend in the peripheral area 30. The third TFE layer 453 may cover the first TFE layer 451 in the peripheral area 30, and may be formed to have a substantially uniform thickness along the contour of the first TFE layer 451. Together with the first TFE layer 451, the third TFE layer 453 may prevent the light-emitting structure 300 from being deteriorated due to the penetration of moisture, water, oxygen, etc. In addition, together with the first TFE layer 451 and the second TFE layer 452, the third TFE layer 453 may protect the light-emitting structure 300 from external impacts. The third TFE layer 453 may be formed of a flexible inorganic material. Thus, a TFE structure 450 including the first TFE layer 451, the second TFE layer 452, and the third TFE layer 453 may be formed. Optionally, the TFE structure 450 may have a five-layer structure in which the first TFE layer to the fifth TFE layer are stacked layer by layer or a seven-layer structure in which the first TFE layer to the seventh TFE layer are stacked layer by layer.

[0116] After forming the TFE structure 450, a laser may be irradiated in the opening area 20 on the TFE structure 450. Optionally, different etching processes may be performed to expose the opening area 20 on the TFE structure 450.

[0117] Thus, a display panel 200 including the substrate 110, the semiconductor element 250, the planarization layer 270, the light-emitting structure 300, the pixel defining layer 310, the TFE structure 450, and the wall structure 800 may be formed.

[0118] Referring to Figure 16 and Figure 6 , an opening 910 may be formed in the opening area 20 by laser irradiation, and an optical module 700 may be provided or placed in the opening 910. For example, in one exemplary embodiment, the optical module 700 may include, for example, a camera module for capturing (or recognizing) an image of a target, a face recognition sensor module for sensing a user's face, a pupil recognition sensor module for sensing a user's pupil, an acceleration and geomagnetic sensor module for determining the movement of the OLED device, a proximity and infrared sensor module for detecting the proximity to the OLED device, or a light intensity sensor module for measuring the brightness when left in a pocket or a bag. After setting the optical module 700, the rigid glass substrate 105 may be removed from the substrate 110. Thus, the OLED device 100 shown in Figure 6 may be manufactured.

[0119] Figure 17It is a cross-sectional view showing an OLED device according to an optional exemplary embodiment. Except for the second groove 935 and the second wall structure 805, Figure 17 the embodiment of the OLED device 1000 shown in Figures 1 to 8 may have a structure that is substantially the same as or similar to the structure of the embodiment of the OLED device 100 described with reference to Figure 17 The same or identical elements shown in Figures 1 to 8 have been labeled with the same reference numerals as those used in the drawings for describing the embodiments above, and any repeated detailed descriptions thereof will be omitted or simplified.

[0120] Referring to Figure 17 and Figures 1 to 8 , an exemplary embodiment of the OLED device 1000 may include a display panel 200, an optical module 700, etc. The display panel 200 may include a substrate 110, semiconductor elements 250, a planarization layer 270, a light-emitting structure 300, a pixel defining layer 310, a TFE structure 450, a first wall structure 800, a second wall structure 805, etc. In such an embodiment, the substrate 110 may include a first organic layer 111, a first barrier layer 112, a second organic layer 113, and a second barrier layer 114. Since the display panel 200 has a display area 10, an opening area 20, and a peripheral area 30, the substrate 110 may be divided into a display area 10, an opening area 20, and a peripheral area 30. The light-emitting structure 300 may include a lower electrode 290, a light-emitting layer 330, and an upper electrode 340, and the TFE structure 450 may include a first TFE layer 451, a second TFE layer 452, and a third TFE layer 453. The first wall structure 800 may include a first wall pattern 810 and a second wall pattern 820, and the second wall structure 805 may include a third wall pattern 815 and a fourth wall pattern 825.

[0121] In an exemplary embodiment, the display panel 200 may further include a first groove 930 and a second groove 935 formed in the peripheral area 30. In such an embodiment, the first wall structure 800 may be disposed inside the first groove 930, and the second wall structure 805 may be disposed inside the second groove 935. Therefore, since the OLED device 1000 includes the first wall structure 800 and the second wall structure 805, the OLED device 1000 can effectively prevent or block the penetration of water, moisture, etc. into the semiconductor elements 250 and the light-emitting structure 300.

[0122] The first wall structure 800 may be disposed in a first portion of the peripheral region 30 on the first barrier layer 112. The first wall structure 800 may be disposed along the contour of the exterior of the opening region 20. That is, the first wall structure 800 may surround the optical module 700. In such an embodiment, the first wall structure 800 may be disposed inside a first groove 930 of the substrate 110. Here, the first groove 930 may include a first sidewall 931 positioned adjacent to the opening region 20 and a second sidewall 932 positioned opposite the first sidewall 931 (refer to Figure 8 ).

[0123] In an exemplary embodiment, the second wall structure 805 may be disposed in a second portion of the peripheral region 30 on the first barrier layer 112. The second wall structure 805 may be disposed along the contour of the exterior of the first wall structure 800. That is, the second wall structure 805 may surround the first wall structure 800. In such an embodiment, the second wall structure 805 may be disposed inside a second groove 935 of the substrate 110. Here, the second groove 935 may include a third sidewall positioned adjacent to the second sidewall 932 and a fourth sidewall positioned opposite the third sidewall.

[0124] The first wall structure 800 may include a first wall pattern 810 and a second wall pattern 820. Each of the first wall pattern 810 and the second wall pattern 820 may have a planar shape of a hollow circle. The first wall pattern 810 may be spaced apart from the first sidewall 931 by a first distance d1 and may substantially surround the first sidewall 931. Here, the space where the first wall pattern 810 is spaced apart from the first sidewall 931 by the first distance d1 may be defined as a first space 950. The second wall pattern 820 may be spaced apart from the second sidewall 932 by the first distance d1 and may substantially surround the first wall pattern 810. Here, the space where the second wall pattern 820 is spaced apart from the second sidewall 932 by the first distance d1 may define a second space 970. For example, in one exemplary embodiment, the first distance d1 by which the first wall pattern 810 is spaced apart from the first sidewall 931 may be substantially equal to the distance by which the second wall pattern 820 is spaced apart from the second sidewall 932, and the first distance d1 may be greater than the thickness of the upper electrode 340. In such an embodiment, the diameter of the second wall pattern 820 may be greater than the diameter of the first wall pattern 810. In addition, the upper surface of the first wall structure 800 may be positioned lower than the upper surface of the substrate 110 (or the upper surface of the second organic layer 113). The first wall structure 800 may have a first height H1 from the upper surface of the first barrier layer 112 to the upper surface of the first wall structure 800, and the second organic layer 113 may have a second height H2 from the upper surface of the first barrier layer 112 to the upper surface of the second organic layer 113. The first height H1 may be smaller than the second height H2.

[0125] In an exemplary embodiment, the second wall structure 805 may include a third wall pattern 815 and a fourth wall pattern 825. Each of the third wall pattern 815 and the fourth wall pattern 825 may have a planar shape of a hollow circle. The third wall pattern 815 may be spaced apart from the third sidewall by a second distance and may substantially surround the third sidewall. Here, the space where the third wall pattern 815 is spaced apart from the third sidewall by the second distance may define a third space 955. The fourth wall pattern 825 may be spaced apart from the fourth sidewall by the second distance and may substantially surround the third wall pattern 815. Here, the space where the fourth wall pattern 825 is spaced apart from the fourth sidewall by the second distance may define a fourth space 975. For example, in one exemplary embodiment, the second distance by which the third wall pattern 815 is spaced apart from the third sidewall may be substantially equal to the distance by which the fourth wall pattern 825 is spaced apart from the fourth sidewall, and the second distance may be greater than the thickness of the upper electrode 340. In an exemplary embodiment, the second distance may be equal to the first distance d1. Optionally, the second distance may be smaller or larger than the first distance d1. Additionally, the diameter of the third wall pattern 815 may be larger than the diameter of the fourth wall pattern 825. Furthermore, the upper surface of the second wall structure 805 may be positioned lower than the upper surface of the substrate 110 (or the upper surface of the second organic layer 113). The second wall structure 805 may have a first height H1 from the upper surface of the first barrier layer 112 to the upper surface of the second wall structure 805, and the second organic layer 113 may have a second height H2 from the upper surface of the first barrier layer 112 to the upper surface of the second organic layer 113. The first height H1 may be smaller than the second height H2.

[0126] Each of the first wall structure 800 and the second wall structure 805 may include an inorganic material or an organic material. In an exemplary embodiment, each of the first wall structure 800 and the second wall structure 805 may include an organic material. For example, in one exemplary embodiment, the first wall structure 800 and the second wall structure 805 may be formed simultaneously using the same material.

[0127] An exemplary embodiment of the OLED device 1000 includes a first wall structure 800 and a second wall structure 805 respectively disposed inside the first groove 930 and the second groove 935. Accordingly, the OLED device 1000 can effectively prevent or block the penetration of water, moisture, etc. into the semiconductor element 250 and the light-emitting structure 300.

[0128] The invention can be applied to various display devices including OLED devices, such as vehicle display devices, ship display devices, aircraft display devices, portable communication devices, display devices for display or for information transmission, medical display devices, etc.

[0129] The foregoing is a description of exemplary embodiments and should not be construed as a limitation thereof. Although some exemplary embodiments have been described, those skilled in the art will readily understand that many modifications can be made to the exemplary embodiments without materially departing from the novel teachings and advantages of the invention. Accordingly, all such modifications are intended to be included within the scope of the invention as defined by the claims. Therefore, it will be understood that the foregoing is a description of various exemplary embodiments and should not be construed as a limitation of the specific exemplary embodiments disclosed, and modifications to the disclosed exemplary embodiments as well as other exemplary embodiments will be intended to be included within the scope of the appended claims.

Claims

1. An organic light emitting display device, the organic light emitting display device comprising: A display panel, the display panel comprising: a substrate having an opening area, a peripheral area surrounding the opening area, and a display area surrounding the peripheral area, wherein a first groove is defined in the peripheral area, and an opening is defined in the opening area; a light emitting structure located on the substrate in the display area and comprising an upper electrode; and a first wall structure located inside the first groove of the substrate; and An optical module, superimposed on the opening, wherein the first wall structure comprises a first wall pattern and a second wall pattern spaced apart from each other, and wherein the upper electrode is disposed on opposite side surfaces of the first wall pattern and the second wall pattern in the first groove.

2. The organic light emitting display device according to claim 1, wherein, The first groove comprises: A first side wall, positioned adjacent to the opening area; and A second side wall, opposite to the first side wall, wherein the first wall pattern surrounds the first side wall, wherein the second wall pattern surrounds the first wall pattern, and wherein the distance of the first wall pattern from the first side wall is equal to the distance of the second wall pattern from the second side wall.

3. The organic light emitting display device according to claim 1, wherein, The first groove comprises: A first side wall, positioned adjacent to the opening area; and A second side wall, opposite to the first side wall, wherein the first wall pattern surrounds the first side wall, wherein the second wall pattern surrounds the first wall pattern, and wherein the upper surface of the first wall structure is lower than the upper surface of the substrate.

4. The organic light emitting display device according to claim 1, wherein The substrate comprises: A first organic layer; A first barrier layer, disposed on the first organic layer; A second organic layer, disposed on the first barrier layer, wherein a first opening is defined to pass through the second organic layer in the peripheral area; and A second barrier layer, disposed on the second organic layer, wherein a second opening superimposed on the first opening is defined to pass through the second barrier layer.

5. The organic light emitting display device according to claim 4, wherein, The first opening and the second opening together define the first groove of the substrate.

6. The organic light emitting display device according to claim 4, wherein The light emitting structure further comprises: A lower electrode; and A light emitting layer, disposed on the lower electrode, wherein the upper electrode is disposed on the light emitting layer.

7. The organic light emitting display device according to claim 6, wherein The upper electrode extends from the display area to the peripheral area and is partially disposed in the peripheral area.

8. The organic light emitting display device according to claim 6, wherein, The upper electrode is separated in a space between the first wall structure and a side wall of the second organic layer defined by the first opening.

9. The organic light emitting display device according to claim 6, wherein The upper electrode in the first groove is further disposed on at least a part of the side surface of the second organic layer, at least a part of the upper surface of the first wall structure, and the first barrier layer.

10. The organic light emitting display device according to claim 6, wherein, The first wall structure has a first height from the upper surface of the first barrier layer to the upper surface of the first wall structure, The second organic layer has a second height from the upper surface of the first barrier layer to the upper surface of the second organic layer, and The first height is smaller than the second height.

11. The organic light emitting display device according to claim 6, wherein, The first wall structure is disposed on the first barrier layer and is spaced apart from a sidewall of the second organic layer defined by the first opening, wherein a distance between the first wall structure and the second organic layer is defined as a first distance, and wherein the first distance is greater than a thickness of the upper electrode.

12. The organic light emitting display device according to claim 6, the organic light emitting display device further comprising: a thin film encapsulation structure disposed on the light emitting structure, wherein the thin film encapsulation structure includes: a first thin film encapsulation layer disposed on the upper electrode, the first thin film encapsulation layer including a flexible inorganic material; a second thin film encapsulation layer disposed on the first thin film encapsulation layer, the second thin film encapsulation layer including a flexible organic material; and a third thin film encapsulation layer disposed on the second thin film encapsulation layer, the third thin film encapsulation layer including a flexible inorganic material, wherein the first thin film encapsulation layer and the third thin film encapsulation layer extend in a direction from the display area to the peripheral area and are disposed in the peripheral area.

13. The organic light emitting display device according to claim 12, wherein, The first thin film encapsulation layer is continuously disposed in a space between the first wall structure and the sidewall of the second organic layer defined by the first opening, and wherein the first thin film encapsulation layer is disposed within the space between the first wall structure and the sidewall of the second organic layer.

14. The organic light emitting display device according to claim 12, wherein, The first thin film encapsulation layer is continuously disposed in a space between the first wall structure and the sidewall of the second organic layer defined by the first opening, and wherein the optical module contacts a side surface of the substrate, a side surface of the upper electrode, a side surface of the first thin film encapsulation layer, and a side surface of the third thin film encapsulation layer at a boundary between the peripheral area and the opening area.

15. The organic light emitting display device according to claim 1, wherein The substrate further includes: a second groove surrounding the first groove, wherein the second groove is defined in the peripheral area, and wherein the display panel further includes: a second wall structure disposed inside the second groove of the substrate.

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