Display Module

Abstract

A display module is disclosed, which includes: a display panel; and an input sensing circuit, which is arranged on the display panel, and the input sensing circuit includes: a first sensor group, including a plurality of first sensors arranged along a first direction; a plurality of first connecting parts, respectively electrically connecting two adjacent first sensors among the plurality of first sensors; a second sensor group, including a plurality of second sensors arranged along a second direction crossing the first direction; a plurality of second connecting parts, respectively electrically connecting two adjacent second sensors among the plurality of second sensors; a first signal line, electrically connected to one first sensor among the plurality of first sensors; a first measuring line, electrically connected to the one first sensor among the plurality of first sensors and spaced apart from the first signal line; and a second measuring line, electrically connected to another first sensor among the plurality of first sensors.

Description

[0001] This application claims priority to and the benefit of Korean Patent Application No. 10-2018-0140141, filed on November 14, 2018, which is hereby incorporated by reference for all purposes as if fully set forth herein. Technical Field

[0002] Exemplary embodiments / implementations of the invention generally relate to an input sensing circuit that senses a user's touch and pressure applied thereto, and a display module having the input sensing circuit. Background Art

[0003] Various display devices applied to multimedia devices such as televisions, mobile phones, tablet computers, navigation units, and game units have been developed. The display devices include a keyboard or a mouse as their input devices.

[0004] In recent years, display devices have included input sensing circuits as their input devices to sense a user's touch or pressure applied from the user to the input device.

[0005] The display device recognizes the user's finger in contact with its screen through an input sensing circuit. The input sensing circuit senses the user's touch by using various methods such as a resistive overlay method, an optical overlay method, a capacitive overlay method, or an ultrasonic method. Among these methods, the capacitive overlay method detects whether the user's touch occurs using the capacitance that changes when the touch generating member contacts the screen of the display device.

[0006] The above information disclosed in this Background section is only for understanding the background of the inventive concept and therefore it may contain information that does not constitute the prior art. Summary of the invention

[0007] A device constructed according to an exemplary implementation of the invention provides an input sensing circuit capable of sensing a user's touch and pressure applied thereto, and a display module including the input sensing circuit.

[0008] Additional features of the inventive concepts will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the inventive concepts.

[0009] According to one or more exemplary embodiments of the invention, a display module includes a display panel and an input sensing circuit disposed on the display panel. The input sensing circuit includes: a first sensor group including a plurality of first sensors arranged along a first direction; a plurality of first connecting portions electrically connecting two adjacent first sensors among the plurality of first sensors, respectively; a second sensor group including a plurality of second sensors arranged along a second direction intersecting the first direction; a plurality of second connecting portions electrically connecting two adjacent second sensors among the plurality of second sensors, respectively; a first signal line electrically connected to one first sensor among the plurality of first sensors; a first measurement line electrically connected to the one first sensor among the plurality of first sensors and spaced apart from the first signal line; and a second measurement line electrically connected to another first sensor among the plurality of first sensors.

[0010] The one first sensor among the multiple first sensors may include: a main body part; a first coupling part, which protrudes from the main body part in a direction basically parallel to the first direction and is connected to the first signal line; and a second coupling part, which protrudes from the main body part in a direction basically parallel to the first direction and is connected to the first measurement line.

[0011] A first length of the first engaging portion in the first direction may be different from a second length of the second engaging portion in the first direction. The second length may be longer than the first length.

[0012] A third length of the second joining portion in the second direction may be equal to or greater than a fourth length of the second joining portion in the second direction and equal to or less than four times the fourth length.

[0013] The input sensing circuit may further include an insulating layer covering the plurality of first sensors, the plurality of second sensors and the first connecting portion. At least a portion of each of the second connecting portions may be disposed on the insulating layer. The one of the plurality of first sensors may include a main body portion and a first bonding portion protruding from the main body portion in a first direction and connected to the first signal line.

[0014] The input sensing circuit may further include a second bonding portion disposed on the insulating layer, overlapping the first bonding portion, and connected to the one first sensor of the plurality of first sensors and the first measurement line.

[0015] A second contact hole and a plurality of first contact holes may be defined through the insulating layer, the second connection portion may be connected to the plurality of second sensors through the first contact hole, and the second bonding portion may be connected to the one first sensor among the plurality of first sensors through the second contact hole.

[0016] The input sensing circuit may further include a second signal line electrically connected to a second sensor among the plurality of second sensors.

[0017] The input sensing circuit may further include an input sensing driver electrically connected to the first signal line, the second signal line, the first measurement line, and the second measurement line.

[0018] The input sensing driver may be configured to sense resistance change values ​​of the first measurement line, the plurality of first sensors, and the second measurement line during a first period.

[0019] The input sense driver may be configured to sense a change in capacitance formed by the plurality of first sensors and the plurality of second sensors during a second period, the second period being different from the first period.

[0020] The first sensor group may include multiple first sensor groups, and the input sensing driver may be configured to compare the resistance change value of one first sensor group among the multiple first sensor groups with the resistance change value of another first sensor group among the multiple first sensor groups, wherein the one first sensor group and the another first sensor group are adjacent to each other.

[0021] The display module may further include an adhesive member disposed between the display panel and the input sensing circuit, the adhesive member having predetermined elasticity.

[0022] The one first sensor among the plurality of first sensors may be disposed at one end of the first sensor group in the first direction, and the other first sensor among the plurality of first sensors may be disposed at an opposite end of the first sensor group in the first direction.

[0023] According to one or more exemplary embodiments of the invention, the input sensing circuit includes a substrate layer, a plurality of first sensors, a plurality of first connection parts, a plurality of second sensors, a plurality of second connection parts, a first signal line, a first measurement line, and a second measurement line. The plurality of first sensors are arranged on the substrate layer and arranged along a first direction. The first connection part is arranged on the substrate layer, and the first connection part electrically connects two adjacent first sensors among the plurality of first sensors, respectively. The plurality of second sensors are arranged on the substrate layer and arranged along a second direction intersecting the first direction. An insulating layer is arranged on the substrate layer, covering the plurality of first sensors, the first connection part, and the plurality of second sensors, and the insulating layer includes a plurality of contact holes defined therethrough. The plurality of second connection parts are arranged on the insulating layer, and electrically connect two adjacent second sensors among the plurality of second sensors, respectively, through at least one of the contact holes. The first signal line may be arranged on the substrate layer, and electrically connected to one of the plurality of first sensors. The first measurement line is arranged on the substrate layer, and electrically connected to the one of the plurality of first sensors. The second measurement line is arranged on the substrate layer, and electrically connected to another first sensor among the plurality of first sensors.

[0024] The one first sensor among the multiple first sensors may include: a main body part; a first coupling part, which protrudes from the main body part in a direction basically parallel to the first direction and is connected to the first signal line; and a second coupling part, which protrudes from the main body part in a direction basically parallel to the first direction and is connected to the first measurement line.

[0025] A first length of the first engaging portion in the first direction may be smaller than a second length of the second engaging portion in the first direction.

[0026] A third length of the first joining portion in the second direction may be equal to or greater than a fourth length of the second joining portion in the second direction and equal to or less than four times the fourth length.

[0027] The one first sensor among the plurality of first sensors may include a body portion and a first coupling portion protruding from the body portion in a direction substantially parallel to the first direction and connected to the first signal line.

[0028] The input sensing circuit may further include a second bonding portion disposed on the insulating layer, overlapping the first bonding portion, connected to one first sensor among the plurality of first sensors through other contact holes among the contact holes, and connected to the first measurement line.

[0029] The input sensing circuit may further include a second signal line disposed on the base layer and electrically connected to one second sensor among the plurality of second sensors.

[0030] The input sensing circuit may further include an input sensing driver electrically connected to the first signal line, the second signal line, the first measurement line, and the second measurement line.

[0031] The input sensing driver may be configured to sense resistance change values ​​of the first measurement line, the plurality of first sensors, and the second measurement line during a first period.

[0032] The input sense driver may be configured to sense a change in capacitance formed by the plurality of first sensors and the plurality of second sensors during a second period different from the first period.

[0033] The first sensor group may include multiple first sensor groups, and the input sensing driver is configured to compare the resistance change value of one first sensor group among the multiple first sensor groups with the resistance change value of another first sensor group among the multiple first sensor groups, and the one first sensor group and the another first sensor group are adjacent to each other.

[0034] According to the above, the display device may include an input sensing circuit, which may be configured to sense a user's touch and a pressure applied thereto.

[0035] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] The accompanying drawings illustrate exemplary embodiments of the invention and together with the description serve to explain the inventive concept. The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification.

[0037] Figure 1 is a perspective view showing a display device according to an exemplary embodiment of the present disclosure.

[0038] Figure 2A , Figure 2B , Figure 2C and Figure 2D is a cross-sectional view showing a display device according to an exemplary embodiment of the present disclosure.

[0039] Figure 3 is a plan view showing a display panel according to an exemplary embodiment of the present disclosure.

[0040] Figure 4 is an equivalent circuit diagram illustrating a pixel according to an exemplary embodiment of the present disclosure.

[0041] Figure 5 is shown applied to Figure 4 Waveform diagram of the pixel signal.

[0042] Figure 6 is a cross-sectional view illustrating a portion of a pixel according to an exemplary embodiment of the present disclosure.

[0043] Fig. 7A is a plan view showing an input sensing circuit according to an exemplary embodiment of the present disclosure.

[0044] Figure 7B It is shown Fig. 7A Enlarged plan view of section AA.

[0045] Figure 7C It is shown Figure 7B Enlarged plan view of the BB section.

[0046] Fig. 8A is along Figure 7C A cross-sectional view taken along section line II'.

[0047] Figure 8B is along Figure 7C A sectional view taken along section line II-II'.

[0048] Fig. 9It is shown Fig. 7A An enlarged plan view of the EE section.

[0049] Fig.10 It is shown Fig. 7A Enlarged plan view of the FF section.

[0050] Fig.11 It is shown Fig. 7A An enlarged plan view of another example of an EE portion.

[0051] Fig. 12A It is shown Fig. 7A An enlarged plan view of another example of an EE portion.

[0052] Fig. 12B is along Fig. 12A A cross-sectional view taken along section line III-III'.

[0053] Fig.13 is a plan view showing an input sensing circuit according to an exemplary embodiment of the present disclosure.

[0054] Fig.14 is a plan view showing an input sensing circuit according to an exemplary embodiment of the present disclosure.

[0055] Fig.15 yes Fig.14 An enlarged plan view of the EE-1 section.

[0056] Fig.16 yes Fig.14 An enlarged plan view of the FF-1 section. DETAILED DESCRIPTION

[0057] In the following description, for the purpose of explanation, many specific details are set forth to provide a thorough understanding of various exemplary embodiments or implementations of the invention. As used herein, "embodiment" and "implementation" are interchangeable words and are non-limiting examples of devices or methods using one or more of the inventive concepts disclosed herein. However, it is apparent that various exemplary embodiments can be implemented without these specific details or with one or more equivalent arrangements. In other examples, known structures and devices are shown in block diagram form to avoid making various exemplary embodiments unnecessarily obscure. In addition, various exemplary embodiments may be different, but not necessarily exclusive. For example, without departing from the inventive concept, the specific shape, construction and characteristics of the exemplary embodiment may be used or implemented in another exemplary embodiment.

[0058] Unless otherwise specified, the exemplary embodiments shown will be understood as providing exemplary features of different details of some ways in which the inventive concept can be implemented in practice. Therefore, unless otherwise specified, the features, components, modules, layers, films, panels, regions and / or aspects, etc. (hereinafter individually or collectively referred to as "elements") of the various embodiments can be further combined, separated, interchanged and / or rearranged without departing from the inventive concept.

[0059] The use of cross hatching and / or shading is usually provided in the drawings to make the boundaries between adjacent elements clear. Thus, unless otherwise specified, the presence or absence of cross hatching or shading does not convey or indicate any preference or requirement for a particular material, material property, size, ratio, commonality between the elements shown, and / or any other characteristics, attributes, properties, etc. of the elements. In addition, in the drawings, the size and relative size of the elements may be exaggerated for clarity and / or descriptive purposes. When the exemplary embodiments can be implemented differently, the specific process sequence can be performed differently from the described sequence. For example, two continuously described processes can be performed substantially simultaneously or in an order opposite to the described sequence. In addition, the same figure numerals represent the same elements.

[0060] When an element or layer is referred to as being "on", "connected to" or "bonded to" another element or layer, the element or layer may be directly on, directly connected to or directly bonded to the other element or layer, or there may be intermediate elements or intermediate layers. However, when an element or layer is referred to as being "directly on", "directly connected to" or "directly bonded to" another element or layer, there are no intermediate elements or intermediate layers. For this purpose, the term "connected" may refer to a physical connection, an electrical connection and / or a fluid connection with or without intermediate elements. In addition, the DR1 axis, the DR2 axis and the DR3 axis are not limited to three axes of a rectangular coordinate system such as the x-axis, the y-axis and the z-axis, and may be interpreted in a broader sense. For example, the DR1 axis, the DR2 axis and the DR3 axis may be perpendicular to each other, or may represent different directions that are not perpendicular to each other. For the purpose of this disclosure, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" may be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z, such as XYZ, XYY, YZ, and ZZ for example. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0061] Although the terms "first", "second", etc. can be used here to describe various types of elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another element. Therefore, the first element discussed below can be called the second element without departing from the disclosed teachings.

[0062] Here, for descriptive purposes, spatially relative terms such as "under", "below", "below", "below", "above", "upper", "above", "higher", "side" (e.g., as in "sidewall"), etc. may be used and thereby describe the relationship of one element to other elements as shown in the drawings. In addition to the orientations depicted in the drawings, the spatially relative terms are intended to cover different orientations of the device in use, operation, and / or manufacture. For example, if the device in the drawings is turned over, an element described as being "under" or "beneath" other elements or features will subsequently be positioned "above" the other elements or features. Thus, the exemplary term "under" can cover both above and below orientations. In addition, the device can be positioned in other ways (e.g., rotated 90 degrees or at other orientations), so the spatially relative descriptors used herein are interpreted accordingly.

[0063] The terms used herein are only for the purpose of describing specific embodiments, and are not intended to be restrictive. As used herein, unless the context clearly states otherwise, the singular form is intended to include the plural form. In addition, when the terms "include", "comprise" and / or and its variations are used in this specification, these terms illustrate the existence of stated features, integral bodies, steps, operations, elements, components and / or their groups, but do not exclude the existence or addition of one or more other features, integral bodies, steps, operations, elements, components and / or their groups. It is also noted that, as used herein, the terms "substantially", "about (approximately)" and other similar terms are used as approximate terms and are not used as degree terms, and are used to explain the measured values, calculated values ​​and / or the inherent deviation of the values ​​that those of ordinary skill in the art will recognize.

[0064] Various exemplary embodiments are described herein with reference to cross-sectional views and / or exploded views as schematic diagrams of idealized exemplary embodiments and / or intermediate structures. As such, variations in the shapes of the illustrations due to, for example, manufacturing techniques and / or tolerances are to be expected. Therefore, the exemplary embodiments disclosed herein should not necessarily be interpreted as being limited to the specific illustrated shapes of the regions, but rather will include shape deviations due to, for example, manufacturing. In this manner, the regions shown in the drawings may be schematic in nature, and the shapes of these regions may not reflect the actual shapes of the regions of the device, and as such are not necessarily intended to be restrictive.

[0065] According to the practice of the art, in terms of functional blocks, units and / or modules, some exemplary embodiments are described and shown in the accompanying drawings. It will be understood by those skilled in the art that these blocks, units and / or modules are physically implemented by electronic (or optical) circuits (such as logic circuits, discrete components, microprocessors, hard-wired circuits, memory elements, wiring connections, etc.) that can be formed using semiconductor-based manufacturing techniques or other manufacturing techniques. In the case where blocks, units and / or modules are implemented by microprocessors or other similar hardware, they can be programmed and controlled using software (e.g., microcode) to perform the various functions discussed herein, and can be optionally driven by firmware and / or software. It is also contemplated that each block, unit and / or module can be implemented by dedicated hardware, or can be implemented as a combination of dedicated hardware that performs certain functions and processors (e.g., one or more programmed microprocessors and related circuits) that perform other functions. In addition, without departing from the scope of the inventive concept, each block, unit and / or module of some exemplary embodiments can be physically divided into two or more interactive and discrete blocks, units and / or modules. Furthermore, the blocks, units and / or modules of some exemplary embodiments may be physically combined into more complex blocks, units and / or modules without departing from the scope of the inventive concept.

[0066] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure is a part. Terms (such as those defined in general dictionaries) should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and should not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0067] Hereinafter, the present invention will be explained in detail with reference to the accompanying drawings.

[0068] Figure 1 is a perspective view showing a display device DD according to an exemplary embodiment of the present disclosure.

[0069] Figure 1 The display device DD is shown as a smartphone, however, the display device DD should not be limited to smartphones. That is, the display device DD may be a large electronic product such as a TV or a monitor, or a small or medium-sized electronic product such as a mobile phone, a tablet computer, a car navigation unit, a game unit, or a smart watch.

[0070] The display device DD includes a display area DA and a non-display area NDA defined therein.

[0071] The display area DA through which the image IM is displayed may be substantially parallel to a surface defined by the first direction axis DR1 and the second direction axis DR2, however, the display area DA should not be limited thereto or thereby. At least a portion of the display area DA may have a dome shape on the surface defined by the first direction axis DR1 and the second direction axis DR2.

[0072] The third direction axis DR3 indicates the normal direction of the display area DA, that is, the thickness direction of the display device DD. The front (or upper) and rear (or lower) surfaces of each component of the display device DD are distinguished from each other by the third direction axis DR3. However, the directions indicated by the first direction axis DR1, the second direction axis DR2, and the third direction axis DR3 may be related to each other and may be changed to other directions. In the following, the first direction, the second direction, and the third direction correspond to the directions indicated by the first direction axis DR1, the second direction axis DR2, and the third direction axis DR3, respectively, and are given the same reference numerals as the first direction axis DR1, the second direction axis DR2, and the third direction axis DR3.

[0073] Figure 1 The shape of the display area DA shown in FIG. 1 is merely exemplary, and the shape of the display area DA may be changed as needed without limitation.

[0074] The non-display area NDA is disposed adjacent to the display area DA, and the image IM is not displayed through the non-display area NDA. A bezel area of ​​the display device DD is defined by the non-display area NDA.

[0075] The non-display area NDA may surround the display area DA, but it should not be limited thereto or thereby. That is, the display area DA and the non-display area NDA may be designed to have shapes related to each other.

[0076] Figure 2A , Figure 2B , Figure 2C and Figure 2D is a cross-sectional view showing a display device DD according to an exemplary embodiment of the present disclosure. Figure 2A , Figure 2B , Figure 2C and Figure 2D A cross section defined by the second direction axis DR2 and the third direction axis DR3 is shown. Figure 2A , Figure 2B , Figure 2C and Figure 2D The display device DD is simply shown to explain the stacking relationship of the functional panels and / or functional components of the display device DD.

[0077] Reference Figure 2A, the display device DD includes a display panel DP, an input sensing circuit ISC, an anti-reflection member RPP and a window member WP. The input sensing circuit ISC may be directly disposed on the display panel DP. In the following description, the term "directly disposed" means that no separate adhesive layer / adhesive member is disposed between the two components.

[0078] The display panel DP and the input sensing circuit ISC disposed directly on the display panel DP define a display module DM. An optically transparent adhesive member OCA is disposed between the display module DM and the anti-reflection member RPP and between the anti-reflection member RPP and the window member WP.

[0079] The display panel DP generates an image, and the input sensing circuit ISC acquires coordinate information about an external input (e.g., a touch event or a pressure applied to the input sensing circuit ISC). Although not shown separately, the display module DM according to an exemplary embodiment of the present disclosure may further include a protective member disposed on the lower surface of the display panel DP. The protective member and the display panel DP are bonded to each other by an adhesive member. Figure 2B , Figure 2C and Figure 2D The display device DD shown in and described later may also further include a protective member.

[0080] The display panel DP according to the exemplary embodiment of the present disclosure may be a light-emitting display panel. For example, the display panel DP may be an organic light-emitting display panel, a quantum dot light-emitting display panel, or a micro LED display panel. The light-emitting layer of the organic light-emitting display panel may include an organic light-emitting material. The light-emitting layer of the quantum dot light-emitting display panel may include quantum dots and quantum rods. Hereinafter, the organic light-emitting display panel will be described as the display panel DP.

[0081] The anti-reflection member RPP reduces reflection of external light incident from above the window member WP. The anti-reflection member RPP according to an exemplary embodiment of the present disclosure may include a retarder and a polarizer.

[0082] The anti-reflection member RPP according to an exemplary embodiment of the present disclosure may include a color filter.

[0083] The window member WP according to an exemplary embodiment of the present disclosure includes a base film WP-BS and a light blocking pattern WP-BZ. The base film WP-BS may include glass and / or synthetic resin. The base film WP-BS should not be limited to a single-layer structure. The base film WP-BS may include two or more films bonded to each other by an adhesive member.

[0084] The light blocking pattern WP-BZ partially overlaps the base film WP-BS. The light blocking pattern WP-BZ is disposed on the rear surface of the base film WP-BS to define a bezel area (ie, a non-display area NDA) of the display device DD.

[0085] In the following, the light blocking pattern WP-BZ and the base film WP-BS are not shown in FIG. Figure 2B , Figure 2C and Figure 2D Shown in.

[0086] Reference Figure 2B , the display device DD includes a display panel DP, an anti-reflection member RPP, an input sensing circuit ISC and a window member WP.

[0087] The display panel DP and the anti-reflection member RPP may be bonded to each other by an optically transparent adhesive member OCA. The anti-reflection member RPP and the input sensing circuit ISC may be bonded to each other by an optically transparent adhesive member OCA. The input sensing circuit ISC and the window member WP may be bonded to each other by an optically transparent adhesive member OCA.

[0088] Reference Figure 2C ,and Figure 2B Unlike the stack structure shown in , the position of the anti-reflection member RPP and the position of the input sensing circuit ISC are interchanged.

[0089] The optically transparent adhesive member OCA may have a predetermined elasticity. When pressure is applied from the outside, the input sensing circuit ISC may be deformed in the third direction DR3 due to the elasticity of the optically transparent adhesive member OCA.

[0090] like Figure 2D As shown in , the adhesive member can be omitted from the display device DD, and the display panel DP, the input sensing circuit ISC, the anti-reflection member RPP and the window member WP can be formed by a continuous process. According to another exemplary embodiment of the present disclosure, the stacking order of the input sensing circuit ISC and the reflection preventing member RPP can be interchanged.

[0091] The input sensing circuit ISC may be a circuit that senses a user's touch or a pressure applied to the input sensing circuit ISC from the outside.

[0092] Figure 3 is a plan view showing a display panel DP according to an exemplary embodiment of the present disclosure.

[0093] Reference Figure 3 , when viewed in a plan view, the display panel DP includes a display area DP-DA and a non-display area DP-NDA. In the present exemplary embodiment, the non-display area DP-NDA may be defined along an edge of the display area DP-DA. The display area DP-DA and the non-display area DP-NDA of the display panel DP may correspond to the display area DA and the non-display area NDA of the display device DD, respectively.

[0094] The display panel DP includes a scan driver 100, a data driver 200, a plurality of scan lines SL, a plurality of emission control lines ECL, a plurality of data lines DL, a plurality of power lines PL, and a plurality of pixels PX. The pixels PX are arranged in the display area DP-DA. Each pixel PX includes an organic light emitting diode OLED (refer to Figure 4 ) and a pixel circuit CC connected to an organic light emitting diode OLED (refer to Figure 4 ).

[0095] The scan driver 100 includes a scan driving unit and a light emission control driving unit.

[0096] The scan driving unit generates scan signals and sequentially applies the generated scan signals to the scan lines SL. The light emission control driving unit generates light emission control signals and outputs the generated light emission control signals to the light emission control lines ECL.

[0097] According to another exemplary embodiment of the present disclosure, the scan driving unit and the light emission control driving unit may be provided in one circuit in the scan driver 100 without being distinguished from each other.

[0098] The scan driver 100 may include a plurality of thin film transistors formed by the same process (eg, a low temperature polysilicon (LTPS) process or a low temperature polycrystalline oxide (LTPO) process) as a driving circuit of the pixel PX.

[0099] The data driver 200 applies a data signal to the data line DL. The data signal is an analog voltage corresponding to a grayscale value of image data.

[0100] In an exemplary embodiment of the present disclosure, the data driver 200 is mounted on the printed circuit board FPCB, and the printed circuit board FPCB is connected to a pad (or "pad") provided at one end of the data line DL. However, according to another exemplary embodiment, the data driver 200 may be directly mounted on the display panel DP.

[0101] The scan lines SL extend along the first direction DR1 and are arranged along the second direction DR2.

[0102] The light emission control lines ECL extend in the first direction DR1 and are arranged in the second direction DR2. That is, each of the light emission control lines ECL is arranged substantially parallel to a corresponding scan line among the scan lines SL.

[0103] The data lines DL extend in the second direction DR2 and are arranged in the first direction DR1. The data lines DL apply data signals to corresponding pixels PX.

[0104] The power lines PL extend in the second direction DR2 and are arranged in the first direction DR1. The power lines PL apply the first power voltage ELVDD to the corresponding pixels PX.

[0105] Each pixel PX is connected to a corresponding scan line among the scan lines SL, a corresponding light emission control line among the light emission control lines ECL, a corresponding data line among the data lines DL, and a corresponding power line among the power lines PL.

[0106] Figure 4 is an equivalent circuit diagram illustrating a pixel PX according to an exemplary embodiment of the present disclosure. Figure 5 is shown applied to Figure 4 Waveform diagram of the light emitting control signal Ei and the scanning signals Si-1, Si and Si+1 of the pixel PX. Figure 4 A pixel PX connected to an i-th scan line SLi and an i-th emission control line ECLi is shown. Here, the number i is a natural number.

[0107] Reference Figure 4 , the pixel PX includes an organic light emitting diode OLED and a pixel circuit CC. The pixel circuit CC includes a plurality of transistors T1 to T7 and a capacitor CP. The pixel circuit CC controls the amount of current flowing through the organic light emitting diode OLED in response to a data signal.

[0108] The organic light emitting diode OLED emits light at a predetermined brightness in response to the current supplied from the pixel circuit CC. To this end, the level of the first power voltage ELVDD is set higher than that of the second power voltage ELVSS.

[0109] Each of transistors T1 to T7 includes an input electrode (or source electrode), an output electrode (or drain electrode) and a control electrode (or gate electrode). For ease of explanation, one of the input electrode and the output electrode is referred to as a "first electrode", and the other of the input electrode and the output electrode is referred to as a "second electrode".

[0110] A first electrode of the first transistor T1 is connected to the first power voltage ELVDD via the fifth transistor T5, and a second electrode of the first transistor T1 is connected to the anode electrode of the organic light emitting diode OLED via the sixth transistor T6. In the following description, the first transistor T1 may be referred to as a "driving transistor".

[0111] The first transistor T1 controls the amount of current flowing through the organic light emitting diode OLED in response to a voltage applied to the control electrode.

[0112] The second transistor T2 is connected between the data line DL and the first electrode of the first transistor T1. The control electrode of the second transistor T2 is connected to the i-th scan line SLi. When the i-th scan signal Si is applied to the i-th scan line SLi, the second transistor T2 is turned on to electrically connect the data line DL to the first electrode of the first transistor T1.

[0113] The third transistor T3 is connected between the second electrode and the control electrode of the first transistor T1. The control electrode of the third transistor T3 is connected to the i-th scan line SLi. When the i-th scan signal Si is applied to the i-th scan line SLi, the third transistor T3 is turned on to electrically connect the second electrode and the control electrode of the first transistor T1. Therefore, when the third transistor T3 is turned on, the first transistor T1 is connected in a diode configuration.

[0114] The fourth transistor T4 is connected between the node ND and the initialization voltage generator. The control electrode of the fourth transistor T4 is connected to the i-1th scan line SLi-1. When the i-1th scan signal Si-1 is applied to the i-1th scan line SLi-1, the fourth transistor T4 is turned on to apply the initialization voltage Vint to the node ND.

[0115] The fifth transistor T5 is connected between the power line PL and the first electrode of the first transistor T1. A control electrode of the fifth transistor T5 is connected to the i-th light emission control line ECLi.

[0116] The sixth transistor T6 is connected between the second electrode of the first transistor T1 and the anode electrode of the organic light emitting diode OLED. A control electrode of the sixth transistor T6 is connected to the i-th light emission control line ECLi.

[0117] The seventh transistor T7 is connected between the initialization voltage generator and the anode electrode of the organic light emitting diode OLED. The control electrode of the seventh transistor T7 is connected to the i+1th scan line SLi+1. When the i+1th scan signal Si+1 is applied to the i+1th scan line SLi+1, the seventh transistor T7 is turned on to apply the initialization voltage Vint to the anode electrode of the organic light emitting diode OLED.

[0118] The seventh transistor T7 improves the black display performance of the pixel PX. In detail, when the seventh transistor T7 is turned on, the parasitic capacitor of the organic light emitting diode OLED is discharged. Therefore, when black brightness is achieved, even if leakage current from the first transistor T1 occurs, the organic light emitting diode OLED does not emit light, thereby improving the black display performance of the pixel PX.

[0119] exist Figure 4, the control electrode of the seventh transistor T7 is connected to the i+1th scan line SLi+1, but it should be clear that the present disclosure is not limited to these exemplary embodiments. According to another exemplary embodiment of the present disclosure, the control electrode of the seventh transistor T7 can be connected to the i-th scan line SLi or the i-1th scan line SLi-1.

[0120] exist Figure 4 In the embodiment, the first transistor T1 to the seventh transistor T7 of the pixel PX have been described based on PMOS, but the first transistor T1 to the seventh transistor T7 should not be limited thereto or thereby. According to another exemplary embodiment of the present disclosure, the first transistor T1 to the seventh transistor T7 of the pixel PX may be implemented by NMOS. According to another exemplary embodiment of the present disclosure, the first transistor T1 to the seventh transistor T7 of the pixel PX may be implemented by a combination of PMOS and NMOS.

[0121] The capacitor CP is provided between the power line PL and the node ND. The capacitor CP is charged with a voltage corresponding to the data signal. When the fifth transistor T5 and the sixth transistor T6 are turned on, the amount of current flowing through the first transistor T1 is determined according to the voltage charged in the capacitor CP.

[0122] In the present disclosure, the configuration of the pixel PX should not be limited to Figure 4 According to another exemplary embodiment of the present disclosure, the pixel PX may be implemented in various ways to allow the organic light emitting diode OLED to emit light.

[0123] Reference Figure 5 , the light emission control signal Ei has a high level E-HIGH or a low level E-LOW. Each of the scan signals Si-1, Si, and Si+1 has a high level S-HIGH or a low level S-LOW.

[0124] When the light emission control signal Ei has a high level E-HIGH, the fifth transistor T5 and the sixth transistor T6 are turned off. When the fifth transistor T5 is turned off, the power line PL and the first electrode of the first transistor T1 are electrically disconnected from each other. When the sixth transistor T6 is turned off, the second electrode of the first transistor T1 and the anode electrode of the organic light emitting diode OLED are electrically disconnected from each other. Therefore, the organic light emitting diode OLED does not emit light during a period in which the light emission control signal Ei having a high level E-HIGH is applied to the i-th light emission control line ECLi.

[0125] Then, when the i-1th scan signal Si-1 applied to the i-1th scan line SLi-1 has a low level S-LOW, the fourth transistor T4 is turned on. When the fourth transistor T4 is turned on, the initialization voltage Vint is applied to the node ND.

[0126] When the i-th scan signal Si applied to the i-th scan line SLi has a low level S-LOW, the second transistor T2 and the third transistor T3 are turned on.

[0127] When the second transistor T2 is turned on, the data signal is applied to the first electrode of the first transistor T1. In this case, since the node ND is initialized to have the initialization voltage Vint, the first transistor T1 is turned on. When the first transistor T1 is turned on, a voltage corresponding to the data signal is applied to the node ND. In this case, the capacitor CP is charged with a voltage corresponding to the data signal.

[0128] When the i+1th scan signal Si+1 applied to the i+1th scan line SLi+1 has the low level S-LOW, the seventh transistor T7 is turned on.

[0129] When the seventh transistor T7 is turned on, the initialization voltage Vint is applied to the anode electrode of the organic light emitting diode OLED, and thus the parasitic capacitor of the organic light emitting diode OLED is discharged.

[0130] When the light emitting control signal Ei applied to the light emitting control line ECLi has a low level E-LOW, the fifth transistor T5 and the sixth transistor T6 are turned on. When the fifth transistor T5 is turned on, the first power supply voltage ELVDD is applied to the first electrode of the first transistor T1. When the sixth transistor T6 is turned on, the second electrode of the first transistor T1 and the anode electrode of the organic light emitting diode OLED are electrically connected to each other. Therefore, the organic light emitting diode OLED generates light with a predetermined brightness in response to the amount of current applied thereto.

[0131] Figure 6 FIG. 2 is a diagram showing a pixel PX (refer to FIG. 2 ) according to an exemplary embodiment of the present disclosure. Figure 4 ) is a cross-sectional view of a portion of ). Figure 6 The first transistor T1 and the second transistor T2 are shown as representative examples, but the structures of the first transistor T1 and the second transistor T2 should not be limited thereto or thereby. Figure 6 In FIG. 1 , it seems that the second electrode ED2 of the first transistor T1 is directly in contact with the anode electrode AE ​​of the organic light emitting diode OLED, but this is because Figure 6 In this exemplary embodiment, the cross-sectional shape is shown. Figure 4 As shown, the first transistor T1 is connected to the anode electrode AE ​​of the organic light emitting diode OLED via the sixth transistor T6, but it should not be limited thereto or thereby. That is, according to another exemplary embodiment of the present disclosure, the second electrode ED2 of the first transistor T1 may directly contact the anode electrode AE ​​of the pixel PX.

[0132] Display panel DP (refer to Figure 3) includes a base layer BL, a circuit layer CL, a light emitting device layer ELL and a packaging layer TFE.

[0133] The circuit layer CL includes a buffer layer BFL, gate insulating layers GI1 and GI2 , an interlayer insulating layer ILD, a circuit insulating layer VIA, and transistors T1 and T2 .

[0134] The light emitting device layer ELL may include an organic light emitting diode OLED and a pixel defining layer PDL.

[0135] The encapsulation layer TFE encapsulates the light emitting device layer ELL to protect the light emitting device layer ELL from external oxygen or moisture.

[0136] The buffer layer BFL is disposed on one surface of the base layer BL.

[0137] The buffer layer BFL prevents or inhibits foreign matter in the base layer BL from entering the pixel PX during the manufacturing process. Specifically, the buffer layer BFL prevents or inhibits foreign matter from entering the active portions ACL of the first transistor T1 and the second transistor T2 of the pixel PX.

[0138] Foreign matter may flow in from the outside, or may be generated when the base layer BL is pyrolyzed. The foreign matter may be gas or sodium released from the base layer BL. In addition, the buffer layer BFL prevents moisture from entering the pixel PX from the outside.

[0139] The active portion ACL of the first transistor T1 and the active portion ACL of the second transistor T2 are disposed on the buffer layer BFL. Each active portion ACL includes polysilicon or amorphous silicon. Alternatively, the active portion ACL may include a metal oxide semiconductor.

[0140] The active portion ACL includes a channel region serving as a passage through which electrons or holes move, a first ion doping region, and a second ion doping region such that the channel region is disposed between the first ion doping region and the second ion doping region.

[0141] The first gate insulating layer GI1 is disposed over the buffer layer BFL to cover the active portion ACL. The first gate insulating layer GI1 includes an organic layer and / or an inorganic layer. The first gate insulating layer GI1 includes a plurality of inorganic thin film layers. The inorganic thin film layers include a silicon nitride layer and a silicon oxide layer.

[0142] The control electrode GE1 of the first transistor T1 and the control electrode GE1 of the second transistor T2 are disposed on the first gate insulating layer GI1. The control electrode GE1 of the first transistor T1 may be one of two electrodes forming the capacitor CP. Figure 3 ) and the light emission control line ECL (refer to Figure 3) are disposed on the first gate insulating layer GI1.

[0143] The second gate insulating layer GI2 is disposed on the first gate insulating layer GI1 to cover the control electrode GE1. The second gate insulating layer GI2 includes an organic layer and / or an inorganic layer. The second gate insulating layer GI2 includes a plurality of inorganic thin film layers. The inorganic thin film layers include a silicon nitride layer and a silicon oxide layer.

[0144] Forming capacitor CP (refer to Figure 4 The other electrode GE2 of the two electrodes ) is disposed on the second gate insulating layer GI2. That is, the control electrode GE1 disposed on the first gate insulating layer GI1 overlaps with the electrode GE2 disposed on the second gate insulating layer GI2 to form Figure 4 However, the position of the electrodes forming the capacitor CP should not be limited thereto or thereby.

[0145] The interlayer insulating layer ILD is disposed on the second gate insulating layer GI2 to cover the electrode GE2. The interlayer insulating layer ILD includes an organic layer and / or an inorganic layer. The interlayer insulating layer ILD includes a plurality of inorganic thin film layers. The inorganic thin film layer includes a silicon nitride layer and a silicon oxide layer.

[0146] Data line DL (refer to Figure 3 ) and at least some parts of the power supply line PL (refer to Figure 3 ) are disposed on the interlayer insulating layer ILD. The first electrode ED1 and the second electrode ED2 of the first transistor T1 and the second transistor T2 are disposed on the interlayer insulating layer ILD.

[0147] The first and second electrodes ED1 and ED2 are connected to the corresponding active portions ACL through via holes defined through the gate insulating layers GI1 and GI2 and the interlayer insulating layer ILD.

[0148] The circuit insulating layer VIA is disposed on the interlayer insulating layer ILD to cover the first electrode ED1 and the second electrode ED2. The circuit insulating layer VIA includes an organic layer and / or an inorganic layer. The circuit insulating layer VIA provides a flat surface.

[0149] The pixel defining layer PDL and the organic light emitting diode OLED are disposed on the circuit insulating layer VIA.

[0150] The organic light emitting diode OLED may include an anode electrode AE, a hole control layer HL, an emission layer EML, an electron control layer EL, and a cathode electrode CE.

[0151] Fig. 7A is a plan view showing an input sensing circuit ISC according to an exemplary embodiment of the present disclosure. Figure 7B It is shown Fig. 7AEnlarged plan view of section AA. Figure 7C It is shown Figure 7B Enlarged plan view of the BB section. Fig. 8A is along Figure 7C A cross-sectional view taken along section line II'. Figure 8B is along Figure 7C A sectional view taken along section line II-II'.

[0152] The input sensing circuit ISC may include an input sensing area SA defined therein to sense an external input.

[0153] The input sensing circuit ISC may include a first sensor group IEG1, a second sensor group IEG2, a first connection portion CP1, a second connection portion CP2, a first signal line SSL1, a second signal line SSL2, a first measurement line MSL1, a second measurement line MSL2, a first signal pad (or "pad") PD-S1 and a second signal pad PD-S2, a first sensing pad (or "pad") PD-R1 and a second sensing pad PD-R2, a printed circuit board FPCB-T, and an input sensing driver 300. In an exemplary embodiment of the present disclosure, the input sensing circuit ISC may further include a base film BF, a first insulating layer IS1 or a second insulating layer IS2.

[0154] Each of the first sensor groups IEG1 may extend in the first direction DR1, and the first sensor groups IEG1 may be arranged in the second direction DR2. Each of the first sensor groups IEG1 may include a plurality of first sensors IE1. The first sensors IE1 may be arranged in the first direction DR1. As an example, the first sensors IE1 may be Rx sensors.

[0155] Each of the second sensor groups IEG2 may extend along the second direction DR2, and the second sensor groups IEG2 may be arranged along the first direction DR1. Each of the second sensor groups IEG2 may include a plurality of second sensors IE2. The second sensors IE2 may be arranged along the second direction DR2. As an example, the second sensors IE2 may be Tx sensors.

[0156] The length of the first sensor group IEG1 in the first direction DR1 may be shorter than the length of the second sensor group IEG2 in the second direction DR2.

[0157] In an exemplary embodiment of the present disclosure, the first sensor IE1 and the second sensor IE2 may include indium tin oxide (ITO) or indium zinc oxide (IZO), however, they should not be limited thereto or thereby. That is, the first sensor IE1 and the second sensor IE2 may include molybdenum (Mo).

[0158] In an exemplary embodiment of the present disclosure, each of the first sensors IE1 may be capacitively coupled to a second sensor IE2 adjacent to the first sensor IE1 among the second sensors IE2 to form a capacitance. The input sensing circuit ISC may sense a change in the capacitance formed between the first sensor IE1 and the second sensor IE2 to determine whether an external input is applied to the input sensing circuit ISC.

[0159] The dummy pattern DMP may be disposed between the first sensor IE1 and the second sensor IE2. The dummy pattern DMP may be disposed spaced apart from the first sensor IE1 and the second sensor IE2. The dummy pattern DMP may be insulated from the first sensor IE1 and the second sensor IE2. When the dummy pattern DMP is disposed, the boundary area between the first sensor IE1 and the second sensor IE2 may be invisible to the user.

[0160] In an exemplary embodiment of the present disclosure, the dummy pattern DMP may include indium tin oxide or indium zinc oxide.

[0161] In an exemplary embodiment of the present disclosure, each of the first sensor IE1 and the second sensor IE2 may be defined as one of the first normal sensor NIE1 and the second normal sensor NIE2 according to their areas.

[0162] Among the first sensor IE1 and the second sensor IE2 , a sensor having a rhombus shape and a first area may be defined as a first normal sensor NIE1 .

[0163] Among the first sensor IE1 and the second sensor IE2 , a sensor having an isosceles triangle shape and having a second area corresponding to a half of the first area may be defined as a second normal sensor NIE2 .

[0164] The first signal lines SSL1 may be electrically connected to the first sensor groups IEG1, respectively. In an exemplary embodiment of the present disclosure, the first signal lines SSL1 may be connected to the first sensor groups IEG1 in a single wiring structure.

[0165] The second signal lines SSL2 may be electrically connected to the second sensor groups IEG2, respectively. In an exemplary embodiment of the present disclosure, the second signal lines SSL2 may be connected to the second sensor groups IEG2 in a double wiring structure.

[0166] The first and second measurement lines MSL1 and MSL2 may be connected to at least one of the first sensor groups IEG1 . The first and second measurement lines MSL1 and MSL2 may be connected to the input sensing driver 300 .

[0167] The input sensing driver 300 may sense changes in resistance values ​​of the first measurement line MSL1 , the second measurement line MSL2 , the first sensor IE1 connected to the first and second measurement lines MSL1 and MSL2 in the first sensor group IEG1 , and the first connection portion CP1 .

[0168] When pressure is applied from the outside, the resistance value of the first sensor IE1 changes due to the pressure applied to the first sensor IE1, and it is possible to sense whether pressure is applied from the outside by measuring the change in the resistance value.

[0169] The first signal pad PD-S1 may be connected to the first signal line SSL1. The second signal pad PD-S2 may be connected to the second signal line SSL2.

[0170] The first sensing pad PD-R1 may be connected to the first measurement line MSL1 , and the second sensing pad PD-R2 may be connected to the second measurement line MSL2 .

[0171] The printed circuit board FPCB-T may be electrically connected to the first and second signal pads PD-S1 and PD-S2 and the first and second sensing pads PD-R1 and PD-R2.

[0172] The input sensing driver 300 may be mounted on the printed circuit board FPCB-T. The input sensing driver 300 may transmit, receive, or calculate an electrical signal for determining whether a user's touch occurs in the input sensing area SA and whether pressure is applied to the input sensing area SA.

[0173] The time period during which the input sensing driver 300 determines whether the user's touch occurs may be different from the time period during which the input sensing driver 300 determines whether pressure is applied. For example, the input sensing driver 300 determines whether pressure is applied during a first period, and the input sensing driver 300 determines whether the user's touch occurs during a second period, wherein the first period and the second period are different from each other. This is because when a signal for determining whether the user's touch occurs and a signal for determining whether pressure is applied are applied substantially at the same time, one of the signals exerts an influence on the other signal, and the input sensing driver 300 may not be able to make an accurate determination.

[0174] Figure 7B As shown in Fig. 7A The AA portion of is defined as a unit area AA required for sensing an external input by the input sensing circuit ISC. The left first sensor IE1-1, the right first sensor IE1-2, the upper second sensor IE2-1, and the lower second sensor IE2-2 are arranged in the unit area AA.

[0175] The left and right first sensors IE1 - 1 and IE1 - 2 and the upper and lower second sensors IE2 - 1 and IE2 - 2 form capacitance in the unit area AA.

[0176] The left first sensor IE1-1 and the right first sensor IE1-2 are electrically connected to each other through the first connection portion CP1. The left first sensor IE1-1, the right first sensor IE1-2, and the first connection portion CP1 may be disposed on the same layer.

[0177] The upper second sensor IE2-1 and the lower second sensor IE2-2 are electrically connected to each other through the second connection portion CP2. At least a portion of the second connection portion CP2 may be disposed on a different layer from the upper second sensor IE2-1 and the lower second sensor IE2-2.

[0178] Although not separately shown, an antistatic pattern may be connected to each of the upper and lower second sensors IE2-1 and IE2-2. The antistatic pattern may induce static electricity to its apex to prevent the second connection portion CP2 from being disconnected or protect the second connection portion CP2 from being electrically disconnected.

[0179] Reference Fig. 8A and Figure 8B , the left and right first sensors IE1-1 and IE1-2, the upper and lower second sensors IE2-1 and IE2-2, and the first connection portion CP1 may be disposed on the base film BF.

[0180] The first insulating layer IS1 may be disposed on the base film BF and may cover the left and right first sensors IE1-1 and IE1-2, the upper and lower second sensors IE2-1 and IE2-2, and the first connection portion CP1. The first insulating layer IS1 may be provided with a first contact hole CH1 defined therethrough.

[0181] At least a portion of each second connection portion CP2 may be disposed on the first insulating layer IS1. The second connection portion CP2 may be connected to the upper and lower second sensors IE2-1 and IE2-2 through the first contact holes CH1.

[0182] The second insulating layer IS2 may be disposed on the first insulating layer IS1 to cover the second connection portion CP2.

[0183] Each of the first insulating layer IS1 and the second insulating layer IS2 may include an organic material or an inorganic material.

[0184] According to another exemplary embodiment of the present disclosure, Fig. 8A and Figure 8B The base film BF shown in FIG. 1 may be used as the encapsulation layer TFE of the display panel DP (refer to Figure 6 )replace.

[0185] Fig. 9 It is shown Fig. 7A An enlarged plan view of the EE section.

[0186] Reference Fig. 9 , the left first sensor IE1a-1 may include a body portion BD, a first joining portion JC1, and a second joining portion JC2.

[0187] Fig. 9 The main body BD shown in FIG. Figure 7B The left first sensor IE1-1 shown in FIG. 1 has substantially the same shape.

[0188] The first bonding portion JC1 may protrude from the body portion BD in a direction substantially parallel to the first direction DR1. The first bonding portion JC1 may be connected to the first signal line SSL1.

[0189] The second bonding portion JC2 may protrude from the body portion BD in a direction substantially parallel to the first direction DR1. The second bonding portion JC2 may be connected to the first measurement line MSL1.

[0190] The length L1 obtained by measuring the first joint portion JC1 in the first direction DR1 (hereinafter referred to as "first length") may be different from the length L2 obtained by measuring the second joint portion JC2 in the first direction DR1 (hereinafter referred to as "second length"). In detail, the first length L1 may be shorter than the second length L2.

[0191] The description of other components of this exemplary embodiment is similar to Figure 7B The descriptions about the other components are basically the same, so their details will be omitted.

[0192] Fig.10 It is shown Fig. 7A Enlarged plan view of the FF section.

[0193] Reference Fig.10 , the right first sensor IE1a-2 may include a main body portion BD and a third joining portion JC3.

[0194] The third bonding portion JC3 may protrude from the body portion BD in a direction substantially parallel to the first direction DR1. The third bonding portion JC3 may be connected to the second measurement line MSL2.

[0195] The description of other components of this exemplary embodiment is similar to Figure 7B The descriptions about the other components are basically the same, so their details will be omitted.

[0196] Fig.11It is shown Fig. 7A An enlarged plan view of another example of an EE portion.

[0197] Reference Fig.11 , the left first sensor IE1b-1 may include a body portion BD, a first joining portion JC1-1 and a second joining portion JC2-1.

[0198] The length L3 (hereinafter referred to as the "third length") obtained by measuring the first bonding portion JC1-1 in the second direction DR2 may be different from the length L4 (hereinafter referred to as the "fourth length") obtained by measuring the second bonding portion JC2-1 in the second direction DR2. In detail, the third length L3 may be equal to or greater than the fourth length L4 and equal to or less than four times the fourth length L4. When the third length L3 is less than the fourth length L4, the contact area between the first bonding portion JC1-1 and the first signal line SSL1 is reduced, with the result that the sensitivity of the input sensing circuit ISC may be reduced. When the third length L3 exceeds four times the fourth length L4, the contact area between the second bonding portion JC2-1 and the first measurement line MSL1 is reduced, with the result that the resistance value of the closed loop formed by the first measurement line MSL1, the first sensor IE1, and the second measurement line MSL2 may become too high.

[0199] Fig. 12A It is shown Fig. 7A An enlarged plan view of another example of an EE portion. Fig. 12B is along Fig. 12A A cross-sectional view taken along section line III-III'.

[0200] Reference Fig. 12A and Fig. 12B , the left first sensor IE1c-1 may be disposed on the base film BF. The left first sensor IE1c-1 may include a body portion BD and a first joint portion JC1-2.

[0201] The first signal line SSL1 may be disposed on the first bonding portion JC1 - 2 .

[0202] The first insulating layer IS1 may be disposed on the base film BF. The first insulating layer IS1 may cover at least a portion of the first bonding portion JC1-2 and the body portion BD. The first insulating layer IS1 may not cover the first signal line SSL1. The first insulating layer IS1 may be provided with a second contact hole CH2 defined therethrough.

[0203] The second bonding portion JC2-2 may be disposed on the first insulating layer IS1. The second bonding portion JC2-2 may overlap the first bonding portion JC1-2. The second bonding portion JC2-2 may be connected to the left first sensor IE1c-1 through the second contact hole CH2.

[0204] The first measurement line MSL1 may be disposed on the second bonding portion JC2 - 2 .

[0205] The second insulating layer IS2 may be disposed on the first insulating layer IS1 and may cover at least a portion of the second bonding portion JC2 - 2 . The second insulating layer IS2 may not cover the first measurement line MSL1 .

[0206] Fig.13 is a plan view showing an input sensing circuit ISC- 1 according to an exemplary embodiment of the present disclosure.

[0207] The input sensing circuit ISC-1 may include a first sensor group IEG1, a second sensor group IEG2, a first connecting portion CP1, a second connecting portion CP2, a first signal line SSL1, a second signal line SSL2, a first measuring line MSL1, a second measuring line MSL2, a third measuring line MSL3, a fourth measuring line MSL4, a first signal pad PD-S1 and a second signal pad PD-S2, a first sensing pad PD-R1, a second sensing pad PD-R2, a third sensing pad PD-R3 and a fourth sensing pad PD-R4, a printed circuit board FPCB-T and an input sensing driver 300.

[0208] Fig.13 The input sensing circuit ISC-1 shown in Fig. 7A The input sensing circuit ISC shown in FIG. 1 may further include a third measuring line MSL3 , a fourth measuring line MSL4 , a third sensing pad PD-R3 , and a fourth sensing pad PD-R4 .

[0209] The connection structure between one first sensor group IEG1, the third measurement line MSL3, the fourth measurement line MSL4, the third sensing pad PD-R3 and the fourth sensing pad PD-R4 may be substantially the same as the connection structure between another first sensor group IEG1, the first measurement line MSL1, the second measurement line MSL2, the first sensing pad PD-R1 and the second sensing pad PD-R2 adjacent to the one first sensor group IEG1.

[0210] The input sensing driver 300 can compare the resistance change value of the other first sensor group IEG1 measured using the first measurement line MSL1, the second measurement line MSL2, the first sensing pad PD-R1 and the second sensing pad PD-R2 with the resistance change value of the one first sensor group IEG1 measured using the third measurement line MSL3, the fourth measurement line MSL4, the third sensing pad PD-R3 and the fourth sensing pad PD-R4.

[0211] When the first resistance change value is substantially equal to the second resistance change value, the input sensing driver 300 may determine that the resistance change of the first sensor group IEG1 is due to the external temperature change and no external pressure is applied.

[0212] When the difference between the first resistance change value and the second resistance change value is equal to or greater than a predetermined value (eg, about 5%), the input sensing driver 300 may determine that the resistance change of the first sensor group IEG1 is due to pressure applied from the outside.

[0213] Fig.14 is a plan view showing an input sensing circuit ISC- 2 according to an exemplary embodiment of the present disclosure. Fig.15 yes Fig.14 An enlarged plan view of the EE-1 section. Fig.16 yes Fig.14 An enlarged plan view of the FF-1 section.

[0214] Reference Fig.15 , the left first sensor IE1d-1 may include an active sensor portion SNT, a floating portion FLR, a first bonding portion JC1-3, and a second bonding portion JC2-3.

[0215] Each of the right first sensor IE1d-2, the upper second sensor IE2d-1, and the lower second sensor IE2d-2 may include an active sensor portion SNT and a floating portion FLR.

[0216] The floating portion FLR may be disposed to be spaced apart from the active sensor portion SNT. The floating portion FLR may be in an electrically floating state.

[0217] Each active sensor portion SNT may be electrically connected to a corresponding other active sensor portion SNT, and may transmit and receive an electrical signal to sense a user's touch or an external pressure.

[0218] The first bonding portion JC1-3 may protrude from one end of the active sensor portion SNT in a direction substantially parallel to the first direction DR1. The first bonding portion JC1-3 may be connected to the first signal line SSL1.

[0219] The second bonding portion JC2-3 may protrude from the other end of the active sensor portion SNT in a direction substantially parallel to the first direction DR1. The second bonding portion JC2-3 may be connected to the first measurement line MSL1.

[0220] Reference Fig.16 , the right first sensor IE1e-2 may include an active sensor portion SNT, a floating portion FLR and a third bonding portion JC3-3.

[0221] Each of the left first sensor IE1e-1, the upper second sensor IE2d-1, and the lower second sensor IE2d-2 may include an active sensor portion SNT and a floating portion FLR.

[0222] The third bonding portion JC3-3 may protrude from one end of the active sensor portion SNT in a direction substantially parallel to the first direction DR1. The third bonding portion JC3-3 may be connected to the second measurement line MSL2.

[0223] Although certain exemplary embodiments and implementations have been described herein, other embodiments and modifications will be apparent from this description. Therefore, the inventive concept is not limited to such embodiments, but is limited to the broader scope of the appended claims and various obvious modifications and equivalent arrangements as will be apparent to those of ordinary skill in the art.

Claims

1. A display module, comprising: Display panel; as well as An input sensing circuit is disposed on the display panel, and the input sensing circuit includes: A first sensor group, comprising a plurality of first sensors arranged along a first direction; a plurality of first connection parts, electrically connecting two adjacent first sensors among the plurality of first sensors respectively; a second sensor group including a plurality of second sensors arranged along a second direction intersecting the first direction; a plurality of second connection parts, electrically connecting two adjacent second sensors among the plurality of second sensors respectively; A first signal line electrically connected to one of the plurality of first sensors; a first measurement line electrically connected to the one first sensor among the plurality of first sensors and spaced apart from the first signal line; and a second measuring line electrically connected to another first sensor of the plurality of first sensors, an input sensing driver electrically connected to the first signal line, the first measurement line and the second measurement line, wherein the plurality of first sensors are configured such that a resistance value of one or more of the plurality of first sensors changes when the input sensing circuit is deformed in a third direction in response to pressure applied from outside the display module, the third direction intersecting the first direction and the second direction, and The input sensing driver is configured to sense a resistance change value of a closed loop, wherein the closed loop includes the first measurement line, the second measurement line, and the plurality of first sensors of the first sensor group.

2. The display module according to claim 1, wherein: The one first sensor among the plurality of first sensors comprises: The main part; a first engaging portion protruding from the main body portion in a direction parallel to the first direction and connected to the first signal line; and A second engaging portion protrudes from the body portion in a direction parallel to the first direction and is connected to the first measuring line.

3. The display module according to claim 2, wherein: A first length of the first engaging portion in the first direction is different from a second length of the second engaging portion in the first direction.

4. The display module according to claim 3, wherein: The second length is longer than the first length.

5. The display module according to claim 2, wherein: A third length of the first engaging portion in the second direction is equal to or greater than a fourth length of the second engaging portion in the second direction and equal to or less than four times the fourth length.

6. The display module according to claim 1, wherein: The input sensing circuit also includes an insulating layer covering the plurality of first sensors, the plurality of second sensors and the first connecting portion, at least a portion of each of the plurality of second connecting portions is disposed on the insulating layer, and the one first sensor among the plurality of first sensors includes a main body portion and a first bonding portion, the first bonding portion protruding from the main body portion in the first direction and connected to the first signal line.

7. The display module according to claim 6, wherein: The input sensing circuit further includes a second bonding portion disposed on the insulating layer, overlapping the first bonding portion, and connected to the one first sensor of the plurality of first sensors and the first measurement line.

8. The display module according to claim 7, wherein: A second contact hole and a plurality of first contact holes are defined through the insulating layer, the plurality of second connection portions are connected to the plurality of second sensors through the plurality of first contact holes, and the second bonding portion is connected to the one first sensor among the plurality of first sensors through the second contact hole.

9. The display module according to claim 1, wherein: The input sensing circuit further includes a second signal line electrically connected to a second sensor among the plurality of second sensors.

10. The display module according to claim 9, wherein: The input sensing circuit further includes an input sensing driver electrically connected to the first signal line, the second signal line, the first measurement line, and the second measurement line.

11. The display module according to claim 10, wherein: The input sensing driver is configured to sense resistance change values ​​of the first measurement line, the plurality of first sensors, and the second measurement line during a first period.

12. The display module according to claim 11, wherein: The input sensing driver is configured to sense a change in capacitance formed by the plurality of first sensors and the plurality of second sensors during a second period, the second period being different from the first period.

13. The display module according to claim 10, wherein: The first sensor group includes multiple first sensor groups, and the input sensing driver is configured to compare the resistance change value of one first sensor group among the multiple first sensor groups with the resistance change value of another first sensor group among the multiple first sensor groups, wherein the one first sensor group and the another first sensor group are adjacent to each other.

14. The display module according to claim 1, further comprising: The adhesive member is disposed between the display panel and the input sensing circuit, and has predetermined elasticity.

15. The display module according to claim 1, wherein: The one first sensor among the plurality of first sensors is disposed at one end of the first sensor group along the first direction, and the other first sensor among the plurality of first sensors is disposed at an opposite end of the first sensor group along the first direction.

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