A fast alarm circuit for contactless smart card chip

Abstract

The present invention provides a contactless smart card chip quick alarm circuit. The quick alarm circuit includes an antenna network, a rectifier circuit, a limiter circuit, a current sampler, a current source and a current comparator, wherein the limiter circuit includes a first sampling resistor, a second sampling resistor, an amplifier, a reference voltage and an NMOS transistor; the antenna network is connected to the rectifier circuit and the limiter circuit, the current source is connected to the output end of the rectifier circuit, the current sampler is connected to the NMOS transistor in the limiter circuit, the current comparator is connected to the current sampler and the current source, and the current comparator outputs a control signal; the contactless smart card chip quick alarm circuit significantly improves the alarm sensitivity and does not need to fill a larger decoupling capacitor. Compared with the traditional alarm circuit, the newly designed limiter circuit adopts a current comparator method, which improves the alarm sensitivity without generating false alarms, and does not increase the capacitance of the card analog front-end decoupling capacitor, saving chip area.

Description

Technical Field

[0001] The present invention relates to the technical field of contactless smart cards, and in particular to a fast alarm circuit for a contactless smart card chip. Background Art

[0002] In contactless smart card applications, there are active cards and passive cards. Active cards obtain energy through their own batteries and other devices, and do not rely on the energy emitted by the card machine, so the working distance can be very far. The energy of passive cards depends on the energy emitted by the card machine. For contactless cards that comply with the ISO 14443 13.56MHz system, they mainly obtain energy from the card machine through inductive coupling. The distance of the working distance depends on factors such as the amount of energy emitted by the card machine and the power consumption of the card itself.

[0003] The energy radiated by the card machine at a certain communication distance is limited. In order to maintain the normal operation of the card, when the power consumption of the card is greater than the power consumption provided by the card machine, an alarm signal needs to be generated in time to reduce the power consumption of the card to ensure that the card will not be reset by power-off. Therefore, the alarm speed of the alarm circuit for this function is particularly important. A faster alarm speed can successfully reduce the risk of card reset.

[0004] In traditional contactless card design, such as Figure 1 As shown, it is a structural framework diagram of the existing contactless card analog front-end circuit. The rectifier circuit converts the AC power coupled to the antenna network into a DC voltage VRF that can be used by the chip, and the driving current is IRF. The limiting circuit limits the voltage value of the DC voltage VRF to below a certain amplitude to protect the subsequent circuit from being broken down by the high voltage. C1 is a decoupling capacitor that filters out high-frequency clutter in the DC voltage VRF. When the energy is insufficient, the charge stored in the decoupling capacitor C1 can also power the subsequent circuit until the voltage is reset. The low-dropout regulator converts the DC voltage VRF into a core voltage VDD that can be used by the digital circuit. The voltage detection circuit completes the inspection of the DC voltage VRF voltage value. When the DC voltage VRF is lower than the threshold voltage, the control signal VC is high, reducing the power consumption Iload of the digital circuit, and ensuring the reliability of the DC voltage VRF and the core voltage VDD voltage values.

[0005] In the operation of contactless cards, in order to obtain more current, the voltage value of the DC voltage VRF is usually limited to about 2.4V by the limiting circuit, and the voltage value of VDD is 1.8V, with a voltage difference of 0.6V. The threshold of the voltage detector is generally selected at 2.0V. When the power consumption of the card is greater than the energy that the antenna can obtain, that is, Iload>IRF, the voltage value of the DC voltage VRF will start to decrease from 2.4V to 2.0V, and the voltage detection circuit will send out an alarm signal VC. The alarm signal VC controls the current value of the power consumption current Iload of the chip to decrease, ensuring that the voltage value of the core voltage VDD is greater than 1.62V, and the system will not be reset after power-off.

[0006] The disadvantage of voltage detection alarm is that the alarm time is slow. When the card is in a weak field environment and the power consumption current Iload has a large impact, the alarm signal is often not given in time, such as Figure 2 As shown in the figure, it is a timing diagram of the large power consumption impact of the existing contactless card analog front-end circuit. When the power consumption current Iload is 1mA, a current impact of 10mA suddenly occurs. At this time, since the current value of the driving current IRF of the rectifier circuit is less than 10mA, the voltage of the DC voltage VRF begins to drop, and the speed of the drop depends on the size of the decoupling capacitor C1. When the voltage value of the DC voltage VRF is lower than 2V, the voltage detection circuit generally takes more than 0.1uS to give an alarm signal VC to control the current value of the power consumption current Iload to drop. However, the voltage value of the core voltage VDD is already lower than the alarm voltage of 1.62V, and the system is reset and cannot work normally.

[0007] In this case, the decoupling capacitor C1 can be increased to slow down the VRF power-off speed and ensure that the core voltage VDD is greater than 1.62V. The disadvantage is that a large capacitor is required, which wastes the chip area. The alarm threshold of the voltage detection circuit can also be increased to generate the alarm signal VC in advance. However, since the DC voltage VRF voltage itself has a 10% error, a too high threshold will cause too many false alarms, reducing the efficiency of digital circuit execution. Summary of the invention

[0008] In view of the above-mentioned deficiencies in the prior art, the object of the present invention is to provide a contactless smart card chip fast alarm circuit, which adopts a current comparator to improve the alarm sensitivity and save chip area.

[0009] In order to achieve the above technical purpose, the technical solution adopted by the present invention is:

[0010] A contactless smart card chip quick alarm circuit, the quick alarm circuit comprising an antenna network, a rectifier circuit, a limiter circuit, a current sampler, a current source and a current comparator, wherein the limiter circuit comprises a first sampling resistor, a second sampling resistor, an amplifier, a reference voltage and an NMOS transistor;

[0011] The antenna network is connected to the rectifier circuit and the limiter circuit, the current source is connected to the output end of the rectifier circuit, the current sampler is connected to the NMOS transistor in the limiter circuit, the current comparator is connected to the current sampler and the current source, and the current comparator outputs a control signal;

[0012] The rectifier circuit converts the AC power output coupled to the antenna network into a DC voltage to drive the current, the limiter circuit limits the DC power voltage value, the first sampling resistor and the second sampling resistor jointly sample the DC voltage to generate a sampling voltage, and when the loop is stable, the amplifier forces the input voltage to be equal to the reference voltage;

[0013] The current source sampler samples the bypass current with a sampling ratio of 1000:1 to obtain the sampled current. The current source provides a threshold current. The current comparator compares the current value of the sampled current in the current sampler with the current threshold of the threshold current in the current source. If the current value of the sampled current is less than the current threshold of the threshold current, that is, the current value of the bypass current is less than 1000 times the current threshold, the control signal VC is output high and a power consumption alarm signal is generated.

[0014] Optionally, the current threshold is set to 0.1uA, 0.5uA or 1uA.

[0015] Since the present invention removes the traditional voltage alarm circuit, integrates the alarm circuit into the limiting circuit, and uses a current comparator to generate an alarm signal, the beneficial effect obtained is that the contactless smart card chip fast alarm circuit of the present invention significantly improves the alarm sensitivity and does not need to fill a larger decoupling capacitor. Compared with the traditional alarm circuit, the present invention uses a current comparator in the newly designed limiting circuit, which greatly improves the alarm sensitivity without generating false alarms, and does not increase the capacitance of the card analog front-end decoupling capacitor, thereby saving chip area.

[0016] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 It is a structural diagram of the existing contactless card analog front-end circuit.

[0018] Figure 2 It is a timing diagram of high power consumption impact of existing contactless card analog front-end circuit.

[0019] Figure 3 The present invention is a contactless smart card chip quick alarm circuit structure diagram of one of the specific implementations of the present invention.

[0020] Figure 4 It is a structural diagram of a limiting circuit specifically implemented in the present invention.

[0021] Figure 5 It is the structural diagram of the rapid alarm circuit of the non-contact smart card chip in the second specific implementation of the present invention.

[0022] Figure 6 It is the timing diagram of the rapid alarm circuit of the non-contact smart card chip in the specific implementation of the present invention. Specific implementation mode

[0023] Refer to Figure 3 , which is the structural block diagram of the rapid alarm circuit of the non-contact smart card chip in the first specific implementation of the present invention. In this specific embodiment, the rapid alarm circuit of the non-contact smart card chip includes an antenna network, a rectification circuit, a limiting circuit, a current sampler, a current source, and a current comparator. Among them, the limiting circuit includes a first sampling resistor R1, a second sampling resistor R2, an amplifier, a reference voltage Vref, and an NMOS transistor.

[0024] The antenna network is connected to the rectification circuit and the limiting circuit. The current source is connected to the output end of the rectification circuit. The current sampler is connected to the NMOS transistor in the limiting circuit. The current comparator is connected to the current sampler and the current source, and the current comparator outputs a control signal VC.

[0025] The rectification circuit converts the output of the AC power supply coupled by the antenna network into a DC voltage VRF, and the driving current is IRF. The limiting circuit performs a limiting process on the voltage value of the DC power supply VRF. The first sampling resistor R1 and the second sampling resistor R2 jointly sample the DC voltage VRF to generate a sampling voltage V sample , when the loop is stable, the amplifier forces the input voltage to be equal to the reference voltage Vref, that is, V sample = Vref. By setting the values of the reference voltage Vref, the first sampling resistor R1, and the first sampling resistor R2, it can be obtained that: VRF = Vref * [(R1 + R2) / R2] = 2.4V.

[0026] The current source sampler samples the bypass current I_PASS with a sampling ratio of 1000:1 to obtain a sampling current I_sample. The current source provides a threshold current I_th. The current comparator compares the current value of the sampling current I_sample in the current sampler with the current threshold of the threshold current I_th in the current source. If I_sample < I_th, that is, IPASS < 1000 * I_th, the control signal VC outputs high to generate a power consumption alarm signal, reduce the card power consumption Iload, and avoid the power-down risk of the system. The current threshold I_th is set to 0.1uA, 0.5uA, or 1uA.

[0027] Refer to Figure 4, which is the structural diagram of the limiting circuit in the specific implementation of the present invention. The limiting circuit in the specific implementation of the present invention includes a first sampling resistor R1, a second sampling resistor R2, an amplifier, a reference voltage Vref, and a bypass NMOS transistor. The antenna network is connected to the rectifying circuit and the limiting circuit. The rectifying circuit converts the AC power output coupled by the antenna network into a DC voltage VRF, and the driving current is IRF. The limiting circuit performs a limiting process on the voltage value of the DC power supply VRF. The first sampling resistor R1 and the second sampling resistor R2 jointly sample the DC voltage VRF to generate a sampling voltage V sample , when the loop is stable, the amplifier will make the forced input voltages equal, that is, V sample =Vref. By setting the values of the reference voltage Vref, the first sampling resistor R1, and the second sampling resistor R2, we can obtain: VRF = Vref * [(R1 + R2) / R2] = 2.4V.

[0028] When the DC voltage VRF > 2.4V, V sample >Vref, the amplifier controls the bypass current I_PASS of the NMOS transistor MN0 to increase, reducing the DC voltage VRF; when the DC voltage VRF < 2.4V, V sample <Vref, the amplifier controls the bypass current I_PASS of the NMOS transistor MN0 to decrease, increasing the DC voltage VRF; ultimately ensuring that the voltage value of the DC voltage VRF is stabilized at about 2.4V.

[0029] Since the loop gain formed by the amplifier and the NMOS transistor MN0 is greater than 1000, once the voltage value of the sampling voltage V sample is slightly lower than the voltage value of the reference voltage Vref, the output end of the amplifier will control the bypass current I_PASS in the NMOS transistor MN0 to rapidly decrease until 0A, and the speed of the current comparator is much faster than that of the voltage comparator, generally less than 10nS. Since the voltage sampling circuit at this time comes from the limiting circuit itself that generates the DC voltage VRF, it will not be affected by a 10% fluctuation of the DC voltage VRF. Therefore, the bypass current I_PASS serves as a power consumption alarm signal with high sensitivity.

[0030] Refer to Figure 5, which is the structural diagram of the rapid alarm circuit of the non-contact smart card chip in the second specific embodiment of the present invention. In the rapid alarm circuit of the non-contact smart card chip in this specific embodiment, the NMOS transistor MN1 and the amplifier 2 constitute a current sampler, and the sampling ratio is 1000:1. The third sampling resistor R3 is connected to the input end of the amplifier 2, and the function of the third sampling resistor R3 is to generate a certain voltage margin at the input end of the amplifier 2; the bias current source I_bias, the PMOS power transistor MP0, the PMOS power transistor MP1, the PMOS power transistor MP2, and the PMOS power transistor MP3 together constitute a current source that provides the judgment current threshold I_th. The PMOS power transistor MP3 and the PMOS power transistors MP0, MP1, and MP2 form a current mirror, and the mirror ratios are 1:1, 1:100, and 1:150 respectively; when the current value of the bias current source I_bias is equal to 100 nA, the current thresholds of the threshold current I_th provided by the PMOS power transistors MP0, MP1, and MP2 are 100 nA, 1 μA, and 1.5 μA respectively, and the switches S0, S1, and S2 respectively provide the selection of the threshold current I_th. Taking the case where the switch S0 is closed and the switches S1 and S2 are open as an example, the current threshold I_th = 100 nA. Since the output impedances of the NMOS transistor MN1 and the PMOS power transistor MP0 are very high, when I_sample < I_th, that is, I_PASS < 100 μA, the control signal VC output by the current comparator outputs high, generating a power consumption alarm signal.

[0031] See Figure 6 , which is the timing diagram of the rapid alarm circuit of the non-contact smart card chip in the specific embodiment of the present invention. Compared with the traditional voltage alarm circuit, under the same conditions, the new alarm circuit will generate the power consumption alarm signal VC faster, timely reduce the power consumption current Iload of the card, ensure that the core voltage VDD is greater than 1.63 V, and will not generate a system reset. In actual applications, the appropriate alarm current threshold can also be selected through the switches S0, S1, and S2. The rapid alarm circuit of the non-contact smart card chip of the present invention does not increase the capacitance value of the decoupling capacitor C1 and also avoids the additional overhead of the chip area.

[0032] It should be noted that the above implementation manners only illustrate the basic idea of the present invention in a schematic manner, and are related to the circuit components in the present invention rather than drawn according to the number, shape, device arrangement manner, and connection manner of the circuit components in actual implementation. The types, quantities, connection manners, device arrangement manners, and device parameters of each circuit in actual implementation can be changed arbitrarily.

[0033] The above-described embodiments are only preferred embodiments of the present invention and cannot limit the extension of the technical solution of the present invention. Any modification, equivalent change and obvious replacement of the known technology made by those skilled in the art on the basis of the technical solution of the present invention shall fall within the protection scope of the present invention.

Claims

1. A contactless smart card chip fast alarm circuit, characterized in that: The fast alarm circuit includes an antenna network, a rectifier circuit, a limiter circuit, a current sampler, a current source and a current comparator, wherein the limiter circuit includes a first sampling resistor, a second sampling resistor, an amplifier, a reference voltage and an NMOS transistor; The antenna network is connected to the rectifier circuit and the limiter circuit, the current source is connected to the output end of the rectifier circuit, the current sampler is connected to the NMOS transistor in the limiter circuit, the current comparator is connected to the current sampler and the current source, and the current comparator outputs a control signal; The rectifier circuit converts the AC power output coupled to the antenna network into a DC voltage to drive the current, the limiter circuit limits the DC power voltage value, the first sampling resistor and the second sampling resistor jointly sample the DC voltage to generate a sampling voltage, and when the loop is stable, the amplifier forces the input voltage to be equal to the reference voltage; The current source sampler samples the bypass current with a sampling ratio of 1000:1 to obtain the sampled current. The current source provides a threshold current. The current comparator compares the current value of the sampled current in the current sampler with the current threshold of the threshold current in the current source. If the current value of the sampled current is less than the current threshold of the threshold current, that is, the current value of the bypass current is less than 1000 times the current threshold, the control signal VC is output high and a power consumption alarm signal is generated.

2. The contactless smart card chip fast alarm circuit as claimed in claim 1, characterized in that: The current threshold is set to 0.1uA, 0.5uA or 1uA.

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