Storage device and electronic device

Abstract

A storage device that can simultaneously achieve a retention operation at a high temperature and a high-speed operation at a low temperature is provided. The storage device includes a driver circuit and a plurality of storage cells, the storage cells include a transistor and a capacitor, and the transistor includes a metal oxide in a channel formation region. When the transistor includes a first gate and a second gate, the driver circuit has a function of driving the second gate, and during the period when the storage cell retains data, the driver circuit outputs a potential corresponding to the temperature of the storage device or the temperature of the environment in which the storage device is set to the second gate.

Description

Technical Field

[0001] One embodiment of the present invention relates to a storage device. In particular, one embodiment of the present invention relates to a storage device that can operate by utilizing semiconductor characteristics.

[0002] Note that one embodiment of the present invention is not limited to the above-mentioned technical field. The technical field of the invention disclosed in this specification, etc. relates to an object, method or manufacturing method. In addition, one embodiment of the present invention relates to a process, machine, product or composition of matter. Background Art

[0003] DRAM (Dynamic Random Access Memory) is widely used as a storage device (also called memory) built into various electronic devices. In addition, examples have been proposed for applying transistors using oxide semiconductors (also called oxide semiconductor transistors, OS transistors) to memory cells of DRAM (for example, Patent Document 1, Non-Patent Document 1).

[0004] Since the leakage current (off-state current) of the oxide semiconductor transistor in the off state is extremely small, by applying the oxide semiconductor transistor to the memory cell of DRAM, a memory with a low refresh frequency and low power consumption can be manufactured.

[0005] In this specification and the like, a DRAM in which an oxide semiconductor transistor is applied to a memory cell is referred to as an "oxide semiconductor DRAM" or a "DOSRAM (registered trademark, Dynamic Oxide Semiconductor Random Access Memory)".

[0006] On the other hand, oxide semiconductors have attracted attention as semiconductors that can be used in transistors in recent years. As oxide semiconductors, in addition to single metal oxides such as indium oxide and zinc oxide, multinary metal oxides are also known. Among multinary metal oxides, research on In-Ga-Zn oxide (also called IGZO) is particularly hot.

[0007] Through research on IGZO, a CAAC (c-axis aligned crystalline) structure and a nc (nanocrystalline) structure, which are neither single crystal nor amorphous, have been discovered in oxide semiconductors (see Non-Patent Documents 2 to 4).

[0008] Non-Patent Documents 2 and 3 disclose a technique for manufacturing a transistor using an oxide semiconductor having a CAAC structure. In addition, Non-Patent Documents 5 and 6 disclose that an oxide semiconductor having a lower crystallinity than a CAAC structure and an nc structure also has minute crystals.

[0009] Non-Patent Document 7 reports that a transistor using an oxide semiconductor has an extremely small off-state current, and Non-Patent Documents 8 and 9 report LSIs and displays that utilize the characteristic of an extremely small off-state current.

[0010] [Prior technical literature]

[0011] [Patent Document]

[0012] [Patent Document 1] Japanese Patent Application Publication No. 2012-256820

[0013] [Non-patent literature]

[0014] [Non-patent document 1] T. Onuki et al., "DRAM with Storage Capacitance of 3.9fFusing CAAC-OS Transistor with L of 60nm and having More Than 1-h RetentionCharacteristics", Ext.Abstr.SSDM, 2014, pp.430-431.

[0015] [Non-patent document 2] S. Yamazaki et al., "SID Symposium Digest of Technical Papers", 2012, volume 43, issue 1, p. 183-186

[0016] [Non-patent document 3] S. Yamazaki et al., “Japanese Journal of Applied Physics”, 2014, volume 53, number 4S, p. 04ED18-1-04ED18-10

[0017] [Non-patent document 4] S. Ito et al., “The Proceedings of AM-FPD'13 Digest of Technical Papers”, 2013, p.151-154

[0018] [Non-patent document 5] S. Yamazaki et al., “ECS Journal of Solid State Science and Technology”, 2014, volume 3, issue 9, p. Q3012-Q3022

[0019] [Non-patent document 6] S. Yamazaki, “ECS Transactions”, 2014, volume 64, issue 10, p. 155-164

[0020] [Non-patent document 7] K.Kato et al., “Japanese Journal of Applied Physics”, 2012, volume 51, p.021201-1-021201-7

[0021] [Non-patent document 8] S. Matsuda et al., “2015 Symposium on VLSI Technology Digest of Technical Papers”, 2015, p. T216-T217

[0022] [Non-patent document 9] S.Amano et al., "SID Symposium Digest of Technical Papers", 2010, volume 41, issue 1, p.626-629 Summary of the invention

[0023] Technical problem to be solved by the invention

[0024] OS transistors have the property that the threshold voltage drifts more negatively and the subthreshold coefficient increases as the temperature increases. As a result, the current flowing between the source and the drain (also called the on-state current) increases when the transistor is in the on state, but the current flowing between the source and the drain (also called the cutoff current) also increases when the voltage of the gate relative to the source is 0V. That is, in DRAM (DOSRAM) where OS transistors are applied to memory cells, the higher the temperature, the shorter the data retention time.

[0025] In addition, the OS transistor has the property that the threshold voltage drifts more positively as the temperature drops. As a result, the on-state current decreases. That is, in DOSRAM, the lower the temperature, the longer it takes to write or read data, and the lower the operating speed.

[0026] One of the purposes of one embodiment of the present invention is to provide a storage device that has a long data retention time even at high temperatures. Alternatively, one of the purposes of one embodiment of the present invention is to provide a storage device that has a high operating speed even at low temperatures. Alternatively, one of the purposes of one embodiment of the present invention is to provide a storage device that can simultaneously achieve a retention operation at high temperatures and a high-speed operation at low temperatures.

[0027] Alternatively, one object of one embodiment of the present invention is to provide a novel storage device. Alternatively, one object of one embodiment of the present invention is to provide an electronic device including a novel storage device.

[0028] Note that one embodiment of the present invention does not need to achieve all of the above-mentioned purposes, as long as at least one purpose can be achieved. In addition, the recording of the above-mentioned purpose does not prevent the existence of other purposes. The purposes other than the above-mentioned purposes can be obvious from the description of the specification, claims, drawings, etc., and the purposes other than the above-mentioned purposes can be extracted from the description of the specification, claims, drawings, etc.

[0029] Solutions to technical problems

[0030] One embodiment of the present invention is a memory device including a driver circuit and a plurality of memory cells. The memory cell includes a transistor and a capacitor, one of a source and a drain of the transistor is electrically connected to an electrode of the capacitor, and the transistor includes a metal oxide in a channel formation region. The driver circuit has a function of driving the gate of the transistor, and while the memory cell holds data, the driver circuit outputs a potential corresponding to the temperature of the memory device or the temperature of the environment in which the memory device is set to the gate.

[0031] In addition, one embodiment of the present invention is a storage device including a temperature sensor, a driver circuit, and a plurality of storage cells. The temperature sensor has a function of obtaining temperature information, the storage cell includes a transistor and a capacitor, one of the source and the drain of the transistor is electrically connected to an electrode of the capacitor, and the transistor includes a metal oxide in a channel formation region. The driver circuit has a function of driving the gate of the transistor, and while the storage cell holds data, the driver circuit outputs a potential corresponding to the temperature information to the gate.

[0032] In addition, one embodiment of the present invention is a memory device including a driver circuit and a plurality of memory cells. The memory cell includes a transistor and a capacitor, one of a source and a drain of the transistor is electrically connected to an electrode of the capacitor, and the transistor includes a metal oxide in a channel formation region. The driver circuit has a function of outputting a first potential or a second potential to a gate of the transistor, and while the memory cell holds data, the driver circuit outputs a second potential to the gate, and the second potential changes in a manner corresponding to the temperature of the memory device or the temperature of an environment in which the memory device is installed.

[0033] In addition, one embodiment of the present invention is a storage device including a temperature sensor, a driver circuit, and a plurality of storage cells. The temperature sensor has a function of obtaining temperature information, the storage cell includes a transistor and a capacitor, one of the source and the drain of the transistor is electrically connected to an electrode of the capacitor, and the transistor includes a metal oxide in a channel formation region. The driver circuit has a function of outputting a first potential or a second potential to the gate of the transistor, and while the storage cell holds data, the driver circuit outputs the second potential to the gate, and the second potential changes in a manner corresponding to the temperature information.

[0034] In addition, one embodiment of the present invention is a storage device including a driver circuit and a plurality of storage cells. The storage cell includes a transistor and a capacitor, one of the source and the drain of the transistor is electrically connected to an electrode of the capacitor, and the transistor includes a metal oxide in a channel formation region. The transistor includes a first gate and a second gate, and the first gate and the second gate have regions overlapping each other across a semiconductor layer. The driver circuit has a function of driving the second gate, and while the storage cell holds data, the driver circuit outputs a potential corresponding to the temperature of the storage device or the temperature of the environment in which the storage device is set to the second gate.

[0035] In addition, one embodiment of the present invention is a storage device including a temperature sensor, a driver circuit, and a plurality of storage cells. The temperature sensor has a function of obtaining temperature information, the storage cell includes a transistor and a capacitor, one of the source and the drain of the transistor is electrically connected to an electrode of the capacitor, and the transistor includes a metal oxide in a channel formation region. The transistor includes a first gate and a second gate, and the first gate and the second gate have a region overlapping each other across a semiconductor layer. The driver circuit has a function of driving the second gate, and while the storage cell holds data, the driver circuit outputs a potential corresponding to the temperature information to the second gate.

[0036] In addition, one embodiment of the present invention is a storage device including a driver circuit and a plurality of storage cells. The storage cell includes a transistor and a capacitor, one of the source and the drain of the transistor is electrically connected to an electrode of the capacitor, and the transistor includes a metal oxide in a channel formation region. The transistor includes a first gate and a second gate, and the first gate and the second gate have regions overlapping each other across a semiconductor layer. The driver circuit has a function of outputting a first potential or a second potential to the second gate, and while the storage cell holds data, the driver circuit outputs the second potential to the second gate, and the second potential changes in a manner corresponding to the temperature of the storage device or the temperature of the environment in which the storage device is set.

[0037] In addition, one embodiment of the present invention is a storage device including a temperature sensor, a driver circuit, and a plurality of storage cells. The temperature sensor has a function of obtaining temperature information, the storage cell includes a transistor and a capacitor, one of the source and the drain of the transistor is electrically connected to an electrode of the capacitor, and the transistor includes a metal oxide in a channel formation region. The transistor includes a first gate and a second gate, and the first gate and the second gate have regions overlapping each other across a semiconductor layer. The driver circuit has a function of outputting a first potential or a second potential to the second gate, and while the storage cell holds data, the driver circuit outputs the second potential to the second gate, and the second potential changes in a manner corresponding to the temperature information.

[0038] In addition, one embodiment of the present invention is a storage device including a driver circuit and a plurality of storage cells. The storage cell includes a transistor and a capacitor, one of the source and the drain of the transistor is electrically connected to an electrode of the capacitor, and the transistor includes a metal oxide in a channel formation region. The transistor includes a first gate and a second gate, the first gate and the second gate have regions overlapping each other across a semiconductor layer, and the second gate is electrically connected to the first gate. The driver circuit has a function of driving the first gate and the second gate, and while the storage cell holds data, the driver circuit outputs a potential corresponding to the temperature of the storage device or the temperature of the environment in which the storage device is set to the first gate and the second gate.

[0039] In addition, one embodiment of the present invention is a storage device including a temperature sensor, a driver circuit, and a plurality of storage cells. The temperature sensor has a function of obtaining temperature information, the storage cell includes a transistor and a capacitor, one of the source and the drain of the transistor is electrically connected to an electrode of the capacitor, and the transistor includes a metal oxide in a channel formation region. The transistor includes a first gate and a second gate, the first gate and the second gate have regions overlapping each other across a semiconductor layer, and the second gate is electrically connected to the first gate. The driver circuit has a function of driving the first gate and the second gate, and while the storage cell holds data, the driver circuit outputs a potential corresponding to the temperature information to the first gate and the second gate.

[0040] In addition, one embodiment of the present invention is a storage device including a driver circuit and a plurality of storage cells. The storage cell includes a transistor and a capacitor, one of the source and the drain of the transistor is electrically connected to an electrode of the capacitor, and the transistor includes a metal oxide in a channel formation region. The transistor includes a first gate and a second gate, the first gate and the second gate have regions overlapping each other across a semiconductor layer, and the second gate is electrically connected to the first gate. The driver circuit has a function of outputting a first potential or a second potential to the first gate and the second gate, and while the storage cell holds data, the driver circuit outputs a second potential to the first gate and the second gate, and the second potential changes in a manner corresponding to the temperature of the storage device or the temperature of the environment in which the storage device is set.

[0041] In addition, one embodiment of the present invention is a storage device including a temperature sensor, a driver circuit, and a plurality of storage cells. The temperature sensor has a function of obtaining temperature information, the storage cell includes a transistor and a capacitor, one of the source and the drain of the transistor is electrically connected to an electrode of the capacitor, and the transistor includes a metal oxide in a channel formation region. The transistor includes a first gate and a second gate, the first gate and the second gate have regions overlapping each other across a semiconductor layer, and the second gate is electrically connected to the first gate. The driver circuit has a function of outputting a first potential or a second potential to the first gate and the second gate, and while the storage cell holds data, the driver circuit outputs the second potential to the first gate and the second gate, and the second potential changes in a manner corresponding to the temperature information.

[0042] Effects of the Invention

[0043] By one embodiment of the present invention, a storage device having a long data retention time even at high temperature can be provided. Alternatively, by one embodiment of the present invention, a storage device having a high operating speed even at low temperature can be provided. Alternatively, by one embodiment of the present invention, a storage device having a high data retention time even at high temperature can be provided. Alternatively, by one embodiment of the present invention, a storage device having a high data retention time even at low temperature can be provided.

[0044] Alternatively, one embodiment of the present invention may provide a novel storage device. Alternatively, one embodiment of the present invention may provide an electronic device including a novel storage device.

[0045] Note that the description of these effects does not prevent the existence of other effects. In addition, one mode of the present invention does not need to have all of the above effects. Effects other than the above are obvious from the description of the specification, claims, drawings, etc., and can be extracted from the description of the specification, claims, drawings, etc.

[0046] BRIEF DESCRIPTION OF THE DRAWINGS

[0047] [Figure 1 ]A block diagram showing an example of the structure of a memory.

[0048] [FIG. 2] (A) is a diagram illustrating a memory cell array, and (B) is a circuit diagram showing a structural example of a memory cell. [FIG. 2] FIG.

[0049] [Fig. 3] (A, B, C) are circuit diagrams showing structural examples of memory cells.

[0050] [FIG. 4] (A) is a block diagram showing a configuration example of a word line driver circuit, and (B) is a circuit diagram showing a configuration example of a circuit LVB. [FIG.

[0051] [ Figure 5 ]A diagram showing an input and output example of a word line driver circuit.

[0052] [Fig. 6] (A, B) is a block diagram showing a structural example of a power supply device.

[0053] [Fig. 7] (A, B) are circuit diagrams showing a configuration example of a potential generating circuit.

[0054] [Figure 8] (A, B, C) are circuit diagrams showing a configuration example of a temperature sensor circuit, and (D) is a schematic diagram showing the relationship between Vgs and Ids of a transistor.

[0055] [Fig. 9] (A, B, C) are circuit diagrams showing a structural example of a temperature sensor circuit.

[0056] [ Fig.10 ]A block diagram showing an example of the structure of a memory.

[0057] [Figure 11] (A) is a diagram illustrating a memory cell array, and (B) is a circuit diagram showing a structural example of a memory cell.

[0058] [FIG. 12] (A) is a block diagram showing a configuration example of a word line driver circuit, and (B) is a circuit diagram showing a configuration example of a circuit LVC. [FIG. 12] FIG.

[0059] [ Fig.13 ]A diagram showing an input and output example of a word line driver circuit.

[0060] [Figure 14] (A, B, C) is a circuit diagram showing a structural example of a memory cell.

[0061] [Figure 15] (A, B, C, D) is a circuit diagram showing a structural example of a memory cell.

[0062] [Figure 16] (A, B, C) is a circuit diagram showing a structural example of a memory cell.

[0063] [ Fig.17 ] shows a cross-sectional view of a structural example of a semiconductor device.

[0064] [Figure 18] (A, B, C) are cross-sectional views showing structural examples of transistors.

[0065] [Figure 19] (A) shows a top view of a structural example of a transistor, and (B, C) show cross-sectional views of a structural example of a transistor.

[0066] [Figure 20] (A) shows a top view of a structural example of a transistor, and (B, C) show cross-sectional views of a structural example of a transistor.

[0067] [Figure 21] (A) shows a top view of a structural example of a transistor, and (B, C) show cross-sectional views of a structural example of a transistor.

[0068] [Figure 22] (A) shows a top view of a structural example of a transistor, and (B, C) show cross-sectional views of a structural example of a transistor.

[0069] [Figure 23] (A) shows a top view of a structural example of a transistor, and (B, C) show cross-sectional views of a structural example of a transistor.

[0070] [Figure 24] (A) is a top view showing a structural example of a transistor, and (B) is a stereoscopic view showing a structural example of a transistor.

[0071] [Figure 25] (A, B) are cross-sectional views showing structural examples of transistors.

[0072] [Figure 26] (A, C) are cross-sectional views of a transistor, and (B, D) are diagrams showing electrical characteristics of the transistor.

[0073] [Fig. 27] A diagram showing a structural example of an electronic device.

[0074] Modes for Carrying Out the Invention

[0075] The following describes the embodiments with reference to the accompanying drawings. It should be noted that a person skilled in the art can easily understand that the embodiments can be implemented in a plurality of different forms, and the methods and details can be transformed into various forms without departing from the purpose and scope of the present invention. Therefore, the present invention should not be interpreted as being limited to the contents described in the embodiments shown below.

[0076] The plurality of embodiments described below can be combined as appropriate. In addition, when a plurality of configuration examples are described in one embodiment, these configuration examples can be combined as appropriate with each other.

[0077] The block diagrams in this specification show components classified according to their functions in independent blocks; however, actual components are difficult to be clearly divided according to their functions, and one component may have a plurality of functions.

[0078] In the drawings, for the sake of convenience, the size, thickness of the layer or the region are sometimes exaggerated. Therefore, the present invention is not limited to the dimensions in the drawings. In the drawings, ideal examples are schematically shown, so the present invention is not limited to the shapes or numerical values ​​shown in the drawings.

[0079] In the drawings and the like, the same reference numerals may be used to indicate the same components, components having the same functions, components formed of the same material, components formed at the same time, and the like, and repeated descriptions may be omitted.

[0080] In this specification, "film" and "layer" may be interchanged. For example, "conductive layer" may be interchanged with "conductive film". Also, "insulating film" may be interchanged with "insulating layer".

[0081] In this specification, etc., words and phrases expressing arrangement such as "on" or "below" are not limited to the positional relationship of components being "directly above" or "directly below". For example, "a gate electrode on a gate insulating layer" includes a case where another component is included between the gate insulating layer and the gate electrode.

[0082] In addition, ordinal numbers such as “first”, “second”, and “third” in this specification and the like are provided to avoid confusion among constituent elements and are not used to limit the number.

[0083] In this specification, "electrical connection" includes connection through "an element having some kind of electrical function". Here, "an element having some kind of electrical function" is not particularly limited as long as it can transmit and receive electrical signals between the connected objects. For example, "an element having some kind of electrical function" includes not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other elements having various functions.

[0084] Note that in this specification, etc., "voltage" often refers to a potential difference between a certain potential and a reference potential (eg, ground potential). Therefore, voltage and potential difference can be interchanged.

[0085] In this specification, etc., a transistor refers to an element including at least three terminals: a gate, a drain, and a source. The transistor has a channel formation region between the drain (drain terminal, drain region, or drain electrode) and the source (source terminal, source region, or source electrode), and current can flow between the drain and the source through the channel formation region. Note that in this specification, etc., the channel formation region refers to a region where current mainly flows.

[0086] In addition, when transistors with different polarities are used or when the direction of current changes during circuit operation, the functions of the source and the drain may be interchanged. Therefore, in this specification, etc., the source and the drain may be interchanged.

[0087] In addition, in this specification, etc., unless otherwise specified, the off-state current refers to the drain current when the transistor is in the off state (also referred to as the non-conducting state or the blocking state). Unless otherwise specified, in an n-channel transistor, the off state refers to a state where the voltage Vgs of the gate to the source is lower than the threshold voltage Vth, and in a p-channel transistor, the off state refers to a state where the voltage Vgs of the gate to the source is higher than the threshold voltage Vth. In other words, the off-state current of an n-channel transistor sometimes refers to the drain current when the voltage Vgs of the gate to the source is lower than the threshold voltage Vth.

[0088] In the above description of the off-state current, the drain can be referred to as the source. That is, the off-state current sometimes refers to the source current when the transistor is in the off state. In addition, the leakage current sometimes means the same as the off-state current. In this specification, etc., the off-state current sometimes refers to the current flowing between the source and the drain when the transistor is in the off state.

[0089] In this specification, etc., metal oxide refers to an oxide of a metal in a broad sense. Metal oxides are classified into oxide insulators, oxide conductors (including transparent oxide conductors), oxide semiconductors (also called oxide semiconductors), and the like.

[0090] For example, when a metal oxide is used in the channel formation region of a transistor, the metal oxide is sometimes referred to as an oxide semiconductor. In other words, when the metal oxide has at least one of an amplification function, a rectification function, and a switching function, the metal oxide can be referred to as a metal oxide semiconductor (metal oxide semiconductor). That is, a transistor containing a metal oxide in a channel formation region can be referred to as an "oxide semiconductor transistor" or "OS transistor". Similarly, the above-mentioned "transistor using an oxide semiconductor" is also a transistor containing a metal oxide in a channel formation region.

[0091] In addition, in this specification, etc., a metal oxide containing nitrogen may also be referred to as a metal oxide. In addition, a metal oxide containing nitrogen may also be referred to as a metal oxynitride. The details of the metal oxide will be described later.

[0092] (Implementation Method 1)

[0093] In this embodiment, a configuration example of a storage device according to one embodiment of the present invention is described. A storage device according to one embodiment of the present invention is a storage device that can operate using semiconductor characteristics, and is also called a memory.

[0094] 〈Memory structure example〉

[0095] Figure 1 1 is a block diagram showing a configuration example of a memory 100 according to one embodiment of the present invention. The memory 100 includes a peripheral circuit 111 and a memory cell array 201. The peripheral circuit 111 includes a row decoder 121, a word line driver circuit 122, a bit line driver circuit 130, an output circuit 140, and a control logic circuit 160.

[0096] The bit line driver circuit 130 includes a column decoder 131, a precharge circuit 132, a sense amplifier 133, and a write circuit 134. The precharge circuit 132 has a function of precharging the wiring BL. The sense amplifier 133 has a function of amplifying a data signal read from the wiring BL, and the write circuit 134 has a function of writing a data signal to the wiring BL.

[0097] The wiring BL, the wiring WL, and the wiring WLB are connected to the memory cell 211 included in the memory cell array 201, and will be described in detail later. The amplified data signal is output to the outside of the memory 100 as a digital data signal RDATA through the output circuit 140.

[0098] As power supplies, the memory 100 is externally supplied with a low power supply potential VSS, a high power supply potential VDD for the peripheral circuit 111, a high power supply potential VIH for the memory cell array 201, a low power supply potential VBL for the memory cell array 201, and a high power supply potential VBH for the memory cell array 201.

[0099] Here, the high power supply potential VDD is a potential higher than the low power supply potential VSS. In addition, for example, the high power supply potential VIH may be a potential higher than the high power supply potential VDD, or the same potential as the high power supply potential VDD. For example, the high power supply potential VBH may be a potential lower than the high power supply potential VIH and higher than the low power supply potential VSS, or the same potential as the high power supply potential VIH. For example, the low power supply potential VBL may be a potential lower than the low power supply potential VSS, or the same potential as the low power supply potential VSS.

[0100] In addition, the low power supply potential VBL may be changed according to the temperature of the memory 100 or the temperature of the environment in which the memory 100 is installed. In addition, a part of the power supply potential may be generated in the memory 100.

[0101] Control signals (CE, WE, RE), an address signal ADDR, and a data signal WDATA are input from the outside to the memory 100. The address signal ADDR is input to the row decoder 121 and the column decoder 131, and the WDATA is input to the write circuit 134.

[0102] The control logic circuit 160 processes the input signals (CE, WE, RE) from the outside to generate control signals for the row decoder 121 and the column decoder 131. CE is a chip enable signal, WE is a write enable signal, and RE is a read enable signal. The signals processed by the control logic circuit 160 are not limited to these, and other control signals may be input as needed.

[0103] In the memory 100, the above-mentioned circuits, signals, and potentials may be appropriately used or omitted as necessary. Alternatively, other circuits, other signals, or other potentials may be added.

[0104] Here, an OS transistor can be applied to the transistor constituting the memory cell 211. Since the off-state current of the OS transistor is very small, the data written in the memory cell 211 can be retained for a long time. Therefore, the refresh frequency of the memory cell 211 can be reduced, and the memory 100 with low power consumption can be realized.

[0105] In addition, the OS transistor is a thin film transistor and can be stacked on a semiconductor substrate. For example, a Si transistor formed on a single crystal silicon substrate can be applied to the transistor constituting the peripheral circuit 111. The peripheral circuit 111 using the Si transistor can operate at high speed. In addition, the memory cell 211 using the OS transistor can be stacked above the peripheral circuit 111.

[0106] Figure 2A Detailed structure of the memory cell array 201 is shown. The memory cell array 201 includes m×n memory cells 211 per column (m is an integer greater than or equal to 1) and n memory cells 211 per row (n is an integer greater than or equal to 1), and the memory cells 211 are arranged in a matrix. Figure 2A The address of the storage unit 211 is also shown, and [1, 1], [m, 1], [i, j], [1, n], [m, n] (i is an integer greater than 1 and less than m, j is an integer greater than 1 and less than n) is the address of the storage unit 211.

[0107] In addition, each memory cell 211 is connected to a wiring BL, a wiring WL, and a wiring WLB. The memory cell array 201 includes n wirings BL (BL(1) to BL(n)), m wirings WL (WL(1) to WL(m)), and m wirings WLB (WLB(1) to WLB(m)). Figure 2AAs shown, the memory cell 211 of the address [i, j] is electrically connected to the word line driver circuit 122 through the wiring WL(i) and the wiring WLB(i), and is electrically connected to the bit line driver circuit 130 through the wiring BL(j).

[0108] 〈Memory cell structure example〉

[0109] Figure 2B is a circuit diagram showing a configuration example of the storage unit 211.

[0110] The memory cell 211 includes a transistor M11 and a capacitor CA. The transistor M11 includes a front gate (sometimes simply referred to as a gate) and a back gate.

[0111] One of the source and drain of the transistor M11 is electrically connected to the first terminal of the capacitor CA, and the other of the source and drain of the transistor M11 is connected to the wiring BL. The gate of the transistor M11 is connected to the wiring WL, and the back gate of the transistor M11 is connected to the wiring WLB. The second terminal of the capacitor CA is connected to the wiring CAL.

[0112] Wiring BL is used as a bit line, and wiring WL is used as a word line. Wiring CAL is used as wiring for applying a predetermined potential to the second terminal of capacitor CA. In addition, wiring WLB is used as wiring for applying a potential to the back gate of transistor M11. By applying an arbitrary potential to wiring WLB, the threshold voltage of transistor M11 can be increased or decreased.

[0113] The transistor M11 has a switch function that turns the first terminal of the capacitor CA and the wiring BL into a conductive state or a non-conductive state. By applying a high-level potential to the wiring WL, the first terminal of the capacitor CA and the wiring BL are turned into a conductive state, and data is written or read. That is, the memory cell 211 is a memory that stores data by accumulating charge in the capacitor CA, and the data stored in the memory cell 211 is written or read through the wiring BL and the transistor M11.

[0114] As the transistor M11, a transistor (OS transistor) containing a metal oxide in the channel formation region can be used. For example, a metal oxide containing any one of indium, element M (element M is aluminum, gallium, yttrium or tin) and zinc can be used in the channel formation region of the transistor M11. In particular, it is preferable to use a metal oxide composed of indium, gallium and zinc.

[0115] Since the off-state current of the OS transistor is very small, the data written in the memory cell 211 can be retained for a long time by using the OS transistor as the transistor M11. Therefore, the refresh frequency of the memory cell 211 can be reduced, and the memory 100 with low power consumption can be realized.

[0116] Alternatively, by using an OS transistor as the transistor M11 , it is not necessary to perform a refresh operation of the memory cell 211 . Alternatively, by using an OS transistor as the transistor M11 , multi-valued data or analog data can be held in the memory cell 211 .

[0117] By using an OS transistor as the transistor M11, the above-mentioned DOSRAM can be configured.

[0118] <Memory cell structure example 2>

[0119] The structure of the storage unit 211 is not limited to the above-described structure. Figure 3A The storage unit 212 shown is another structural example of the storage unit 211.

[0120] The memory cell 212 includes a transistor M12, a transistor M13, and a capacitor CB. The transistor M12 includes a front gate and a back gate.

[0121] One of the source and drain of the transistor M12 is electrically connected to the first terminal of the capacitor CB and the gate of the transistor M13, and the other of the source and drain of the transistor M12 is connected to the wiring WBL. The gate of the transistor M12 is connected to the wiring WL, and the back gate of the transistor M12 is connected to the wiring WLB. The second terminal of the capacitor CB is connected to the wiring CAL. One of the source and drain of the transistor M13 is connected to the wiring SL, and the other of the source and drain of the transistor M13 is connected to the wiring RBL.

[0122] Wiring WBL is used as a write bit line, wiring RBL is used as a read bit line, and wiring WL is used as a word line. Wiring CAL is used as wiring for applying a predetermined potential to the second terminal of capacitor CB. In addition, wiring WLB is used as wiring for applying a potential to the back gate of transistor M12. By applying an arbitrary potential to wiring WLB, the threshold voltage of transistor M12 can be increased or decreased.

[0123] The transistor M12 has a switch function for connecting or disconnecting the first terminal of the capacitor CB and the wiring WBL.

[0124] By applying a high-level potential to the wiring WL, the transistor M12 is turned on, and the first terminal of the capacitor CB is electrically connected to the wiring WBL to write data. Specifically, when the transistor M12 is turned on, a potential corresponding to the written data is applied to the wiring WBL, and the potential is written to the first terminal of the capacitor CB and the gate of the transistor M13. Then, a low-level potential is applied to the wiring WL, and the transistor M12 is turned off to maintain the potential of the first terminal of the capacitor CB and the potential of the gate of the transistor M13.

[0125] The data is read by applying a predetermined potential to the wiring SL. The current flowing between the source and drain of the transistor M13 depends on the potential of the gate of the transistor M13 and the potential of one of the source and drain of the transistor M13 (wiring SL), and the potential of the other of the source and drain of the transistor M13 is determined according to the above current. Therefore, by reading the potential of the wiring RBL connected to the other of the source and drain of the transistor M13, the potential maintained at the first terminal of the capacitor CB (or the gate of the transistor M13) can be read. In other words, the data written in the storage unit 212 can be read according to the potential maintained at the first terminal of the capacitor CB (or the gate of the transistor M13).

[0126] In addition, as the transistor M12, a transistor (OS transistor) containing a metal oxide in the channel formation region can be used. The off-state current of the OS transistor is very small, so by using the OS transistor as the transistor M12, the data written in the memory cell 212 can be retained for a long time. In addition, there is no particular limitation on the transistor M13. For example, as the transistor M13, both an OS transistor and a Si transistor can be used.

[0127] The memory cell 212 is a gain unit type memory cell of 2 transistors and 1 capacitor. The gain unit type memory cell can work as a memory by amplifying the accumulated charge using the closest transistor even when the capacitance of the capacitor is small. In addition, by using an OS transistor with a very small off-state current as the transistor M12, the accumulated charge can be maintained even during the period when the power supply is stopped, so that the memory cell 212 has the properties of a non-volatile memory. In this specification, etc., a memory composed of a gain unit type memory cell using an OS transistor is referred to as a "NOSRAM (Nonvolatile Oxide Semiconductor Random Access Memory)". NOSRAM rewrites data by using the charge and discharge of a capacitor, so in principle there is no limit to the number of times it can be rewritten.

[0128] Alternatively, the memory cell 212 may have a structure in which the wiring WBL and the wiring RBL are combined into one wiring BL. Figure 3B A structural example in which the wiring WBL and the wiring RBL are combined into one wiring BL is shown.

[0129] exist Figure 3BIn the memory cell 213 shown, the other of the source and drain of the transistor M12 and the other of the source and drain of the transistor M13 are connected to the wiring BL. That is, in the memory cell 213, the write bit line and the read bit line work as one wiring BL. At this time, when writing data, it is preferable to make the wiring SL in an electrically floating state.

[0130] <Memory cell structure example 3>

[0131] Alternatively, the memory cell 212 may be a gain unit type memory cell having three transistors and one capacitor. Figure 3C A configuration example is shown in which a gain unit type memory cell having three transistors and one capacitor is used as the memory cell 212 .

[0132] Figure 3C The memory cell 214 shown includes transistors M14 to M16 and a capacitor CC. The transistor M14 includes a front gate and a back gate.

[0133] One of the source and drain of the transistor M14 is electrically connected to the first terminal of the capacitor CC and the gate of the transistor M15, and the other of the source and drain of the transistor M14 is connected to the wiring BL. The gate of the transistor M14 is connected to the wiring WL, and the back gate of the transistor M14 is connected to the wiring WLB. The second terminal of the capacitor CC is electrically connected to the wiring CAL and one of the source and drain of the transistor M15, and the other of the source and drain of the transistor M15 is electrically connected to one of the source and drain of the transistor M16. The other of the source and drain of the transistor M16 is connected to the wiring BL, and the gate of the transistor M16 is connected to the wiring RWL.

[0134] Wiring BL is used as a bit line, wiring WL is used as a write word line, and wiring RWL is used as a read word line. Wiring CAL is used as wiring for applying a predetermined potential to the second terminal of capacitor CC (for example, applying a low-level potential as a predetermined potential). In addition, wiring WLB is used as wiring for applying a potential to the back gate of transistor M14. By applying an arbitrary potential to wiring WLB, the threshold voltage of transistor M14 can be increased or decreased.

[0135] The transistor M14 has a switch function for connecting or disconnecting the first terminal of the capacitor CC and the wiring BL, and the transistor M16 has a switch function for connecting or disconnecting the other of the source and the drain of the transistor M15 and the wiring BL.

[0136] By applying a high-level potential to the wiring WL, the transistor M14 is turned on, and the first terminal of the capacitor CC is electrically connected to the wiring BL to write data. Specifically, when the transistor M14 is turned on, a potential corresponding to the written data is applied to the wiring BL, and the potential is written to the first terminal of the capacitor CC and the gate of the transistor M15. Then, a low-level potential is applied to the wiring WL, and the transistor M14 is turned off to maintain the potential of the first terminal of the capacitor CC and the potential of the gate of the transistor M15.

[0137] Data is read by applying a predetermined potential (precharge) to the wiring BL, then making the wiring BL electrically floating, and applying a high-level potential to the wiring RWL. By applying a high-level potential to the wiring RWL, the transistor M16 is turned on, and the other of the source and drain of the transistor M15 is electrically connected to the wiring BL. At this time, a voltage corresponding to the potential difference between the wiring BL and the wiring CAL is applied between the source and drain of the transistor M15, and the current flowing between the source and drain of the transistor M15 depends on the potential of the gate of the transistor M15 and the voltage applied between the source and drain.

[0138] Here, since the potential of the wiring BL changes according to the current flowing between the source and the drain of the transistor M15, the potential of the first terminal of the capacitor CC (or the gate of the transistor M15) can be read by reading the potential of the wiring BL. In other words, the data written in the memory cell 214 can be read according to the potential held at the first terminal of the capacitor CC (or the gate of the transistor M15).

[0139] As the transistor M14, a transistor (OS transistor) containing a metal oxide in a channel formation region can be used. The off-state current of the OS transistor is very small, so by using the OS transistor as the transistor M14, the data written in the memory cell 214 can be retained for a long time. In addition, there is no particular limitation on the transistor M15 and the transistor 16. For example, as the transistor M15 and the transistor 16, both the OS transistor and the Si transistor can be used.

[0140] Note that although the reference FIG. 3A to FIG. 3C Although other configuration examples of the memory cell 211 have been described, the configuration examples of the memory cell 211 are not limited to these examples, and the circuit configuration can be changed as appropriate.

[0141] 〈Configuration Example of Word Line Driver Circuit〉

[0142] Figure 4A is a block diagram showing a configuration example of the word line driver circuit 122.

[0143] The word line driver circuit 122 has a function of driving the wiring WL used as a word line and the wiring WLB used as a wiring for applying a potential to the back gate of the transistor M11. The word line driver circuit 122 receives inputs of the signal WI and the signal WIB for driving the wiring WL and the wiring WLB from the row decoder 121. Here, the signal WI and the signal WIB are digital signals represented by a high level or a low level, and the signal WIB is an inversion signal obtained by inverting the logic of the signal WI.

[0144] Note that there are m wirings WL and WLB, so the number of signals WI and WIB is also m. Figure 4A In the example, they are denoted as WI(1) to WI(m) and WIB(1) to WIB(m).

[0145] Furthermore, since the row decoder 121 is supplied with the low power supply potential VSS and the high power supply potential VDD, the potential corresponding to the high level of the signals WI and WIB is the high power supply potential VDD, and the potential corresponding to the low level of the signals WI and WIB is the low power supply potential VSS.

[0146] On the other hand, in the memory cell array 201, the potential corresponding to the high level of the wiring WL is the high power supply potential VIH, and the potential corresponding to the low level of the wiring WL is the low power supply potential VSS. In addition, the potential corresponding to the high level of the wiring WLB is the high power supply potential VBH, and the potential corresponding to the low level of the wiring WLB is the low power supply potential VBL.

[0147] Therefore, the word line driver circuit 122 has a function of adjusting the high level and / or low level of the input signal (also referred to as a level adjustment function) and a function of adding the ability to drive the wiring WL and the wiring WLB to the input signal (also referred to as a buffer function). The word line driver circuit 122 includes m circuits LVB. Figure 4A In the example, they are denoted as LVB(1) to LVB(m).

[0148] 〈Configuration example of circuit LVB〉

[0149] Figure 4B is a circuit diagram showing a configuration example of the circuit LVB.

[0150] Circuit LVB includes n-channel transistors 11 to 21 and p-channel transistors 31 to 41. Circuit LVB also includes input terminal WI_IN, input terminal WIB_IN, wiring VIH_IN, wiring VSS_IN, wiring VBH_IN, wiring VBL_IN, output terminal WL_OUT, and output terminal WLB_OUT.

[0151] In the circuit LVB, a signal WI is input to the input terminal WI_IN, a signal WIB is input to the input terminal WIB_IN, a high power supply potential VIH is input to the wiring VIH_IN, a low power supply potential VSS is input to the wiring VSS_IN, a high power supply potential VBH is input to the wiring VBH_IN, and a low power supply potential VBL is input to the wiring VBL_IN. In addition, in the circuit LVB, a signal for driving the wiring WL is output from the output terminal WL_OUT, and a signal for driving the wiring WLB is output from the output terminal WLB_OUT.

[0152] Furthermore, in the circuit LVB, one of the source and the drain of the transistor 11 is electrically connected to the wiring VSS_IN, the other of the source and the drain of the transistor 11 is electrically connected to one of the source and the drain of the transistor 32 and the gate of the transistor 33, and the gate of the transistor 11 is electrically connected to the input terminal WI_IN and the gate of the transistor 32. The other of the source and the drain of the transistor 32 is electrically connected to one of the source and the drain of the transistor 31, and the other of the source and the drain of the transistor 31 is electrically connected to the wiring VIH_IN.

[0153] One of the source and drain of the transistor 12 is electrically connected to the wiring VSS_IN, the other of the source and drain of the transistor 12 is electrically connected to one of the source and drain of the transistor 34 and the gate of the transistor 31, and the gate of the transistor 12 is electrically connected to the input terminal WIB_IN and the gate of the transistor 34. The other of the source and drain of the transistor 34 is electrically connected to one of the source and drain of the transistor 33, and the other of the source and drain of the transistor 33 is electrically connected to the wiring VIH_IN. Here, the connection portion between the other of the source and drain of the transistor 34 and one of the source and drain of the transistor 33 is referred to as a node N11, and other elements electrically connected to the node N11 will be described later.

[0154] The transistor 11 , the transistor 12 , and the transistors 31 to 34 have a level adjustment function of converting the potential corresponding to the high level of the input signals WI and WIB from the high power supply potential VDD to the high power supply potential VIH.

[0155] Furthermore, in the circuit LVB, one of the source and the drain of the transistor 13 is electrically connected to the wiring VSS_IN, the other of the source and the drain of the transistor 13 is electrically connected to one of the source and the drain of the transistor 35, the gate of the transistor 14, and the gate of the transistor 36, and the gate of the transistor 13 is electrically connected to the node N11 and the gate of the transistor 35. The other of the source and the drain of the transistor 35 is electrically connected to the wiring VIH_IN.

[0156] One of the source and drain of the transistor 14 is electrically connected to the wiring VSS_IN, the other of the source and drain of the transistor 14 is electrically connected to one of the source and drain of the transistor 36 and the output terminal WL_OUT, and the other of the source and drain of the transistor 36 is electrically connected to the wiring VIH_IN.

[0157] The transistor 13 , the transistor 14 , the transistor 35 , and the transistor 36 have a function as a buffer for outputting a signal of the node N11 from the output terminal WL_OUT.

[0158] In the circuit LVB, one of the source and the drain of the transistor 15 is electrically connected to the wiring VSS_IN, the other of the source and the drain of the transistor 15 is electrically connected to one of the source and the drain of the transistor 37, the gate of the transistor 16, and the gate of the transistor 38, and the gate of the transistor 15 is electrically connected to the node N11 and the gate of the transistor 37. The other of the source and the drain of the transistor 37 is electrically connected to the wiring VBH_IN. Here, the connection portion of the other of the source and the drain of the transistor 15, one of the source and the drain of the transistor 37, the gate of the transistor 16, and the gate of the transistor 38 is referred to as a node N12, and other elements electrically connected to the node N12 will be described later.

[0159] One of the source and the drain of the transistor 16 is electrically connected to the wiring VSS_IN, the other of the source and the drain of the transistor 16 is electrically connected to one of the source and the drain of the transistor 38, and the other of the source and the drain of the transistor 38 is electrically connected to the wiring VBH_IN. Here, the connection portion between the other of the source and the drain of the transistor 16 and one of the source and the drain of the transistor 38 is referred to as a node N13, and other elements electrically connected to the node N13 will be described later.

[0160] The transistor 15, the transistor 16, the transistor 37, and the transistor 38 have a function of level adjustment for converting the potential of the high level corresponding to the signal of the node N11 from the high power supply potential VIH to the high power supply potential VBH, and a function of generating an inversion signal of the signal of the node N11. Note that the circuit formed by the transistor 15, the transistor 16, the transistor 37, and the transistor 38 is based on the condition that the high power supply potential VBH is a potential lower than the high power supply potential VIH and higher than the low power supply potential VSS or a potential equal to the high power supply potential VIH.

[0161] In addition, in the circuit LVB, one of the source and the drain of the transistor 18 is electrically connected to the wiring VBL_IN, the other of the source and the drain of the transistor 18 is electrically connected to one of the source and the drain of the transistor 17, the other of the source and the drain of the transistor 17 is electrically connected to one of the source and the drain of the transistor 39 and the gate of the transistor 20, and the other of the source and the drain of the transistor 39 is electrically connected to the wiring VBH_IN. The gate of the transistor 17 is electrically connected to the node N12 and the gate of the transistor 39.

[0162] One of the source and drain of the transistor 20 is electrically connected to the wiring VBL_IN, the other of the source and drain of the transistor 20 is electrically connected to one of the source and drain of the transistor 19, the other of the source and drain of the transistor 19 is electrically connected to one of the source and drain of the transistor 40 and the gate of the transistor 18, and the other of the source and drain of the transistor 40 is electrically connected to the wiring VBH_IN. The gate of the transistor 19 is electrically connected to the node N13 and the gate of the transistor 40. Here, the connection portion between the other of the source and drain of the transistor 20 and one of the source and drain of the transistor 19 is referred to as a node N14, and other elements electrically connected to the node N14 will be described later.

[0163] The transistors 17 to 20 , the transistor 39 , and the transistor 40 have a function of level adjustment to convert the potential of the low level corresponding to the signals at the nodes N12 and N13 from the low power supply potential VSS to the low power supply potential VBL.

[0164] Furthermore, in the circuit LVB, one of the source and the drain of the transistor 21 is electrically connected to the wiring VBL_IN, the other of the source and the drain of the transistor 21 is electrically connected to one of the source and the drain of the transistor 41 and the output terminal WLB_OUT, and the gate of the transistor 21 is electrically connected to the node N14 and the gate of the transistor 41. The other of the source and the drain of the transistor 41 is electrically connected to the wiring VBH_IN.

[0165] The transistor 21 and the transistor 41 have a function as a buffer for outputting a signal of the node N14 from the output terminal WLB_OUT.

[0166] 〈Input and output examples of word line driver circuit〉

[0167] Figure 5 1 is a diagram showing an example of input and output of the word line driver circuit 122 .

[0168] Reference Figure 5The relationship between the signal WI and the signal WIB input to the word line driver circuit 122 and the potential of the wiring WL and the wiring WLB driven by the word line driver circuit 122 is described. There are m signals WI, WIB, wiring WL, and wiring WLB, and thus, one of them (WI(i), WIB(i), WL(i), and WLB(i)) is used as an example for description (i is an integer greater than 1 and less than m).

[0169] Figure 5 The vertical axis represents potentials, and represents the high power supply potential VIH, the high power supply potential VDD, the high power supply potential VBH, the low power supply potential VSS, and the low power supply potential VBL in descending order.

[0170] Figure 5 T11 and T12 represent the time. Figure 5 The diagram shows a case where the wiring WL(i) and the wiring WLB(i) are driven at almost the same time as the input of the signal WI(i) and the signal WIB(i). Note that in reality, there may be a delay time between the input of the signal WI(i) and the signal WIB(i) and the driving of the wiring WL(i) and the wiring WLB(i), and the signal may have distortion or noise. Figure 5 The waveform of the ideal case is shown.

[0171] like Figure 5 As shown, the signal WI(i) and the signal WIB(i) are digital signals that represent a high level or a low level by using a high power supply potential VDD or a low power supply potential VSS. When data is written or read from the memory cell 211 electrically connected to the wiring WL(i) and the wiring WLB(i), the signal WI(i) becomes a high level (the signal WIB is an inverted signal of the signal WI, and thus becomes a low level).

[0172] The word line driver circuit 122 outputs a low power supply potential VSS to the wiring WL(i) when the signal WI(i) is at a low level, and outputs a high power supply potential VIH to the wiring WL(i) when the signal WI(i) is at a high level. In addition, the word line driver circuit 122 outputs a low power supply potential VBL to the wiring WLB(i) when the signal WI(i) is at a low level, and outputs a high power supply potential VBH to the wiring WLB(i) when the signal WI(i) is at a high level.

[0173] In this way, the word line driver circuit 122 changes the high level and / or low level of the signal WI(i) and the signal WIB(i) to drive the wiring WL(i) and the wiring WLB(i).

[0174] 〈Low power supply potential VBL〉

[0175] Here, the low power supply potential VBL is a potential that can be changed according to the temperature of the memory 100 or the temperature of the environment in which the memory 100 is installed. As described above, the low power supply potential VBL may be supplied from outside the memory 100 or may be generated in the memory 100.

[0176] Fig. 6A : is a block diagram showing a configuration example of a power supply device that generates a low power supply potential VBL.

[0177] Fig. 6A The power supply device 150 shown includes a potential generating circuit 50, a potential generating circuit 51, a temperature sensor circuit 52, and a buffer 53. The potential generating circuit 50 is electrically connected to one input terminal of the temperature sensor circuit 52, the potential generating circuit 51 is electrically connected to the other input terminal of the temperature sensor circuit 52, and the output terminal of the temperature sensor circuit 52 is electrically connected to the buffer 53.

[0178] Here, the potential generating circuit 50 generates the potential VBL_MIN, the potential generating circuit 51 generates the potential VBL_MAX, and the temperature sensor circuit 52 generates the potential V_SNS. The potential V_SNS generated by the temperature sensor circuit 52 is input to the buffer 53, and the buffer 53 outputs the low power supply potential VBL to the output terminal PW_OUT included in the power supply device 150. Note that in the power supply device 150, the low power supply potential VSS may be used as the potential VBL_MAX without providing the potential generating circuit 51.

[0179] In addition, if Figure 6B 1, the power supply device 150 may also include a switch SW1, a switch SW2, and a capacitor C11. After the switch SW1 and the switch SW2 are turned on so that the temperature sensor circuit 52 generates the potential V_SNS, the potential V_SNS is held in the capacitor C11, so that the switch SW1 and the switch SW2 can be turned off. By turning the switch SW1 and the switch SW2 off, the power consumption of the power supply device 151 can be reduced. That is, the power supply device 151 can be configured to achieve low power consumption by discontinuously performing temperature measurement by turning the switch SW1 and the switch SW2 on or off.

[0180] Then, in Fig. 7A and Figure 7B 2 shows a configuration example of a circuit 54 and a circuit 55 that can be applied to the potential generating circuit 50 and the potential generating circuit 51 .

[0181] Circuit 54 and circuit 55 are step-down charge pumps, whose input terminal IN is input with low power supply potential VSS, and output potential VBL_MIN or potential VBL_MAX from output terminal OUT. Here, as an example, the number of stages of the basic circuit of the charge pump circuit is 4, but it is not limited to this, and the charge pump circuit can also be configured with any number of stages.

[0182] Fig. 7A The circuit 54 shown includes transistors M21 to M24 and capacitors C21 to C24. Note that the transistors M21 to M24 are n-channel transistors.

[0183] The transistors M21 to M24 are connected in series between the input terminal IN and the output terminal OUT. In the transistors M21 to M24, each gate is electrically connected to one of the source and the drain, so that the transistors M21 to M24 are used as diodes. In addition, the gates of the transistors M21 to M24 are electrically connected to the capacitors C21 to C24, respectively.

[0184] The clock signal CLK is input to one electrode of the capacitors C21 and C23 of the odd number stages, and the clock signal CLKB is input to one electrode of the capacitors C22 and C24 of the even number stages. The clock signal CLKB is an inverted clock signal obtained by inverting the phase of the clock signal CLK.

[0185] The circuit 54 has a function of stepping down the low power supply potential VSS input to the input terminal IN to generate the potential VBL_MIN or the potential VBL_MAX. The circuit 54 can generate the potential VBL_MIN or the potential VBL_MAX by stepping down the low power supply potential VSS only by supplying the clock signal CLK and the clock signal CLKB.

[0186] Figure 7B The circuit 55 shown is composed of transistors M31 to M34 which are p-channel transistors. The description of the circuit 54 is used for the other components.

[0187] <Configuration example of temperature sensor circuit>

[0188] Then, in FIG. 8A to FIG. 8C 2 shows a configuration example of the temperature sensor circuit 52.

[0189] FIG. 8A to FIG. 8C The temperature sensor circuit 52 shown includes input terminal IN1, input terminal IN2, and output terminal OUT. In the power supply device 150, the temperature sensor circuit 52 receives a potential VBL_MAX at input terminal IN1, receives a potential VBL_MIN at input terminal IN2, and outputs a potential V_SNS at output terminal OUT.

[0190] Fig. 8A The temperature sensor circuit 52 shown includes a resistor element R11 and a temperature measuring resistor 56. One terminal of the temperature measuring resistor 56 is electrically connected to the input terminal IN1, and the other terminal of the temperature measuring resistor 56 is electrically connected to the output terminal OUT and one terminal of the resistor element R11. The other terminal of the resistor element R11 is electrically connected to the input terminal IN2.

[0191] As the temperature measuring resistor 56, platinum, nickel, copper, etc. can be used, for example. Platinum, nickel, copper, etc. have a property that their resistance increases when the temperature rises. Fig. 8A The temperature sensor circuit 52 shown has a property that the potential of the output terminal OUT approaches the potential of the input terminal IN2 when the temperature rises. In other words, when the temperature rises, the potential V_SNS approaches the potential VBL_MIN.

[0192] Figure 8B The temperature sensor circuit 52 shown includes a resistor R11 and a thermistor 57. One terminal of the resistor R11 is electrically connected to the input terminal IN1, and the other terminal of the resistor R11 is electrically connected to the output terminal OUT and one terminal of the thermistor 57. The other terminal of the thermistor 57 is electrically connected to the input terminal IN2.

[0193] Here, the thermistor 57 is an example of an NTC (negative temperature coefficient) thermistor. NTC thermistors have the property that their resistance decreases as the temperature rises. Figure 8B The temperature sensor circuit 52 shown has a property that the potential of the output terminal OUT approaches the potential of the input terminal IN2 when the temperature rises. In other words, when the temperature rises, the potential V_SNS approaches the potential VBL_MIN.

[0194] Figure 8C The temperature sensor circuit 52 shown includes a resistor R11 and a transistor M41. One terminal of the resistor R11 is electrically connected to the input terminal IN1, and the other terminal of the resistor R11 is electrically connected to the output terminal OUT, one of the source and drain of the transistor M41, and the gate of the transistor M41. The other of the source and drain of the transistor M41 is electrically connected to the input terminal IN2.

[0195] Here, the transistor M41 is an OS transistor. Fig.8D The figure shows the relationship between the voltage Vgs of the gate relative to the source and the current Ids flowing between the source and the drain when a certain voltage is applied between the source and the drain of the OS transistor.

[0196] like Fig.8D As shown, the OS transistor has the property that the threshold voltage drifts more negatively and the on-state current increases as the temperature increases. In other words, the OS transistor has the property that the resistance between the source and the drain decreases as the temperature increases. Figure 8C The temperature sensor circuit 52 shown has a property that the potential of the output terminal OUT approaches the potential of the input terminal IN2 when the temperature rises. In other words, when the temperature rises, the potential V_SNS approaches the potential VBL_MIN.

[0197] In addition, as another configuration example of the temperature sensor circuit 52 , the temperature sensor circuit 52 may include a plurality of temperature measuring resistors, thermistors, or OS transistors. 9A to 9C The temperature sensor circuit 52 shown is an example including a plurality of thermistors.

[0198] Fig.9A The temperature sensor circuit 52 shown includes a resistor element R11, a thermistor 58, and a thermistor 59. One terminal of the resistor element R11 is electrically connected to the input terminal IN1, and the other terminal of the resistor element R11 is electrically connected to the output terminal OUT and one terminal of the thermistor 58 and the thermistor 59. The other terminals of the thermistor 58 and the thermistor 59 are electrically connected to the input terminal IN2. That is, Fig.9A The temperature sensor circuit 52 shown has a structure in which a thermistor 58 and a thermistor 59 are connected in parallel. As the thermistor 58 and thermistor 59, thermistors having different properties can be used.

[0199] Fig. 9B The temperature sensor circuit 52 shown includes a resistor element R11, a thermistor 60, and a thermistor 61. One terminal of the resistor element R11 is electrically connected to the input terminal IN1, and the other terminal of the resistor element R11 is electrically connected to the output terminal OUT and one terminal of the thermistor 60. The other terminal of the thermistor 60 is electrically connected to one terminal of the thermistor 61, and the other terminal of the thermistor 61 is electrically connected to the input terminal IN2. That is, Fig. 9B The temperature sensor circuit 52 shown has a structure in which a thermistor 60 and a thermistor 61 are connected in series. As the thermistor 60 and thermistor 61, thermistors having different properties can be used.

[0200] Fig. 9CThe temperature sensor circuit 52 shown includes a resistor element R11 and thermistors 62 to 64. One terminal of the resistor element R11 is electrically connected to the input terminal IN1, and the other terminal of the resistor element R11 is electrically connected to the output terminal OUT and one terminal of the thermistor 62. The other terminal of the thermistor 62 is electrically connected to one terminal of the thermistor 63 and the thermistor 64, and the other terminals of the thermistor 63 and the thermistor 64 are electrically connected to the input terminal IN2. That is, Fig. 9C The temperature sensor circuit 52 shown has a structure in which thermistors 62 to 64 are connected in series and in parallel. As thermistors 62 to 64, thermistors having different properties can be used.

[0201] For example, when the characteristics of the transistor such as the threshold voltage or on-state current show nonlinear changes with respect to temperature, the following can be used: 9A to 9C As shown, the temperature sensor circuit 52 includes a plurality of temperature measuring resistors, thermistors, or OS transistors to adjust the potential of the output terminal OUT with respect to the temperature.

[0202] Note that FIG. 8A to FIG. 8C and 9A to 9C , but the configuration example of the temperature sensor circuit 52 is not limited thereto. The temperature sensor circuit 52 may be configured using a thermocouple or a PTC (positive temperature coefficient) thermistor, or an IC temperature sensor may be used for the temperature sensor circuit 52.

[0203] Furthermore, the power supply device 150 outputs the potential V_SNS generated by the temperature sensor circuit 52 from the output terminal PW_OUT via the buffer 53. In this way, the power supply device 150 generates the low power supply potential VBL.

[0204] Also, like the low power supply potential VBL, the high potential VBH may be a potential that can be changed according to the temperature of the memory 100 or the temperature of the environment in which the memory 100 is installed. In this case, the power supply device is preferably configured so that the high power supply potential VBH increases as the temperature decreases.

[0205] 〈Transistor M11〉

[0206] On the other hand, when an OS transistor is used as the transistor M11 included in the memory cell 211, the transistor M11 also has Fig.8DThe property shown. In the OS transistor, the higher the temperature, the more the threshold voltage drifts in the negative direction, the on-state current increases, but at the same time the subthreshold coefficient increases. As a result, when the gate voltage Vgs relative to the source is 0V, the current Ids (also called the cut-off current) flowing between the source and the drain increases, thereby shortening the retention time of the data written in the memory cell 211.

[0207] In addition, in the OS transistor, the threshold voltage shifts more positively as the temperature decreases, and the on-state current decreases. As a result, the time required to write or read data increases, causing the operating speed of the memory 100 to decrease.

[0208] In addition, in an OS transistor, the threshold voltage can be increased or decreased by applying a potential to the back gate. Specifically, in an OS transistor, when the potential applied to the back gate is increased, the threshold voltage drifts in the negative direction, and when the potential applied to the back gate is decreased, the threshold voltage drifts in the positive direction.

[0209] That is, when writing or reading data, by increasing the potential applied to the back gate, the on-state current of the OS transistor can be increased. In addition, when retaining data, by reducing the potential applied to the back gate, the threshold voltage drifts in the positive direction, and the cut-off current can be reduced. Therefore, the data retention time can be extended.

[0210] In particular, when the temperature of the memory 100 is high, the data retention time can be extended by lowering the low power supply potential VBL.

[0211] As described above, when the memory cell 211 writes or reads data, the word line driver circuit 122 outputs the high power supply potential VBH to the wiring WLB, and the potential applied to the back gate of the transistor M11 can be increased. When the memory cell 211 retains data, the word line driver circuit 122 outputs the low power supply potential VBL to the wiring WLB, and the potential applied to the back gate of the transistor M11 can be reduced. In addition, when the temperature of the memory 100 is high, the power supply device 150 that generates the low power supply potential VBL can reduce the low power supply potential VBL.

[0212] Thus, when the memory cell 211 writes or reads data, by increasing the potential applied to the back gate of the transistor M11, the memory 100 can operate at a high speed even when the temperature of the memory 100 is low. Conversely, when the memory cell 211 retains data, by reducing the potential applied to the back gate of the transistor M11, the memory 100 can retain data for a long time. In particular, when the temperature of the memory 100 is high, the data retention time can be extended by further reducing the potential applied to the back gate.

[0213] The memory 100 is a storage device that realizes both a retention operation at a high temperature and a high-speed operation at a low temperature.

[0214] In addition, this embodiment mode can be implemented in combination with other embodiment modes described in this specification as appropriate.

[0215] (Implementation Method 2)

[0216] The transistors M11, M12, and M14 included in the memory cells 211 to 214 described in the above embodiments may also be transistors that do not include a back gate. Alternatively, the memory cell array 201 described in the above embodiments may also have a structure that does not include a wiring WLB. In this embodiment, other structural examples of the memory 100 described in the above embodiments are described.

[0217] 〈Memory structure example〉

[0218] Fig.10 1 is a block diagram showing an example of the structure of the memory 101. The memory 101 is different from the memory 100 in that the memory 101 includes a memory cell array 202 and a word line driver circuit 123 instead of the memory cell array 201 and the word line driver circuit 122, and is not supplied with a high power supply potential VBH. Note that the description of the memory 100 is used for the parts of the memory 101 that have the same structure as the memory 100.

[0219] Fig.11A 2 shows a detailed structure of the memory cell array 202. The memory cell array 202 differs from the memory cell array 201 in that the memory cell array 202 includes a memory cell 221 instead of the memory cell 211 and does not include a wiring WLB. Regarding the parts of the memory cell array 202 that have the same structure as the memory cell array 201, the description of the memory cell array 201 is cited.

[0220] Each memory device 221 is connected to a wiring BL and a wiring WL. The memory cell array 202 includes n wirings BL (BL(1) to BL(n)) and m wirings WL (WL(1) to WL(m)) (m and n are integers greater than 1). Fig.11A As shown, the storage cell 221 of address [i, j] is electrically connected to the word line driver circuit 123 through the wiring WL(i), and is electrically connected to the bit line driver circuit 130 through the wiring BL(j) (i is an integer greater than 1 and less than m, and j is an integer greater than 1 and less than n).

[0221] 〈Memory cell structure example〉

[0222] Fig. 11B is a circuit diagram showing a configuration example of the storage unit 221.

[0223] The memory cell 221 includes a transistor M51 and a capacitor CA. Regarding the parts of the memory cell 221 that have the same structure as the memory cell 211, the description of the memory cell 211 is used.

[0224] One of the source and the drain of the transistor M51 is electrically connected to the first terminal of the capacitor CA, and the other of the source and the drain of the transistor M51 is connected to the wiring BL. The gate of the transistor M51 is connected to the wiring WL. The second terminal of the capacitor CA is connected to the wiring CAL.

[0225] A transistor including a metal oxide in a channel formation region (OS transistor) can be used as the transistor M51. Since the off-state current of the OS transistor is very small, by using the OS transistor as the transistor M51, data written in the memory cell 221 can be retained for a long time.

[0226] 〈Configuration Example of Word Line Driver Circuit〉

[0227] Fig. 12A 2 is a block diagram showing a configuration example of the word line driver circuit 123.

[0228] The word line driver circuit 123 has a function of driving the wiring WL used as a word line. The word line driver circuit 123 receives the signal WI and the signal WIB for driving the wiring WL from the row decoder 121. Here, the signal WI and the signal WIB are digital signals represented by a high level or a low level, and the signal WIB is an inversion signal obtained by inverting the logic of the signal WI.

[0229] Note that there are m wirings WL, so the number of signals WI and WIB is also m. Fig. 12A In the example, they are denoted as WI(1) to WI(m) and WIB(1) to WIB(m).

[0230] In addition, the potential corresponding to the high level of the signal WI and the signal WIB is the high power supply potential VDD, and the potential corresponding to the low level of the signal WI and the signal WIB is the low power supply potential VSS. However, the word line driver circuit 123 has the function of converting the potential corresponding to the high level and the potential corresponding to the low level into the high power supply potential VIH and the low power supply potential VBL, respectively, and outputting them to the wiring WL.

[0231] The word line driver circuit 123 adjusts the high level and low level of the input signal (level adjustment) and adds the ability to drive the wiring WL (buffer) to the input signal, so the word line driver circuit 123 includes m circuits LVC. Fig. 12A In the example, they are denoted as LVC(1) to LVC(m).

[0232] 〈Configuration example of circuit LVC〉

[0233] Fig. 12B : is a circuit diagram showing a configuration example of the circuit LVC.

[0234] The circuit LVC includes n-channel transistors 71 to 79 and p-channel transistors 81 to 89. The circuit LVC also includes an input terminal WI_IN, an input terminal WIB_IN, a wiring VIH_IN, a wiring VSS_IN, a wiring VBL_IN, and an output terminal WL_OUT.

[0235] In the circuit LVC, the input terminal WI_IN receives the signal WI, the input terminal WIB_IN receives the signal WIB, the wiring VIH_IN receives the high power supply potential VIH, the wiring VSS_IN receives the low power supply potential VSS, and the wiring VBL_IN receives the low power supply potential VBL. In the circuit LVC, the output terminal WL_OUT outputs the signal for driving the wiring WL.

[0236] Furthermore, in the circuit LVC, one of the source and the drain of the transistor 71 is electrically connected to the wiring VSS_IN, the other of the source and the drain of the transistor 71 is electrically connected to one of the source and the drain of the transistor 82 and the gate of the transistor 83, and the gate of the transistor 71 is electrically connected to the input terminal WI_IN and the gate of the transistor 82. The other of the source and the drain of the transistor 82 is electrically connected to one of the source and the drain of the transistor 81, and the other of the source and the drain of the transistor 81 is electrically connected to the wiring VIH_IN.

[0237] One of the source and drain of the transistor 72 is electrically connected to the wiring VSS_IN, the other of the source and drain of the transistor 72 is electrically connected to one of the source and drain of the transistor 84 and the gate of the transistor 81, and the gate of the transistor 72 is electrically connected to the input terminal WIB_IN and the gate of the transistor 84. The other of the source and drain of the transistor 84 is electrically connected to one of the source and drain of the transistor 83, and the other of the source and drain of the transistor 83 is electrically connected to the wiring VIH_IN. Here, the connection portion between the other of the source and drain of the transistor 84 and one of the source and drain of the transistor 83 is referred to as a node N21, and other elements electrically connected to the node N21 will be described later.

[0238] The transistor 71 , the transistor 72 , and the transistors 81 to 84 have a level adjustment function of converting the potential corresponding to the high level of the inputted signals WI and WIB from the high power supply potential VDD to the high power supply potential VIH.

[0239] In addition, in the circuit LVC, one of the source and the drain of the transistor 73 is electrically connected to the wiring VSS_IN, the other of the source and the drain of the transistor 73 is electrically connected to one of the source and the drain of the transistor 85, the gate of the transistor 74, and the gate of the transistor 86, and the gate of the transistor 73 is electrically connected to the node N21 and the gate of the transistor 85. The other of the source and the drain of the transistor 85 is electrically connected to the wiring VIH_IN. Here, the connection portion of the other of the source and the drain of the transistor 73, one of the source and the drain of the transistor 85, the gate of the transistor 74, and the gate of the transistor 86 is referred to as a node N22, and other elements electrically connected to the node N22 will be described later.

[0240] One of the source and the drain of the transistor 74 is electrically connected to the wiring VSS_IN, the other of the source and the drain of the transistor 74 is electrically connected to one of the source and the drain of the transistor 86, and the other of the source and the drain of the transistor 86 is electrically connected to the wiring VIH_IN. Here, the connection portion between the other of the source and the drain of the transistor 74 and one of the source and the drain of the transistor 86 is referred to as a node N23, and other elements electrically connected to the node N23 will be described later.

[0241] The transistor 73 and the transistor 85 have a function of generating an inversion signal of the signal at the node N21. The transistor 74 and the transistor 86 have a function of generating an inversion signal of the signal at the node N22.

[0242] In addition, in the circuit LVC, one of the source and the drain of the transistor 76 is electrically connected to the wiring VBL_IN, the other of the source and the drain of the transistor 76 is electrically connected to one of the source and the drain of the transistor 75, the other of the source and the drain of the transistor 75 is electrically connected to one of the source and the drain of the transistor 87 and the gate of the transistor 78, and the other of the source and the drain of the transistor 87 is electrically connected to the wiring VIH_IN. The gate of the transistor 75 is electrically connected to the node N22 and the gate of the transistor 87.

[0243] One of the source and drain of transistor 78 is electrically connected to wiring VBL_IN, the other of the source and drain of transistor 78 is electrically connected to one of the source and drain of transistor 77, the other of the source and drain of transistor 77 is electrically connected to one of the source and drain of transistor 88 and the gate of transistor 76, and the other of the source and drain of transistor 88 is electrically connected to wiring VIH_IN. The gate of transistor 77 is electrically connected to node N23 and the gate of transistor 88. Here, the connection portion between the other of the source and drain of transistor 78 and one of the source and drain of transistor 77 is referred to as node N24, and other elements electrically connected to node N24 will be described later.

[0244] The transistors 75 to 78 , the transistor 87 , and the transistor 88 have a function of level adjustment to convert the low-level potential of the signals corresponding to the nodes N22 and N23 from the low power supply potential VSS to the low power supply potential VBL.

[0245] Furthermore, in the circuit LVC, one of the source and the drain of the transistor 79 is electrically connected to the wiring VBL_IN, the other of the source and the drain of the transistor 79 is electrically connected to one of the source and the drain of the transistor 89 and the output terminal WL_OUT, and the gate of the transistor 79 is electrically connected to the node N24 and the gate of the transistor 89. The other of the source and the drain of the transistor 89 is electrically connected to the wiring VIH_IN.

[0246] Transistor 79 and transistor 89 function as a buffer for outputting a signal of node N24 from output terminal WL_OUT.

[0247] 〈Input and output examples of word line driver circuit〉

[0248] Fig.13 1 is a diagram showing an example of input and output of the word line driver circuit 123 .

[0249] Reference Fig.13 The relationship between the signal WI and the signal WIB input to the word line driver circuit 123 and the potential of the wiring WL driven by the word line driver circuit 123 is described. There are m signals WI, m signals WIB, and m wirings WL, and thus, one of them (WI(i), WIB(i), and WL(i)) is used as an example for description (i is an integer greater than 1 and less than m).

[0250] Fig.13 The vertical axis represents potentials, and represents, in order of increasing potential, a high power supply potential VIH, a high power supply potential VDD, a low power supply potential VSS, and a low power supply potential VBL.

[0251] Fig.13 T11 and T12 represent the time. Fig.13 The diagram shows a case where the wiring WL(i) is driven at almost the same time as the input of the signal WI(i) and the signal WIB(i). Note that in reality, there may be a delay time between the input of the signal WI(i) and the signal WIB(i) and the driving of the wiring WL(i), and the signal may have distortion or noise. Fig.13 The waveform of the ideal case is shown.

[0252] like Fig.13As shown, the signal WI(i) and the signal WIB(i) are digital signals that represent a high level or a low level by using a high power supply potential VDD or a low power supply potential VSS. When data is written or read from the memory cell 221 electrically connected to the wiring WL(i), the signal WI(i) becomes a high level (the signal WIB is an inverted signal of the signal WI, and thus becomes a low level).

[0253] The word line driver circuit 123 outputs a low power supply potential VBL to the wiring WL(i) when the signal WI(i) is at a low level, and outputs a high power supply potential VIH to the wiring WL(i) when the signal WI(i) is at a high level.

[0254] In this way, the word line driver circuit 123 changes the high level and the low level of the signal WI(i) and the signal WIB(i) to drive the wiring WL(i).

[0255] The description of the memory 100 is referred to for the description of the low power supply potential VBL and the temperature sensor circuit 52 .

[0256] 〈Transistor M51〉

[0257] like Fig.8D As shown in FIG. 1 , when an OS transistor is used as the transistor M51 included in the memory cell 221, in the OS transistor, the higher the temperature, the more the threshold voltage drifts in the negative direction, and the subthreshold coefficient increases. Therefore, when the voltage Vgs of the gate relative to the source is 0V, the current Ids (off current) flowing between the source and the drain increases, thereby shortening the retention time of the data written in the memory cell 221.

[0258] In addition, in the OS transistor, the threshold voltage shifts more positively as the temperature decreases, thereby reducing the on-state current and increasing the time required for writing or reading data, resulting in a decrease in the operating speed of the memory 101 .

[0259] When the memory cell 221 writes or reads data, the word line driver circuit 123 outputs a high power supply potential VIH to the wiring WL. The high power supply potential VIH can be a potential higher than the high power supply potential VDD, so the memory 101 can operate at a high speed. In addition, when the memory cell 221 retains data, the word line driver circuit 123 outputs a low power supply potential VBL to the wiring WL. The low power supply potential VBL can be a potential lower than the low power supply potential VSS, so the memory 101 can retain data for a long time.

[0260] In particular, when the temperature of the memory 101 is high, the power supply device 150 that generates the low power supply potential VBL can lower the low power supply potential VBL, thereby extending the data retention time of the memory 101.

[0261] In addition, since the transistor M51 does not include a back gate, the manufacturing process of the memory 101 can be shortened compared to the manufacturing process of the memory 100. In addition, since the memory cell array 202 does not include the wiring WLB, the configuration density of the memory cell can be improved compared to the memory cell array 201. In addition, sometimes the potential difference between the low power supply potential VBL and the low power supply potential VSS in the memory 101 can be smaller than the potential difference between the low power supply potential VBL and the low power supply potential VSS in the memory 100.

[0262] In addition, similar to the storage cells 212 to 214 , the storage cell 221 may be a gain unit type storage cell. FIG. 14A to FIG. 14C A configuration example in which a gain cell type memory cell is used as the memory cell 221 is shown.

[0263] Fig.14A The illustrated memory cell 222 includes a transistor M52 instead of the transistor M12 in the memory cell 212, and does not include a wiring WLB. Fig. 14B The illustrated memory cell 223 includes a transistor M52 instead of the transistor M12 in the memory cell 213, and does not include a wiring WLB. Fig. 14C The memory cell 224 shown includes a transistor M54 instead of the transistor M14 in the memory cell 214, and does not include a wiring WLB. Regarding other structures, the memory cells 222 to 224 are respectively the same as the memory cells 212 to 214, and thus the description of the memory cells 212 to 214 is used. In addition, transistors (OS transistors) containing metal oxide in the channel formation region can be used as the transistors M52 and M54.

[0264] In addition, similarly to the memory cells 211 to 214 , the memory cells 221 to 224 can use transistors including back gates.

[0265] FIG. 15A to FIG. 15D The memory cells 231 to 234 shown include transistors M11, M12, and M14, which respectively replace the transistors M51, M52, and M54 in the memory cells 221 to 224. The transistors M11, M12, and M14 are transistors including front gates and back gates described in the above embodiments.

[0266] In the memory cells 231 to 234, the back gates of the transistors M11, M12, and M14 are electrically connected to their front gates, respectively. By electrically connecting the back gates of the transistors M11, M12, and M14 to their front gates, respectively, the on-state currents of the transistors M11, M12, and M14 can be increased. Alternatively, even if the high power supply potential VIH is reduced, the on-state current required for the operation of the memory 101 can be ensured. By reducing the high power supply potential VIH, the power consumption of the memory 101 can be reduced.

[0267] In addition, in the memory cells 232 to 234 , transistors including back gates may be used as the transistors M13 , M15 , and M16 .

[0268] FIG. 16A to FIG. 16C The memory cells 242 to 244 shown include transistors M53, M55, and M56, which respectively replace the transistors M13, M15, and M16 in the memory cells 232 to 234. The transistors M53, M55, and M56 are transistors including a front gate and a back gate.

[0269] In the memory cells 242 to 244, the back gates of the transistors M53, M55, and M56 are electrically connected to their front gates, respectively. By electrically connecting the back gates of the transistors M53, M55, and M56 to their front gates, respectively, the on-state currents of the transistors M53, M55, and M56 can be increased. Alternatively, even if the channel widths of the transistors M53, M55, and M56 are reduced, the on-state current required for the operation of the memory 101 can be ensured. Alternatively, the capacity of the storage element CB or the storage element CC can be reduced.

[0270] In this way, the memory 101 is a storage device that realizes both a retention operation at a high temperature and a high-speed operation at a low temperature, and can be combined with various memory cells.

[0271] In addition, this embodiment mode can be implemented in combination with other embodiment modes described in this specification as appropriate.

[0272] (Implementation 3)

[0273] In this embodiment, a structural example of the Si transistor described in the above embodiment which can be applied to the peripheral circuit 111 and the OS transistor which can be applied to the memory cell 211 is described. Note that in this embodiment, the above Si transistor and OS transistor are collectively referred to as a semiconductor device.

[0274] <Structural example of semiconductor device>

[0275] Fig.17 The semiconductor device shown includes a transistor 300 , a transistor 500 , and a capacitor 600 . Fig.18A is a cross-sectional view of the transistor 500 in the channel length direction, Fig.18B is a cross-sectional view of the transistor 500 in the channel width direction, Fig.18C is a cross-sectional view of the transistor 300 in the channel width direction.

[0276] The transistor 500 is a transistor (OS transistor) including a metal oxide in a channel formation region. Since the off-state current of the transistor 500 is small, the storage content can be retained for a long period of time by using the OS transistor in a semiconductor device. In other words, the frequency of the refresh operation is low or the refresh operation is not required, so the power consumption of the semiconductor device can be reduced.

[0277] like Fig.17 As shown in FIG. 1 , the semiconductor device described in this embodiment includes a transistor 300 , a transistor 500 , and a capacitor 600 . The transistor 500 is provided above the transistor 300 , and the capacitor 600 is provided above the transistor 300 and the transistor 500 .

[0278] The transistor 300 is provided on a substrate 311 and includes a conductor 316, an insulator 315, a semiconductor region 313 formed by a portion of the substrate 311, and low resistance regions 314a and 314b used as source regions or drain regions.

[0279] like Fig.18C As shown, in the transistor 300, the conductor 316 covers the top surface and the side surface in the channel width direction of the semiconductor region 313 via the insulator 315. In this way, by making the transistor 300 have a Fin-type structure, the effective channel width increases, so the on-state characteristics of the transistor 300 can be improved. In addition, since the influence of the electric field of the gate electrode can be increased, the off-state characteristics of the transistor 300 can be improved.

[0280] In addition, transistor 300 may be a p-channel transistor or an n-channel transistor.

[0281] The channel formation region of the semiconductor region 313 or the region near it, the low resistance region 314a and the low resistance region 314b used as the source region or the drain region preferably include semiconductors such as silicon-based semiconductors, and more preferably include single crystal silicon. In addition, it can also be formed using materials including Ge (germanium), SiGe (silicon germanium), GaAs (gallium arsenide), GaAlAs (gallium aluminum arsenic), etc. Silicon that applies stress to the lattice and changes the interplanar spacing to control the effective mass can be used. In addition, the transistor 300 can also be a HEMT (High Electron Mobility Transistor) using GaAs and GaAlAs, etc.

[0282] The low resistance regions 314 a and 314 b contain, in addition to the semiconductor material used for the semiconductor region 313 , an element imparting n-type conductivity such as arsenic and phosphorus or an element imparting p-type conductivity such as boron.

[0283] As the conductor 316 used as the gate electrode, a conductive material such as a semiconductor material such as silicon, a metal material, an alloy material, or a metal oxide material containing an element imparting n-type conductivity such as arsenic and phosphorus or an element imparting p-type conductivity such as boron can be used.

[0284] In addition, since the material of the conductor determines the work function, Vth can be adjusted by changing the material of the conductor. Specifically, materials such as titanium nitride or tantalum nitride are preferably used as the conductor. In order to have both conductivity and embeddability, a laminate of metal materials such as tungsten or aluminum is preferably used as the conductor, and tungsten is particularly preferred in terms of heat resistance.

[0285] Notice, Fig.17 The structure of the transistor 300 shown is only an example, and the structure is not limited to the above structure. An appropriate transistor may be used according to the circuit structure or the driving method. For example, similar to the transistor 500, an oxide semiconductor may be used in the transistor 300.

[0286] An insulator 320 , an insulator 322 , an insulator 324 , and an insulator 326 are stacked in this order so as to cover the transistor 300 .

[0287] As the insulator 320 , the insulator 322 , the insulator 324 , and the insulator 326 , for example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, aluminum oxynitride, aluminum nitride oxide, or aluminum nitride can be used.

[0288] The insulator 322 may also be used as a planarization film for planarizing a step generated by the transistor 300 disposed thereunder, etc. For example, in order to improve the planarity of the top surface of the insulator 322, the top surface may be planarized by a planarization process such as chemical mechanical polishing (CMP).

[0289] As the insulator 324 , a film having a barrier property that can prevent hydrogen or impurities from diffusing from the substrate 311 , the transistor 300 , or the like into a region where the transistor 500 is provided is preferably used.

[0290] As an example of a film having a barrier property against hydrogen, for example, silicon nitride formed by a CVD method can be used. Here, hydrogen sometimes diffuses into a semiconductor element having an oxide semiconductor such as transistor 500, resulting in a decrease in the characteristics of the semiconductor element. Therefore, it is preferred to provide a film that inhibits the diffusion of hydrogen between transistor 500 and transistor 300. Specifically, the film that inhibits the diffusion of hydrogen refers to a film with a small amount of hydrogen released.

[0291] The amount of hydrogen released can be measured, for example, by thermal desorption spectroscopy (TDS). For example, when the amount of hydrogen released is converted to the amount per unit area of ​​the insulator 324 when the film surface temperature in the TDS analysis is in the range of 50°C to 500°C, the amount of hydrogen released from the insulator 324 is 10×10 15 atoms / cm 2 Below, preferably 5×10 15 atoms / cm 2 The following is enough.

[0292] Note that the dielectric constant of the insulator 326 is preferably lower than that of the insulator 324. For example, the relative dielectric constant of the insulator 326 is preferably lower than 4, more preferably lower than 3. For example, the relative dielectric constant of the insulator 326 is preferably 0.7 times or less, more preferably 0.6 times or less, the relative dielectric constant of the insulator 324. By using a material with a low dielectric constant for the interlayer film, parasitic capacitance generated between wirings can be reduced.

[0293] In addition, conductors 328 and 330 connected to capacitor 600 and transistor 500 are embedded in insulators 320, 322, 324, and 326. In addition, conductors 328 and 330 have the function of plugs or wiring. Note that the same reference numeral is sometimes used to represent a plurality of conductors having the function of plugs or wiring. In addition, in this specification, wiring and a plug connected to wiring may also be one component. That is, a part of a conductor is sometimes used as wiring, and a part of a conductor is sometimes used as a plug.

[0294] As the material of each plug and wiring (conductor 328 and conductor 330, etc.), a single layer or a laminate of a conductive material such as a metal material, an alloy material, a metal nitride material or a metal oxide material can be used. It is preferred to use a high melting point material such as tungsten or molybdenum that has both heat resistance and conductivity, and tungsten is particularly preferred. Alternatively, it is preferred to use a low-resistance conductive material such as aluminum or copper. By using a low-resistance conductive material, the wiring resistance can be reduced.

[0295] A wiring layer may be formed on the insulator 326 and the conductor 330. Fig.17 In the embodiment of the present invention, an insulator 350, an insulator 352, and an insulator 354 are stacked in this order. Furthermore, a conductor 356 is formed in the insulator 350, the insulator 352, and the insulator 354. The conductor 356 has a function of a plug or wiring connected to the transistor 300. The conductor 356 can be formed using the same material as the conductor 328 and the conductor 330.

[0296] In addition, similar to the insulator 324, the insulator 350 preferably uses an insulator having a barrier property to hydrogen, for example. In addition, the conductor 356 preferably includes a conductor having a barrier property to hydrogen. In particular, the conductor having a barrier property to hydrogen is formed in the opening of the insulator 350 having a barrier property to hydrogen. By adopting this structure, the transistor 300 and the transistor 500 can be separated by using a barrier layer, so that the diffusion of hydrogen from the transistor 300 to the transistor 500 can be suppressed.

[0297] Note that as a conductor having a barrier property to hydrogen, for example, tantalum nitride is preferably used. Furthermore, by stacking tantalum nitride and tungsten having high conductivity, it is possible to maintain conductivity as a wiring and suppress diffusion of hydrogen from the transistor 300. At this time, the tantalum nitride layer having a barrier property to hydrogen is preferably in contact with the insulator 350 having a barrier property to hydrogen.

[0298] Alternatively, a wiring layer may be formed on the insulator 354 and the conductor 356. Fig.17 In the embodiment, an insulator 360, an insulator 362, and an insulator 364 are stacked in this order. In addition, a conductor 366 is formed in the insulator 360, the insulator 362, and the insulator 364. The conductor 366 has a function of a plug or wiring. In addition, the conductor 366 can be formed using the same material as the conductor 328 and the conductor 330.

[0299] In addition, similar to the insulator 324, the insulator 360 preferably uses an insulator having a barrier property to hydrogen. In addition, the conductor 366 preferably includes a conductor having a barrier property to hydrogen. In particular, the conductor having a barrier property to hydrogen is formed in the opening of the insulator 360 having a barrier property to hydrogen. By adopting this structure, the transistor 300 and the transistor 500 can be separated by using a barrier layer, so that the diffusion of hydrogen from the transistor 300 to the transistor 500 can be suppressed.

[0300] Alternatively, a wiring layer may be formed on the insulator 364 and the conductor 366. Fig.17 In the embodiment, an insulator 370, an insulator 372, and an insulator 374 are stacked in this order. In addition, a conductor 376 is formed in the insulator 370, the insulator 372, and the insulator 374. The conductor 376 has a function of a plug or wiring. In addition, the conductor 376 can be formed using the same material as the conductor 328 and the conductor 330.

[0301] In addition, similar to the insulator 324, the insulator 370 preferably uses an insulator having a barrier property to hydrogen. In addition, the conductor 376 preferably includes a conductor having a barrier property to hydrogen. In particular, the conductor having a barrier property to hydrogen is formed in the opening of the insulator 370 having a barrier property to hydrogen. By adopting this structure, the transistor 300 and the transistor 500 can be separated by using a barrier layer, so that the diffusion of hydrogen from the transistor 300 to the transistor 500 can be suppressed.

[0302] Alternatively, a wiring layer may be formed on the insulator 374 and the conductor 376. Fig.17 In the embodiment, an insulator 380, an insulator 382, ​​and an insulator 384 are stacked in this order. In addition, a conductor 386 is formed in the insulator 380, the insulator 382, ​​and the insulator 384. The conductor 386 has a function of a plug or wiring. In addition, the conductor 386 can be formed using the same material as the conductor 328 and the conductor 330.

[0303] In addition, similar to the insulator 324, the insulator 380 preferably uses an insulator having a barrier property to hydrogen. In addition, the conductor 386 preferably includes a conductor having a barrier property to hydrogen. In particular, the conductor having a barrier property to hydrogen is formed in the opening of the insulator 380 having a barrier property to hydrogen. By adopting this structure, the transistor 300 and the transistor 500 can be separated by using a barrier layer, so that the diffusion of hydrogen from the transistor 300 to the transistor 500 can be suppressed.

[0304] In the above description, the wiring layer including the conductor 356, the wiring layer including the conductor 366, the wiring layer including the conductor 376, and the wiring layer including the conductor 386 are described, but the semiconductor device of this embodiment is not limited thereto. The number of wiring layers similar to the wiring layer including the conductor 356 may be three or less, and the number of wiring layers similar to the wiring layer including the conductor 356 may be five or more.

[0305] An insulator 510, an insulator 512, an insulator 514, and an insulator 516 are sequentially stacked on the insulator 384. As at least any one of the insulator 510, the insulator 512, the insulator 514, and the insulator 516, a substance having a barrier property against oxygen or hydrogen is preferably used.

[0306] For example, a film having a barrier property that can prevent hydrogen or impurities from diffusing from the substrate 311 or a region where the transistor 300 is provided into a region where the transistor 500 is provided is preferably used as the insulator 510 and the insulator 514. Therefore, the insulator 510 and the insulator 514 can use the same material as the insulator 324.

[0307] As an example of a film having a barrier property against hydrogen, silicon nitride formed by a CVD method can be used. Here, hydrogen sometimes diffuses into a semiconductor element having an oxide semiconductor such as transistor 500, resulting in a decrease in the characteristics of the semiconductor element. Therefore, it is preferred to provide a film that inhibits the diffusion of hydrogen between transistor 300 and transistor 500. Specifically, the film that inhibits the diffusion of hydrogen refers to a film with a small amount of hydrogen released.

[0308] For example, as a film having a barrier property against hydrogen, the insulator 510 and the insulator 514 are preferably made of a metal oxide such as aluminum oxide, hafnium oxide, or tantalum oxide.

[0309] In particular, aluminum oxide has a high barrier effect of preventing oxygen and impurities such as hydrogen and moisture that cause changes in the electrical characteristics of the transistor from passing through. Therefore, during and after the manufacturing process of the transistor, aluminum oxide can prevent impurities such as hydrogen and moisture from entering the transistor 500. In addition, aluminum oxide can suppress the release of oxygen from the oxide constituting the transistor 500. Therefore, aluminum oxide is suitable for use as a protective film for the transistor 500.

[0310] For example, the insulator 512 and the insulator 516 can use the same material as the insulator 320. In addition, by forming the interlayer film with a material having a low dielectric constant, the parasitic capacitance generated between the wirings can be reduced. For example, the insulator 512 and the insulator 516 can use a silicon oxide film, a silicon oxynitride film, or the like.

[0311] In addition, a conductor 518 and a conductor (conductor 503) constituting the transistor 500 are embedded in the insulator 510, the insulator 512, the insulator 514, and the insulator 516. The conductor 518 is used as a plug or wiring connected to the capacitor 600 or the transistor 300. The conductor 518 can be formed using the same material as the conductors 328 and 330.

[0312] In particular, the conductor 518 in the region in contact with the insulator 510 and the insulator 514 is preferably a conductor having a barrier property to oxygen, hydrogen, and water. By adopting this structure, the transistor 300 and the transistor 500 can be separated by a layer having a barrier property to oxygen, hydrogen, and water, thereby suppressing the diffusion of hydrogen from the transistor 300 to the transistor 500.

[0313] The transistor 500 is provided above the insulator 516 .

[0314] like Fig.18A and Fig.18B As shown, transistor 500 includes: a conductor 503 embedded in insulators 512 and 516; an insulator 520 disposed on insulators 516 and conductor 503; an insulator 522 disposed on insulator 520; an insulator 524 disposed on insulator 522; an oxide 530a disposed on insulator 524; an oxide 530b disposed on oxide 530a; and conductors 542a and 542b disposed on oxide 530b and separated from each other. ; an insulator 580 disposed on the conductor 542a and the conductor 542b and having an opening overlapping with the conductor 542a and the conductor 542b; a conductor 560 disposed in the opening; an insulator 550 disposed between the oxide 530b, the conductor 542a, the conductor 542b, and the insulator 580 and the conductor 560; an oxide 530c disposed between the oxide 530b, the conductor 542a, the conductor 542b, and the insulator 580 and the conductor 550.

[0315] In addition, if Fig.18A and Fig.18B As shown in FIG. 5 , an insulator 544 is preferably disposed between the oxide 530a, the oxide 530b, the conductor 542a, the conductor 542b, and the insulator 580. Fig.18A and Fig.18B As shown in FIG. 5 , the conductor 560 preferably includes a conductor 560a disposed inside the insulator 550 and a conductor 560b embedded inside the conductor 560a. Fig.18A and Fig.18B As shown, an insulator 574 is preferably arranged on the insulator 580 , the conductor 560 , and the insulator 550 .

[0316] Note that hereinafter, the oxide 530a, the oxide 530b, and the oxide 530c may be collectively referred to as an oxide 530. Also, the conductor 542a and the conductor 542b may be collectively referred to as a conductor 542.

[0317] In transistor 500, three layers of oxide 530a, oxide 530b, and oxide 530c are stacked in the region where the channel is formed and in the vicinity thereof, but the present invention is not limited to this. For example, a single layer of oxide 530b, a two-layer structure of oxide 530b and oxide 530a, a two-layer structure of oxide 530b and oxide 530c, or a stacked structure of four or more layers may be provided. In addition, in transistor 500, conductor 560 has a two-layer structure, but the present invention is not limited to this. For example, conductor 560 may also have a single-layer structure or a stacked structure of three or more layers. Note that, Fig.17 , Fig.18A , Fig.18B The structure of the transistor 500 shown is only an example and is not limited to the above structure, and an appropriate transistor can be used according to the circuit structure or driving method.

[0318] Here, the conductor 560 is used as the gate electrode of the transistor, and the conductor 542a and the conductor 542b are used as the source electrode or the drain electrode. As described above, the conductor 560 is buried in the opening of the insulator 580 and in the area sandwiched between the conductor 542a and the conductor 542b. The configuration of the conductor 560, the conductor 542a and the conductor 542b relative to the opening of the insulator 580 is selected in a self-aligned manner. In other words, in the transistor 500, the gate electrode can be configured in a self-aligned manner between the source electrode and the drain electrode. Thus, the conductor 560 can be formed in a manner without providing room for alignment, so that the occupied area of ​​the transistor 500 can be reduced. Thus, miniaturization and high integration of semiconductor devices can be achieved.

[0319] Furthermore, since the conductor 560 is formed in a self-aligned manner in the region between the conductor 542a and the conductor 542b, the conductor 560 does not include a region overlapping with the conductor 542a and the conductor 542b. Thus, the parasitic capacitance formed between the conductor 560 and the conductor 542a and the conductor 542b can be reduced. Therefore, the switching speed of the transistor 500 can be increased, so that the transistor 500 can have high frequency characteristics.

[0320] Conductor 560 is sometimes used as a first gate (also called a top gate) electrode. Conductor 503 is sometimes used as a second gate (also called a bottom gate) electrode. In this case, by independently changing the potential supplied to conductor 503 without linking it with the potential supplied to conductor 560, the Vth of transistor 500 can be controlled. In particular, by supplying a negative potential to conductor 503, the Vth of transistor 500 can be made greater than 0V and the off-state current can be reduced. Therefore, compared to when a negative potential is not applied to conductor 503, when a negative potential is applied to conductor 503, the drain current when the potential supplied to conductor 560 is 0V can be reduced.

[0321] The conductor 503 is arranged so as to overlap with the oxide 530 and the conductor 560. Thus, when a potential is supplied to the conductor 560 and the conductor 503, the electric field generated from the conductor 560 and the electric field generated from the conductor 503 are connected, and a channel formation region formed in the oxide 530 can be covered. In this specification, etc., a structure of a transistor in which a channel formation region is electrically surrounded by the electric field of the first gate electrode and the electric field of the second gate electrode is referred to as a surrounded channel (S-channel) structure.

[0322] The conductor 503 has the same structure as the conductor 518 , and the conductor 503 a is formed so as to be in contact with the inner walls of the openings of the insulator 514 and the insulator 516 , and the conductor 503 b is formed inside the conductor 503 a .

[0323] Insulator 520 , insulator 522 , insulator 524 , and insulator 550 are used as gate insulators.

[0324] Here, the insulator 524 in contact with the oxide 530 preferably contains oxygen exceeding the stoichiometric composition. In other words, it is preferable to form an excess oxygen region in the insulator 524. By providing the insulator containing excess oxygen in contact with the oxide 530, oxygen vacancies in the oxide 530 can be reduced, thereby improving the reliability of the transistor 500.

[0325] Specifically, as an insulator having an excess oxygen region, an oxide material from which a portion of oxygen is released by heating is preferably used. An oxide from which oxygen is released by heating means that the amount of oxygen released in terms of oxygen atoms in TDS (Thermal Desorption Spectroscopy) analysis is 1.0×10 18 atoms / cm 3 Above, preferably 1.0×10 19 atoms / cm 3 More preferably, 2.0×10 19atoms / cm 3 Above, or 3.0×10 20 atoms / cm 3 In addition, the surface temperature of the film when performing the above-mentioned TDS analysis is preferably in the range of 100° C. to 700° C., or 100° C. to 400° C.

[0326] When the insulator 524 has an excess oxygen region, the insulator 524 preferably has a function of suppressing diffusion of oxygen (for example, oxygen atoms, oxygen molecules, etc.) (making it difficult for the oxygen to permeate).

[0327] When the insulator 522 has a function of suppressing diffusion of oxygen or impurities, it is preferable because oxygen included in the oxide 530 does not diffuse toward the insulator 520. In addition, reaction between the conductor 503 and oxygen included in the insulator 524 or the oxide 530 can be suppressed.

[0328] As the insulator 522, for example, a single layer or a stack of insulators containing so-called high-k materials such as aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO3) or (Ba, Sr)TiO3 (BST) is preferably used. When miniaturization and high integration of transistors are performed, problems such as leakage current sometimes occur due to the thin film of the gate insulator. By using a high-k material as an insulator used as a gate insulator, the gate potential when the transistor is operating can be reduced while maintaining the physical thickness.

[0329] In particular, it is preferable to use an insulator containing an oxide of one or both of aluminum and hafnium as an insulating material having a function of suppressing the diffusion of impurities and oxygen (not allowing the above oxygen to pass easily). As an insulator containing an oxide of one or both of aluminum and hafnium, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), etc. are preferably used. When the insulator 522 is formed using such a material, the insulator 522 is used as a layer that suppresses the release of oxygen from the oxide 530 or the entry of impurities such as hydrogen into the oxide 530 from the surrounding part of the transistor 500.

[0330] Alternatively, for example, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, or zirconium oxide may be added to the insulator. In addition, the insulator may be nitrided. Silicon oxide, silicon oxynitride, or silicon nitride may be stacked on the insulator.

[0331] The insulator 520 preferably has thermal stability. For example, silicon oxide and silicon oxynitride are preferred because they have thermal stability. In addition, by combining an insulator of a high-k material with silicon oxide or silicon oxynitride, an insulator 520 having a laminated structure with thermal stability and a high relative dielectric constant can be formed.

[0332] The insulator 520, the insulator 522, and the insulator 524 may have a stacked structure of two or more layers. In this case, the stacked structure is not limited to being made of the same material, and may be a stacked structure made of different materials.

[0333] In the transistor 500, a metal oxide used as an oxide semiconductor is preferably used for the oxide 530 including the channel formation region. For example, a metal oxide such as In-M-Zn oxide (the element M is one or more selected from aluminum, gallium, yttrium, copper, vanadium, beryllium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium) is preferably used as the oxide 530. In addition, In-Ga oxide and In-Zn oxide may also be used as the oxide 530.

[0334] The metal oxide used as the channel formation region in the oxide 530 preferably has a band gap of 2 eV or more, preferably 2.5 eV or more. By using a metal oxide with a wide band gap, the off-state current of the transistor can be reduced.

[0335] In the oxide 530, when the oxide 530a is provided below the oxide 530b, impurities can be prevented from diffusing from the structure formed below the oxide 530a to the oxide 530b. When the oxide 530c is provided above the oxide 530b, impurities can be prevented from diffusing from the structure formed above the oxide 530c to the oxide 530b.

[0336] In addition, the oxide 530 preferably has a stacked structure of oxides having different atomic number ratios of each metal atom. Specifically, the atomic number ratio of the element M in the constituent elements of the metal oxide used for the oxide 530a is preferably greater than the atomic number ratio of the element M in the constituent elements of the metal oxide used for the oxide 530b. In addition, the atomic number ratio of the element M relative to In in the metal oxide used for the oxide 530a is preferably greater than the atomic number ratio of the element M relative to In in the metal oxide used for the oxide 530b. In addition, the atomic number ratio of In relative to the element M in the metal oxide used for the oxide 530b is preferably greater than the atomic number ratio of In relative to the element M in the metal oxide used for the oxide 530a. In addition, the metal oxide that can be used for the oxide 530a or the oxide 530b can be used for the oxide 530c.

[0337] It is preferable that the energy of the conduction band bottom of the oxide 530a and the oxide 530c is higher than the energy of the conduction band bottom of the oxide 530b. In other words, the electron affinity of the oxide 530a and the oxide 530c is preferably lower than the electron affinity of the oxide 530b.

[0338] Here, in the junction of oxide 530a, oxide 530b, and oxide 530c, the energy level of the conduction band bottom changes smoothly. In other words, the above situation can also be expressed as the energy level of the conduction band bottom of the junction of oxide 530a, oxide 530b, and oxide 530c continuously changes or continuously joins. For this reason, it is preferable to reduce the defect state density of the mixed layer formed at the interface between oxide 530a and oxide 530b and the interface between oxide 530b and oxide 530c.

[0339] Specifically, by making the oxide 530a and the oxide 530b, and the oxide 530b and the oxide 530c contain a common element (as a main component) in addition to oxygen, a mixed layer with a low defect state density can be formed. For example, when the oxide 530b is an In-Ga-Zn oxide, In-Ga-Zn oxide, Ga-Zn oxide, gallium oxide, etc. are preferably used as the oxide 530a and the oxide 530c.

[0340] At this time, the main path of the carrier is oxide 530b. By making oxide 530a and oxide 530c have the above structure, the defect state density at the interface between oxide 530a and oxide 530b and the interface between oxide 530b and oxide 530c can be reduced. Therefore, the influence of interface scattering on carrier conduction is reduced, and the on-state current of transistor 500 can be increased.

[0341] A conductor 542 (conductor 542a and conductor 542b) used as a source electrode and a drain electrode is provided on the oxide 530b. As the conductor 542, a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium and lanthanum, an alloy containing the above metal elements as a component, or an alloy combining the above metal elements is preferably used. For example, tantalum nitride, titanium nitride, tungsten, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel, etc. are preferably used. In addition, tantalum nitride, titanium nitride, nitride containing titanium and aluminum, nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxide containing strontium and ruthenium, and oxide containing lanthanum and nickel are conductive materials that are not easily oxidized or materials that maintain conductivity even when absorbing oxygen, and therefore are preferred.

[0342] In addition, if Fig.18AAs shown, a region 543 (region 543a and region 543b) is sometimes formed as a low resistance region at the interface between the oxide 530 and the conductor 542 and in the vicinity thereof. In this case, the region 543a is used as one of the source region and the drain region, and the region 543b is used as the other of the source region and the drain region. In addition, a channel formation region is formed in a region sandwiched between the region 543a and the region 543b.

[0343] By forming the conductor 542 in contact with the oxide 530, the oxygen concentration of the region 543 may be reduced. In addition, a metal compound layer including a metal contained in the conductor 542 and a component of the oxide 530 may be formed in the region 543. In this case, the carrier density of the region 543 increases, and the region 543 becomes a low resistance region.

[0344] The insulator 544 is provided so as to cover the conductor 542 and suppress oxidation of the conductor 542. In this case, the insulator 544 may be provided so as to cover the side surface of the oxide 530 and to be in contact with the insulator 524.

[0345] As the insulator 544, a metal oxide containing one or two or more selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, magnesium, and the like can be used.

[0346] In particular, as the insulator 544, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), etc., which are insulators containing oxides of one or both of aluminum and hafnium, are preferably used. In particular, hafnium aluminate has higher heat resistance than hafnium oxide film. Therefore, it is not easy to crystallize in the heat treatment of the subsequent process, so it is preferred. In addition, when the conductor 542 is a material with oxidation resistance or its conductivity does not significantly decrease even if oxygen is absorbed, it is not necessary to provide the insulator 544. It can be designed appropriately according to the required transistor characteristics.

[0347] The insulator 550 is used as a gate insulator. The insulator 550 is preferably arranged in contact with the inner side (top surface and side surface) of the oxide 530c. The insulator 550 is preferably formed using an insulator that releases oxygen by heating. For example, a thermal desorption spectrum analysis (TDS analysis) of 1.0×10 18 atoms / cm 3 Above, preferably 1.0×10 19 atoms / cm 3 More preferably, 2.0×10 19 atoms / cm 3 Above, or 3.0×10 20 atoms / cm 3In addition, the surface temperature of the film when performing the above-mentioned TDS analysis is preferably in the range of 100° C. to 700° C.

[0348] Specifically, silicon oxide containing excess oxygen, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide to which fluorine is added, silicon oxide to which carbon is added, silicon oxide to which carbon and nitrogen are added, silicon oxide having pores, etc. In particular, silicon oxide and silicon oxynitride are preferred because they have thermal stability.

[0349] By providing an insulator that releases oxygen by heating so as to be in contact with the top surface of the oxide 530c as the insulator 550, oxygen can be efficiently supplied from the insulator 550 to the channel formation region of the oxide 530b through the oxide 530c. In addition, as with the insulator 524, it is preferable to reduce the concentration of impurities such as water or hydrogen in the insulator 550. The thickness of the insulator 550 is preferably not less than 1 nm and not more than 20 nm.

[0350] In order to efficiently supply the excess oxygen contained in the insulator 550 to the oxide 530, a metal oxide may be provided between the insulator 550 and the conductor 560. The metal oxide preferably suppresses the diffusion of oxygen from the insulator 550 to the conductor 560. By providing a metal oxide that suppresses the diffusion of oxygen, the diffusion of excess oxygen from the insulator 550 to the conductor 560 is suppressed. In other words, the reduction of excess oxygen supplied to the oxide 530 can be suppressed. In addition, the oxidation of the conductor 560 due to excess oxygen can be suppressed. As the metal oxide, a material that can be used for the insulator 544 can be used.

[0351] exist Fig.18A and Fig.18B In the embodiment, the conductor 560 used as the first gate electrode has a two-layer structure, but may have a single-layer structure or a stacked-layer structure of three or more layers.

[0352] As the conductor 560a, it is preferred to use a conductive material having a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), copper atoms, etc. In addition, it is preferred to use a conductive material having a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.). By making the conductor 560a have the function of suppressing the diffusion of oxygen, it is possible to suppress the decrease in conductivity due to oxidation of the conductor 560b caused by the oxygen contained in the insulator 550. As a conductive material having a function of suppressing the diffusion of oxygen, for example, tantalum, tantalum nitride, ruthenium, or ruthenium oxide, etc., are preferably used.

[0353] As the conductor 560b, it is preferable to use a conductive material mainly composed of tungsten, copper or aluminum. Since the conductor 560b is also used as wiring, it is preferable to use a conductor with high conductivity. For example, a conductive material mainly composed of tungsten, copper or aluminum can be used. The conductor 560b may also have a laminated structure, for example, a laminated structure of titanium, titanium nitride and the above conductive materials can be used.

[0354] The insulator 580 is preferably provided on the conductor 542 via the insulator 544. The insulator 580 preferably has an excess oxygen region. For example, the insulator 580 preferably includes silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide added with fluorine, silicon oxide added with carbon, silicon oxide added with carbon and nitrogen, silicon oxide with pores, or resin. In particular, silicon oxide and silicon oxynitride are thermally stable and therefore are preferred. In particular, silicon oxide and silicon oxide with pores are preferred because they are easy to form an excess oxygen region in the subsequent process.

[0355] The insulator 580 preferably has an excess oxygen region. By providing the insulator 580 that releases oxygen by heating in contact with the oxide 530c, the oxygen in the insulator 580 can be efficiently supplied to the oxide 530 through the oxide 530c. In addition, the concentration of impurities such as water and hydrogen in the insulator 580 is preferably reduced.

[0356] The opening of the insulator 580 is formed so as to overlap with the region between the conductor 542a and the conductor 542b. Thus, the conductor 560 is embedded in the opening of the insulator 580 and in the region between the conductor 542a and the conductor 542b.

[0357] When miniaturizing semiconductor devices, it is necessary to shorten the gate length, but it is necessary to prevent the conductivity of the conductor 560 from decreasing. For this reason, when the thickness of the conductor 560 is increased, the conductor 560 may have a shape with a high aspect ratio. In this embodiment, since the conductor 560 is buried in the opening of the insulator 580, even if the conductor 560 has a shape with a high aspect ratio, the conductor 560 does not collapse during the process.

[0358] The insulator 574 is preferably provided so as to be aligned with the top surface of the insulator 580, the top surface of the conductor 560, and the top surface of the insulator 550. By forming the insulator 574 by sputtering, an excess oxygen region can be formed in the insulator 550 and the insulator 580. Thus, oxygen can be supplied to the oxide 530 from the excess oxygen region.

[0359] For example, as the insulator 574, a metal oxide containing one or two or more selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, magnesium, and the like can be used.

[0360] In particular, aluminum oxide has high barrier properties and can inhibit the diffusion of hydrogen and nitrogen even in a thin film of 0.5 nm to 3.0 nm. Therefore, aluminum oxide formed by sputtering can be used as an oxygen supply source while also functioning as a barrier film for impurities such as hydrogen.

[0361] In addition, an insulator 581 used as an interlayer film is preferably provided over the insulator 574. As with the insulator 524 and the like, the concentration of impurities such as water and hydrogen in the insulator 581 is preferably reduced.

[0362] In addition, conductors 540a and 540b are arranged in openings formed in insulators 581, 574, 580, and 544. Conductors 540a and 540b are arranged to face each other via conductor 560. Conductors 540a and 540b have the same structure as conductors 546 and 548 described later.

[0363] An insulator 582 is provided on the insulator 581. A substance having a barrier property against oxygen or hydrogen is preferably used for the insulator 582. Therefore, the insulator 582 can be made of the same material as the insulator 514. For example, the insulator 582 is preferably made of a metal oxide such as aluminum oxide, hafnium oxide, or tantalum oxide.

[0364] In particular, aluminum oxide has a high barrier effect of preventing oxygen and impurities such as hydrogen and moisture that cause changes in the electrical characteristics of the transistor from penetrating. Therefore, during and after the manufacturing process of the transistor, aluminum oxide can prevent impurities such as hydrogen and moisture from entering the transistor 500. In addition, aluminum oxide can suppress the release of oxygen from the oxide constituting the transistor 500. Therefore, aluminum oxide is suitable for use as a protective film for the transistor 500.

[0365] In addition, an insulator 586 is provided on the insulator 582. As the insulator 586, the same material as the insulator 320 can be used. In addition, by forming the interlayer film with a material having a low dielectric constant, the parasitic capacitance generated between the wirings can be reduced. For example, as the insulator 586, a silicon oxide film or a silicon oxynitride film can be used.

[0366] In addition, the conductor 546 and the conductor 548 are buried in the insulator 520 , the insulator 522 , the insulator 524 , the insulator 544 , the insulator 580 , the insulator 574 , the insulator 581 , the insulator 582 , and the insulator 586 .

[0367] The conductor 546 and the conductor 548 are used as plugs or wirings connected to the capacitor 600, the transistor 500, or the transistor 300. The conductor 546 and the conductor 548 can be formed using the same material as the conductor 328 and the conductor 330.

[0368] Next, a capacitor 600 is provided above the transistor 500 . The capacitor 600 includes a conductor 610 , a conductor 620 , and an insulator 630 .

[0369] In addition, a conductor 612 may be provided over the conductor 546 and the conductor 548. The conductor 612 is used as a plug or wiring connected to the transistor 500. The conductor 610 is used as an electrode of the capacitor 600. In addition, the conductor 612 and the conductor 610 may be formed at the same time.

[0370] As the conductor 612 and the conductor 610, a metal film containing an element selected from molybdenum, titanium, tantalum, tungsten, aluminum, copper, chromium, neodymium, and scandium, or a metal nitride film containing the above elements as a component (tantalum nitride film, titanium nitride film, molybdenum nitride film, tungsten nitride film), etc. can be used. Alternatively, a conductive material such as indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, indium tin oxide added with silicon oxide, etc. can also be used.

[0371] exist Fig.17 In the embodiment, the conductor 612 and the conductor 610 have a single-layer structure, but the present invention is not limited thereto and they may have a stacked structure of two or more layers. For example, a conductor having high compactness with the conductor having barrier properties and the conductor having high conductivity may be formed between the conductor having barrier properties and the conductor having high conductivity.

[0372] The conductor 620 is provided so as to overlap the conductor 610 via the insulator 630. Conductive materials such as metal materials, alloy materials, and metal oxide materials can be used as the conductor 620. It is preferable to use a high melting point material such as tungsten or molybdenum that has both heat resistance and conductivity, and tungsten is particularly preferable. When the conductor 620 is formed simultaneously with other components such as a conductor, a low-resistance metal material such as Cu (copper) or Al (aluminum) can be used.

[0373] An insulator 650 is provided on the conductor 620 and the insulator 630. The insulator 650 can be formed using the same material as the insulator 320. In addition, the insulator 650 can be used as a planarization film that covers the concavo-convex shape thereunder.

[0374] By adopting this structure, the reliability of a semiconductor device using a transistor including an oxide semiconductor can be improved while suppressing the variation of the electrical characteristics. In addition, a transistor including an oxide semiconductor having a large on-state current can be provided. In addition, a transistor including an oxide semiconductor having a small off-state current can be provided. In addition, a semiconductor device with reduced power consumption can be provided. In addition, miniaturization or high integration of a semiconductor device using a transistor including an oxide semiconductor can be achieved.

[0375] 〈Transistor Structure Example〉

[0376] Note that the structure of the transistor 500 of the semiconductor device described in this embodiment is not limited to the above-described structure.

[0377] <Transistor Structure Example 1>

[0378] Reference Fig.19A , Fig.19B and Fig.19C A structural example of the transistor 510A is described. Fig.19A is a top view of transistor 510A. Fig.19B is Fig.19A A cross-sectional view of the portion indicated by the dashed line L1-L2. Fig.19C is Fig.19A A cross-sectional view of the portion indicated by the dashed line W1-W2 in FIG. Fig.19A In the top view, for the sake of clarity, part of the components are omitted and shown.

[0379] exist Fig.19A , Fig.19B and Fig.19C 2 shows a transistor 510A, an insulator 511 used as an interlayer film, an insulator 512, an insulator 514, an insulator 516, an insulator 580, an insulator 582, and an insulator 584. In addition, a conductor 546 (a conductor 546a and a conductor 546b) electrically connected to the transistor 510A and used as a contact plug, and a conductor 503 used as a wiring are shown.

[0380] Transistor 510A includes: a conductor 560 (conductor 560a and conductor 560b) used as a first gate electrode; a conductor 505 (conductor 505a and conductor 505b) used as a second gate electrode; an insulator 550 used as a first gate insulating layer; insulators 521, 522, and 524 used as a second gate insulating layer; an oxide 530 (oxide 530a, oxide 530b, and oxide 530c) including a region forming a channel; a conductor 542a used as one of a source and a drain; a conductor 542b used as the other of a source and a drain; and an insulator 574.

[0381] 19, an oxide 530c, an insulator 550, and a conductor 560 are disposed in an opening provided in an insulator 580 via an insulator 574. Furthermore, the oxide 530c, the insulator 550, and the conductor 560 are disposed between the conductor 542a and the conductor 542b.

[0382] The insulator 511 and the insulator 512 serve as an interlayer film.

[0383] As the interlayer film, a single layer or a stack of insulators such as silicon oxide, silicon oxynitride, silicon nitride oxide, aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO3) or (Ba, Sr)TiO3 (BST) can be used. Alternatively, for example, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, zirconium oxide can be added to these insulators. In addition, these insulators can also be nitrided. Silicon oxide, silicon oxynitride or silicon nitride can also be stacked on the above-mentioned insulators.

[0384] For example, the insulator 511 is preferably used as a barrier film that suppresses impurities such as water or hydrogen from entering the transistor 510A from the substrate side. Therefore, as the insulator 511, it is preferable to use an insulating material that has a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, copper atoms (not allowing the above impurities to pass through easily). In addition, it is preferable to use an insulating material that has a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.) (not allowing the above oxygen to pass through easily). In addition, for example, it is preferable to use aluminum oxide or silicon nitride as the insulator 511. By adopting this structure, it is possible to suppress impurities such as hydrogen and water from diffusing from the side closer to the substrate than the insulator 511 to the side of the transistor 510A.

[0385] For example, the dielectric constant of the insulator 512 is preferably lower than that of the insulator 511. By using a material having a low dielectric constant for the interlayer film, parasitic capacitance generated between wirings can be reduced.

[0386] The conductor 503 is formed in a manner embedded in the insulator 512. Here, the height of the top surface of the conductor 503 and the height of the top surface of the insulator 512 may be substantially the same. The conductor 503 has a single-layer structure, but the present invention is not limited thereto. For example, the conductor 503 may also have a multilayer film structure of two or more layers. As the conductor 503, a highly conductive conductive material having tungsten, copper or aluminum as a main component is preferably used.

[0387] In transistor 510A, conductor 560 is sometimes used as a first gate (also referred to as a top gate) electrode. Conductor 505 is sometimes used as a second gate (also referred to as a bottom gate) electrode. In this case, by independently changing the potential supplied to conductor 505 without interlocking it with the potential supplied to conductor 560, the threshold voltage of transistor 510A can be controlled. In particular, by supplying a negative potential to conductor 505, the threshold voltage of transistor 510A can be made greater than 0V and the off-state current can be reduced. Therefore, compared to when a negative potential is not applied to conductor 505, when a negative potential is applied to conductor 505, the drain current when the potential supplied to conductor 560 is 0V can be reduced.

[0388] In addition, for example, by overlapping the conductor 505 with the conductor 560 , when a potential is supplied to the conductor 560 and the conductor 505 , the electric field generated from the conductor 560 and the electric field generated from the conductor 505 are connected, so that the channel formation region formed in the oxide 530 can be covered.

[0389] That is, the channel formation region can be electrically surrounded by the electric field of the conductor 560 used as the first gate electrode and the electric field of the conductor 505 used as the second gate electrode. In this specification, the structure of the transistor in which the channel formation region is electrically surrounded by the electric field of the first gate electrode and the electric field of the second gate electrode is called a surrounded channel (S-channel) structure.

[0390] Insulators 514 and 516 are used as interlayer films, similarly to insulators 511 and 512. For example, insulator 514 is preferably used as a barrier film for suppressing impurities such as water or hydrogen from entering transistor 510A from the substrate side. By adopting this structure, impurities such as hydrogen and water can be suppressed from diffusing from the side closer to the substrate than insulator 514 to the transistor 510A side. For example, insulator 516 preferably has a lower dielectric constant than insulator 514. By using a material with a low dielectric constant for the interlayer film, parasitic capacitance generated between wirings can be reduced.

[0391] In the conductor 505 used as the second gate, a conductor 505a is formed in contact with the inner wall of the opening of the insulator 514 and the insulator 516, and a conductor 505b is formed inside the conductor 505a. Here, the height of the top surface of the conductor 505a and the conductor 505b can be substantially the same as the height of the top surface of the insulator 516. In addition, in the transistor 510A, the conductor 505a and the conductor 505b are stacked, but the present invention is not limited to this. For example, the conductor 505 may have a single-layer structure or a stacked structure of three or more layers.

[0392] Here, as the conductor 505a, it is preferable to use a conductive material having a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, copper atoms, etc. (not allowing the above impurities to pass through easily). In addition, it is preferable to use a conductive material having a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.) (not allowing the above oxygen to pass through easily). In this specification, "the function of suppressing the diffusion of impurities or oxygen" refers to the function of suppressing the diffusion of any one or all of the above impurities and the above oxygen.

[0393] For example, by providing the conductor 505a with a function of suppressing the diffusion of oxygen, a decrease in conductivity due to oxidation of the conductor 505b can be suppressed.

[0394] In addition, when the conductor 505 also has a wiring function, it is preferable to use a highly conductive conductive material with tungsten, copper or aluminum as a main component as the conductor 505b. In this case, it is not necessary to provide the conductor 503. In the drawings, the conductor 505b has a single-layer structure, but it may also have a laminated structure, for example, a laminated structure of titanium, titanium nitride and the above conductive materials may be used.

[0395] The insulator 521 , the insulator 522 , and the insulator 524 are used as a second gate insulator.

[0396] The insulator 522 preferably has a barrier property. When the insulator 522 has a barrier property, the insulator 522 is used as a layer for suppressing impurities such as hydrogen from entering the transistor 510A from the periphery of the transistor 510A.

[0397] As the insulator 522, for example, a single layer or a stack of insulators containing so-called high-k materials such as aluminum oxide, hafnium oxide, oxides containing silicon and hafnium (hafnium silicate), tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO3) or (Ba, Sr)TiO3 (BST) is preferably used. When miniaturization and high integration of transistors are performed, problems such as leakage current sometimes occur due to the thin filming of the gate insulator. By using a high-k material as an insulator used as a gate insulator, the gate potential when the transistor is operating can be reduced while maintaining the physical thickness.

[0398] For example, the insulator 521 preferably has thermal stability. For example, silicon oxide and silicon oxynitride are preferred because they have thermal stability. In addition, by combining an insulator of a high-k material with silicon oxide or silicon oxynitride, an insulator 521 having a laminated structure with thermal stability and a high relative dielectric constant can be formed.

[0399] Note that in Fig. 19, the second gate insulator has a two-layer stacked structure, but may have a single-layer structure or a stacked structure of three or more layers. In this case, the stacked structure is not limited to a stacked structure made of the same material, and may be a stacked structure made of different materials.

[0400] The oxide 530 including the region used as the channel formation region includes an oxide 530a, an oxide 530b on the oxide 530a, and an oxide 530c on the oxide 530b. When the oxide 530a is provided below the oxide 530b, it is possible to prevent impurities from being diffused from the structure formed below the oxide 530a to the oxide 530b. When the oxide 530c is provided above the oxide 530b, it is possible to prevent impurities from being diffused from the structure formed above the oxide 530c to the oxide 530b. As the oxide 530, an oxide semiconductor of one of the above-mentioned metal oxides can be used.

[0401] The oxide 530 c is preferably provided in the opening provided in the insulator 580 via the insulator 574. When the insulator 574 has a barrier property, diffusion of impurities from the insulator 580 into the oxide 530 can be suppressed.

[0402] One of the conductors 542 is used as a source electrode, and the other is used as a drain electrode.

[0403] Conductors 542a and 542b may be made of metals such as aluminum, titanium, chromium, nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum, or tungsten, or alloys containing these elements as main components. In particular, metal nitride films such as tantalum nitride are preferred because they have barrier properties against hydrogen and oxygen and have high oxidation resistance.

[0404] In addition, although a single-layer structure is shown in FIG. 19 , a stacked structure of two or more layers may be adopted. For example, a tantalum nitride film and a tungsten film are preferably stacked. Alternatively, a titanium film and an aluminum film may be stacked. Alternatively, a two-layer structure of an aluminum film stacked on a tungsten film, a two-layer structure of a copper film stacked on a copper-magnesium-aluminum alloy film, a two-layer structure of a copper film stacked on a titanium film, or a two-layer structure of a copper film stacked on a tungsten film may be adopted.

[0405] Alternatively, a three-layer structure may be used in which an aluminum film or a copper film is stacked on a titanium film or a titanium nitride film and a titanium film or a titanium nitride film is formed thereon, or an aluminum film or a copper film is stacked on a molybdenum film or a molybdenum nitride film and a molybdenum film or a molybdenum nitride film is formed thereon. Alternatively, a transparent conductive material containing indium oxide, tin oxide, or zinc oxide may be used.

[0406] Alternatively, a barrier layer may be provided on the conductor 542. The barrier layer is preferably made of a substance that has a barrier property against oxygen or hydrogen. With this structure, oxidation of the conductor 542 can be suppressed when the insulator 574 is formed.

[0407] The barrier layer may be made of, for example, a metal oxide. In particular, it is preferable to use an insulating film having barrier properties to oxygen or hydrogen, such as aluminum oxide, hafnium oxide, or gallium oxide. Alternatively, silicon nitride formed by CVD may be used.

[0408] By including the barrier layer, the range of choices of the material of the conductor 542 can be expanded. For example, a material with low oxidation resistance and high conductivity, such as tungsten or aluminum, can be used for the conductor 542. In addition, for example, a conductor that is easy to deposit or process can be used.

[0409] The insulator 550 is used as a first gate insulator. The insulator 550 is preferably provided in an opening provided in the insulator 580 via the oxide 530 c and the insulator 574 .

[0410] When miniaturization and high integration of transistors are performed, leakage current and other problems may occur due to the thin film of the gate insulator. In this case, the insulator 550 may also have a laminated structure, similar to the second gate insulator. By making the insulator used as the gate insulator have a laminated structure of a high-k material and a material having thermal stability, the gate potential of the transistor during operation can be reduced while maintaining the physical thickness. In addition, a laminated structure having thermal stability and a high relative dielectric constant can be realized.

[0411] The conductor 560 used as the first gate electrode includes a conductor 560a and a conductor 560b on the conductor 560a. As with the conductor 505a, it is preferable to use a conductive material having a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, and copper atoms as the conductor 560a. In addition, it is preferable to use a conductive material having a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms and oxygen molecules).

[0412] When the conductor 560a has a function of suppressing the diffusion of oxygen, the selectivity of the material of the conductor 560b can be improved. That is, by including the conductor 560a, oxidation of the conductor 560b can be suppressed, and a decrease in conductivity can be prevented.

[0413] As a conductive material having a function of suppressing the diffusion of oxygen, for example, tantalum, tantalum nitride, ruthenium, or ruthenium oxide is preferably used. In addition, as the conductor 560a, an oxide semiconductor that can be used for the oxide 530 can be used. In this case, by forming the conductor 560b by sputtering, the resistivity of the conductor 560a can be reduced to make it a conductor. The conductor can be called an OC (Oxide Conductor) electrode.

[0414] As the conductor 560b, it is preferable to use a conductive material mainly composed of tungsten, copper or aluminum. Since the conductor 560 is used as wiring, it is preferable to use a conductor with high conductivity. For example, a conductive material mainly composed of tungsten, copper or aluminum can be used. The conductor 560b may also have a laminated structure, for example, a laminated structure of titanium, titanium nitride and the above conductive materials can be used.

[0415] An insulator 574 is disposed between the insulator 580 and the transistor 510A. An insulating material having a function of suppressing diffusion of impurities such as water or hydrogen and oxygen is preferably used as the insulator 574. For example, aluminum oxide or hafnium oxide is preferably used. In addition, for example, metal oxides such as magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, or tantalum oxide, silicon oxynitride, or silicon nitride can be used.

[0416] By including the insulator 574, impurities such as water and hydrogen contained in the insulator 580 can be prevented from diffusing into the oxide 530b through the oxide 530c and the insulator 550. In addition, oxidation of the conductor 560 by excess oxygen contained in the insulator 580 can be prevented.

[0417] Insulator 580 , insulator 582 , and insulator 584 are used as interlayer films.

[0418] Similar to the insulator 514, the insulator 582 is preferably used as a block insulating film for preventing impurities such as water and hydrogen from entering the transistor 510A from the outside.

[0419] As with the insulator 516, the dielectric constants of the insulators 580 and 584 are preferably lower than that of the insulator 582. By using a material having a low dielectric constant for the interlayer film, parasitic capacitance generated between wirings can be reduced.

[0420] In addition, the transistor 510A may be electrically connected to other structures through a plug or wiring such as a conductor 546 embedded in the insulator 580 , the insulator 582 , and the insulator 584 .

[0421] In addition, as with the conductor 505, as the material of the conductor 546, a single layer or a stack of conductive materials such as metal materials, alloy materials, metal nitride materials, or metal oxide materials can be used. For example, a high melting point material such as tungsten or molybdenum having both heat resistance and conductivity is preferably used. Alternatively, a low resistance conductive material such as aluminum or copper is preferably used. By using a low resistance conductive material, wiring resistance can be reduced.

[0422] For example, by using a stacked structure of tantalum nitride or the like, which is a conductor having a barrier property against hydrogen and oxygen, and tungsten having high conductivity as the conductor 546, diffusion of impurities from the outside can be suppressed while maintaining the conductivity of the wiring.

[0423] By having the above structure, a semiconductor device having a transistor including an oxide semiconductor with a large on-state current can be provided. Alternatively, a semiconductor device having a transistor including an oxide semiconductor with a small off-state current can be provided. Alternatively, a semiconductor device having improved reliability while suppressing variations in electrical characteristics and having stable electrical characteristics can be provided.

[0424] <Transistor Structure Example 2>

[0425] Reference Fig. 20A , Fig. 20B and Fig. 20C A structural example of the transistor 510B is described. Fig. 20A is a top view of transistor 510B. Fig. 20B is Fig. 20A A cross-sectional view of the portion indicated by the dashed line L1-L2. Fig. 20C is Fig. 20A A cross-sectional view of the portion indicated by the dashed line W1-W2 in FIG. Fig. 20A In the top view, part of the components are omitted for clarity.

[0426] The transistor 510B is a modified example of the transistor 510A. Therefore, in order to avoid duplication of descriptions, the differences from the transistor 510A will be mainly described.

[0427] The transistor 510B includes a region where the conductor 542 (conductor 542a and conductor 542b) overlaps with the oxide 530c, the insulator 550, and the conductor 560. With this structure, a transistor with high on-state current can be provided. In addition, a transistor with high controllability can be provided.

[0428] The conductor 560 used as the first gate electrode includes a conductor 560a and a conductor 560b on the conductor 560a. As with the conductor 505a, it is preferable to use a conductive material having a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, and copper atoms as the conductor 560a. In addition, it is preferable to use a conductive material having a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms and oxygen molecules).

[0429] When the conductor 560a has a function of suppressing the diffusion of oxygen, the selectivity of the material of the conductor 560b can be improved. That is, by including the conductor 560a, oxidation of the conductor 560b can be suppressed, and a decrease in conductivity can be prevented.

[0430] In addition, it is preferable to provide an insulator 574 so as to cover the top surface and side surfaces of the conductor 560, the side surfaces of the insulator 550, and the side surfaces of the oxide 530c. As the insulator 574, it is preferable to use an insulating material having a function of suppressing the diffusion of impurities such as water or hydrogen and oxygen. For example, aluminum oxide or hafnium oxide is preferably used. In addition, for example, metal oxides such as magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, or tantalum oxide, silicon oxynitride, or silicon nitride can be used.

[0431] By providing the insulator 574, oxidation of the conductor 560 can be suppressed. In addition, by including the insulator 574, diffusion of impurities such as water and hydrogen contained in the insulator 580 into the transistor 510B can be suppressed.

[0432] Alternatively, an insulator 576 (insulator 576a and insulator 576b) having a barrier property may be provided between the conductor 546 and the insulator 580. By providing the insulator 576, it is possible to suppress the oxidation of the conductor 546 caused by the reaction of oxygen in the insulator 580 with the conductor 546.

[0433] In addition, by providing an insulator 576 having a barrier property, the range of choices for the material of the conductor used for the plug or wiring can be expanded. For example, by using a metal material having a property of absorbing oxygen and having high conductivity as the conductor 546, a semiconductor device with low power consumption can be provided. Specifically, a material with low oxidation resistance and high conductivity such as tungsten or aluminum can be used. In addition, for example, a conductor that is easy to form a film or process can be used.

[0434] <Transistor Structure Example 3>

[0435] Reference Fig.21A , Fig. 21B and Fig. 21C A structural example of the transistor 510C is described. Fig.21A is a top view of transistor 510C. Fig. 21B is Fig.21A A cross-sectional view of the portion indicated by the dashed line L1-L2. Fig. 21C is Fig.21A A cross-sectional view of the portion indicated by the dashed line W1-W2 in FIG. Fig.21A In the top view, part of the components are omitted for clarity.

[0436] The transistor 510C is a modified example of the transistor 510A. Therefore, in order to avoid duplication of descriptions, the differences from the transistor 510A will be mainly described.

[0437] The transistor 510C shown in FIG. 21 has a conductor 547a disposed between the conductor 542a and the oxide 530b, and a conductor 547b disposed between the conductor 542b and the oxide 530b. Here, the conductor 542a (conductor 542b) has a region extending beyond the top surface of the conductor 547a (conductor 547b) and the side surface on one side of the conductor 560 and in contact with the top surface of the oxide 530b. Here, as the conductor 547, a conductor that can be used for the conductor 542 can be used. In addition, the thickness of the conductor 547 is preferably at least thicker than that of the conductor 542.

[0438] Since the transistor 510C shown in FIG21 has the above structure, the conductor 542 can be closer to the conductor 560 than the transistor 510A. Alternatively, the end of the conductor 542a and the end of the conductor 542b can overlap with the conductor 560. Thus, the substantial channel length of the transistor 510C can be reduced, and the on-state current and frequency characteristics can be improved.

[0439] In addition, the conductor 547a (conductor 547b) preferably overlaps the conductor 542a (conductor 542b). With this structure, when etching is performed to form an opening to fill the conductor 546a (conductor 546b), the conductor 547a (conductor 547b) is used as an etching stop layer to prevent overetching of the oxide 530b.

[0440] In the transistor 510C shown in FIG. 21 , an insulator 545 may be arranged in contact with the insulator 544. The insulator 544 is preferably used as a blocking insulating film for suppressing impurities such as water or hydrogen or excess oxygen from entering the transistor 510C from the insulator 580 side. As the insulator 545, an insulator that can be used for the insulator 544 can be used. As the insulator 544, for example, a nitride insulator such as aluminum nitride, aluminum titanium nitride, titanium nitride, silicon nitride, or silicon oxynitride can be used.

[0441] In addition, in the transistor 510C shown in FIG21, unlike the transistor 510A shown in FIG19, the conductor 505 may also have a single-layer structure. At this time, an insulating film that becomes an insulator 516 can be formed on the conductor 505 that has been formed into a pattern, and the top of the insulating film is removed by using a CMP method or the like until the top surface of the conductor 505 is exposed. Here, it is preferred to improve the flatness of the top surface of the conductor 505. For example, the average surface roughness (Ra) of the top surface of the conductor 505 can be less than 1 nm, preferably less than 0.5 nm, and more preferably less than 0.3 nm. Thus, the flatness of the insulating layer formed on the conductor 505 can be improved, and the crystallinity of the oxide 530b and the oxide 530c can be improved.

[0442] <Transistor Structure Example 4>

[0443] Reference Fig.22A , Fig. 22B and Fig. 22C A structural example of the transistor 510D is described. Fig.22A is a top view of transistor 510D. Fig. 22B is Fig.22A A cross-sectional view of the portion indicated by the dashed line L1-L2. Fig. 22C is Fig.22A A cross-sectional view of the portion indicated by the dashed line W1-W2 in FIG. Fig.22A In the top view, part of the components are omitted for clarity.

[0444] The transistor 510D is a modified example of the above-described transistor, and thus, in order to avoid duplication of descriptions, the description will be mainly focused on differences from the above-described transistor.

[0445] exist FIG. 22A to FIG. 22C In the embodiment, the conductor 505 having the function of the second gate is also used as a wiring without providing the conductor 503. In addition, an insulator 550 is included on the oxide 530c, and a metal oxide 552 is included on the insulator 550. In addition, a conductor 560 is included on the metal oxide 552, and an insulator 570 is included on the conductor 560. In addition, an insulator 571 is included on the insulator 570.

[0446] The metal oxide 552 preferably has a function of suppressing oxygen diffusion. By providing the metal oxide 552 that suppresses oxygen diffusion between the insulator 550 and the conductor 560, oxygen diffusion to the conductor 560 is suppressed. In other words, the reduction in the amount of oxygen supplied to the oxide 530 can be suppressed. In addition, oxidation of the conductor 560 due to oxygen can be suppressed.

[0447] In addition, the metal oxide 552 can be used as a part of the first gate. For example, an oxide semiconductor that can be used as the oxide 530 can be used as the metal oxide 552. In this case, by forming the conductor 560 by sputtering, the resistance value of the metal oxide 552 can be reduced to make it a conductive layer. This can be called an OC (Oxide Conductor) electrode.

[0448] In addition, the metal oxide 552 is sometimes used as a part of the gate insulating layer. Therefore, when silicon oxide or silicon oxynitride is used for the insulator 550, it is preferable to use a metal oxide that is a high-k material with a high relative dielectric constant as the metal oxide 552. By adopting this stacked structure, a stacked structure with thermal stability and a high relative dielectric constant can be formed. Therefore, the gate potential applied when the transistor is operating can be reduced while maintaining the physical thickness. In addition, the equivalent oxide thickness (EOT) of the insulating layer used as the gate insulating layer can be reduced.

[0449] Although the metal oxide 552 in the transistor 510D is shown as a single-layer structure, a stacked structure of two or more layers may be employed. For example, a metal oxide used as part of a gate electrode and a metal oxide used as part of a gate insulating layer may be stacked.

[0450] When the metal oxide 552 is used as a gate electrode, the on-state current of the transistor 510D can be increased without weakening the influence of the electric field from the conductor 560. In addition, when the metal oxide 552 is used as a gate insulating layer, the leakage current between the conductor 560 and the oxide 530 can be suppressed by maintaining the distance between the conductor 560 and the oxide 530 by utilizing the physical thickness of the insulator 550 and the metal oxide 552. Thus, by providing a stacked structure of the insulator 550 and the metal oxide 552, the physical distance between the conductor 560 and the oxide 530 and the electric field strength applied from the conductor 560 to the oxide 530 can be easily adjusted.

[0451] Specifically, an oxide semiconductor that can be used for the oxide 530 can be used as the metal oxide 552 by reducing its resistance. Alternatively, a metal oxide containing one or more selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, and magnesium can be used.

[0452] In particular, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), or the like is preferably used as an insulating layer containing an oxide of one or both of aluminum and hafnium. In particular, hafnium aluminate has higher heat resistance than a hafnium oxide film. Therefore, it is not easy to crystallize in the heat treatment of the subsequent process, so it is preferred. Note that the metal oxide 552 is not an essential component and can be appropriately designed according to the desired transistor characteristics.

[0453] An insulating material having a function of inhibiting the permeation of impurities such as water or hydrogen and oxygen is preferably used as the insulator 570. For example, aluminum oxide or hafnium oxide is preferably used. Thus, the conductor 560 can be prevented from being oxidized by oxygen from above the insulator 570. In addition, impurities such as water or hydrogen from above the insulator 570 can be inhibited from entering the oxide 530 through the conductor 560 and the insulator 550.

[0454] The insulator 571 is used as a hard mask. By providing the insulator 571, the conductor 560 can be processed in such a way that the side surface of the conductor 560 is approximately perpendicular to the substrate surface. Specifically, the angle formed by the side surface of the conductor 560 and the substrate surface can be made greater than 75 degrees and less than 100 degrees, preferably greater than 80 degrees and less than 95 degrees.

[0455] Alternatively, the insulator 571 may also function as a barrier layer by using an insulating material having a function of suppressing the permeation of impurities such as water and hydrogen and oxygen as the insulator 571. In this case, the insulator 570 may not be provided.

[0456] By using the insulator 571 as a hard mask, the insulator 570, the conductor 560, the metal oxide 552, the insulator 550, and a portion of the oxide 530c are selectively removed, so that their side surfaces can be roughly aligned and a portion of the surface of the oxide 530b can be exposed.

[0457] In addition, the transistor 510D has a region 531a and a region 531b in a portion of the surface of the exposed oxide 530b. One of the region 531a and the region 531b is used as a source region, and the other is used as a drain region.

[0458] For example, the regions 531a and 531b can be formed by introducing an impurity element such as phosphorus or boron into the surface of the exposed oxide 530b by ion implantation, ion doping, plasma immersion ion implantation, or plasma treatment. Note that in this embodiment mode, "impurity element" refers to an element other than a main component element.

[0459] Alternatively, after a portion of the surface of the oxide 530 b is exposed, a metal film may be formed, and then heat treatment may be performed to diffuse elements included in the metal film into the oxide 530 b , thereby forming the regions 531 a and 531 b .

[0460] The resistivity of the region into which the impurity element is introduced in the oxide 530b decreases. Therefore, the region 531a and the region 531b are sometimes referred to as “impurity regions” or “low resistance regions”.

[0461] By using the insulator 571 and / or the conductor 560 as a mask, the region 531a and the region 531b can be formed in a self-aligned manner. Therefore, the region 531a and / or the region 531b do not overlap with the conductor 560, and the parasitic capacitance can be reduced. In addition, the bias region is not formed between the channel formation region and the source and drain region (region 531a or region 531b). By forming the region 531a and the region 531b in a self-aligned manner, an increase in the on-state current, a decrease in the threshold voltage, an increase in the operating frequency, etc. can be achieved.

[0462] In addition, in order to further reduce the off-state current, a bias region may be provided between the channel formation region and the source / drain region. The bias region is a region with high resistivity and is a region where the above-mentioned impurity elements are not introduced. The bias region can be formed by introducing the above-mentioned impurity elements after forming the insulator 575. In this case, the insulator 575 is also used as a mask as insulator 571. Therefore, the region of the oxide 530b overlapping with the insulator 575 is not introduced with impurity elements, thereby maintaining the resistivity of the region high.

[0463] The transistor 510D includes an insulator 575 on the side of the insulator 570, the conductor 560, the metal oxide 552, the insulator 550, and the oxide 530c. The insulator 575 is preferably an insulator with a low relative dielectric constant. For example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide added with fluorine, silicon oxide added with carbon, silicon oxide added with carbon and nitrogen, silicon oxide with pores, or resin is preferably used. In particular, when silicon oxide, silicon oxynitride, silicon nitride oxide, or silicon oxide with pores is used for the insulator 575, it is preferred because an excess oxygen region can be easily formed in the insulator 575 in the subsequent process. In addition, silicon oxide and silicon oxynitride are thermally stable, so they are preferred. In addition, the insulator 575 preferably has a function of diffusing oxygen.

[0464] The transistor 510D includes an insulator 574 over the insulator 575 and the oxide 530. The insulator 574 is preferably formed by sputtering. By using the sputtering method, an insulator with less impurities such as water and hydrogen can be formed. For example, aluminum oxide is preferably used as the insulator 574.

[0465] Oxide films formed by sputtering may extract hydrogen from the structure being formed. Therefore, the insulator 574 extracts hydrogen and water from the oxide 530 and the insulator 575 to reduce the hydrogen concentration of the oxide 530 and the insulator 575.

[0466] <Transistor Structure Example 5>

[0467] Reference FIG. 23A to FIG. 23C A structural example of the transistor 510E is described. Fig.23Ais a top view of transistor 510E. Fig. 23B is Fig.23A A cross-sectional view of the portion indicated by the dashed line L1-L2. Fig.23C is Fig.23A A cross-sectional view of the portion indicated by the dashed line W1-W2 in FIG. Fig.23A In the top view, part of the components are omitted for clarity.

[0468] The transistor 510E is a modified example of the above-described transistor. Therefore, in order to avoid duplication of descriptions, the differences from the above-described transistor will be mainly described.

[0469] exist FIG. 23A to FIG. 23C In the embodiment, a portion of the surface of the exposed oxide 530b includes a region 531a and a region 531b without providing a conductor 542. One of the region 531a and the region 531b is used as a source region, and the other is used as a drain region. In addition, an insulator 573 is included between the oxide 530b and the insulator 574.

[0470] The region 531 (region 531a and region 531b) shown in Fig. 23 is a region in which the oxide 530b is doped with the following elements. The region 531 can be formed by using a dummy gate, for example.

[0471] Specifically, a dummy gate is provided on the oxide 530b, and the dummy gate is used as a mask to add an element that makes the oxide 530b low in resistance. That is, the element is added to the region of the oxide 530 that does not overlap with the dummy gate, thereby forming a region 531. As a method for adding the element, an ion implantation method in which the ionized source gas is mass-separated and added; an ion doping method in which the ionized source gas is not mass-separated and added; and a plasma immersion ion implantation method, etc. can be used.

[0472] In addition, as an element that reduces the resistance of the oxide 530, boron or phosphorus is typical. In addition, hydrogen, carbon, nitrogen, fluorine, sulfur, chlorine, titanium, rare gases, etc. can also be used. Typical examples of rare gases include helium, neon, argon, krypton, and xenon. The concentration of the element can be measured by secondary ion mass spectrometry (SIMS: Secondary Ion Mass Spectrometry) or the like.

[0473] In particular, boron and phosphorus are preferred because they can be used in the production line of amorphous silicon or low-temperature polysilicon. Existing equipment can be used, thereby reducing equipment investment.

[0474] Next, an insulating film serving as an insulator 573 and an insulating film serving as an insulator 574 may be formed over the oxide 530b and the dummy gate. By providing a stack of the insulating film serving as the insulator 573 and the insulating film serving as the insulator 574, a region where the region 531 overlaps with the oxide 530c and the insulator 550 can be provided.

[0475] Specifically, an insulating film that becomes an insulator 580 is provided on an insulating film that becomes an insulator 574, and then a CMP (Chemical Mechanical Polishing) process is performed on the insulating film that becomes the insulator 580 to remove a portion of the insulating film that becomes the insulator 580, thereby exposing the dummy gate. Next, when removing the dummy gate, it is preferable to also remove a portion of the insulator 573 that is in contact with the dummy gate. As a result, the insulator 574 and the insulator 573 are exposed on the side of the opening provided in the insulator 580, and a portion of the region 531 provided in the oxide 530b is exposed on the bottom surface of the opening. Next, an oxide film that becomes an oxide 530c, an insulating film that becomes an insulator 550, and a conductive film that becomes a conductor 560 are sequentially formed in the opening, and then a portion of the oxide film that becomes the oxide 530c, the insulating film that becomes the insulator 550, and the conductive film that becomes the conductor 560 are removed by CMP treatment or the like until the insulator 580 is exposed, thereby forming the transistor shown in FIG. 23.

[0476] Note that the insulator 573 and the insulator 574 are not necessarily provided and may be appropriately designed according to required transistor characteristics.

[0477] The transistor shown in FIG. 23 can utilize existing devices and does not provide the conductor 542, thereby reducing costs.

[0478] <Transistor Structure Example 6>

[0479] Although in Fig.17 18 shows a structural example in which a conductor 560 used as a gate is formed inside an opening of an insulator 580, but, for example, a structure in which the insulator is provided above the conductor may be employed. FIG24 and FIG25 show structural examples of such a transistor.

[0480] Fig.24A is a top view of the transistor, Fig. 24B is a three-dimensional diagram of a transistor. In addition, Fig.25A Shown along Fig.24A The cross-sectional view of X1-X2 in Fig.25B Shown along Fig.24A Cross-sectional view of Y1-Y2 in FIG.

[0481] The transistor shown in FIG24 and FIG25 includes a conductor BGE having a back gate function, an insulator BGI having a gate insulating film function, an oxide semiconductor S, an insulator TGI having a gate insulating film function, a conductor TGE having a front gate function, and a conductor WE having a wiring function. In addition, the conductor PE has a plug function that connects the conductor WE to the oxide S, the conductor BGE, or the conductor TGE. Note that an example in which the oxide semiconductor S is composed of three layers of oxides S1, S2, and S3 is shown here.

[0482] 〈Electrical Characteristics of Transistors〉

[0483] Next, the electrical characteristics of the OS transistor are described. As an example, a transistor including a first gate and a second gate is described below. In a transistor including a first gate and a second gate, the threshold voltage can be controlled by applying different potentials to the first gate and the second gate. For example, by applying a negative potential to the second gate, the threshold voltage of the transistor can be made greater than 0V, thereby reducing the off-state current. In other words, by applying a negative potential to the second gate, the drain current when the potential applied to the first gate is 0V can be reduced.

[0484] In addition, when impurities such as hydrogen are added to an oxide semiconductor, its carrier density sometimes increases. For example, when hydrogen is added to an oxide semiconductor, the hydrogen sometimes reacts with oxygen bonded to a metal atom to generate water, thereby forming an oxygen vacancy. When hydrogen enters the oxygen vacancy, the carrier density increases. In addition, sometimes electrons as carriers are generated due to a portion of hydrogen bonding to oxygen bonded to a metal atom. In other words, an oxide semiconductor to which impurities such as hydrogen are added becomes n-type, and its resistance decreases.

[0485] Therefore, the resistance of the oxide semiconductor can be selectively reduced. In other words, a region of the semiconductor having low carrier density and used as a channel formation region and a low resistance region having high carrier density and used as a source region or a drain region can be provided in the oxide semiconductor.

[0486] Here, the influence of the configuration of a low resistance region and a high resistance region provided in an oxide semiconductor on the electrical characteristics of a transistor when different potentials are applied to a first gate and a second gate is evaluated.

[0487] [Transistor structure]

[0488] Fig.26A and Fig.26C is a cross-sectional view of a transistor used for evaluation of electrical characteristics. Fig.26A and Fig.26C For the sake of clarity, some components are not shown in the figure.

[0489] Fig.26A and Fig.26C The transistor shown includes a conductor TGE used as a first gate, an insulator TGI used as a first gate insulating film, an insulator SW used as a sidewall provided on the side of the first gate, an oxide semiconductor S, a conductor BGE used as a second gate, and an insulator BGI used as a second gate insulator. The insulator BGI has a three-layer structure consisting of a first layer in contact with the conductor BGE, a second layer on the first layer, and a third layer on the second layer. The third layer is in contact with the oxide semiconductor S.

[0490] Here, Fig.26A The oxide semiconductor S included in the transistor shown includes an n+ region and an i region overlapping with the conductor TGE. Fig.26C The transistor shown includes an oxide semiconductor S including an n+ region, an i region overlapping with the conductor TGE, and an n− region between the n+ region and the i region.

[0491] The n+ region is a low resistance region used as a source region or a drain region and has a high carrier density. The i region is a high resistance region used as a channel formation region and has a lower carrier density than the n+ region. The n- region is a region whose carrier density is lower than that of the n+ region and higher than that of the i region.

[0492] Although not shown in the figure, the n+ region of the oxide semiconductor S is in contact with an S / D electrode used as a source or a drain.

[0493] [Evaluation results of electrical characteristics]

[0494] right Fig.26A The transistor shown and Fig.26C The Id-Vg characteristics of the transistor shown were calculated to evaluate the electrical characteristics of the transistor.

[0495] Here, as an indicator of the electrical characteristics of the transistor, the change amount (hereinafter also referred to as ΔVsh) of the threshold voltage (hereinafter also referred to as Vsh) of the transistor is used. Note that in the Id-Vg characteristic, Vsh is defined as Id=1.0×10 -12 [A] Vg value.

[0496] Note that the Id-Vg characteristic refers to the variation characteristic of the current between the source and the drain (hereinafter also referred to as the drain current (Id)) when the potential applied to the conductor TGE used as the first gate of the transistor (hereinafter also referred to as the gate potential (Vg)) changes from a first value to a second value.

[0497] Here, the potential between the source and the drain (hereinafter also referred to as the drain potential Vd) is set to +0.1V, and the potential between the source and the conductor TGE used as the first gate is changed from -1V to +4V, and the change in the drain current (Id) is evaluated under this condition.

[0498] In addition, the calculation was performed using the device simulator ATLAS manufactured by Silvaco. In addition, the following table shows the parameters used for the calculation. Note that Eg represents the energy gap, Nc represents the effective state density of the conduction band, and Nv represents the effective state density of the valence band.

[0499] [Table 1]

[0500]

[0501]

[0502] exist Fig.26A In the transistor shown, one n+ region is set to 700nm and one n- region is set to 0nm. Fig.26C In the transistor shown, an n+ region is set to 655nm and an n- region is set to 45nm. Fig.26A The transistor shown and Fig.26C In the transistor shown, the second gate is larger than the i region. In this evaluation, the potential of the conductor BGE used as the second gate (hereinafter also referred to as back gate potential (Vbg)) was set to 0.00V, -3.00V, or -6.00V.

[0503] Fig.26B Show Fig.26A The results of the Id-Vg characteristics of the transistor shown are obtained based on the calculation. When the back gate potential is -3.00V, the change in the threshold voltage of the transistor (△Vsh) is +1.2V compared to the case of 0.00V. In addition, when the back gate potential is -6.00V, the change in the threshold voltage of the transistor (△Vsh) is +2.3V compared to the case of 0.00V. That is, when the back gate potential is -6.00V, the change in the threshold voltage of the transistor (△Vsh) is +1.1V compared to the case of -3.00V. Therefore, even if the potential of the conductor BGE used as the second gate increases, the change in the threshold voltage of the transistor hardly changes. In addition, even if the back gate potential increases, the rising characteristics do not change.

[0504] Fig.26D Show Fig.26CThe results of the Id-Vg characteristics of the transistor shown are obtained based on calculations. When the back gate potential is -3.00V, the change in the threshold voltage of the transistor (△Vsh) is +1.2V compared to the case of 0.00V. In addition, when the back gate potential is -6.00V, the change in the threshold voltage of the transistor (△Vsh) is +3.5V compared to the case of 0.00V. That is, when the back gate potential is -6.00V, the change in the threshold voltage of the transistor (△Vsh) is +2.3V compared to the case of -3.00V. Therefore, the greater the potential of the conductor BGE used as the second gate, the greater the change in the threshold voltage of the transistor. On the other hand, the greater the back gate potential, the lower the rise characteristic.

[0505] Therefore, it is confirmed that: Fig.26C In the transistor shown in FIG. 1 , the greater the potential of the conductor BGE used as the second gate, the greater the variation in the threshold voltage of the transistor. Fig.26A In the transistor shown, even if the potential of the conductor BGE used as the second gate increases, the amount of change in the threshold voltage of the transistor does not change.

[0506] In addition, this embodiment mode can be implemented in combination with other embodiment modes described in this specification as appropriate.

[0507] (Implementation 4)

[0508] In this embodiment, the structure of a metal oxide which can be used for the OS transistor described in the above embodiment is described.

[0509] 〈Composition of Metal Oxides〉

[0510] In this specification, etc., it may be described as CAAC (c-axis aligned crystal) or CAC (Cloud-Aligned Composite). Note that CAAC is an example of a crystal structure, and CAC is an example of a function or a material composition.

[0511] CAC-OS or CAC-metal oxide has a conductive function in a part of the material, an insulating function in another part of the material, and has a semiconductor function as a whole. In addition, when CAC-OS or CAC-metal oxide is used in the channel formation region of a transistor, the conductive function is to allow electrons (or holes) used as carriers to flow through, and the insulating function is to prevent electrons used as carriers from flowing through. Through the complementary effects of the conductive function and the insulating function, CAC-OS or CAC-metal oxide can have a switching function (function of controlling On / Off). By separating each function in CAC-OS or CAC-metal oxide, each function can be maximized.

[0512] In addition, CAC-OS or CAC-metal oxide includes a conductive region and an insulating region. The conductive region has the function of the above-mentioned conductivity, and the insulating region has the function of the above-mentioned insulation. In addition, in the material, the conductive region and the insulating region are sometimes separated with a nanoparticle level. In addition, the conductive region and the insulating region are sometimes distributed unevenly in the material. In addition, sometimes the conductive region whose edge is fuzzy and connected with a cloud shape is observed.

[0513] In CAC-OS or CAC-metal oxide, the conductive region and the insulating region may be dispersed in the material with a size of 0.5 nm to 10 nm, preferably 0.5 nm to 3 nm.

[0514] In addition, CAC-OS or CAC-metal oxide is composed of components with different band gaps. For example, CAC-OS or CAC-metal oxide is composed of a component with a wide gap caused by an insulating region and a component with a narrow gap caused by a conductive region. In this structure, when carriers are allowed to flow through, the carriers mainly flow through the component with the narrow gap. In addition, the component with the narrow gap interacts with the component with the narrow gap through the complementary effect with the component with the wide gap, so that the carriers flow through the component with the wide gap. Therefore, when the above-mentioned CAC-OS or CAC-metal oxide is used in the channel formation region of a transistor, a high current driving force, that is, a large on-state current and a high field effect mobility can be obtained in the on-state of the transistor.

[0515] That is, CAC-OS or CAC-metal oxide may also be referred to as a matrix composite material (matrix composite) or a metal matrix composite material (metal matrix composite).

[0516] 〈Structure of Metal Oxides〉

[0517] Oxide semiconductors are classified into single crystal oxide semiconductors and non-single crystal oxide semiconductors. Examples of non-single crystal oxide semiconductors include CAAC-OS (c-axis aligned crystalline oxide semiconductor), polycrystalline oxide semiconductor, nc-OS (nanocrystalline oxide semiconductor), a-like OS (amorphous-like oxide semiconductor), and amorphous oxide semiconductor.

[0518] As an oxide semiconductor used as a semiconductor for a transistor, a thin film with high crystallinity is preferably used. By using this thin film, the stability or reliability of the transistor can be improved. As the thin film, for example, a single crystal oxide semiconductor thin film or a polycrystalline oxide semiconductor thin film can be cited. However, forming a single crystal oxide semiconductor thin film or a polycrystalline oxide semiconductor thin film on a substrate requires a high temperature or laser heating process. Therefore, the cost of the manufacturing process becomes high and the processing volume decreases.

[0519] Non-patent Documents 2 and 3 report that In-Ga-Zn oxide (also called CAAC-IGZO) with a CAAC structure was discovered in 2009. Non-patent Documents 2 and 3 report that CAAC-IGZO has c-axis orientation, unclear grain boundaries, and can be formed on a substrate at low temperatures. In addition, it is also reported that transistors using CAAC-IGZO have excellent electrical characteristics and reliability.

[0520] In addition, In-Ga-Zn oxide (called nc-IGZO) with nc structure was discovered in 2013 (see Non-Patent Document 4). In Non-Patent Document 4, it is reported that the atomic arrangement of nc-IGZO in a tiny region (e.g., a region of 1 nm or more and 3 nm or less) is periodic, and no regularity of crystal orientation is observed between different regions.

[0521] Non-patent literature 5 and non-patent literature 6 show the change of the average crystal size when the thin films of the above-mentioned CAAC-IGZO, nc-IGZO and IGZO with low crystallinity are irradiated with electron beams, respectively. In the IGZO thin film with low crystallinity, crystalline IGZO of about 1 nm can be observed before it is irradiated with an electron beam. Therefore, it is reported in non-patent literature 5 and non-patent literature 6 that the existence of a completely amorphous structure (completely amorphous structure) has not been confirmed in IGZO. Furthermore, it is disclosed that the stability of CAAC-IGZO thin films and nc-IGZO thin films relative to electron beam irradiation is higher than that of IGZO thin films with low crystallinity. Therefore, it is preferable to use a CAAC-IGZO thin film or a nc-IGZO thin film as a semiconductor of a transistor.

[0522] CAAC-OS has c-axis orientation, and its multiple nanocrystals are connected in the ab plane direction and the crystal structure has distortion. Note that distortion refers to the part where the lattice arrangement direction changes between the region where the multiple nanocrystals are connected and the region where the lattice arrangement is consistent.

[0523] Although nanocrystals are basically hexagonal, they are not limited to regular hexagons, and there are cases where they are not regular hexagons. In addition, in the distortion, there is sometimes a lattice arrangement such as a pentagon or a heptagon. In addition, in CAAC-OS, no clear grain boundary is observed even near the distortion. That is, it can be seen that the formation of grain boundaries can be suppressed due to the distortion of the lattice arrangement. This may be because CAAC-OS can accommodate distortion due to the low density of oxygen atoms arranged in the ab plane direction or the change in the bonding distance between atoms due to the substitution of metal elements.

[0524] CAAC-OS tends to have a layered crystal structure (also referred to as a layered structure) in which a layer containing indium and oxygen (hereinafter referred to as an In layer) and a layer containing element M, zinc, and oxygen (hereinafter referred to as an (M, Zn) layer) are stacked. In addition, indium and element M can replace each other. When indium replaces element M in the (M, Zn) layer, the layer can also be represented as an (In, M, Zn) layer. In addition, when indium in the In layer is replaced by element M, the layer can also be represented as an (In, M) layer.

[0525] CAAC-OS is an oxide semiconductor with high crystallinity. On the other hand, no clear grain boundaries are observed in CAAC-OS, so a decrease in electron mobility caused by grain boundaries is not likely to occur. In addition, the crystallinity of an oxide semiconductor is sometimes reduced due to the entry of impurities or the generation of defects, so it can be said that CAAC-OS is an oxide semiconductor with few impurities or defects (oxygen vacancies, etc.). Therefore, the physical properties of the oxide semiconductor including CAAC-OS are stable. Therefore, the oxide semiconductor including CAAC-OS has high heat resistance and high reliability. In addition, CAAC-OS is also stable to high temperatures (so-called thermal budget) in the manufacturing process. Therefore, by using CAAC-OS in OS transistors, the degree of freedom of the manufacturing process can be expanded.

[0526] In nc-OS, the atomic arrangement in a tiny region (e.g., a region between 1 nm and 10 nm, especially a region between 1 nm and 3 nm) is periodic. In addition, in nc-OS, no regularity of crystal orientation is observed between different nanocrystals. Therefore, no orientation is observed in the entire film. Therefore, sometimes nc-OS is no different from a-like OS or amorphous oxide semiconductors in some analysis methods.

[0527] a-like OS is an oxide semiconductor having a structure between nc-OS and amorphous oxide semiconductor. a-like OS contains voids or low-density regions. In other words, the crystallinity of a-like OS is lower than that of nc-OS and CAAC-OS.

[0528] Oxide semiconductors have various structures and various characteristics. The oxide semiconductor of one embodiment of the present invention may include two or more of an amorphous oxide semiconductor, a polycrystalline oxide semiconductor, a-like OS, nc-OS, and CAAC-OS.

[0529] <Transistor having an oxide semiconductor>

[0530] Next, a case where the above-mentioned oxide semiconductor is used in a transistor is described.

[0531] By using the above oxide semiconductor in a transistor, a transistor having high field effect mobility can be realized. In addition, a transistor having high reliability can be realized.

[0532] Non-patent document 7 discloses that the leakage current of the transistor using the above oxide semiconductor in the non-conducting state is extremely low. Specifically, the off-state current of the transistor per channel width of 1 μm is yA / μm (10 -24For example, a low-power CPU or the like that utilizes the low leakage current characteristic of a transistor using an oxide semiconductor has been disclosed (see Non-Patent Document 8).

[0533] In addition, there are reports that use transistors using oxide semiconductors to apply the transistor to display devices by taking advantage of the low leakage current characteristic of the transistor (see non-patent document 9). In a display device, the displayed image is switched dozens of times in 1 second. The number of image switches per 1 second is called the "refresh frequency". In addition, the refresh frequency is sometimes referred to as the "drive frequency". Such high-speed screen switching that is difficult for the human eye to recognize is believed to be a cause of eye fatigue. Therefore, a technology has been proposed to reduce the refresh frequency of the display device to reduce the number of image rewrites. In addition, the drive with a reduced refresh frequency can reduce the power consumption of the display device. This driving method is called "idle stop (IDS) drive".

[0534] In addition, it is preferable to use an oxide semiconductor with a low carrier density for a transistor. In the case where the carrier density of an oxide semiconductor film is to be reduced, the impurity concentration in the oxide semiconductor film can be reduced to reduce the defect state density. In this specification, etc., a state in which the impurity concentration is low and the defect state density is low is referred to as "high-purity intrinsic" or "substantially high-purity intrinsic". For example, the carrier density in an oxide semiconductor can be less than 8×10 11 / cm 3 , preferably less than 1×10 11 / cm 3 , more preferably less than 1×10 10 / cm 3 , and is 1×10 -9 / cm 3 above.

[0535] In addition, a high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor film has a lower defect state density and thus sometimes has a lower trap state density.

[0536] Furthermore, it takes a long time for charges trapped in trap states of an oxide semiconductor to disappear, and they may behave like fixed charges. Therefore, the electrical characteristics of a transistor having a channel formation region formed in an oxide semiconductor having a high trap state density may be unstable.

[0537] Therefore, in order to stabilize the electrical characteristics of the transistor, it is effective to reduce the impurity concentration in the oxide semiconductor. In order to reduce the impurity concentration in the oxide semiconductor, it is preferable to also reduce the impurity concentration in the nearby film. Impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, silicon, etc.

[0538] 〈Impurities〉

[0539] Here, the influence of each impurity in the oxide semiconductor is described.

[0540] When the oxide semiconductor contains silicon or carbon, which is one of the Group 14 elements, a defect level is formed in the oxide semiconductor. Therefore, the concentration of silicon or carbon in the oxide semiconductor or near the interface of the oxide semiconductor (the concentration measured by secondary ion mass spectrometry (SIMS)) is set to 2×10 18 atoms / cm 3 Below, preferably 2×10 17 atoms / cm 3 the following.

[0541] In addition, when the oxide semiconductor contains an alkali metal or an alkaline earth metal, a defect energy level is sometimes formed to form a carrier. Therefore, a transistor using an oxide semiconductor containing an alkali metal or an alkaline earth metal tends to have a normally-on characteristic. Therefore, it is preferable to reduce the concentration of the alkali metal or alkaline earth metal in the oxide semiconductor. Specifically, the concentration of the alkali metal or alkaline earth metal in the oxide semiconductor measured by SIMS is set to 1×10 18 atoms / cm 3 Below, preferably 2×10 16 atoms / cm 3 the following.

[0542] When an oxide semiconductor contains nitrogen, electrons as carriers are easily generated, which increases the carrier density and turns into n-type. As a result, a transistor using an oxide semiconductor containing nitrogen as a semiconductor tends to have a normally-on characteristic. Therefore, it is preferable to reduce the nitrogen in the oxide semiconductor as much as possible. For example, the nitrogen concentration in the oxide semiconductor measured by SIMS is less than 5×10 19 atoms / cm 3 , preferably 5×10 18 atoms / cm 3 Below, more preferably 1×10 18 atoms / cm 3 Below, more preferably 5×10 17 atoms / cm 3 the following.

[0543] Hydrogen contained in an oxide semiconductor reacts with oxygen bonded to a metal atom to generate water, thereby sometimes forming an oxygen vacancy. When hydrogen enters the oxygen vacancy, electrons as carriers are sometimes generated. In addition, sometimes electrons as carriers are generated because part of the hydrogen is bonded to oxygen bonded to a metal atom. Therefore, transistors using an oxide semiconductor containing hydrogen tend to have a normally-on characteristic. Therefore, it is preferred to reduce the amount of hydrogen in the oxide semiconductor as much as possible. Specifically, in the oxide semiconductor, the hydrogen concentration measured by SIMS is set to less than 1×10 20 atoms / cm 3 , preferably less than 1×10 19 atoms / cm 3 , more preferably less than 5×10 18 atoms / cm 3 , and more preferably less than 1×10 18 atoms / cm 3 .

[0544] By using an oxide semiconductor in which impurities are sufficiently reduced for a channel formation region of a transistor, the transistor can have stable electrical characteristics.

[0545] The discovery of the CAAC structure and the nc structure contributes to the improvement of the electrical characteristics and reliability of transistors using the CAAC structure or oxide semiconductors having the nc structure, the reduction of the cost of the manufacturing process, and the increase of the throughput. In addition, research has been conducted on applying the transistors to display devices and LSIs by utilizing the low leakage current characteristic of the transistors.

[0546] In addition, this embodiment mode can be implemented in combination with other embodiment modes described in this specification as appropriate.

[0547] (Implementation method 5)

[0548] In this embodiment, an example of an electronic device in which the storage device described in the above embodiment is mounted is described.

[0549] The storage device according to one embodiment of the present invention can be installed in various electronic devices. In particular, the storage device according to one embodiment of the present invention can be used as a memory built into an electronic device. As examples of electronic devices, in addition to electronic devices with larger screens such as television devices, desktop or notebook personal computers, displays for computers, etc., digital signage (Digital Signage), large game machines such as pinball machines, etc., digital cameras, digital video cameras, digital photo frames, mobile phones, portable game consoles, portable information terminals, sound reproduction devices, etc. can also be cited.

[0550] The electronic device of one embodiment of the present invention may also include an antenna. By receiving a signal through the antenna, an image or information can be displayed on the display unit. In addition, when the electronic device includes an antenna and a secondary battery, the antenna can be used for contactless power transmission.

[0551] An electronic device of one embodiment of the present invention may also include a sensor (the sensor has the function of measuring the following factors: force, displacement, position, speed, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, voltage, electricity, radiation, flow, humidity, inclination, vibration, odor or infrared).

[0552] An electronic device of one embodiment of the present invention may have various functions. For example, it may have the following functions: a function of displaying various information (static images, dynamic images, text images, etc.) on a display unit; a function of a touch panel; a function of displaying a calendar, date, or time, etc.; a function of executing various software (programs); a function of wireless communication; a function of reading programs or data stored in a storage medium; etc. FIG. 27 shows an example of an electronic device.

[0553] Fig.27A The figure shows a mobile phone (smartphone) which is one of the information terminals. The information terminal 5500 includes a housing 5510 and a display portion 5511 . The display portion 5511 has a touch screen as an input interface, and buttons are provided on the housing 5510 .

[0554] Fig.27B The tabletop information terminal 5300 is shown. The tabletop information terminal 5300 includes an information terminal body 5301 , a display 5302 , and a keyboard 5303 .

[0555] Note that in the above example, Fig.27A and Fig.27B Smartphones and desktop information terminals are shown as examples of electronic devices, but information terminals other than smart phones and desktop information terminals may also be applied. Examples of information terminals other than smart phones and desktop information terminals include PDAs (Personal Digital Assistants), notebook information terminals, workstations, and the like.

[0556] Fig.27C An electric refrigerator-freezer 5800 is shown as an example of an electric appliance. The electric refrigerator-freezer 5800 includes a housing 5801, a refrigerator door 5802, a freezer door 5803, and the like.

[0557] In the above example, an electric refrigerator-freezer is described as an electrical appliance, but other electrical appliances include, for example, vacuum cleaners, microwave ovens, electric ovens, rice cookers, water heaters, IH cookers, water dispensers, air conditioners including heating and cooling units, washing machines, dryers, audio-visual equipment, etc.

[0558] Fig.27D A portable game machine 5200 as an example of a game machine is shown. The portable game machine includes a housing 5201, a display portion 5202, buttons 5203, and the like.

[0559] Although Fig.27D A portable game console is shown as an example of a game console, but the game console to which the storage device according to one embodiment of the present invention can be applied is not limited thereto. Examples of game consoles to which the storage device according to one embodiment of the present invention can be applied include home-use fixed game consoles, arcade game consoles installed in entertainment facilities (game centers, amusement parks, etc.), and pitching machines for batting practice installed in sports facilities.

[0560] Fig.27E1 A car 5700 is shown as an example of a moving object. Fig.27E2 It is a diagram showing the periphery of the front windshield in the interior of a vehicle. Fig.27E2 Display panel 5701, display panel 5702, display panel 5703 installed on the instrument panel, and display panel 5704 installed on the pillar are shown.

[0561] Display panels 5701 to 5703 can provide a speedometer, a tachometer, a driving distance, a refueling amount, a gear status, an air conditioning setting, and various other information. In addition, the user can appropriately change the display content and layout displayed on the display panel, which can improve the design. Display panels 5701 to 5703 can also be used as lighting devices.

[0562] By displaying the image captured by the camera device (not shown) installed in the car 5700 on the display panel 5704, the field of view (blind spot) blocked by the pillar can be supplemented. In other words, by displaying the image captured by the camera device installed outside the car 5700, the blind spot can be supplemented, thereby improving safety. In addition, by displaying the image that supplements the invisible part, safety can be confirmed more naturally and comfortably. The display panel 5704 can also be used as a lighting device.

[0563] Although the above example describes a car as an example of a mobile body, the mobile body is not limited to the car. For example, a tram, a monorail, a ship, an airplane (helicopter, unmanned aerial vehicle (UAV), an airplane, a rocket), etc. can also be cited as a mobile body, and the storage device according to one embodiment of the present invention can be applied to these mobile bodies.

[0564] The storage device according to one embodiment of the present invention can retain data for a long time even in a high temperature environment, and can operate at high speed even in a low temperature environment. By applying the storage device according to one embodiment of the present invention to the above-mentioned various electronic devices, it is possible to provide an electronic device with high reliability that can reliably operate in a high temperature environment or a low temperature environment. In addition, the power consumption of the electronic device can be reduced.

[0565] In addition, this embodiment mode can be implemented in combination with other embodiment modes described in this specification as appropriate.

[0566] [Explanation of symbols]

[0567] C11 capacitor, C21 capacitor, C22 capacitor, C24 capacitor, IN1 input terminal, IN2 input terminal, M11 transistor, M12 transistor, M13 transistor, M14 transistor, M15 transistor, M16 transistor, M21 transistor, M24 transistor, M31 transistor, M34 transistor, M41 transistor, M51 transistor, M52 transistor, M53 transistor, M54 transistor, M55 transistor, M56 transistor, N11 node, N12 node, N13 node, N14 node, N21 node, N22 node, N23 node, N24 node, R11 resistor, S1 oxide, SW1 switch, SW2 switch, 11 transistor, 12 transistor, 1 3 transistor, 14 transistor, 15 transistor, 16 transistor, 17 transistor, 18 transistor, 19 transistor, 20 transistor, 21 transistor, 31 transistor, 32 transistor, 33 transistor, 34 transistor, 35 transistor, 36 transistor, 37 transistor, 38 transistor, 39 transistor, 40 transistor, 41 transistor, 50 potential generating circuit, 51 potential generating circuit, 52 temperature sensor circuit, 53 buffer, 54 circuit, 55 circuit, 56 temperature measuring resistor, 57 thermistor, 58 thermistor, 59 thermistor, 60 thermistor, 61 thermistor, 62 thermistor, 63 thermistor, 64 thermistor, 71 transistor, 72 transistor, 73 crystal a transistor, a transistor 74, a transistor 75, a transistor 76, a transistor 77, a transistor 78, a transistor 79, a transistor 81, a transistor 82, a transistor 83, a transistor 84, a transistor 85, a transistor 86, a transistor 87, a transistor 88, a transistor 89, a memory 100, a memory 101, a peripheral circuit 111, a row decoder 121, a word line driver circuit 122, a word line driver circuit 123, a bit line driver circuit 130, a column decoder 131, a precharge circuit 132, a sense amplifier 133, a circuit 134, an output circuit 140, a power supply device 150, a power supply device 151, a control logic circuit 160, a memory cell array 201, a memory cell array 202, a memory cell 211, 212 memory cell, 213 memory cell, 214 memory cell, 221 memory cell, 222 memory cell, 223 memory cell, 224 memory cell, 231 memory cell, 232 memory cell, 234 memory cell, 242 memory cell, 244 memory cell, 300 transistor, 311 substrate, 313 semiconductor region, 314a low resistance region, 314b low resistance region, 315 insulator, 316 conductor, 320 insulator, 322 insulator, 324 insulator, 326 insulator, 328 conductor, 330 conductor, 350 insulator, 352 insulator, 354 insulator, 356 conductor, 360 insulator, 362 insulator, 364 insulator, 366 conductor,370 insulator, 372 insulator, 374 insulator, 376 conductor, 380 insulator, 382 insulator, 384 insulator, 386 conductor, 500 transistor, 503 conductor, 503a conductor, 503b conductor, 505 conductor, 505a conductor, 505b conductor, 510 insulator, 510A transistor, 510B transistor, 510C transistor, 510D transistor, 511 insulator, 512 insulator, 514 insulator, 516 insulator, 518 conductor body, 520 insulator, 521 insulator, 522 insulator, 524 insulator, 530 oxide, 530a oxide, 530b oxide, 530c oxide, 531a region, 531b region, 540a conductor, 540b conductor, 542 conductor, 542a conductor, 542b conductor, 543 region, 543a region, 543b region, 544 insulator, 545 insulator, 546 conductor, 546a conductor, 546b conductor, 547 conductor, 547 a conductor, 547b conductor, 548 conductor, 550 insulator, 552 metal oxide, 560 conductor, 560a conductor, 560b conductor, 570 insulator, 571 insulator, 573 insulator, 574 insulator, 575 insulator, 576 insulator, 576a insulator, 576b insulator, 580 insulator, 581 insulator, 582 insulator, 584 insulator, 586 insulator, 600 capacitor, 610 conductor, 612 conductor, 620 conductor, 6 30 insulator, 650 insulator, 5200 portable game console, 5201 housing, 5202 display unit, 5203 button, 5300 desktop information terminal, 5301 main body, 5302 display, 5303 keyboard, 5500 information terminal, 5510 housing, 5511 display unit, 5700 automobile, 5701 display panel, 5702 display panel, 5703 display panel, 5704 display panel, 5800 electric refrigerator-freezer, 5801 housing, 5802 refrigerator door, 5803 freezer door,

Claims

1. A storage device, comprising: Driver circuit; as well as Multiple storage units, Wherein, the storage unit includes a transistor and a capacitor, One of the source and the drain of the transistor is electrically connected to one electrode of the capacitor, The transistor includes a metal oxide in a channel formation region, The transistor includes a first gate and a second gate, A signal input to the first gate and a signal input to the second gate are different from each other, The driver circuit is configured to drive the second gate of the transistor, Furthermore, while the memory cell holds data, even when a potential for turning off the transistor is supplied to the first gate, the driver circuit outputs a potential corresponding to the temperature of the memory device or the temperature of the environment in which the memory device is installed to the second gate.

2. A storage device, comprising: Temperature sensor; Driver circuit; as well as Multiple storage units, Wherein, the temperature sensor is configured to obtain temperature information, The memory cell includes a transistor and a capacitor. One of the source and the drain of the transistor is electrically connected to one electrode of the capacitor, The transistor includes a metal oxide in a channel formation region, The transistor includes a first gate and a second gate, A signal input to the first gate and a signal input to the second gate are different from each other, The driver circuit is configured to drive the second gate of the transistor, Furthermore, during a period in which the memory cell retains data, even when a potential for turning off the transistor is supplied to the first gate, the driver circuit outputs a potential corresponding to the temperature information to the second gate.

3. A storage device, comprising: Driver circuit; as well as Multiple storage units, Wherein, the storage unit includes a transistor and a capacitor, One of the source and the drain of the transistor is electrically connected to one electrode of the capacitor, The transistor includes a metal oxide in a channel formation region, The transistor includes a first gate and a second gate, A signal input to the first gate and a signal input to the second gate are different from each other, The driver circuit is configured to output a first potential or a second potential to the second gate of the transistor, During a period in which the memory cell retains data, even when a potential for turning off the transistor is supplied to the first gate, the driver circuit outputs the second potential to the second gate, Furthermore, the second potential changes according to the temperature of the storage device or the temperature of an environment in which the storage device is installed.

4. A storage device, comprising: Temperature sensor; Driver circuit; as well as Multiple storage units, Wherein, the temperature sensor is configured to obtain temperature information, The memory cell includes a transistor and a capacitor. One of the source and the drain of the transistor is electrically connected to one electrode of the capacitor, The transistor includes a metal oxide in a channel formation region, The transistor includes a first gate and a second gate, A signal input to the first gate and a signal input to the second gate are different from each other, The driver circuit is configured to output a first potential or a second potential to the second gate of the transistor, During a period in which the memory cell retains data, even when a potential for turning off the transistor is supplied to the first gate, the driver circuit outputs the second potential to the second gate, Furthermore, the second potential changes according to the temperature information.

5. The storage device according to any one of claims 1 to 4, The second gate is electrically connected to the first gate.

6. The storage device according to any one of claims 1 to 4, The first gate and the second gate have overlapping regions with the semiconductor layer interposed therebetween.

7. The storage device according to any one of claims 1 to 4, wherein: The high level potential of the signal input to the first gate is higher than the high level potential of the signal input to the second gate, Furthermore, a low-level potential of the signal input to the first gate is higher than a low-level potential of the signal input to the second gate.

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