Display panel and manufacturing method thereof, and display device

By setting open holes on the touch electrode layer of the embedded OLED panel and covering the protective layer, the parasitic capacitance between the display panel cathode is reduced, and the problem of insufficient touch signal sensitivity is solved, thereby achieving higher touch sensitivity and production efficiency.

CN111584600BActive Publication Date: 2025-04-22BOE TECHNOLOGY GROUP CO LTD +1
View PDF 4 Cites 0 Cited by

Patent Information

Application Number
CN202010462388.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2020-05-27
Publication Date
2025-04-22
Estimated Expiration
2040-05-27

AI Technical Summary

Technical Problem

In the embedded OLED panel, a large parasitic capacitance is generated between the touch electrode and the display panel cathode, which affects the sensitivity of the touch electrode to external touch signals.

Method used

By setting openings on the touch electrode layer corresponding to the pixel support layer and covering the openings through the protective layer, the parasitic capacitance generated by the second electrode and the touch electrode above the pixel support layer is reduced. In addition, by etching the protective layer between the plurality of openings, the parasitic capacitance generated by the second electrode and the touch electrode layer between the pixel support layer is reduced.

Benefits of technology

It effectively reduces the parasitic capacitance, improves the sensitivity of the touch electrode, and has simple process, high production efficiency, and has the advantages of low production cost and high yield.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN111584600B_ABST
    Figure CN111584600B_ABST
Patent Text Reader

Abstract

A display panel and a manufacturing method thereof, and a display device, wherein the display panel comprises a display substrate and a cover plate arranged relatively to each other, wherein the display substrate comprises an array substrate, a pixel definition layer located on the array substrate, a pixel support layer located on a side of the pixel definition layer away from the array substrate, and a second electrode located on a side of the pixel support layer away from the pixel definition layer; the cover plate comprises a first substrate, a touch electrode layer and a protective layer arranged on the first substrate, wherein the touch electrode layer is provided with a plurality of openings; the protective layer covers the plurality of openings; the orthographic projection of the openings on the array substrate coincides with the orthographic projection of the surface of the pixel support layer on a side away from the array substrate on the array substrate. The present application reduces the parasitic capacitance generated by the second electrode above the pixel support layer and the touch electrode by arranging openings at positions corresponding to the pixel support layer on the touch electrode layer and covering the openings with the protective layer.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present application relates to but is not limited to the field of display technology, and in particular to a display panel and a method for preparing the same, and a display device. Background Art

[0002] Organic Light Emitting Diode (OLED) is an active light-emitting display device with the advantages of self-luminescence, wide viewing angle, high contrast, low power consumption, and extremely high response speed. With the continuous development of display technology, OLED technology is increasingly used in flexible display devices.

[0003] The embedded touch screen sets the touch electrode structure inside the display panel, which has the advantages of simple structure, light weight, thinness and low cost, and is becoming the mainstream technology of touch screens. However, in the embedded OLED panel, a large parasitic capacitance is generated between the touch electrode and the cathode of the display panel, so that the current passing through the cathode has a greater impact on the capacitance value, affecting the sensitivity of the touch electrode to external touch signals. Summary of the invention

[0004] Embodiments of the present application provide a display panel and a method for manufacturing the same, and a display device, which can reduce the parasitic capacitance generated between a touch electrode and a cathode of the display panel.

[0005] An embodiment of the present application provides a display panel, comprising a display substrate and a cover plate arranged relatively to each other, wherein: the display substrate comprises an array substrate, a pixel definition layer located on the array substrate, a pixel support layer located on a side of the pixel definition layer away from the array substrate, and a second electrode located on a side of the pixel support layer away from the pixel definition layer; the cover plate comprises a first substrate and a touch electrode layer and a protective layer arranged on the first substrate, wherein a plurality of openings are arranged on the touch electrode layer; the protective layer covers the plurality of openings; and the orthographic projection of the openings on the array substrate coincides with the orthographic projection of a surface of the pixel support layer on a side away from the array substrate on the array substrate.

[0006] Optionally, the protective layer includes a plurality of protective columns arranged at intervals, and the protective columns cover the openings.

[0007] Optionally, the longitudinal section of the protection column is hexagonal.

[0008] Optionally, a length of the protection column in a direction perpendicular to the cover plate is greater than a length of the touch electrode layer in a direction perpendicular to the cover plate.

[0009] Optionally, the second electrode, the protection column and the touch electrode layer between adjacent pixel definition layers form a closed space, and the closed space is in a vacuum state or filled with nitrogen or an inert gas.

[0010] An embodiment of the present application further provides a display device, comprising the aforementioned display panel.

[0011] An embodiment of the present application also provides a method for preparing a display panel, comprising: separately forming a display substrate and a cover plate, wherein the display substrate comprises an array substrate, a pixel definition layer located on the array substrate, a pixel support layer located on a side of the pixel definition layer away from the array substrate, and a second electrode located on a side of the pixel support layer away from the pixel definition layer; the cover plate comprises a first substrate and a touch electrode layer and a protective layer arranged on the first substrate, the touch electrode layer is provided with a plurality of openings, and the protective layer covers the plurality of openings; and bonding and packaging the display substrate and the cover plate, wherein the orthographic projection of the opening on the array substrate coincides with the orthographic projection of a surface of the pixel support layer on a side away from the array substrate on the array substrate.

[0012] Optionally, forming the cover plate includes: forming a touch electrode layer on the first substrate, and forming a plurality of openings on the touch electrode layer; and forming a protective layer on the touch electrode layer, wherein the protective layer covers the plurality of openings.

[0013] Optionally, forming the cover plate further includes: etching the protective layer between the plurality of openings to form a plurality of protective columns disposed at intervals, wherein the protective columns cover the openings.

[0014] Optionally, bonding and packaging the display substrate and the cover plate includes: bonding and packaging the display substrate and the cover plate in a vacuum, nitrogen or inert gas, so that the enclosed space formed by the second electrode, the protective column and the touch electrode layer between adjacent pixel definition layers is in a vacuum state or filled with nitrogen or inert gas.

[0015] The embodiment of the present application provides a display panel and a method for manufacturing the same, and a display device, which reduces the parasitic capacitance generated between the second electrode above the pixel support layer and the touch electrode by setting an opening at a position corresponding to the pixel support layer on the touch electrode layer and covering the opening with a protective layer. In addition, the present application reduces the parasitic capacitance generated between the second electrode between the pixel support layer and the touch electrode layer by etching the protective layer between the plurality of openings, has a simple preparation process, high production efficiency, and has the advantages of low production cost and high yield, and has good application prospects.

[0016] Of course, it is not necessary to achieve all the advantages described above at the same time for any product or method of implementing the present application. Other features and advantages of the present application will be described in the subsequent description embodiments, and partly become apparent from the description embodiments, or be understood by implementing the present application. The purposes and other advantages of the embodiments of the present application can be achieved and obtained by the structures specifically pointed out in the description and the drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The accompanying drawings are used to provide a further understanding of the technical solution of the present application and constitute a part of the specification. Together with the embodiments of the present application, they are used to explain the technical solution of the present application and do not constitute a limitation on the technical solution of the present application. The shapes and sizes of the components in the accompanying drawings do not reflect the actual proportions and are only intended to illustrate the content of the present application.

[0018] Figure 1 A schematic diagram of the structure of a display panel according to an embodiment of the present application;

[0019] Figure 2 This is a schematic diagram of an array substrate after preparing a pixel structure layer pattern according to an embodiment of the present application;

[0020] Figure 3 This is a schematic diagram of an array substrate after a flat layer pattern is formed according to an embodiment of the present application;

[0021] Figure 4 This is a schematic diagram of an array substrate after a first electrode pattern is formed in an embodiment of the present application;

[0022] Figure 5 This is a schematic diagram of an array substrate after forming a pixel definition layer pattern according to an embodiment of the present application;

[0023] Figure 6 This is a schematic diagram of an array substrate after a pixel support layer pattern is formed according to an embodiment of the present application;

[0024] Figure 7 This is a schematic diagram of an array substrate after an organic light-emitting layer pattern is formed in an embodiment of the present application;

[0025] Figure 8 This is a schematic diagram of an array substrate after forming a second electrode pattern according to an embodiment of the present application;

[0026] Fig. 9 This is a schematic diagram of a first substrate after a touch electrode layer pattern is formed according to an embodiment of the present application;

[0027] Fig.10 This is a schematic diagram of a first substrate after a protective layer pattern is formed in an embodiment of the present application;

[0028] Fig.11The figure is a schematic flow chart of a method for manufacturing a display panel according to an embodiment of the present application.

[0029] Description of reference numerals:

[0030] 10—array substrate; 20—pixel structure layer; 21—thin film transistor;

[0031] 30—planar layer; 40—first electrode; 50—pixel definition layer;

[0032] 60—pixel support layer; 70—organic light emitting layer; 80—second electrode;

[0033] 90—first substrate; 100—touch electrode layer; 101—opening;

[0034] 110—Protective layer. DETAILED DESCRIPTION

[0035] The specific implementation methods of the present application are further described in detail below in conjunction with the accompanying drawings and examples. The following examples are used to illustrate the present application, but are not intended to limit the scope of the present application. It should be noted that, in the absence of conflict, the embodiments in the present application and the features in the embodiments can be combined arbitrarily with each other.

[0036] The embodiments of the present application provide a display panel and a method for manufacturing the same, and a display device, which can reduce the parasitic capacitance generated between the touch electrode and the cathode of the display panel.

[0037] An embodiment of the present application provides a display panel, comprising a display substrate and a cover plate arranged relatively to each other, wherein: the display substrate comprises an array substrate, a pixel definition layer located on the array substrate, a pixel support layer located on a side of the pixel definition layer away from the array substrate, and a second electrode located on a side of the pixel support layer away from the pixel definition layer; the cover plate comprises a first substrate and a touch electrode layer and a protective layer arranged on the first substrate, wherein a plurality of openings are arranged on the touch electrode layer; the protective layer covers the plurality of openings; the orthographic projection of the openings on the array substrate coincides with the orthographic projection of a surface of the pixel support layer on a side away from the array substrate on the array substrate.

[0038] The display panel provided by the embodiment of the present application reduces the parasitic capacitance generated by the second electrode above the pixel support layer and the touch electrode by setting an opening at a position corresponding to the pixel support layer on the touch electrode layer and covering the opening with a protective layer. In addition, the present application reduces the parasitic capacitance generated by the second electrode between the pixel support layers and the touch electrode layer by etching the protective layer between the plurality of openings. The preparation process is simple, the production efficiency is high, and it has the advantages of low production cost and high yield rate, and has good application prospects.

[0039] The technical solution of the present application is described in detail below through specific embodiments.

[0040] Figure 1 Schematic diagram of the structure of a display panel according to an embodiment of the present application. The display panel according to the present embodiment is a top emission structure. The main structure of the display panel according to the present embodiment includes a plurality of pixel units arranged in a matrix, and each pixel unit includes a plurality of sub-pixels. Figure 1 As shown, the display panel of this embodiment includes a display substrate and a cover plate which are arranged opposite to each other.

[0041] The display substrate includes an array substrate 10, a pixel definition layer 50 located on the array substrate 10, a pixel support layer 60 located on a side of the pixel definition layer 50 away from the array substrate 10, and a second electrode 80 located on a side of the pixel support layer 60 away from the pixel definition layer 50.

[0042] The cover plate includes a first substrate 90 and a touch electrode layer 100 and a protective layer 110 arranged on the first substrate 90, and a plurality of openings 101 are arranged on the touch electrode layer 100; the protective layer 110 covers the plurality of openings 101; the orthographic projection of the openings 101 on the array substrate 10 coincides with the orthographic projection of the surface of the pixel support layer 60 on the side away from the array substrate 10 on the array substrate 10.

[0043] In an exemplary embodiment, the protection layer 110 includes a plurality of protection columns disposed at intervals, and the protection columns cover the opening 101 .

[0044] In an example of this embodiment, each protection column may cover one or more openings 101 .

[0045] In an exemplary embodiment, the longitudinal section of the protection column is hexagonal.

[0046] In an exemplary embodiment, the length of the protection column in the direction perpendicular to the cover plate is greater than the length of the touch electrode layer 100 in the direction perpendicular to the cover plate.

[0047] In an exemplary embodiment, the second electrode 80 , the protection column and the touch electrode layer 100 between adjacent pixel definition layers 50 form a closed space, and the closed space is in a vacuum state or filled with nitrogen or an inert gas.

[0048] The technical solution of this embodiment is further explained below through the preparation process of the display panel of this embodiment. Among them, the "composition process" mentioned in this embodiment includes deposition of film layers, coating of photoresist, mask exposure, development, etching, stripping of photoresist and other processes, and the "photolithography process" mentioned in this embodiment includes coating of film layers, mask exposure, development and other processes, which are mature preparation processes in related technologies. Deposition can adopt known processes such as sputtering and chemical vapor deposition, coating can adopt known coating processes, and etching can adopt known methods, which are not specifically limited here.

[0049] The manufacturing process of the display panel of this embodiment mainly includes: (i) preparing a display substrate and a cover plate separately, and (ii) bonding and packaging the display substrate and the cover plate.

[0050] Wherein, the preparation of the display substrate in step (1) comprises:

[0051] (1) A pixel structure layer 20 pattern is formed on the array substrate 10, such as Figure 2 As shown. The pixel structure layer 20 includes a plurality of gate lines and a plurality of data lines, and the plurality of gate lines and the plurality of data lines are vertically crossed to define a plurality of pixel units arranged in a matrix, each pixel unit includes at least 3 sub-pixels, and each sub-pixel includes a thin film transistor (Thin Film Transistor, TFT) 21. In the present embodiment, a pixel unit may include 3 sub-pixels, namely a red sub-pixel R, a green sub-pixel G and a blue sub-pixel B. Of course, the scheme of the present embodiment is also applicable to the case where a pixel unit includes 4 sub-pixels (red sub-pixel R, green sub-pixel G, blue sub-pixel B and white sub-pixel W). In the present embodiment, the structure and preparation process of the pixel structure layer 20 are the same as the existing structure and preparation process. For example, the preparation process may include: first cleaning the substrate, then preparing an active layer on the substrate by a patterning process, then forming a first insulating layer covering the active layer, forming a gate line and a gate electrode on the first insulating layer, then forming a second insulating layer covering the gate line and the gate electrode, and forming a data line, a source electrode and a drain electrode on the second insulating layer. The thin film transistor may be a bottom gate structure or a top gate structure, and may be an amorphous silicon (a-Si) thin film transistor, a low temperature polycrystalline silicon (LTPS) thin film transistor or an oxide thin film transistor, and no specific limitation is made here. In actual implementation, the array substrate may be made of a highly light-transmitting material such as glass, quartz, polyolefin resin, polyethylene naphthalate resin, polyimide resin, polyethylene terephthalate plastic, phenolic resin, or a surface-treated polymer soft film.

[0052] (2) A first flat film is coated on the array substrate 10 having the aforementioned pattern formed thereon to form a flat (PLN) layer 30 covering the entire array substrate 10, a via hole is formed on the first flat layer 30 by a patterning process, and the flat layer 30 in the via hole is etched away to expose the surface of the drain electrode of the thin film transistor 21, such as Figure 3 shown.

[0053] (3) forming a first electrode 40 pattern on the substrate on which the aforementioned pattern is formed. The formation of the first electrode 40 pattern includes: depositing a first metal film on the substrate on which the aforementioned pattern is formed, coating a layer of photoresist on the first metal film, exposing the photoresist using a single-tone mask to form an unexposed area at the location of the first electrode, forming a fully exposed area at other locations, developing and removing the photoresist in the fully exposed area, then etching away the first metal film in the fully exposed area, and stripping off the photoresist to form the first electrode 40 pattern, wherein the first electrode 40 of each sub-pixel is connected to the drain electrode of the thin film transistor 21 in the sub-pixel, such as Figure 4 As shown. Since the display panel of this embodiment is a top emission structure, the first electrode is a reflective electrode, and a metal with high reflectivity, such as silver Ag, gold Au, palladium Pd, platinum Pt, etc., or an alloy of these metals, or a composite layer of these metals can be used. In actual implementation, a composite layer structure of an indium tin oxide ITO layer and a metal reflective layer can also be used, which has good conductivity, high reflectivity, and good morphological stability.

[0054] (4) forming a pixel definition layer 50 pattern on the substrate formed with the aforementioned pattern. Forming the pixel definition layer 50 pattern includes: coating a pixel definition film on the substrate formed with the aforementioned pattern, exposing and developing the pixel definition film using a single-tone mask to form the pixel definition layer 50 pattern, such as Figure 5 The pixel definition layer 50 is used to define a pixel opening region in each sub-pixel, and the pixel opening region exposes the first electrode 40. In this embodiment, the pixel definition layer (Pixel Define Layer) can be made of polyimide, acrylic or polyethylene terephthalate.

[0055] (5) coating an organic material thin film on the substrate formed with the aforementioned pattern, and forming a pixel support (PS) layer 60 pattern through masking, exposure, and development processes. The pixel support layer 60 is arranged on the side of the pixel definition layer away from the array substrate, such as Figure 6 The pixel support layer 60 is used to support the mask, so as to avoid direct contact between the mask and the film layer to be formed when the film layer is formed on the pixel definition layer 50 .

[0056] (6) forming an organic light emitting layer 70 on the substrate having the aforementioned pattern, such as Figure 7As shown. The organic light-emitting layer 70 may include a stacked hole injection layer (HIL), a hole transport layer (HTL), a light-emitting layer (EML), an electron transport layer (ETL) and an electron injection layer (EIL), wherein the hole transport layer (HTL), the light-emitting layer (EML), the electron transport layer (ETL) and the electron injection layer (EIL) are sequentially arranged on the hole injection layer. The organic light-emitting layer 70 is formed in the pixel opening area to realize the connection between the organic light-emitting layer 70 and the first electrode 40. Since the first electrode 40 is connected to the drain electrode of the thin film transistor 21, the light emission control of the organic light-emitting layer 70 is realized.

[0057] (7) forming a second electrode 80 pattern on the substrate on which the aforementioned pattern is formed. Forming the second electrode 80 pattern includes: depositing a second metal film on the substrate on which the aforementioned pattern is formed, and patterning the second metal film through a patterning process to form the second electrode 80 pattern, such as Figure 8 As shown. Since the display panel of this embodiment is a top emission structure, the second electrode can be a transmissive electrode or a semi-transmissive and semi-reflective electrode. The transmissive electrode can be made of one of the metal materials such as magnesium Mg, silver Ag, aluminum Al, copper Cu, lithium Li, or an alloy of the above metals, and the semi-transmissive and semi-reflective electrode can be made of a metal of a semi-transmissive and semi-reflective material.

[0058] Through the above process, the preparation of the display substrate of this embodiment is completed.

[0059] Wherein, the preparation of the cover plate in step (1) comprises:

[0060] (1) A conductive film is formed on the first substrate 90 by a sputtering process, and then a touch sensor layer 100 covering the entire first substrate is formed by an exposure and development process. A plurality of openings 101 are formed on the touch sensor layer by a patterning process, and the touch sensor layer 100 in the openings 101 is etched away to expose the surface of the first substrate 90. Fig. 9 The material of the touch electrode may be at least one of indium tin oxide (ITO), indium zinc oxide (IZO), or indium gallium zinc oxide (IGZO).

[0061] (2) A protective layer 110 is formed on the side of the touch electrode layer 100 away from the first substrate 90. The protective layer 110 may be made of silicon oxide, silicon nitride, or a composite of silicon oxide and silicon nitride. The embodiment of the present application does not impose any limitation on this. The protective layer 110 between the plurality of openings 101 is etched to form a plurality of protective columns arranged at intervals. The openings 101 are covered by the protective columns. Fig.10 shown.

[0062] Through the above process, the cover plate of this embodiment is prepared.

[0063] Wherein, step (ii) includes: firstly turning over the cover plate (or display substrate), facing the surface of the cover plate with the structural layer formed thereon toward the surface of the display substrate with the structural layer formed thereon, aligning the cover plate with the display substrate, and then bonding and encapsulating the cover plate with the display substrate, and at the same time connecting the protective column on the cover plate to the second electrode on the display substrate, to form the organic light emitting diode display panel of this embodiment, such as Figure 1 The protective column corresponds to the position of the pixel support layer, and the second electrode, the protective column and the touch electrode layer between adjacent pixel definition layers form a closed space.

[0064] In an exemplary embodiment, the cover plate is bonded and packaged with the display substrate in a vacuum, nitrogen or inert gas, so that the enclosed space formed by the second electrode, the protective column and the touch electrode layer between adjacent pixel definition layers can be a vacuum, or filled with nitrogen or an inert gas. Since the dielectric constant of the vacuum, nitrogen or inert gas is smaller than the dielectric constant of the protective layer (such as silicon oxide SiOx), this can effectively reduce the parasitic capacitance here. The inert gas can use commonly used argon (Ar), as well as natural gases such as helium (He), neon (Ne), krypton (Kr), and xenon (Xe), or artificially synthesized inert gases.

[0065] It can be seen from the above preparation process that the display panel provided by the embodiment of the present application etches away the corresponding touch electrode metal above the pixel support layer so that no parasitic capacitance is formed in the area above the pixel support layer, where the parasitic capacitance is the main influencing factor; in addition, by etching away the protective layer in the area between adjacent pixel support layers (positions without pixel support layers), the intermediate capacitor medium is made into a vacuum or nitrogen or an inert gas, and the dielectric constant is smaller than that of the protective layer, so that the parasitic capacitance in the area between adjacent pixel support layers can be reduced. The present application changes the channel capacitance by changing the morphology of the protective layer 110 and the touch electrode layer 100, effectively reducing the parasitic capacitance between the cathode and the touch electrode layer, improving the touch sensitivity, and the process is simple to implement, as long as the mask of the lower cover plate process is designed and changed, it can be implemented, and has good application prospects.

[0066] Although the display panel of this embodiment is described as a top emission structure, the solution of this embodiment is also applicable to a bottom emission structure or a double-sided emission structure, and is also applicable to large-size or small-size OLED display panels.

[0067] The present application also provides a method for preparing a display panel. Fig.11 As shown, the method for preparing the display panel in the embodiment of the present application includes:

[0068] S1. Forming a display substrate and a cover plate respectively, wherein the display substrate comprises an array substrate, a pixel definition layer located on the array substrate, a pixel support layer located on a side of the pixel definition layer away from the array substrate, and a second electrode located on a side of the pixel support layer away from the pixel definition layer; the cover plate comprises a first substrate, and a touch electrode layer and a protective layer disposed on the first substrate, wherein a plurality of openings are disposed on the touch electrode layer, and the protective layer covers the plurality of openings;

[0069] S2, the display substrate and the cover plate are bonded and packaged, and the orthographic projection of the opening on the array substrate coincides with the orthographic projection of the surface of the pixel support layer on the side away from the array substrate on the array substrate.

[0070] In one exemplary embodiment, a cover plate is formed, including:

[0071] forming a touch electrode layer on the first substrate, and forming a plurality of openings on the touch electrode layer;

[0072] A protective layer is formed on the touch electrode layer, and the protective layer covers the plurality of openings.

[0073] In an exemplary embodiment, a cover plate is formed, further comprising:

[0074] The protective layer between the plurality of openings is etched to form a plurality of protective columns arranged at intervals, and the protective columns cover the openings.

[0075] In an exemplary embodiment, the longitudinal section of the protection column is hexagonal.

[0076] In an exemplary embodiment, a length of the protection column in a direction perpendicular to the cover plate is greater than a length of the touch electrode layer in a direction perpendicular to the cover plate.

[0077] In an exemplary embodiment, a display substrate and a cover plate are bonded and packaged, including:

[0078] The display substrate and the cover plate are bonded and packaged in a vacuum, nitrogen or inert gas, so that the closed space formed by the second electrode, the protection column and the touch electrode layer between adjacent pixel definition layers is in a vacuum state or filled with nitrogen or inert gas.

[0079] This embodiment provides a method for manufacturing a display panel, by providing an opening at a position corresponding to the pixel support layer on the touch electrode layer, and covering the opening with a protective layer, the parasitic capacitance generated by the second electrode above the pixel support layer and the touch electrode is reduced. In addition, by etching the protective layer between the plurality of openings, the parasitic capacitance generated by the second electrode between the pixel support layers and the touch electrode layer is reduced, the manufacturing process is simple, the production efficiency is high, the advantages of low production cost and high yield rate are obtained, and the method has good application prospects.

[0080] The present application also provides a display device, including the display panel of the above embodiment. The display device can be any product or component with display function, such as a mobile phone, tablet computer, television, monitor, notebook computer, digital photo frame, navigator, etc.

[0081] In the description of the embodiments of the present application, it should be understood that the terms "middle", "upper", "lower", "front", "back", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0082] In the description of the embodiments of the present application, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0083] Although the embodiments disclosed in this application are as above, the contents described are only embodiments adopted to facilitate understanding of this application and are not intended to limit this application. Any technician in the field to which this application belongs can make any modifications and changes in the form and details of implementation without departing from the spirit and scope disclosed in this application, but the scope of patent protection of this application shall still be based on the scope defined in the attached claims.

Claims

1. A display panel, characterized in that: It includes a display substrate and a cover plate which are arranged opposite to each other, wherein: The display substrate comprises an array substrate, a pixel definition layer located on the array substrate, a pixel support layer located on a side of the pixel definition layer away from the array substrate, and a second electrode located on a side of the pixel support layer away from the pixel definition layer; The cover plate includes a first substrate, a touch electrode layer and a protective layer arranged on the first substrate, the touch electrode layer is provided with a plurality of openings; the protective layer covers the plurality of openings; the orthographic projection of the openings on the array substrate coincides with the orthographic projection of the surface of the pixel support layer on the side away from the array substrate on the array substrate; The protective layer comprises a plurality of protective columns arranged at intervals, the longitudinal section of the protective columns is hexagonal, the protective columns cover the openings, the surface of the protective columns close to the first substrate is connected to the first substrate, and the surface of the protective columns away from the first substrate is connected to the second electrode; The second electrode, the protection column and the touch electrode layer between adjacent pixel definition layers form a closed space, and the closed space is in a vacuum state or filled with nitrogen or an inert gas.

2. The display panel according to claim 1, characterized in that: The length of the protection column in a direction perpendicular to the cover plate is greater than the length of the touch electrode layer in a direction perpendicular to the cover plate.

3. A display device, characterized in that: A display panel comprising any one of claims 1 to 2.

4. A method for preparing a display panel, characterized in that: include: A display substrate and a cover plate are formed respectively, wherein the display substrate comprises an array substrate, a pixel definition layer located on the array substrate, a pixel support layer located on a side of the pixel definition layer away from the array substrate, and a second electrode located on a side of the pixel support layer away from the pixel definition layer; the cover plate comprises a first substrate, a touch electrode layer and a protective layer arranged on the first substrate, the touch electrode layer is provided with a plurality of openings, and the protective layer covers the plurality of openings; the protective layer comprises a plurality of protective columns arranged at intervals, the longitudinal section of the protective columns is hexagonal, the protective columns cover the openings, the surface of the protective columns close to the first substrate is connected to the first substrate, and the surface of the protective columns away from the first substrate is connected to the second electrode; The display substrate and the cover plate are bonded and packaged, and the orthographic projection of the opening on the array substrate coincides with the orthographic projection of the surface of the pixel support layer on the side away from the array substrate on the array substrate; The step of bonding and packaging the display substrate and the cover plate comprises: bonding and packaging the display substrate and the cover plate in a vacuum, nitrogen or inert gas, so that the enclosed space formed by the second electrode, the protective column and the touch electrode layer between adjacent pixel definition layers is in a vacuum state or filled with nitrogen or inert gas.

5. The preparation method according to claim 4, characterized in that: Forming the cover plate includes: forming the touch electrode layer on the first substrate, and forming a plurality of openings on the touch electrode layer; The protective layer is formed on the touch electrode layer, and the protective layer covers the plurality of openings.

6. The preparation method according to claim 5, characterized in that: The cover plate is formed, further comprising: The protective layer between the plurality of openings is etched to form a plurality of protective columns arranged at intervals, wherein the protective columns cover the openings.

Citation Information

Patent Citations

  • Touch display apparatus

    CN108563353A

  • Touch display panel and touch display device

    CN110045867A

  • Touch display panel and touch display device

    CN110209306A

  • OLED display panel and a display device

    CN110660838A