A controller anti-reverse connection protection circuit

Abstract

The present invention discloses a controller anti-reverse connection protection circuit, including a function monitor chip, a power supply circuit, and a drive circuit. The power supply circuit is connected to the function monitor chip and the drive circuit respectively, and the function monitor chip is connected to the drive circuit. The power supply circuit is used to supply power to the function monitor chip and the drive circuit respectively; the function monitor chip is connected to the drive circuit and controls the opening and closing of the drive circuit; the drive circuit is used to connect and control the on and off of the negative pole of the controller power supply, thereby realizing the control of the controller startup and shutdown, and protecting the controller from damage when the positive and negative poles of the controller are reversely connected or short-circuited.

Description

Technical Field

[0001] The invention relates to a controller circuit, in particular to a controller anti-reverse connection protection circuit. Background Art

[0002] The controller of an electric vehicle is the driving unit of the entire vehicle. During operation, the controller may be damaged due to reverse connection or short circuit of the controller power supply due to misoperation or aging and damage of the wiring harness insulation layer. Currently, there is no effective solution to this fault in the industry. The more mature technologies are used for power management and are lacking in controller protection, so improvements are needed. Summary of the invention

[0003] The present invention provides a new controller reverse connection protection circuit to solve the defects in the prior art that the controller power supply may be reversely connected or short-circuited due to misoperation or aging and damage of the wiring harness insulation layer, thereby causing damage to the controller.

[0004] In order to solve the above technical problems, the present invention is implemented by the following technical solutions:

[0005] A controller reverse connection protection circuit comprises a function monitor chip, a power supply circuit and a drive circuit. The power supply circuit is respectively connected to the function monitor chip and the drive circuit, and the function monitor chip is connected to the drive circuit.

[0006] The power supply circuit is used to supply power to the function monitor chip and the drive circuit respectively; the function monitor chip is connected to the drive circuit and controls the opening and closing of the drive circuit; the drive circuit is used to connect and control the on and off of the negative pole of the controller power supply, thereby controlling the startup and shutdown of the controller, protecting the controller and preventing damage when the positive and negative poles of the controller are reversed or short-circuited.

[0007] Preferably, the above-mentioned controller anti-reverse connection protection circuit, the power supply circuit includes a resistor R1, a resistor R11, a resistor R12, a resistor R15, a voltage regulator D3, and a voltage regulator D6, the DC power supply ACC is connected to the resistor R1, the resistor R1 is connected to the negative electrode of the voltage regulator D3, the positive electrode of the voltage regulator D3 is connected to DGND, one end of the resistor R12 is connected to the negative electrode of the voltage regulator D3, the other end of the resistor R12 is connected to the negative electrode of the voltage regulator D6, and the positive electrode of the voltage regulator D6 is connected to DGND ND, the negative electrode of the voltage regulator D3 forms a VCC1 connection end, the negative electrode of the voltage regulator D6 forms a VCC2 connection end, the VCC1 connection end is connected to the drive circuit, the VCC2 connection end is connected to the VCC pin on the function monitor chip, one end of the resistor R11 is connected to the negative electrode of the voltage regulator D3, one end of the resistor R15 is connected to the positive electrode of the voltage regulator D3, and the other ends of the resistor R11 and the other ends of the resistor R15 are both connected to the PFI pin on the function monitor chip.

[0008] In the breakdown state, the Zener diode D3 maintains a stable voltage to power the drive circuit; in the breakdown state, the Zener diode D6 maintains a stable voltage to power the function monitor chip; the resistor R11 and the resistor R15 are connected in parallel to the PFI pin to play a voltage divider role, which is used to limit the input voltage of the PFI pin on the function monitor chip, thereby protecting the function monitor chip from being burned; the resistor R1 and the resistor R12 are connected in series with the Zener diode D3 and the Zener diode D6 respectively, and the series resistors limit the current passing through the Zener diode to prevent the Zener diode from consuming too much power and burning due to heat. At the same time, the series resistors play a voltage divider role.

[0009] Preferably, the above-mentioned controller anti-reverse connection protection circuit, the driving circuit includes transistor Q1, transistor Q3, transistor Q4, NMOS tube Q2, NMOS tube Q5, voltage regulator D2, voltage regulator D4, resistor R6, resistor R7, resistor R8, the emitter of the transistor Q1 is connected to the VCC1 connection end, one end of the resistor R6 is connected to the emitter of the transistor Q1, the other end of the resistor R6 is connected to the base of the transistor Q1, one end of the resistor R7 is connected to the base of the transistor Q1, the other end of the resistor R7 is connected to the collector of the transistor Q3, the emitter of the transistor Q3 is connected to the collector of the transistor Q4, the emitter of the transistor Q4 is connected to DGND, the transistor Q1 The collector is connected to the negative electrode of the voltage regulator tube D2, the positive electrode of the voltage regulator tube D2 is connected to DGND, the gate of the NMOS tube Q2 and the gate of the NMOS tube Q5 are both connected to the negative electrode of the voltage regulator tube D2, the drain of the NMOS tube Q2 is connected to PGND, the drain of the NMOS tube Q5 is connected to GND, the source of the NMOS tube Q2 and the source of the NMOS tube Q5 are both connected to the positive electrode of the voltage regulator tube D2, the negative electrode of the voltage regulator tube D4 is connected in series with the resistor R8, the voltage regulator tube D4 and the resistor R8 are connected in parallel between the drain of the NMOS tube Q2 and the drain of the NMOS tube Q5, the base of the transistor Q3 is connected to the RESET pin on the function monitor chip, and the base of the transistor Q4 is connected to the PFO pin on the function monitor chip.

[0010] The base of transistor Q3 is connected to the RESET pin on the function monitor chip, and the conduction of transistor Q3 is controlled by the high or low output level of the RESET pin; transistor Q4 is connected to the PFO pin on the function monitor chip, and the conduction of transistor Q4 is controlled by the high or low output level of the PFO pin; transistor Q1 cooperates with resistor R6 to prevent reverse connection; resistor R7 is connected in series with the collector of transistor Q3 to play the role of voltage division and current limiting, thereby protecting the normal operation of transistor Q3; NMOS tube Q2 and NMOS tube Q5 are turned on when the gate voltage VGS≥15V, directly controlling the mutual conduction between PGND, DGND, and GND in the drive circuit, wherein PGND is connected to the negative pole of the main circuit in the controller power supply, and GND is connected to the negative pole of the load, thereby controlling the conduction and disconnection of the negative pole of the power supply of the main power supply circuit and the negative pole of the load.

[0011] Preferably, in the above-mentioned controller anti-reverse connection protection circuit, the driving circuit also includes a Zener diode D5 and a resistor R9, the cathode of the Zener diode D5 is connected in series with the resistor R9, and the Zener diode D5 and the resistor R9 are connected in parallel between the drain of the NMOS tube Q2 and the drain of the NMOS tube Q5.

[0012] When the forward current is large, the voltage regulator D5 is turned on, and when the reverse current is on, the voltage regulator D5 cuts off the current, and the resistor R9 plays the role of current limiting to protect the voltage regulator D5.

[0013] Preferably, in the above-mentioned controller anti-reverse connection protection circuit, the driving circuit also includes a resistor R10, a resistor R17, and a capacitor C1, the resistor R10 is connected in series between the collector of the transistor Q1 and the negative electrode of the voltage regulator D2, and the capacitor C1 and the resistor R17 are both connected in parallel at both ends of the voltage regulator D2.

[0014] The resistor R10 plays the role of voltage division and current limiting, which can improve the voltage stabilizing effect of the Zener diode D2 and protect the Zener diode D2; the parallel resistor R17 and capacitor C1 play the role of absorbing the surge current generated by the circuit when the power is turned on, as well as filtering and eliminating coupling, to prevent the Zener diode D2 from being damaged by the surge current.

[0015] Preferably, the above-mentioned controller reverse connection protection circuit also includes a resistor R13 and a resistor R14, one end of the resistor R13 is connected to the RESET pin on the function monitor chip, and the other end of the resistor R13 is connected to the base of the transistor Q3, one end of the resistor R14 is connected to the PFO pin on the function monitor chip, and the other end of the resistor R14 is connected to the base of the transistor Q4.

[0016] The resistors R13 and R14 limit the current and prevent the signal source from being overloaded, so as to achieve the purpose of impedance matching, thereby protecting the transistors Q3 and Q4 from working normally.

[0017] Preferably, the controller anti-reverse connection protection circuit described above further includes a resistor R16, one end of the resistor R16 is connected to the PFO pin on the function monitor chip, and the other end of the resistor R16 is connected to the PFI pin on the function monitor chip.

[0018] The resistor R16 serves to suppress the oscillation of the driving signal on the PFO pin.

[0019] Preferably, in the above-mentioned controller anti-reverse connection protection circuit, the power supply circuit further includes a voltage regulator tube D1, and the voltage regulator tube D1 is connected in series in a forward direction between the resistor R1 and the voltage regulator tube D3.

[0020] The resistor R1 is used in a power supply with a relatively high voltage to obtain a stable voltage. The resistor R1 is connected in series with the voltage regulator tube D3 to protect the voltage regulator tube D3 and stabilize the voltage across the voltage regulator tube D3.

[0021] Preferably, in the above-mentioned controller reverse connection protection circuit, the power supply circuit also includes resistors R2, R3, R4 and R5, and the resistors R2, R3, R4 and R5 are all connected in parallel with the resistor R1.

[0022] The resistors R2, R3, R4, R5 and R1 are connected in parallel to increase the power supply current.

[0023] Preferably, in the above-mentioned controller anti-reverse connection protection circuit, the power supply circuit also includes a capacitor C2 and a capacitor C3, the capacitor C2 is connected in parallel across the voltage regulator tube D3, and the capacitor C3 is connected in parallel across the voltage regulator tube D6.

[0024] The parallel capacitors C2 and C3 play the role of filtering and eliminating coupling. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 is a circuit diagram of a power supply circuit in the present invention;

[0026] Figure 2 is a circuit connection diagram of the function monitor chip in the present invention;

[0027] Figure 3 is a circuit diagram of a driving circuit in the present invention;

[0028] Figure 4 It is a circuit diagram of the present invention. DETAILED DESCRIPTION

[0029] The following is combined with Figure 1-4 The present invention is further described in detail with specific embodiments, but they are not intended to limit the present invention:

[0030] Example 1

[0031] A controller reverse connection protection circuit comprises a function monitor chip, a power supply circuit and a drive circuit. The power supply circuit is respectively connected to the function monitor chip and the drive circuit, and the function monitor chip is connected to the drive circuit.

[0032] During use of this solution, an external power supply is connected to the power supply circuit, the power supply circuit provides stable operating voltages for the function monitor chip and the drive circuit respectively, the drive circuit connects the negative power supply electrode and the negative load electrode of the main power supply circuit in the controller circuit, and the drive circuit controls the conduction between the negative power supply electrode and the negative load electrode according to the logic execution function of the function monitor chip, ultimately achieving the purpose of preventing the controller power supply from short circuit and reverse connection.

[0033] Preferably, the power supply circuit includes a resistor R1, a resistor R11, a resistor R12, a resistor R15, a Zener diode D3, and a Zener diode D6, a DC power supply ACC is connected to the resistor R1, the resistor R1 is connected to the negative electrode of the Zener diode D3, the positive electrode of the Zener diode D3 is connected to DGND, one end of the resistor R12 is connected to the negative electrode of the Zener diode D3, the other end of the resistor R12 is connected to the negative electrode of the Zener diode D6, the positive electrode of the Zener diode D6 is connected to DGND, the negative electrode of the Zener diode D3 forms a VCC1 connection end, the negative electrode of the Zener diode D6 forms a VCC2 connection end, the VCC1 connection end is connected to the drive circuit, the VCC2 connection end is connected to the VCC pin on the function monitor chip, one end of the resistor R11 is connected to the negative electrode of the Zener diode D3, one end of the resistor R15 is connected to the positive electrode of the Zener diode D3, the other end of the resistor R11 and the other end of the resistor R15 are both connected to the PFI pin on the function monitor chip.

[0034] Preferably, the driving circuit includes transistor Q1, transistor Q3, transistor Q4, NMOS tube Q2, NMOS tube Q5, voltage regulator D2, voltage regulator D4, resistor R6, resistor R7, resistor R8, the emitter of the transistor Q1 is connected to the VCC1 connection end, one end of the resistor R6 is connected to the emitter of the transistor Q1, the other end of the resistor R6 is connected to the base of the transistor Q1, one end of the resistor R7 is connected to the base of the transistor Q1, the other end of the resistor R7 is connected to the collector of the transistor Q3, the emitter of the transistor Q3 is connected to the collector of the transistor Q4, the emitter of the transistor Q4 is connected to DGND, and the collector of the transistor Q1 is connected to the voltage regulator The cathode of the transistor D2 is connected to DGND, the anode of the voltage regulator D2 is connected to DGND, the gate of the NMOS transistor Q2 and the gate of the NMOS transistor Q5 are both connected to the cathode of the voltage regulator D2, the drain of the NMOS transistor Q2 is connected to PGND, the drain of the NMOS transistor Q5 is connected to GND, the source of the NMOS transistor Q2 and the source of the NMOS transistor Q5 are both connected to the anode of the voltage regulator D2, the cathode of the voltage regulator D4 is connected in series with the resistor R8, the voltage regulator D4 and the resistor R8 are connected in parallel between the drain of the NMOS transistor Q2 and the drain of the NMOS transistor Q5, the base of the transistor Q3 is connected to the RESET pin on the function monitor chip, and the base of the transistor Q4 is connected to the PFO pin on the function monitor chip.

[0035] Preferably, the driving circuit further comprises a voltage regulator tube D5 and a resistor R9, wherein the cathode of the voltage regulator tube D5 is connected in series with the resistor R9, and the voltage regulator tube D5 and the resistor R9 are connected in parallel between the drain of the NMOS tube Q2 and the drain of the NMOS tube Q5.

[0036] Preferably, the driving circuit further includes a resistor R10, a resistor R17, and a capacitor C1, wherein the resistor R10 is connected in series between the collector of the transistor Q1 and the cathode of the voltage regulator D2, and the capacitor C1 and the resistor R17 are connected in parallel at both ends of the voltage regulator D2.

[0037] Preferably, it also includes a resistor R13 and a resistor R14, one end of the resistor R13 is connected to the RESET pin on the function monitor chip, and the other end of the resistor R13 is connected to the base of the transistor Q3, one end of the resistor R14 is connected to the PFO pin on the function monitor chip, and the other end of the resistor R14 is connected to the base of the transistor Q4.

[0038] Preferably, a resistor R16 is further included, one end of the resistor R16 is connected to a PFO pin on the function monitor chip, and the other end of the resistor R16 is connected to a PFI pin on the function monitor chip.

[0039] Preferably, the power supply circuit further includes a voltage regulator tube D1, and the voltage regulator tube D1 is connected in forward series between the resistor R1 and the voltage regulator tube D3.

[0040] Preferably, the power supply circuit further includes a resistor R2, a resistor R3, a resistor R4, and a resistor R5, and the resistors R2, R3, R4, and R5 are all connected in parallel with the resistor R1.

[0041] Preferably, the power supply circuit further includes a capacitor C2 and a capacitor C3, wherein the capacitor C2 is connected in parallel across the voltage regulator tube D3, and the capacitor C3 is connected in parallel across the voltage regulator tube D6.

[0042] More specifically, when an external power supply is connected to the present circuit and forward-conducted, the external current reaches a stable voltage value U1 after passing through the parallel resistor R1, the resistor R2, the resistor R3, the resistor R4, the resistor R5, and the Zener diode D1. The output voltage U1 after passing through the Zener diode D1 forms a voltage U2 at both ends of the Zener diode D3. After U1 is divided by R12, a voltage U3 is formed at both ends of the Zener diode D6. The voltage value of U2 is 15V, and the voltage value of U3 is 5V.

[0043] Voltage U3 activates the function monitor chip. The RESET pin on the function monitor chip outputs a high level after 200ms. The transistor Q3 is an NPN transistor. At this time, the transistor Q3 remains on after receiving a high level at the base. The PFI pin on the function monitor chip outputs a high level at the PFO pin after detecting the power input. The transistor Q4 is an NPN transistor. At this time, the transistor Q4 remains on after receiving a high level at the base. At this time, the current can pass through the drive circuit.

[0044] The voltage U2 on the VCC1 connection terminal acts on the emitter of transistor Q1. After the voltage is divided by resistor R6, the emitter voltage of transistor Q1 is greater than the base voltage. Transistor Q1 is a PNP transistor, and transistor Q1 is turned on at this time. The working current flows from the collector of transistor Q1 to the gate of NMOS transistor Q2 and the gate of NMOS transistor Q5 respectively. After the gate of NMOS transistor Q2 and NMOS transistor Q5 receives a high level, the drain and source of NMOS transistor Q2 and NMOS transistor Q5 are mutually conductive. At this time, PGND, DGND and GND are mutually connected, and the current conduction enables the controller to operate normally.

[0045] When short circuit or power supply is reversed, the base voltage of transistor Q1 is greater than the emitter voltage, transistor Q1 cannot be turned on, and the gates of NMOS transistors Q2 and Q5 cannot be turned on without receiving a high level, so that a complete current loop cannot be formed and the controller does not start.

[0046] In conclusion, the above is only a preferred embodiment of the present invention, and all equivalent changes and modifications made within the scope of the patent application of the present invention should fall within the scope of the present invention.

Claims

1. A controller reverse connection protection circuit, comprising a function monitor chip, characterized in that: It also includes a power supply circuit and a drive circuit, wherein the power supply circuit is connected to the function monitor chip and the drive circuit respectively, and the function monitor chip is connected to the drive circuit; The power supply circuit includes a resistor R1, a resistor R11, a resistor R12, a resistor R15, a voltage regulator D3, and a voltage regulator D6. A DC power supply ACC is connected to the resistor R1, the resistor R1 is connected to the cathode of the voltage regulator D3, the anode of the voltage regulator D3 is connected to DGND, one end of the resistor R12 is connected to the cathode of the voltage regulator D3, the other end of the resistor R12 is connected to the cathode of the voltage regulator D6, the anode of the voltage regulator D6 is connected to DGND, the cathode of the voltage regulator D3 forms a VCC1 connection end, the cathode of the voltage regulator D6 forms a VCC2 connection end, the VCC1 connection end is connected to the drive circuit, the VCC2 connection end is connected to the VCC pin on the function monitor chip, one end of the resistor R11 is connected to the cathode of the voltage regulator D3, one end of the resistor R15 is connected to the anode of the voltage regulator D3, the other end of the resistor R11 and the other end of the resistor R15 are both connected to the PFI pin on the function monitor chip; The driving circuit includes transistor Q1, transistor Q3, transistor Q4, NMOS transistor Q2, NMOS transistor Q5, voltage regulator D2, voltage regulator D4, resistor R6, resistor R7, and resistor R8. The emitter of the transistor Q1 is connected to the VCC1 connection end, one end of the resistor R6 is connected to the emitter of the transistor Q1, and the other end of the resistor R6 is connected to the base of the transistor Q1. One end of the resistor R7 is connected to the base of the transistor Q1, and the other end of the resistor R7 is connected to the collector of the transistor Q3. The emitter of the transistor Q3 is connected to the collector of the transistor Q4, and the emitter of the transistor Q4 is connected to DGND. The collector of the transistor Q1 is connected to the negative electrode of the voltage regulator D2, and the positive electrode of the voltage regulator D2 is connected to DGN D, the gate of the NMOS tube Q2 and the gate of the NMOS tube Q5 are both connected to the negative electrode of the voltage regulator tube D2, the drain of the NMOS tube Q2 is connected to PGND, the drain of the NMOS tube Q5 is connected to GND, the source of the NMOS tube Q2 and the source of the NMOS tube Q5 are both connected to the positive electrode of the voltage regulator tube D2, the negative electrode of the voltage regulator tube D4 is connected in series with the resistor R8, the voltage regulator tube D4 and the resistor R8 are connected in parallel between the drain of the NMOS tube Q2 and the drain of the NMOS tube Q5, the base of the transistor Q3 is connected to the RESET pin on the function monitor chip, and the base of the transistor Q4 is connected to the PFO pin on the function monitor chip; wherein PGND is connected to the negative electrode of the main circuit in the controller power supply, and GND is connected to the negative electrode of the load.

2. The controller anti-reverse connection protection circuit according to claim 1, characterized in that: The driving circuit further includes a voltage regulator tube D5 and a resistor R9. The cathode of the voltage regulator tube D5 is connected in series with the resistor R9. The voltage regulator tube D5 and the resistor R9 are connected in parallel between the drain of the NMOS tube Q2 and the drain of the NMOS tube Q5.

3. A controller anti-reverse connection protection circuit according to claim 2, characterized in that: The driving circuit further includes a resistor R10, a resistor R17, and a capacitor C1. The resistor R10 is connected in series between the collector of the transistor Q1 and the cathode of the voltage regulator D2. The capacitor C1 and the resistor R17 are connected in parallel at both ends of the voltage regulator D2.

4. A controller anti-reverse connection protection circuit according to claim 3, characterized in that: It also includes a resistor R13 and a resistor R14, one end of the resistor R13 is connected to the RESET pin on the function monitor chip, and the other end of the resistor R13 is connected to the base of the transistor Q3, one end of the resistor R14 is connected to the PFO pin on the function monitor chip, and the other end of the resistor R14 is connected to the base of the transistor Q4.

5. A controller anti-reverse connection protection circuit according to claim 4, characterized in that: A resistor R16 is also included, one end of the resistor R16 is connected to the PFO pin on the function monitor chip, and the other end of the resistor R16 is connected to the PFI pin on the function monitor chip.

6. A controller anti-reverse connection protection circuit according to claim 5, characterized in that: The power supply circuit further includes a voltage regulator tube D1, which is connected in series between the resistor R1 and the voltage regulator tube D3, wherein the cathode of the voltage regulator tube D1 is connected to the resistor R1, and the anode of the voltage regulator tube D1 is connected to the cathode of the voltage regulator tube D3.

7. A controller anti-reverse connection protection circuit according to claim 6, characterized in that: The power supply circuit further includes a resistor R2, a resistor R3, a resistor R4, and a resistor R5, and the resistors R2, R3, R4, and R5 are all connected in parallel with the resistor R1.

8. A controller anti-reverse connection protection circuit according to claim 7, characterized in that: The power supply circuit further includes a capacitor C2 and a capacitor C3. The capacitor C2 is connected in parallel to both ends of the voltage regulator tube D3. The capacitor C3 is connected in parallel to both ends of the voltage regulator tube D6.

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