Phase-shifted full-bridge converter, method of operating a phase-shifted full-bridge converter, and AC / DC converter
By introducing a controller into the PSFB converter, adjusting the switching frequency of the full-bridge switching device according to the input voltage conditions, the problem of difficulty in adjusting the output voltage when the AC line voltage input is interrupted, and the efficiency of the converter under the nominal AC line voltage condition is improved.
Patent Information
- Application Number
- CN202010196557.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2019-03-22
- Filing Date
- 2020-03-19
- Publication Date
- 2025-04-01
- Estimated Expiration
- 2040-03-19
AI Technical Summary
Existing phase shift full-bridge converters are difficult to maintain output voltage regulation when the AC line voltage input is temporarily interrupted, and are less efficient under nominal AC line voltage conditions, resulting in more power loss.
By introducing a controller into the PSFB converter, the switching frequency of the full-bridge switching device is continuously adjusted according to the input voltage conditions. Switch at the nominal switching frequency under nominal input voltage conditions and at a lower frequency than the nominal switching frequency under reduced input voltage conditions to maintain output voltage regulation and improve efficiency.
This enables the maintenance of output voltage regulation during the AC line voltage input interruption and improves the efficiency of the converter under nominal AC line voltage conditions, reducing power loss.
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Figure CN111726005B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a phase-shifted full-bridge converter, a method of operating a phase-shifted full-bridge converter and an AC / DC converter. Background Art
[0002] The phase-shifted full-bridge (PSFB) converter provides voltage conversion in addition to isolation from the AC line voltage input because the PSFB topology includes an isolation transformer. However, the PSFB converter must maintain output voltage regulation during brief interruptions (e.g., 20ms) of the AC line voltage input. When the AC line voltage input is briefly interrupted, the output voltage of the PSFB converter should not exhibit any modulation or shut down. For example, the nominal DC link voltage to the PSFB converter may be 400V, but during an AC interruption, the DC link voltage may drop to approximately 300V. The PSFB converter must maintain output voltage regulation during the period when the DC link voltage is reduced.
[0003] Conventionally, PSFB converters are designed with large output capacitors to bridge the time when the AC line voltage is interrupted. However, this means that the PSFB converter has a duty cycle that does not achieve optimal efficiency. When the AC line voltage drops, the duty cycle increases to maintain regulation. Conventional PSFB converters have a maximum duty cycle for minimum AC line voltage conditions to achieve higher efficiency. However, this means a lower duty cycle under nominal AC line voltage conditions, resulting in lower efficiency. Operating the PSFB converter at a limited duty cycle (e.g., 50%) during nominal AC line voltage conditions results in less efficient operation and more power losses because each power transfer cycle includes a freewheeling period. No power transfer occurs during the freewheeling period, but circulating losses are generated.
[0004] Therefore, a more efficient technique is needed to operate a PSFB converter during nominal AC line voltage conditions while maintaining output voltage regulation during interruptions of the AC line voltage input. Summary of the invention
[0005] According to one embodiment of a phase-shifted full-bridge (PSFB) converter, the PSFB converter includes: an isolation transformer having a primary side and a secondary side; a full bridge including a first pair of switching devices connected in series at a first node coupled to a first terminal of the primary side of the isolation transformer, and a second pair of switching devices connected in series at a second node coupled to a second terminal of the primary side of the isolation transformer; a rectifier coupled to the secondary side of the isolation transformer; and a controller operable to switch the first pair of switching devices and the second pair of switching devices out of phase with each other, wherein, under a nominal input voltage condition of the PSFB converter, the controller is operable to switch the first pair of switching devices and the second pair of switching devices at a nominal switching frequency, wherein, under a reduced input voltage condition of the PSFB converter, the controller is operable to switch the first pair of switching devices and the second pair of switching devices at a frequency lower than the nominal switching frequency.
[0006] In one embodiment, under reduced input voltage conditions, the controller is operable to continuously adjust the frequency at which the first pair of switch devices and the second pair of switch devices are switched based on the input voltage to the PSFB converter.
[0007] Either alone or in combination, the controller may be operable to compare the input voltage or an estimate of the input voltage with a voltage threshold and, if the input voltage or the estimate of the input voltage is below the voltage threshold, continuously adjust the frequency at which the first pair of switching devices and the second pair of switching devices are switched.
[0008] Either alone or in combination, the controller may include a hysteresis comparator and may be configured to indicate when the input voltage, or an estimate of the input voltage, falls below a voltage threshold.
[0009] Either alone or in combination, wherein under reduced input voltage conditions, the controller may be operable to linearly adjust the frequency at which the first pair of switching devices and the second pair of switching devices are switched based on the input voltage.
[0010] Either alone or in combination, the controller can be operated to switch the first pair of switch devices and the second pair of switch devices at a first discrete frequency under nominal input voltage conditions, and to switch the first pair of switch devices and the second pair of switch devices at a second discrete frequency lower than the first discrete frequency under reduced input voltage conditions.
[0011] Either alone or in combination, the controller can be operated to compare an input voltage or an estimate of the input voltage with a voltage threshold, and if the input voltage or the estimate of the input voltage is below the voltage threshold, change the frequency at which the first pair of switching devices and the second pair of switching devices are switched from a first discrete frequency to a second discrete frequency.
[0012] Either alone or in combination, the controller may be operable to change the frequency at which the first pair of switching devices and the second pair of switching devices are switched from the second discrete frequency back to the first discrete frequency if the input voltage or an estimate of the input voltage increases above a voltage threshold.
[0013] According to an embodiment of a method for operating a PSFB converter, the PSFB converter includes: an isolation transformer having a primary side and a secondary side; a full bridge having a first pair of switching devices connected in series at a first node coupled to a first terminal of the primary side of the isolation transformer, and a second pair of switching devices connected in series at a second node coupled to a second terminal of the primary side of the isolation transformer; and a rectifier coupled to the secondary side of the isolation transformer, the method including: switching the first pair of switching devices and the second pair of switching devices out of phase with each other; switching the first pair of switching devices and the second pair of switching devices at a nominal switching frequency under a nominal input voltage condition of the PSFB converter; and switching the first pair of switching devices and the second pair of switching devices at a frequency lower than the nominal switching frequency under a reduced input voltage condition of the PSFB converter.
[0014] Switching the first pair of switch devices and the second pair of switch devices at a frequency lower than a nominal switching frequency may include continuously adjusting the frequency at which the first pair of switch devices and the second pair of switch devices are switched based on an input voltage to the PSFB converter.
[0015] Either individually or in combination, continuously adjusting the frequency at which the first pair of switching devices and the second pair of switching devices are switched based on the input voltage may include: comparing the input voltage or an estimated value of the input voltage with a voltage threshold; and if the input voltage or the estimated value of the input voltage is lower than the voltage threshold, continuously adjusting the frequency at which the first pair of switching devices and the second pair of switching devices are switched.
[0016] Either alone or in combination, the input voltage or an estimate of the input voltage is compared to a voltage threshold with hysteresis to indicate when the input voltage or the estimate of the input voltage drops below the voltage threshold.
[0017] Either alone or in combination, continuously adjusting the frequency at which the first pair of switching devices and the second pair of switching devices are switched based on the input voltage may include linearly adjusting the frequency at which the first pair of switching devices and the second pair of switching devices are switched based on the input voltage.
[0018] Individually or in combination, switching the first pair of switch devices and the second pair of switch devices at a nominal switching frequency under nominal input voltage conditions may include switching the first pair of switch devices and the second pair of switch devices at a first discrete frequency, and switching the first pair of switch devices and the second pair of switch devices at a frequency lower than the nominal switching frequency under reduced input voltage conditions may include switching the first pair of switch devices and the second pair of switch devices at a second discrete frequency lower than the first discrete frequency.
[0019] Either individually or in combination, switching the first pair of switch devices and the second pair of switch devices at a second discrete frequency under a reduced input voltage condition may include: comparing the input voltage or an estimate of the input voltage with a voltage threshold; and if the input voltage or the estimate of the input voltage is lower than the voltage threshold, changing the frequency at which the first pair of switch devices and the second pair of switch devices are switched from the first discrete frequency to the second discrete frequency.
[0020] Alternatively or in combination, the method may further include changing the frequency at which the first pair of switch devices and the second pair of switch devices are switched from the second discrete frequency back to the first discrete frequency if the input voltage or the estimate of the input voltage increases above a voltage threshold.
[0021] Either alone or in combination, the input voltage or an estimate of the input voltage may be compared to a voltage threshold with hysteresis to indicate when the input voltage or the estimate of the input voltage falls below the voltage threshold.
[0022] According to an embodiment of the AC / DC converter, the AC / DC converter includes: an AC / DC stage configured to convert an AC line voltage into a DC voltage; and a PSFB converter coupled to the AC / DC stage. The PSFB converter includes: an isolation transformer having a primary side and a secondary side; a full bridge including a first pair of switching devices connected in series at a first node coupled to a first terminal of the primary side of the isolation transformer, and a second pair of switching devices connected in series at a second node coupled to a second terminal of the primary side of the isolation transformer; a rectifier coupled to the secondary side of the isolation transformer; and a controller operable to switch the first pair of switching devices and the second pair of switching devices out of phase with each other, wherein under a nominal AC line voltage condition, the controller is operable to switch the first pair of switching devices and the second pair of switching devices at a nominal switching frequency, wherein under a reduced AC line voltage condition, the controller is operable to switch the first pair of switching devices and the second pair of switching devices at a frequency lower than the nominal switching frequency.
[0023] In one embodiment, under reduced input voltage conditions, the controller of the PSFB converter is operable to continuously adjust the frequency at which the first pair of switch devices and the second pair of switch devices are switched based on the input voltage to the PSFB converter.
[0024] Either alone or in combination, the controller of the PSFB converter may be operable to switch the first pair of switching devices and the second pair of switching devices at a first discrete frequency under nominal input voltage conditions, and to switch the first pair of switching devices and the second pair of switching devices at a second discrete frequency lower than the first discrete frequency under reduced input voltage conditions.
[0025] Those skilled in the art will recognize additional features and advantages upon reading the following detailed description, and upon viewing the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0026] The elements of the drawings are not necessarily to scale with respect to each other. Similar reference numerals represent corresponding similar parts. The features of the various illustrated embodiments may be combined unless these features exclude each other. The embodiments are depicted in the drawings and described in detail in the following description.
[0027] Figure 1 A schematic diagram of an embodiment of an AC / DC converter with a phase-shifted full-bridge (PSFB) converter as the DC / DC stage is shown.
[0028] Figure 2 A schematic diagram showing an embodiment of a PSFB converter is shown.
[0029] Figures 3 to 5 The operation of the PSFB converter during different phases of the power transfer interval is shown, along with the corresponding control signals generated by the controller of the PSFB converter.
[0030] Figure 6 The duty cycle losses of a PSFB converter operating under non-ideal duty cycle conditions are shown.
[0031] Figure 7 The extreme case of the freewheeling duty cycle where no more regulation window is available is shown.
[0032] Figure 8 The dependence of the freewheeling time on the switching frequency for a typical PSFB converter at different DC-link input voltages ranging from 400 V down to 330 V is shown, with all other conditions fixed.
[0033] Fig. 9 Discrete and continuous PSFB switching frequency adjustment methods implemented by a controller of a PSFB converter are shown.
[0034] Fig.10 shows the PSFB input voltage Fig. 9 Discrete and continuous PSFB switching frequency control techniques are shown.
[0035] Fig.11An embodiment of a continuous PSFB switching frequency adjustment method implemented by a controller of a PSFB converter is shown.
[0036] Fig.12 An embodiment of a discrete PSFB switching frequency adjustment method implemented by a controller of a PSFB converter is shown.
[0037] Fig.13 An embodiment of a simulated implementation of a continuous PSFB switching frequency adjustment method implemented by a controller of a PSFB converter using hysteresis is shown.
[0038] Fig.14 An embodiment of a simulation implementation of a discrete PSFB switching frequency adjustment method implemented by a controller of a PSFB converter using hysteresis is shown. DETAILED DESCRIPTION
[0039] The embodiments described herein provide a control technique that improves the efficiency of a PSFB converter during nominal AC line voltage conditions while maintaining output voltage regulation during interruptions in the AC line voltage input. Under the nominal input voltage condition of the PSFB, the full bridge on the primary side of the PSFB switches at a nominal switching frequency. Under the reduced input voltage condition of the PSFB, the full bridge on the primary side of the PSFB switches at a frequency lower than the nominal switching frequency. In this way, the PSFB converter has a more ideal duty cycle at the nominal input voltage, and when the input voltage is increased, the switching frequency of the PSFB is reduced to ensure sufficient freewheeling time so that output voltage regulation can be continued.
[0040] Figure 1 An embodiment of an AC / DC converter 100 is shown. The AC / DC converter 100 includes an AC / DC stage 102 and a PSFB converter 104 coupled to the AC / DC stage 102. The AC / DC stage 102 converts an AC line voltage (“AC Line In”) into a DC link voltage (“Vin”). In one embodiment, the AC / DC stage 102 includes an EMI (electromagnetic interference) and bridge rectifier circuit 106, which is used to filter noise and convert the filter input into a rectified signal (“VsinRect”). The AC / DC stage 102 may also include a PFC (power factor correction) boost converter 108, which is used to shape the input current of the AC / DC converter to be synchronized with the AC line voltage input, thereby providing the DC link voltage (“Vin”) to the PSFB converter 104.
[0041] The PSFB converter 104 provides voltage conversion between the DC link voltage (“Vin”) and the DC output voltage (“Vout”) of the AC / DC converter 100, and also provides isolation from the AC line voltage input (“AC Line In”). The PSFB converter 104 includes an isolation transformer 110, a full bridge 112 coupled to the primary side of the isolation transformer 110, a rectifier 114 coupled to the secondary side of the isolation transformer 110, and a controller 116 that controls switching of the full bridge 112 and the optional rectifier 114. The transformer 110 is connected to the primary side of the isolation transformer 110, and the rectifier 114 is connected to the secondary side of the isolation transformer 110. Figure 1 1 is shown in dashed lines to indicate the isolation between the primary side (left side) and the secondary side (right side) of the PSFB converter 104. The controller 116 Figure 1 1 is shown on the primary side of the PSFB converter 104, but may instead be on the secondary side and coupled to the primary side by, for example, an optocoupler. The operation of the PSFB converter 104 is described in more detail below.
[0042] Figure 2 FIG. 1 shows an embodiment of a PSFB converter 104. The load powered by the PSFB converter 104 is Figure 2 It is generally represented by resistance R O The PSFB converter 104 includes a primary side and a secondary side. The primary side has a plurality of switching devices Q forming a full bridge 112. A , Q B , Q C , Q D , the secondary side has a plurality of switching devices Q forming a rectifier 114 E1 , Q E2 , Q F1 , Q F2 The secondary side also includes an output filter coupled to the rectifier 114, the output filter including an output inductor L o and output capacitor C o The DC link voltage Vin output by the AC / DC stage 102 to the PSFB converter 104 is Figure 2 Indicated as battery.
[0043] On the primary side of the PSFB converter 104, the high-side switching device Q A With the low-side switch device Q B are connected in series at node 'n1' / 'A' to form the first arm Q of the full bridge 112 A / Q B , and the high-side switch device Q C With the low-side switch device Q D are connected in series at node 'n2' / 'B' to form the second arm Q of the full bridge 112 C / Q DThe node n1 is coupled to the first terminal 'T P1 ', node n2 is coupled to the second terminal 'T of the primary side of the isolation transformer 110 P2 For ease of illustration, the isolation transformer 110 is shown as being split between a primary side (Trp) and a secondary side (Trs).
[0044] Similarly, on the secondary side, the high-side switching device Q E1 With the low-side switch device Q F1 are connected in series at node 'n3' to form a first bridge arm Q of the rectifier 114 E1 / Q F1 , and the high-side switch device Q F2 With the low-side switch device Q E2 are connected in series at node 'n4' to form a second bridge arm Q of the rectifier 114 F2 / Q E2 Node n3 is coupled to the first terminal 'T of the secondary side of the isolation transformer 110. S1 ', node n2 is coupled to the second terminal 'T of the secondary side of the isolation transformer 110 S2 '.
[0045] Those skilled in the art will readily appreciate that different types of rectifiers may be used on the secondary side of the PSFB converter 104, such as but not limited to current-fed push-pull, center-tapped, or current-doubler rectifier stages. A To Q D and the secondary side switching device Q E1 To Q F2 are shown as power MOSFETs, each with a corresponding freewheeling diode D A To D D and D E1 To D F2 And the parasitic capacitance C A To C D and C E1 To C F2 However, any suitable power transistor may be used for the primary side switching device Q of the PSFB converter 104. A To Q D and the secondary side switching device Q E1 To Q F2 , such as but not limited to power MOSFET, IGBT (insulated gate bipolar transistor), HEMT (high electron mobility transistor), etc.
[0046] The PSFB controller 116, which may be located on the primary side or the secondary side of the converter 104, controls the primary side switching device Q during nominal AC line voltage conditions and during interruptions of the AC line voltage input. A To Q D and the secondary side switching device Q E1 To Q F2 For example, the nominal DC link voltage “Vin” to the PSFB converter 104 may be 400V during nominal AC line voltage conditions and may drop to about 300V or less during AC interruptions. Under nominal AC line voltage conditions, the controller 116 switches the switching devices Q out of phase with each other. A , Q B , Q C , Q D The bridge arm Q A / Q B , Q C / Q D , to transfer energy from the primary side to the secondary side of the PSFB converter 104. If the switching device Q A , Q B , Q C , Q D The bridge arm Q A / Q B , Q C / Q D If the switching devices Q are switched in phase with each other, no energy transfer occurs. This is the defining characteristic of a PSFB converter. Under reduced AC line voltage conditions, the controller 116 switches the switching devices Q out of phase with each other at a frequency lower than the nominal switching frequency. A , Q B , Q C , Q D The bridge arm Q A / Q B , Q C / Q D , to transfer energy to the secondary side of the PSFB converter 104 and maintain regulation.
[0047] Figures 3 to 5 1 shows the operation of the PSFB converter 104 during different stages of the power transfer interval, and the corresponding control signals generated by the controller 116. In the phase-shifted full-bridge converter topology, the range of zero voltage switching (ZVS) is determined by the voltage stored in the magnetic element L r , L lkg , L o and L m The energy in is given by r is the external resonant inductor of the PSFB converter 104, L lkg is the leakage inductance of the isolation transformer 110, L ois the output inductor L on the secondary side of the converter 104 o The inductance, L m is the magnetizing inductance of the primary side of the transformer 110. The two bridge arms (Q A / Q B , Q C / Q D ) behave differently during the switching transition. One leg of the full bridge 112 is switched on and off after the power transfer from the primary side to the secondary side (also referred to herein as lagging power transfer), as in Figure 5 The power transfer after the other bridge arm of the full bridge 112 leads is also referred to as leading power transfer in this article, also as Figure 5 shown.
[0048] Figure 3 shows the current flow in the primary and secondary sides of the PSFB converter 104 during hysteretic power transfer, and Figure 4 1 shows the current flow in the primary side and the secondary side of the PSFB converter 104 during leading power transfer. Figure 3 and Figure 4 The primary side switching device is shown by a thick dashed line with an arrow, and the disconnected primary side switching device is shown by a dashed line "X".
[0049] During the hysteresis power transfer, the hysteresis bridge arm ( Figure 3 and Figure 4 The bridge arm Q A / Q B ) transformation. Figure 3 During the transition of the lagging bridge arm shown in the figure, the switching device Q B When the inductor is disconnected, the energy of the inductor flows into the parasitic capacitor C A , C B , until the switching device Q A Parallel diode D A By connecting the switching device Q A Parallel diode D A The current path in Figure 3 Indicated by a thick dashed line with an arrow.
[0050] Because the filter inductance L during the transition period of the lagging power transfer o The isolation transformer 110 is effectively connected through the full bridge 112, so it can be used to lag the bridge arm Q of the full bridge 112. A / Q B The parasitic capacitance C A , CB The energy to charge / discharge is given by:
[0051]
[0052] In order to realize the lagging bridge arm Q of the full bridge 112 A / Q B For full ZVS, the available energy should be greater than the lagging bridge arm Q of the full bridge 112 A / Q B The total energy E of the output capacitance plus other stray capacitance of the half-bridge node OSS large, as given by:
[0053]
[0054] Among them, L o ′ is the equivalent reflected value of the output filter inductance through the transformer and is given by:
[0055]
[0056] For a buck converter where the number of transformer windings on the primary side (Np) is greater than the number of transformer windings on the secondary side (Ns), the output filter inductor L o The energy contribution of is usually much higher than the contribution of other inductors. Therefore, usually in the lagging bridge arm Q of the full bridge 112 A / Q B ZVS is achieved over all load ranges.
[0057] like Figure 5 As shown, the leading bridge arm ( Figure 3 and Figure 4 The bridge arm Q C / Q D ) transition. No power transfer occurs during the freewheeling phase, but circulating losses do occur. The PSFB control technique described minimizes the freewheeling phase at the nominal input voltage condition of the PSFB, thereby avoiding most, if not all, of the circulating losses that would otherwise be incurred.
[0058] exist Figure 4 During the leading arm transition shown in C The inductor energy flows into the parasitic capacitor C C , C D , until the switching device Q D The parallel diode D4 is turned on, thus enabling ZVS. D The current path of the parallel diode D4 is Figure 4 Indicated by a thick dashed line with an arrow.
[0059] If the freewheeling phase occurs, such as Figure 4 As shown in FIG, the isolation transformer 110 is effectively short-circuited by the rectifier 114 during the freewheeling phase, and the output filter inductor L o In these cases, it can be used to adjust the leading bridge arm Q of the full bridge 112. C / Q D The parasitic capacitance C C , C D The charge / discharge energy is given by:
[0060]
[0061] In order to achieve the leading bridge arm Q of the full bridge 112 C / Q D For full ZVS, the available energy should be greater than the leading bridge arm Q of the full bridge 112 C / Q D The total energy E of the output capacitance plus other stray capacitance of the half-bridge node OSS Large, given by:
[0062]
[0063] In this case, ZVS does not occur easily over all load ranges and usually requires careful design of the isolation transformer 110 and / or external resonant inductor. Typically, increasing L r , L lkg Or reduce L m will increase the available energy. However, reducing L m Increases primary circulating current, thus increasing conduction losses. Increasing L r and L lkg The available duty cycle is reduced, thereby limiting the maximum load that the PSFB converter 104 can regulate. To alleviate these problems, the PSFB controller 116 switches the full-bridge switch device Q at the nominal switching frequency under the nominal input voltage condition of the PSFB converter 104. A , Q B , Q C , Q D (bridge arm) to Q A / Q B , Q C / Q D , and switches the full-bridge switching device Q at a frequency lower than the nominal switching frequency under the reduced input voltage condition of the PSFB converter 104 A , Q B , Q C , Q D (bridge arm) to Q A / Q B , Q C / Q D In this way, the PSFB converter 104 operates at a more efficient (higher) duty cycle and a lower (or no) freewheeling period under nominal AC line voltage conditions, while still maintaining output voltage regulation during interruptions in the AC line voltage input. The effect of duty cycle on PSFB converter efficiency under nominal AC line voltage conditions will be described in more detail below.
[0064] The effective duty cycle of the PSFB converter 104 depends on the ratio of the input voltage to the output voltage and the transformer ratio (Np / Ns), and is constant across the load as given by:
[0065]
[0066] Since the primary current flows along the inductor L r , L lkg The time required for the reverse direction causes the duty cycle loss ( Figure 6 The “loss duty cycle” in ) reduces the freewheeling time and is load dependent, since the primary current is the reflected secondary current plus the primary transformer magnetizing current, where:
[0067]
[0068]
[0069] Freewheeling duty cycle = 1 - loss duty cycle - effective duty cycle (9)
[0070] Ip is the primary current, Is is the secondary current, and Fswitch is the switching frequency of the PSFB converter 104 .
[0071] For the PSFB converter 104 the freewheeling duty cycle should be greater than or equal to zero to maintain regulation, e.g. Figure 7 As shown, Figure 7 An extreme case is shown where no more regulation windows are available.
[0072] For best efficiency, the freewheeling time should be zero or close to zero at full load. This allows for maximum ZVS range for the full bridge 112, especially for the leading leg. In addition, when the freewheeling time is minimized, there is less circulating current on the primary side of the PSFB converter 104. A maximum effective duty cycle is also achieved, as well as a lower secondary side reflected voltage, enabling the use of better secondary side voltage level switching devices.
[0073] However, in Figure 1In the full AC / DC converter design shown, the PSFB converter 104 should maintain output regulation at full load and during interruptions in the AC line voltage input ("AC Line In"). During interruptions in the AC line voltage input, the output voltage ("DC Link") of the AC / DC stage 102 drops (e.g., from 400V to 350V or lower). The PSFB controller 116 ensures that the PSFB converter 104 coupled to the AC / DC stage 102 maintains regulation over the entire input voltage range of interest by switching the full bridge 112 at a frequency lower than the nominal switching frequency under reduced AC line voltage conditions.
[0074] As explained above, the effective duty cycle depends on the ratio of the input voltage to the output voltage and the transformer ratio and is constant along the load. The effective duty cycle time also depends on the switching frequency Fswitch of the PSFB converter 104, as shown below:
[0075]
[0076] The transformer frequency is the bridge arm Q of the full bridge 112 A / Q B , Q C / Q D The switching frequency Fswitch is twice.
[0077] The primary current flows along the inductor L r , L lkg The time spent in the reverse direction, i.e., the loss duty cycle, reduces the freewheeling time and depends on the load, since the primary current is the reflected secondary current plus the primary transformer magnetizing current, which is eliminated in the simplified model provided herein but is also based on the switching frequency Fswitch of the full bridge 112. Therefore, equations (7) and (8) can be reformulated as:
[0078]
[0079]
[0080] Based on equations (11) and (12), the available regulation (freewheeling) time of the PSFB converter 102 depends on the switching frequency Fswitch, as given by:
[0081]
[0082] Equation (13) can be further simplified. With all other conditions fixed, when the switching frequency Fswitch of the PSFB converter 104 decreases, the freewheeling time increases, as shown below:
[0083]
[0084] in,
[0085] Figure 8 The dependence of the freewheeling time of a typical PSFB converter on the switching frequency Fswitch at different DC link input voltages in the range from 400 V down to 330 V is shown, with all other conditions fixed. The vertical line with the terminating arrow indicates the frequency trajectory of a typical PSFB modulation scheme, where a fixed duty cycle of, for example, 50% is used over the entire input voltage range, which includes both nominal operation and reduced AC line voltage conditions ( Figure 8 "Hold Operation" in the . Figure 8 It is shown that for the same PSFB input voltage, reducing the switching frequency Fswitch of the PSFB converter 104 increases the freewheeling time.
[0086] The PSFB controller 116 modifies the switching frequency Fswitch of the PSFB converter 104 to compensate for the duty cycle loss due to the pull-down input voltage. The controller 116 adopts a more ideal duty cycle under nominal AC line voltage conditions, and when the input voltage to the PSFB converter 104 drops, the controller 116 reduces the switching frequency Fswitch of the PSFB converter 104 to ensure sufficient freewheeling time under reduced AC line voltage conditions. The PSFB converter control scheme described herein enables optimal performance under nominal conditions while meeting the required specifications under reduced AC line voltage conditions.
[0087] Equations (10) to (14) can be reformulated to obtain the switching frequency Fswitch based on the design parameters and load conditions as shown below:
[0088]
[0089] The PSFB controller 116 modifies the switching frequency Fswitch of the PSFB converter 104 based on the DC input voltage (“Vin”) to the PSFB converter 104. The controller 116 may modify the switching frequency Fswitch based on the PSFB input voltage whenever an input voltage measurement is available to the controller 116 and / or whenever the input voltage can be calculated based on other measurements available to the controller 116.
[0090] Fig. 9 Two different implementations of the PSFB input voltage-based Fswitch control implemented by the controller 116 of the PSFB converter 104 are shown. In one implementation, under reduced input voltage conditions, the controller 116 switches the full-bridge switch device Q at a first discrete frequency Fswitch1 under nominal input voltage conditions.A , Q B , Q C , Q D The bridge arm Q A / Q B , Q C / Q D , and switches the full-bridge switch device Q at a second discrete frequency Fswitch2 that is lower than the first discrete frequency under the reduced input voltage condition A , Q B , Q C , Q D The bridge arm Q A / Q B , Q C / Q D The discrete Fswitch adjustment trajectory is Fig. 9 Marked as "Keep Track B".
[0091] The controller 116 may compare the PSFB input voltage or an estimate of the PSFB input voltage with a voltage threshold and switch the full-bridge switch device Q to the ON state if the PSFB input voltage or the estimate of the PSFB input voltage is below the voltage threshold. A , Q B , Q C , Q D The bridge arm Q A / Q B , Q C / Q D The switching frequency of the full-bridge switch device Q is changed from the first discrete frequency Fswitch1 to the second (lower) discrete frequency Fswitch2. If the PSFB input voltage or the estimated value of the PSFB input voltage increases above the voltage threshold, the controller 116 may change the switching frequency of the full-bridge switch device Q A , Q B , Q C , Q D The bridge arm Q A / Q B , Q C / Q D The switched frequency is changed from the second discrete frequency Fswitch2 back to the first (higher) discrete frequency Fswitch1. For changes in the PSFB input voltage near the voltage threshold, the controller 116 can use hysteresis to avoid frequent changes in Fswitch. For example, the controller 116 may include a hysteresis comparator and is configured to indicate when the PFSB input voltage or the estimated value of the PSFB input voltage falls below the voltage threshold. When the comparison result falls outside the hysteresis window, the discrete adjustment of the PSFB switching frequency Fswitch is resumed.
[0092] In another embodiment, under reduced input voltage conditions, the controller 116 continuously adjusts the full-bridge switching device Q based on the input voltage to the PSFB converter 104. A , Q B , Q C , Q D The bridge arm Q A / Q B , Q C / Q D That is, the controller 116 modifies Fswitch using, for example, linear control so that Fswitch tracks the PSFB input voltage. By using linear control, the controller 116 can linearly adjust the full-bridge switch device Q based on the PSFB input voltage or an estimated value of the PSFB input voltage. A , Q B , Q C , Q D The bridge arm Q A / Q B , Q C / Q D The switching frequency Fswitch is continuously adjusted in Fig. 9 is marked as "Keep Track A".
[0093] The controller 116 may compare the input voltage Vin to the PSFB converter 104 or the estimated value of the PSFB input voltage Vin with a voltage threshold, and continuously adjust the full-bridge switch device Q if the PSFB input voltage Vin or the estimated value of the PSFB input voltage Vin is lower than the voltage threshold. A , Q B , Q C , Q D The bridge arm Q A / Q B , Q C / Q D As described above, the controller 116 may utilize hysteresis to avoid frequent changes in Fswitch for changes in the input voltage near the voltage threshold. For example, the controller 116 may include a hysteresis comparator and is configured to indicate when the PSFB input voltage Vin or an estimated value of the PSFB input voltage Vin falls below the voltage threshold. When the comparison result falls outside the hysteresis window, the continuous adjustment of the PSFB switching frequency Fswitch is resumed.
[0094] Fig.10 shows the PSFB input voltage Fig. 9 The discrete Fswitch frequency control technique and the continuous Fswitch frequency control technique are shown in Figure 2. The continuous Fswitch control trajectory is Fig.10 The discrete Fswitch control trace is marked as “Trace A” in the figure, while the discrete Fswitch control trace is marked as “Trace B”. Trajectory A maintains a constant freewheeling time. Trajectory B implements two voltage windows “Vin1”, “Vin2” with different frequencies “Fswitch1”, “Fswitch2” respectively.
[0095] Fig.11 The PSFB controller 116 is shown to be implemented to perform Fig.10 According to this embodiment, the controller 116 continuously adjusts the full-bridge switch device Q based on the PSFB input voltage Vin by comparing the input voltage Vin or an estimated value of the input voltage Vin with the first voltage threshold Vth_1 (block 200). A , Q B , Q C , Q D The bridge arm Q A / Q B , Q C / Q D As mentioned above, the bridge arm Q of the full bridge 112 A / Q B , Q C / Q D Switching out of phase to transfer energy from the primary side to the secondary side of the PSFB converter 104. If the input voltage Vin or an estimate of the input voltage Vin is below the first voltage threshold Vth_1, the controller 116 continuously adjusts Fswitch according to Vin, for example, by linear control (block 202). If the input voltage Vin remains below the second threshold Vth_2, the controller 116 maintains continuous adjustment of Fswitch (block 204). If the input voltage Vin rises above the second threshold Vth_2, the controller 116 sets Fswitch to the nominal frequency Frq_2 (block 206). The controller 116 maintains Fswitch=Frq_2 until the input voltage Vin drops below the first threshold Vth_1 again (block 200). In some cases, Vth_1 may be equal to Vth_2 to avoid hysteresis.
[0096] Fig.12 The PSFB controller 116 is shown to be implemented to perform Fig.101 . According to this embodiment, the controller 116 compares the input voltage Vin or the estimated value of the input voltage Vin with the first voltage threshold Vth_1 (block 300). If the input voltage Vin or the estimated value of the input voltage Vin is lower than the first voltage threshold Vth_1, the controller 116 switches the full-bridge switch device Q A , Q B , Q C , Q D The bridge arm Q A / Q B , Q C / Q D The switched frequency Fswitch is reduced to a reduced discrete frequency Frq_1 (block 302). As described above, the bridge arm Q of the full bridge 112 A / Q B , Q C / Q D Out-of-phase switching is performed to transfer energy from the primary side of the PSFB converter 104 to the secondary side. If the input voltage Vin remains below the second threshold Vth_2, the PSFB switching frequency Fswitch remains set to a reduced discrete frequency Frq_1 (block 304). If the input voltage Vin rises above the second threshold Vth_2, the controller 116 sets Fswitch to a higher discrete frequency Frq_2 (block 306). The controller 116 maintains Fswitch=Frq_2 until the input voltage Vin drops below the first threshold Vth_1 again (block 300). In some cases, Vth_1 can be equal to Vth_2 to avoid hysteresis.
[0097] The switching frequency adjustment implemented by the PSFB controller 116 may follow some other trajectory based on the frequency-input voltage relationship.
[0098] In the case of digital control, the controller 116 can be easily programmed via code to implement any of the Fswitch adjustment techniques described herein or any other trajectory based on the frequency-input voltage relationship of the PSFB converter 104. Fig.10 The trajectory and Fig.11 In a related method, the controller 116 can achieve continuous Fswitch adjustment by obtaining information about the DC link voltage (Vin), such as by direct measurement, estimation, etc. Based on the DC link voltage information, the controller 116 performs linear modulation of the PSFB switching frequency Fswitch. Fig.10 Trajectory B and Fig.12In a related method, the controller 116 can implement discrete Fswitch adjustment by storing different Fswitch values in, for example, a PWM (pulse width modulation) register. If the PSFB input voltage Vin is less than a certain value, the controller 116 uses the reduced switching frequency Fswitch_min as the PSFB switching frequency. Otherwise, the controller 116 uses the maximum switching frequency Fswitch_max as the PSFB switching frequency. The controller 116 can make Fswitch adjustment decisions based on simple threshold comparisons.
[0099] In the case of analog control, additional circuitry can be included in the PSFB converter system to provide PSFB switching frequency control based on the input voltage. For example, the controller 116 can be a PI (proportional integral) controller, and Vin can be given by a resistor. The controller 116 can perform analog modulation based on Vin changes. The analog implementation depends on the specific type of analog controller.
[0100] Fig.13 Shown is the method for implementing Fig.10 The continuous Fswitch trajectory A in Fig.11 An embodiment of an analog implementation of a PSFB controller 116 of a related method is provided. According to the embodiment, the controller 116 includes a hysteresis comparator 400 for indicating whether a change in input voltage falls within a hysteresis window. The controller 116 also includes a PWM controller 402 having at least one frequency setting input and a regulating circuit 404 for determining one of the frequency setting inputs of the PWM controller 402. If the input voltage Vin or an estimated value thereof falls within the hysteresis window, the regulating circuit 404 sets the corresponding frequency setting input of the PWM controller 402 to the nominal (higher) frequency. Otherwise, the regulating circuit 404 adjusts the corresponding frequency setting input of the PWM controller 402 according to the input voltage Vin so as to provide sufficient duty cycle time under reduced input voltage conditions. According to the embodiment, the input voltage Vin or an estimated value thereof is an input to the regulating circuit 404, so that the regulating circuit 404 can adjust Fswitch according to Vin. Even in Fig.13 Although only one frequency setting input (from the regulation circuit 404) is shown in FIG. 4 , the PWM controller 402 may have more than one frequency setting input.
[0101] Fig.14 Shown for implementation Fig.10 The discrete Fswitch locus B and Fig.12 Implementation of the related method of the PSFB controller 116 by simulation implementation. Fig.14 The implementation in is similar to Fig.13However, since the controller 116 makes discrete adjustments to Fswitch instead of continuous adjustments, Fig.14 The implementation of the regulating circuit 404 is simpler. Fig.13 As shown in , the hysteresis comparator 400 indicates whether the change of the input voltage Vin falls within the hysteresis window. If the input voltage Vin or its estimated value falls within the hysteresis window, the adjustment circuit 404 sets the corresponding frequency setting input of the PWM controller 402 to the nominal (higher) frequency. Otherwise, the adjustment circuit 404 sets the corresponding frequency setting input of the PWM controller 402 to a reduced (discrete) frequency that provides sufficient duty cycle time under the reduced input voltage condition. The input voltage Vin or its estimated value is not Fig.14 The input to the regulation circuit 402 in FIG. 4 is because the regulation circuit 404 makes discrete adjustments to Fswitch in this embodiment.
[0102] The PSFB switching frequency control techniques described herein enable the design of a PSFB converter with optimal performance under nominal conditions while meeting the hold-up time specification during reduced input voltage conditions. By employing these PSFB switching frequency control techniques, the external resonant inductor L of the PSFB converter 104 can be reduced to the maximum possible load at the nominal input voltage. r and the leakage inductance L of the isolation transformer 110 lkg The PSFB switching frequency control technique described herein maximizes the ZVS range of the full bridge 112 while reducing switching losses at light loads and reducing magnetizing current because L r , L lkg More energy can be provided for the transition, thereby reducing conduction losses, minimizing the freewheeling time which reduces the circulating current on the primary side and thus reduces conduction losses, and maximizing the effective duty cycle of the switching device which reduces the reflected voltage on the secondary side and enables the use of a better secondary side voltage level.
[0103] Terms such as "first", "second", etc. are used to describe various elements, regions, parts, etc., and are not intended to be limiting. Throughout the specification, similar terms refer to similar elements.
[0104] As used herein, the terms "having", "comprising", "including", "containing", etc. are open terms that indicate the presence of stated elements or features, but do not exclude other elements or features. Unless the context clearly indicates otherwise, the articles "a", "an", and "the" are intended to include the plural as well as the singular.
[0105] It should be understood that the features of the various embodiments described herein may be combined with each other, unless specifically stated otherwise.
[0106] Although specific embodiments have been shown and described herein, it will be appreciated by those skilled in the art that various alternative and / or equivalent implementations may replace the specific embodiments shown and described without departing from the scope of the invention. This application is intended to cover any changes or modifications to the specific embodiments discussed herein. Therefore, the present invention is intended to be limited only by the claims and their equivalents.
Claims
1. A phase-shifted full-bridge PSFB converter, comprising: an isolation transformer having a primary side and a secondary side; a full bridge including a first pair of switching devices connected in series at a first node coupled to a first terminal of the primary side of the isolation transformer, and a second pair of switching devices connected in series at a second node coupled to a second terminal of the primary side of the isolation transformer; a rectifier coupled to the secondary side of the isolation transformer; as well as a controller operable to cause the first pair of switch devices and the second pair of switch devices to switch out of phase with each other, wherein, under a nominal input voltage condition of the PSFB converter, the controller is operable to switch the first pair of switch devices and the second pair of switch devices at a nominal switching frequency, wherein, under a reduced input voltage condition of the PSFB converter, the controller is operable to switch the first pair of switch devices and the second pair of switch devices at a frequency lower than the nominal switching frequency, wherein during a power transfer cycle, a leading bridge arm transition occurs before power transfer from the primary side to the secondary side and after a freewheeling phase, and a lagging bridge arm transition occurs after power transfer from the primary side to the secondary side, wherein during the transition of the leading bridge arm, one of the switching devices of the second pair of switching devices is disconnected, wherein during the transition of the lagging bridge arm, one of the first pair of switch devices is disconnected, wherein no power transfer occurs during the freewheeling phase, wherein the freewheeling phase is minimized under the nominal input voltage condition, The freewheeling phase is maintained greater than zero under reduced input voltage conditions, and the freewheeling phase is related to the frequency at which the first pair of switch devices and the second pair of switch devices are switched.
2. The PSFB converter according to claim 1, wherein: Under the reduced input voltage condition, the controller is operable to continuously adjust a frequency at which the first pair of switch devices and the second pair of switch devices are switched based on an input voltage to the PSFB converter.
3. The PSFB converter according to claim 2, wherein: The controller is operable to compare the input voltage or an estimate of the input voltage with a voltage threshold, and if the input voltage or the estimate of the input voltage is below the voltage threshold, continuously adjust the frequency at which the first pair of switching devices and the second pair of switching devices are switched.
4. The PSFB converter according to claim 3, wherein: The controller includes a hysteresis comparator and is configured to indicate when the input voltage or the estimate of the input voltage falls below the voltage threshold.
5. The PSFB converter according to claim 2, wherein: Under the reduced input voltage condition, the controller is operable to linearly adjust a frequency at which the first pair of switching devices and the second pair of switching devices are switched based on the input voltage.
6. The PSFB converter according to claim 1, wherein: The controller is operable to switch the first pair of switch devices and the second pair of switch devices at a first discrete frequency under the nominal input voltage condition, and to switch the first pair of switch devices and the second pair of switch devices at a second discrete frequency lower than the first discrete frequency under the reduced input voltage condition.
7. The PSFB converter according to claim 6, wherein: The controller is operable to compare the input voltage or an estimate of the input voltage with a voltage threshold, and if the input voltage or the estimate of the input voltage is below the voltage threshold, change the frequency at which the first pair of switching devices and the second pair of switching devices are switched from the first discrete frequency to the second discrete frequency.
8. The PSFB converter according to claim 7, wherein: If the input voltage or the estimate of the input voltage increases above the voltage threshold, the controller is operable to change the frequency at which the first and second pair of switch devices are switched from the second discrete frequency back to the first discrete frequency.
9. The PSFB converter according to claim 7, wherein: The controller includes a hysteresis comparator and is configured to indicate when the input voltage or the estimate of the input voltage falls below the voltage threshold.
10. The PSFB converter according to claim 1, wherein: The controller is operative to switch the first pair of switch devices and the second pair of switch devices at a frequency lower than the nominal switching frequency during an interruption of an AC line voltage input powering the PSFB converter.
11. A method of operating a phase-shifted full-bridge PSFB converter, the phase-shifted full-bridge PSFB converter comprising: An isolation transformer having a primary side and a secondary side, a full bridge having a first pair of switch devices connected in series at a first node coupled to a first terminal of the primary side of the isolation transformer and a second pair of switch devices connected in series at a second node coupled to a second terminal of the primary side of the isolation transformer, and a rectifier coupled to the secondary side of the isolation transformer, the method comprising: causing the first pair of switch devices and the second pair of switch devices to switch out of phase with each other; switching the first pair of switch devices and the second pair of switch devices at a nominal switching frequency under a nominal input voltage condition of the PSFB converter; switching the first pair of switch devices and the second pair of switch devices at a frequency lower than the nominal switching frequency under a reduced input voltage condition of the PSFB converter; During a power transfer cycle, performing an advance bridge arm transition before power transfer from the primary side to the secondary side and after a freewheeling phase, and performing a lag bridge arm transition after power transfer from the primary side to the secondary side; During the leading bridge arm transition, opening one of the second pair of switch devices; During the transition of the lagging bridge arm, opening one of the first pair of switch devices; Minimizing the freewheeling phase under nominal input voltage conditions; and The freewheeling period is maintained greater than zero under reduced input voltage conditions, the freewheeling period being related to a frequency at which the first pair of switch devices and the second pair of switch devices are switched.
12. The method according to claim 11, wherein: Switching the first and second pair of switch devices at a frequency lower than the nominal switching frequency includes continuously adjusting the frequency at which the first and second pair of switch devices are switched based on an input voltage to the PSFB converter.
13. The method according to claim 12, wherein: Continuously adjusting the frequency at which the first pair of switch devices and the second pair of switch devices are switched based on the input voltage includes: comparing the input voltage or an estimate of the input voltage to a voltage threshold; and If the input voltage or the estimate of the input voltage is below the voltage threshold, the frequency at which the first pair of switching devices and the second pair of switching devices are switched is continuously adjusted.
14. The method according to claim 13, wherein: The input voltage or the estimate of the input voltage is compared to a voltage threshold with hysteresis to indicate when the input voltage or the estimate of the input voltage falls below the voltage threshold.
15. The method according to claim 12, wherein: Continuously adjusting the frequency at which the first pair of switch devices and the second pair of switch devices are switched based on the input voltage includes linearly adjusting the frequency at which the first pair of switch devices and the second pair of switch devices are switched based on the input voltage.
16. The method according to claim 11, wherein: Switching the first pair of switch devices and the second pair of switch devices at the nominal switching frequency under the nominal input voltage condition includes switching the first pair of switch devices and the second pair of switch devices at a first discrete frequency, and wherein switching the first pair of switch devices and the second pair of switch devices at a frequency lower than the nominal switching frequency under the reduced input voltage condition includes switching the first pair of switch devices and the second pair of switch devices at a second discrete frequency lower than the first discrete frequency.
17. The method according to claim 16, wherein: Switching the first pair of switch devices and the second pair of switch devices at the second discrete frequency under the reduced input voltage condition includes: comparing the input voltage or an estimate of the input voltage to a voltage threshold; and If the input voltage or the estimate of the input voltage is below the voltage threshold, the frequency at which the first pair of switching devices and the second pair of switching devices are switched is changed from the first discrete frequency to the second discrete frequency.
18. The method according to claim 17, further comprising: If the input voltage or the estimate of the input voltage increases above the voltage threshold, the frequency at which the first pair of switch devices and the second pair of switch devices are switched is changed from the second discrete frequency back to the first discrete frequency.
19. The method according to claim 17, wherein: The input voltage or the estimate of the input voltage is compared to the voltage threshold with hysteresis to indicate when the input voltage or the estimate of the input voltage falls below the voltage threshold.
20. The method according to claim 11, wherein: Switching the first pair of switch devices and the second pair of switch devices at a frequency lower than the nominal switching frequency under a reduced input voltage condition of the PSFB converter includes switching the first pair of switch devices and the second pair of switch devices at a frequency lower than the nominal switching frequency during an interruption of the AC line voltage input powering the PSFB converter.
21. An AC / DC converter, comprising: an AC / DC stage configured to convert an AC line voltage to a DC voltage; as well as A phase-shifted full-bridge PSFB converter, coupled to the AC / DC stage, comprising: an isolation transformer having a primary side and a secondary side; a full bridge including a first pair of switching devices connected in series at a first node coupled to a first terminal of the primary side of the isolation transformer, and a second pair of switching devices connected in series at a second node coupled to a second terminal of the primary side of the isolation transformer; a rectifier coupled to the secondary side of the isolation transformer; and a controller operable to cause the first pair of switch devices and the second pair of switch devices to switch out of phase with each other, wherein, under a nominal input voltage condition of the PSFB converter, the controller is operable to switch the first pair of switch devices and the second pair of switch devices at a nominal switching frequency, wherein, under a reduced input voltage condition of the PSFB converter, the controller is operable to switch the first pair of switch devices and the second pair of switch devices at a frequency lower than the nominal switching frequency, wherein during the power transfer cycle, the leading bridge arm transition occurs before the power transfer from the primary side to the secondary side and after the freewheeling phase, and the lagging bridge arm transition occurs after the power transfer from the primary side to the secondary side, Where no power transfer occurs during the freewheeling phase, wherein during the transition of the leading bridge arm, one of the switching devices of the second pair of switching devices is disconnected, wherein during the transition of the lagging bridge arm, one of the first pair of switch devices is disconnected, wherein the freewheeling phase is minimized under the nominal input voltage condition, The freewheeling phase is maintained to be greater than zero under the reduced input voltage condition, and the freewheeling phase is related to the frequency at which the first pair of switch devices and the second pair of switch devices are switched.
22. The AC / DC converter according to claim 21, wherein: Under the reduced input voltage condition, the controller of the PSFB converter is operable to continuously adjust the frequency at which the first pair of switch devices and the second pair of switch devices are switched based on the input voltage to the PSFB converter.
23. The AC / DC converter according to claim 21, wherein: The controller of the PSFB converter is capable of operating to: switch the first pair of switch devices and the second pair of switch devices at a first discrete frequency under the nominal input voltage condition, and switch the first pair of switch devices and the second pair of switch devices at a second discrete frequency lower than the first discrete frequency under the reduced input voltage condition.
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