Semiconductor package using buried bridged through silicon via interconnects

By using resin molded package substrates and embedded bridge silicon through-hole inner connecting parts in 2.5D semiconductor packages, the problems of low density and interconnection length in the prior art are solved, and efficient signal transmission and low signal transmission are achieved Power consumption package structure.

CN111769093BActive Publication Date: 2024-12-10MICRON TECHNOLOGY INC
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Patent Information

Application Number
CN202010661926.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2016-10-06
Filing Date
2017-02-15
Publication Date
2024-12-10
Estimated Expiration
2037-02-15

AI Technical Summary

Technical Problem

The existing 2.5D semiconductor packaging technology has problems such as low density, long interconnection length, and large resistance and capacitance load in the chip connection between the silicon through holes, resulting in insufficient performance and high power consumption.

Method used

The inner connecting member of the silicon through-hole through-hole of resin molded packaged substrate and embedded bridge bridge is formed by resin molding core and metal plugs, and the front and rear focus distribution layer structure is embedded, and the inner connecting member of the silicon through-hole is embedded, and placed on it. Semiconductor chips use solder balls and metal plugs for electrical connection, reducing interposer layers, improving density and signal transmission efficiency.

Benefits of technology

Achieve higher density interconnects, reduce resistance and power consumption, improve performance and signal integrity, reduce the shape factor of the package, and improve the overall performance of the package.

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Abstract

The present invention relates to a semiconductor package using an embedded bridged silicon through-hole via (BTHV) interconnector. The present invention discloses a semiconductor package, comprising: a resin molded package substrate, comprising a resin molded core, a plurality of metal plugs penetrating the resin molded core, a front side redistribution layer structure, and a back side redistribution layer structure; a bridged silicon through-hole via (BTHV) interconnector, buried in the resin molded core, wherein the bridged silicon through-hole via (BTHV) interconnector comprises a silicon base, a redistribution layer structure integrally formed on the silicon base, and a plurality of through-silicon vias arranged in the silicon base; a first semiconductor chip and a second semiconductor chip, arranged on the front side redistribution layer structure, wherein the first semiconductor chip and the second semiconductor chip are located in the same plane.
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