Device and method for testing electronic components
By introducing control units and computer program codes into the equipment for testing electronic components, optimizing the measurement process and reducing the number of measurements required, the existing Shimu testing methods are solved, and a more efficient testing process is achieved.
Patent Information
- Application Number
- CN201910768767.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2019-05-09
- Filing Date
- 2019-08-20
- Publication Date
- 2025-03-25
- Estimated Expiration
- 2039-08-20
AI Technical Summary
The existing Shimu testing methods require a large amount of measurement when generating Shimutu, resulting in long test time and high computational complexity, overload and time-consuming system.
By introducing control units and computer program codes into the equipment for testing electronic components, the measurement process is optimized, the number of measurements is reduced, and the signal combination of incremental and decreasing values is used to record the status of the feedback signal, and the pilot points and interpolation points are determined to shorten the test time.
It significantly reduces the number of measurements and time required for Shmudprint generation, reduces the system's computational complexity and overload risk, and improves test efficiency.
Smart Images

Figure CN111999570B_ABST
Abstract
Description
Technical Field
[0001] The present disclosure generally relates to an apparatus for testing an electronic component and a method for testing an electronic component. Background Art
[0002] After manufacturing the integrated device / electronic component, analysis or testing may be performed to verify the functionality of the integrated device / electronic component. Failure analysis is to determine the operating region of the integrated device / electronic component under parameter changes (e.g., voltage, current, and timing). For example, failure analysis can be used to determine the limits that the integrated device / electronic component can withstand under various input signals.
[0003] Shmoo testing is one of the tests that can be used for failure analysis or in automatic test equipment (ATE) for integrated devices. Shmoo testing involves providing a visual representation of a series of measurement results of an integrated device in the form of a two-dimensional graph / diagram (i.e., a Shmoo plot). In Shmoo testing, each individual measurement performed on the ATE may result in a failure or produce a numerical result (e.g., a failure count value or a bit error rate). In the comparative method, Shmoo plots are generated by high resolution and therefore a large number of required measurements over a wide range of parameters. Since those measurements can only be performed continuously, the generation of Shmoo plots is time-consuming. Summary of the invention
[0004] A method and apparatus for improving the test speed of an integrated device is proposed. In the proposed method and apparatus, fewer measurements are required to complete a shmooth diagram, and thus the overall time of testing of an integrated device / electronic component can be reduced. In the proposed method and apparatus, computational complexity is also reduced and thus system overload can also be reduced.
[0005] In one or more embodiments, a device including a control unit and a memory including a computer program code are provided. The memory and the computer program code are configured to cause the device to perform operations through the control unit. The device is capable of applying a first signal having a first value and a second signal having a second value to an electronic component and receiving a first feedback signal. The device is capable of determining a first parameter associated with the first feedback signal. The device is capable of applying a third signal having a third value and a second signal to the electronic component and receiving a second feedback signal. The device is capable of determining a second parameter associated with the second feedback signal. If the first parameter is different from the second parameter, the device is capable of applying a fourth signal having a fourth value and the second signal to the electronic component. Wherein the first difference exists between the third value and the first value, and wherein the second difference exists between the fourth value and the first value.
[0006] In one or more embodiments, a device including a control unit and a memory including computer program code are provided. The memory and the computer program code are configured to cause the device to perform operations through the control unit. The device is capable of receiving a first parameter associated with a first value of a first coordinate and a second value of a second coordinate. The device is capable of receiving a second parameter associated with a third value of the first coordinate and the second value of the second coordinate. If the first parameter is different from the second parameter, the device is capable of receiving a third parameter associated with a fourth value of the first coordinate and the second value of the second coordinate. Wherein the first difference exists between the third value and the first value, and wherein the second difference exists between the fourth value and the first value.
[0007] In one or more embodiments, a method for testing an electronic component is provided. The method includes receiving a first parameter associated with a first value of a first coordinate and a second value of a second coordinate. The method includes receiving a second parameter associated with a third value of the first coordinate and the second value of the second coordinate. The method includes receiving a third parameter associated with a fourth value of the first coordinate and the second value of the second coordinate if the first parameter is different from the second parameter. Wherein a first difference exists between the third value and the first value, and wherein a second difference exists between the fourth value and the first value. BRIEF DESCRIPTION OF THE DRAWINGS
[0008] Aspects of the present disclosure are readily understood from the following detailed description when read in conjunction with the accompanying drawings.It should be noted that various features may not be drawn to scale and that the sizes of various features may be arbitrarily increased or reduced for clarity of discussion.
[0009] Figure 1 A schematic diagram illustrating an apparatus for testing electronic components according to some embodiments of the present disclosure.
[0010] Figure 2A A perspective view illustrating a device under test (DUT) according to some embodiments of the present disclosure.
[0011] Figure 2B A visual representation illustrating a series of measurement results of a DUT according to some embodiments of the present disclosure.
[0012] Figure 3A , 3B , 3C and 3D are various operations for testing electronic components according to some embodiments of the present disclosure.
[0013] Figure 4A , 4B 4C are various operations for testing electronic components according to some embodiments of the present disclosure.
[0014] Figure 5A and 5Bis a schematic diagram showing a visual representation of measurement results after a test is completed according to some embodiments of the present disclosure.
[0015] Fig. 6A is a visual representation of measurement results of an electronic assembly according to a comparative embodiment of the present disclosure.
[0016] Figure 6B is a visual representation of measurement results of an electronic component according to some embodiments of the present disclosure.
[0017] Fig. 7A is a visual representation of measurement results of an electronic assembly according to a comparative embodiment of the present disclosure.
[0018] Figure 7B is a visual representation of measurement results of an electronic component according to some embodiments of the present disclosure.
[0019] Fig. 8A is a visual representation of measurement results of an electronic assembly according to a comparative embodiment of the present disclosure.
[0020] Figure 8B is a visual representation of measurement results of an electronic component according to some embodiments of the present disclosure.
[0021] Fig. 9A , 9B 9C are various operations for testing electronic components according to some comparative embodiments of the present disclosure.
[0022] Fig. 10A and 10B is a schematic diagram showing a visual representation of measurement results after testing is completed according to some comparative embodiments of the present disclosure.
[0023] Common reference numerals are used throughout the drawings and embodiments to indicate the same or similar elements. The present disclosure will be more apparent from the following embodiments in conjunction with the accompanying drawings. DETAILED DESCRIPTION
[0024] The following disclosure provides many different embodiments or examples for implementing the different features of the provided subject matter. Specific examples and arrangements of components are described below. Of course, these are only examples and are not intended to be limiting. In the present disclosure, mentioning in the following description that a first feature is formed above or on a second feature may include an embodiment in which the first feature is formed in direct contact with the second feature, and may also include an embodiment in which an additional feature may be formed between the first feature and the second feature so that the first feature and the second feature may not be in direct contact. In addition, the present disclosure may repeat reference numerals and / or letters in various examples. This repetition is for the purpose of simplicity and clarity, and does not itself indicate the relationship between the various embodiments and / or arrangements discussed.
[0025] Embodiments of the present disclosure are discussed in more detail below. However, it should be understood that the present disclosure provides many applicable inventive concepts that can be embodied in a wide variety of specific contexts. The specific embodiments discussed are merely illustrative and do not limit the scope of the present disclosure.
[0026] Figure 1 Schematic diagram illustrating an apparatus for testing electronic components according to some embodiments of the present disclosure. The apparatus 1 can be used in failure analysis of integrated devices / electronic components. The apparatus 1 can be used in automatic testing of integrated devices / electronic components.
[0027] The apparatus 1 comprises a computing device 2, a control device 4, a test device 6 and a load board 8. One or more electronic connections exist between the computing device 2 and the control device 4. One or more electronic connections exist between the control device 4 and the test device 6. One or more electronic connections exist between the test device 6 and the load board 8.
[0028] The computing device 2 includes a processing unit 10 and a memory unit 12 .
[0029] The processing unit 10 may include, but is not limited to, for example, a central processing unit (CPU), a microprocessor, an application specific instruction set processor (ASIP), a machine control unit (MCU), a graphics processing unit (GPU), a physical processing unit (PPU), a digital signal processor (DSP), an image processor, a co-processor, a storage controller, a floating point unit, a network processor, a multi-core processor, a front-end processor, etc. The processing unit 10 may be electrically connected to the memory unit 12.
[0030] Memory unit 12 may include, but is not limited to, random access memory (RAM), such as static RAM (SRAM) or dynamic RAM (DRAM). In some embodiments, memory unit 12 may include read-only memory (ROM). Memory unit 12 may include cache memory (not shown) for storing recently accessed data so that future requests for the data can be serviced more quickly. Data stored in the cache may include results of earlier calculations by processing unit 10. Data stored in the cache may include copies of data stored in memory unit 12.
[0031] The computing device 2 includes an application program interface (API) installed thereon for generating data for testing. The data generated by the API may be stored in the memory unit 12.
[0032] The control device 4 includes a processing unit 14 , a memory unit 16 and one or more input / output (I / O) ports 18 .
[0033] The processing unit 14 may include, but is not limited to, for example, a central processing unit (CPU), a microprocessor, an application specific instruction set processor (ASIP), a machine control unit (MCU), a graphics processing unit (GPU), a physical processing unit (PPU), a digital signal processor (DSP), an image processor, a co-processor, a storage controller, a floating point unit, a network processor, a multi-core processor, a front-end processor, etc. The processing unit 14 may be electrically connected to the memory unit 16. The processing unit 14 may be electrically connected to the I / O port 18. The memory unit 16 may be electrically connected to the I / O port 18.
[0034] Memory unit 16 may include, but is not limited to, random access memory (RAM), such as static RAM (SRAM) or dynamic RAM (DRAM). In some embodiments, memory unit 16 may include read-only memory (ROM). Memory unit 16 may include a cache (not shown) for storing recently accessed data so that future requests for that data can be serviced more quickly. Data stored in the cache may include results of earlier calculations by processing unit 14. Data stored in the cache may include copies of data stored in memory unit 16.
[0035] The control device 4 may receive the test data from the computing device 2. The control device 4 may generate test instructions / commands based on the test data received from the computing device 2. The test instructions / commands generated by the control device 4 may be stored in the memory unit 16. The test instructions / commands generated by the control device 4 may be transmitted to the test device 6 via the I / O port 18.
[0036] The I / O port 18 may be any computer port capable of sending and receiving data. The I / O port 18 may include, but is not limited to, a Universal Serial Bus (USB) port, an IEEE 1394 port (also known as a FireWire port), a PS / 2 port (also known as a mini-DIN port), a serial port (also known as an RS-232 or communications (COM) port), a parallel port (also known as a line printer (LPT) port), a Small Computer System Interface (SCSI) port, a 1 / 8-inch audio mini-jack, an RG-6 coaxial port, or a Musical Instrument Digital Interface (MIDI) port.
[0037] The test device 6 comprises one or more modules for testing an integrated device / electronic component. Figure 1 The test device 6 includes a direct current (DC) module 20, a precision measurement unit (PMU) 22, a digital module 24, and a relay board 26. The control device 4 can transmit the test instruction / command to the corresponding module of the test device 6 based on the type / content of the test instruction / command.
[0038] The DC module 20 may be used to test the DC parameters of the integrated device / electronic component. In some embodiments, the DC module 20 may provide a DC current to the integrated device / electronic component under test. In some embodiments, the DC module 20 may provide a voltage to the integrated device / electronic component under test.
[0039] PMU 22 may be used to test DC parameters of integrated devices / electronic components. PMU 22 may provide DC parameters with high accuracy. PMU 22 may provide DC parameters with small amplitudes / magnitudes. In some embodiments, PMU 22 may provide accurate DC currents with small values. In some embodiments, PMU 22 may provide accurate voltages with small magnitudes.
[0040] The digital module 24 may be used to test the functionality of the integrated device / electronic assembly. In some embodiments, the digital module 24 may be used to provide various signals to the DUT 28. In some embodiments, the digital module 24 may be used to test the interconnect integrated circuit (I2C) bus of the DUT 28. In some embodiments, the digital module 24 may be used to test the transistor-transistor logic (TTL) of the DUT 28. In some embodiments, the digital module 24 may be used to test the serial peripheral interface (SPI) of the DUT 28. In some embodiments, the digital module 24 may be used to provide baseband signals or radio frequency signals to the DUT 28.
[0041] In some embodiments, the digital module 24 may provide signals with different switching frequencies to the DUT 28. In some embodiments, the digital module 24 may control the rising / falling edges of the signals to be provided to the DUT 28. In some embodiments, the digital module 24 may provide synchronous or asynchronous signals to the DUT 28.
[0042] Relay board 26 may provide routing to test equipment 6. In some embodiments, if the number of pins of DUT 28 exceeds the number of test channels that can be provided by test equipment 6, some of the pins may be connected to the same channel via relay board 26. Relay board 26 may be used to connect different pins to specific test channels of test equipment 6.
[0043] A device under test (DUT) 28 may be mounted on a load board 8. One or more conductive or physical connections exist between the DUT 28 and the load board 8. In some embodiments, the DUT 28 may be an integrated integrated circuit or electronic component.
[0044] Figure 2A A perspective view illustrating a device under test (DUT) according to some embodiments of the present disclosure. Figure 2A, DUT 28 includes eight pins. It is contemplated that DUT 28 may include more pins or fewer pins. During failure analysis or automated testing, one or more test signals / commands may be provided to DUT 28. In some embodiments, signal S1 is provided to DUT 28, and signal S2 is provided to DUT 28. DUT 28 generates an output signal (or feedback signal) Z in response to signal S1 and signal S2.
[0045] The relationship between the signal S1, the signal S2 and the feedback signal Z1 can be expressed in the following equation:
[0046] Z=f(S1,S2)................................................(1)
[0047] The feedback signal Z may be a function of the signal S1 and the signal S2.
[0048] In some embodiments, signal S1 and signal S2 may be provided to different pins of DUT 28. In some embodiments, signal S1 and signal S2 may be provided to the same pin of DUT 28. Figure 2A , signal S1 may be provided to pin "1" of DUT 28, and signal S2 may be provided to pin "2" of DUT 28. It is contemplated that signals S1 and S2 may be provided to other pins of DUT 28. Figure 2A , the feedback signal Z may be generated at pin "5" by the DUT 28. It is contemplated that the feedback signal Z may be generated at other pins by the DUT 28.
[0049] In some embodiments, signal S1 and signal S2 may be provided synchronously to DUT 28. In some embodiments, signal S1 and signal S2 may be provided simultaneously to DUT 28. In some embodiments, signal S1 and signal S2 may be provided continuously to DUT 28. In some embodiments, signal S1 and signal S2 may be provided to DUT 28 at different timings.
[0050] In some embodiments, signal S1 and signal S2 may include the same properties (eg, both signals S1 and S2 are voltage or current). In some embodiments, signal S1 and signal S2 may include different properties.
[0051] Figure 2B A visual representation illustrating a series of measurement results of a DUT according to some embodiments of the present disclosure. Figure 2B , the visual representation 3 includes a series of measurement results of the DUT 28 presented in the form of a two-dimensional graph / diagram. Such a visual representation 3 is sometimes referred to as a "Shmooth" diagram. See Figure 2B, the visual representation 3 is provided via horizontal and vertical coordinates. The horizontal coordinate represents the signal S1 provided to the DUT 28, and the vertical coordinate represents the signal S2 provided to the DUT 28.
[0052] See also Figure 2B , a measurement result 30 is obtained by providing a signal S1 having a value 30_s1 and a signal S2 having a value 30_s2 to the DUT 28. A measurement result 32 is obtained by providing a signal S1 having a value 32_s1 and a signal S2 having a value 32_s2 to the DUT 28. Figure 2B The measurement result 30 marked as "P" in FIG. 1 means that the feedback signal Z provided by the DUT 28 in response to the signal S1 having the value 30_s1 and the signal S2 having the value 30_s2 complies with or satisfies the specific requirements for the DUT 28. Figure 2B The measurement result 32 marked as “F” in FIG. 3 means that the feedback signal Z provided by the DUT 28 in response to the signal S1 having the value 32_s1 and the signal S2 having the value 32_s2 fails to comply with or meet the specific requirements for the DUT 28 .
[0053] Visual representation 3 is generated within a parameter range with resolution. Figure 2B , visual representation 3 is generated by providing signal S1 having resolution 36 and signal S2 having resolution 38 to DUT 28. In some embodiments, resolution 36 may be a voltage amplitude difference. In some embodiments, resolution 36 may be a current value difference. In some embodiments, resolution 38 may be a voltage amplitude difference. In some embodiments, resolution 38 may be a current value difference. In some embodiments, resolution 36 may be the same as resolution 38. In some embodiments, resolution 36 may be different from resolution 38.
[0054] In some embodiments, resolution 36 may be a voltage difference of 0.0125 volts. In some embodiments, resolution 38 may be a voltage difference of 0.0125 volts. In some embodiments, resolution 36 may be a current difference of 0.0125 A. In some embodiments, resolution 38 may be a current difference of 0.0125 A. It is contemplated that resolutions 36 and 38 may be parameters other than voltage and current. It is contemplated that resolutions 36 and 38 may be parameters having other value differences.
[0055] See also Figure 2B , a virtual edge 34 exists between the region where all measurements are “P” and the region where all measurements are “F.” The operating region of the integrated device / electronic component under parameter variations (eg, voltage, current, and timing) can be determined after obtaining the virtual edge 34 .
[0056] exist Figure 2BIn the embodiment shown in , 20 different values of signal S1 are provided to DUT 28 during testing, and 20 different values of signal S2 are provided to DUT 28 during testing. The combination of these different values of signals S1 and S2 produces 400 measurement results of DUT 28. Therefore, virtual edge 34 can be obtained after completing 400 measurements.
[0057] Assuming that each measurement of DUT 28 takes 1 second, it will take nearly 7 minutes to complete the shmooth diagram of a single DUT 28. This is sometimes unacceptable because engineers may need to perform failure analysis for tens or even hundreds of electronic components or integrated devices. In addition, as the resolution of signals S1 and S2 increases, sometimes more than thousands of measurement results may be needed to complete the shmooth diagram of a single electronic component (e.g., in Fig. 6A , 7A 8A, 6561 measurements are required for a single electronic component). The overall time taken to complete the test will be extremely large.
[0058] Figure 3A , 3B , 3C and 3D are various operations for testing electronic components according to some embodiments of the present disclosure.
[0059] See also Figure 3A , a method for testing an electronic component includes providing a signal S1 having different values and a signal S2 having different values to a DUT 28. Figure 3A , signal S1 is incrementally provided to DUT 28 with a difference value 40. Signal S2 is incrementally provided to DUT 28 with a difference value 42. Difference value 40 may be selected to be greater than resolution 36 in order to reduce the total number of measurements required. Difference value 42 may be selected to be greater than resolution 38 in order to reduce the total number of measurements required.
[0060] In some embodiments, difference 40 may be selected to be the same as difference 42. In some embodiments, difference 40 may be selected to be different from difference 42.
[0061] The method includes recording the state of each feedback signal Z in response to different combinations of the signal S1 and the signal S2. Figure 3A , five different values of signal S1 and five different values of signal S2 are provided to DUT 28. The five different values of signal S1 and the five different values of signal S2 produce 25 combinations and thus 25 measurement results (i.e., 25 feedback signals Z). In some embodiments, these 25 measurements made are referred to as "pilot measurements" or "pilot points."
[0062] Each of the feedback signals Z will be compared with the requirements or criteria of the DUT 28 for determining its state. The method includes observing the state of each feedback signal Z in response to different combinations of the signal S1 and the signal S2. Figure 3A , such feedback signals are labeled "P" or "F" depending on whether they meet such requirements or criteria of DUT 28. Figure 3A It is known that there is a boundary between the region where all states are labeled “P” and the region where all states are labeled “F.” More measurements may be made in order to obtain a more precise operating region of the DUT 28 .
[0063] In methods according to some embodiments of the present disclosure, other measurements may be made starting from a pair of states including both "P" and "F". Figure 3A , other measurements may be made starting from a pair including state 44a and state 44b. In some embodiments, other measurements may be made starting from a pair including state 46a and state 46b. In some embodiments, other measurements may be made starting from a pair including state 48a and state 48b. In some embodiments, other measurements may be made between any pair of states including both "P" and "F".
[0064] In the following paragraphs, the measurement results obtained starting from a pair including state 44a and state 44b may be referred to as a "galaxy". The measurement results obtained starting from a pair including state 46a and state 46b may be referred to as another "galaxy". The measurement results obtained starting from a pair including state 48a and state 48b may be referred to as yet another "galaxy".
[0065] See also Figure 3A , the measurement result obtained starting from a pair including state 44a and state 44b can be referred to as galaxy C1. The measurement result obtained starting from a pair including state 46a and state 46b can be referred to as galaxy C2. The measurement result obtained starting from a pair including state 48a and state 48b can be referred to as galaxy C3.
[0066] Taking a pair including state 44a and state 44b (i.e., galaxy C1) as an example, other measurements between state 44a and state 44b can be performed in direction d1. Other measurements can be made on DUT 28 by gradually increasing the value of signal S1 while keeping the value of signal S2 unchanged. In some embodiments, the value of signal S1 can be increased by resolution 36 each time.
[0067] Taking a pair including state 46a and state 46b (i.e., galaxy C2) as an example, other measurements between state 46a and state 46b can be performed in direction d2. At the same time, other measurements can be made on DUT 28 by gradually reducing the value of signal S1 while keeping the value of signal S2 unchanged. In some embodiments, the value of signal S1 can be reduced by resolution 36 each time.
[0068] Taking a pair including state 48a and state 48b (i.e., galaxy C3) as an example, other measurements between state 48a and state 48b can be performed in direction d3. At the same time, other measurements can be made on DUT 28 by gradually increasing the value of signal S2 while keeping the value of signal S1 unchanged. In some embodiments, the value of signal S2 can be increased by resolution 38 each time.
[0069] Taking a pair including state 48a and state 48b (i.e., galaxy C3) as an example, other measurements between state 48a and state 48b can be performed in direction d4. At the same time, other measurements can be made on DUT 28 by gradually reducing the value of signal S2 while keeping the value of signal S1 unchanged. In some embodiments, the value of signal S2 can be reduced by resolution 38 each time.
[0070] See also Figure 3B , describing and explaining the operation performed between state 44a and state 44b in direction d1. In the method according to some embodiments of the present disclosure, once a state different from state 44a is found along direction d1, the increment of the value of signal S1 stops and the value of signal S2 increases. In addition, when the state has not changed, the value of signal S1 decreases to the last value.
[0071] Assume that state 44a is obtained by providing signal S1 with value 44a_s1 and signal S2 with value 44a_s2 to DUT 28, and state 50 is obtained by providing signal S1 with value 50_s1 and signal S2 with value 50_s2 to DUT 28. Value 50_s1 is greater than value 44a_s1, and value 50_s2 is the same as value 44a_s2.
[0072] Once state 50 is determined to be different from state 44a, the method includes operations for obtaining state 51. To obtain state 51, signal S1 having value 51_s1 and signal S2 having value 51_s2 are provided to DUT 28. Value 51_s1 is the same as value 44a_s1, and value 51_s2 is greater than value 44a_s2.
[0073] See also Figure 3C, describing and explaining other operations performed between state 44a and state 44b in direction d1. After obtaining state 51, other operations may be performed along direction d1 to obtain a state change of DUT 28 (i.e., from "P" to "F" or vice versa). In the example shown in FIG. 3C, the state change may be found between state 52 and state 53.
[0074] The method includes increasing the value of signal S1 until a state change is found. For example, once state 52 is determined to be the same as state 51, the method includes an operation for obtaining state 53. To obtain state 53, signal S1 having value 53_s1 and signal S2 having value 53_s2 are provided to DUT 28. Value 53_s1 is greater than value 52_s1, and value 53_s2 is the same as value 52_s2.
[0075] Once a state change is found in the direction d1, the increase in the value of the signal S1 stops and the value of the signal S2 increases. In addition, when the state has not changed, the value of the signal S1 decreases to the last value. For example, once the state 53 is determined to be different from the state 52, the method includes an operation for obtaining the state 54. To obtain the state 54, the signal S1 having the value 54_s1 and the signal S2 having the value 54_s2 are provided to the DUT 28. The value 54_s1 is the same as the value 52_s1, and the value 54_s2 is greater than the value 52_s2.
[0076] Will continue as per Figure 3B and 3C The described operation continues until a virtual edge / boundary is found within the galaxy.
[0077] See also Figure 3D , you can continue as per Figure 3B and 3C The operation described above is continued until a virtual edge / boundary is found in the galaxy C1. After the virtual edge / boundary is found in the galaxy C1, the operation described above can be continued in another galaxy according to the Figure 3B In some embodiments, after finding the virtual edge / boundary in galaxy C1, the following operations may be performed on galaxy C2: Figure 3B and 3C In some embodiments, after the virtual edge / boundary is found in galaxy C1, galaxy C3 may be subjected to the following operations: Figure 3B and 3C In some embodiments, after the virtual edge / boundary is found in galaxy C1, galaxy C4 may be subjected to the following operations: Figure 3B and 3C The operation described.
[0078] In some embodiments, the Figure 3B and 3C The described operation is performed until the signal S2 reaches a predetermined value T1 (i.e., threshold T1). Taking galaxy C1 as an example, threshold T1 may be a value equal to the sum of 44a_s2 and difference 42. Taking galaxy C4 as an example, threshold T1 may be a value equal to the sum of 46a_s2 (i.e., the value of signal S2 provided to DUT 28 to obtain state 46a) and difference 42.
[0079] Figure 4A , 4B 4C are various operations for testing electronic components according to some embodiments of the present disclosure.
[0080] See also Figure 4A , describes and explains other operations performed between state 44a and state 44b in direction d1. State 50 is obtained by providing a signal S1 having a value 50_s1 and a signal S2 having a value 50_s2 to DUT 28. Once value 50_s1 equals or exceeds a predetermined value T2 (i.e., threshold T2) before a state change (i.e., from "P" to "F" or vice versa) can be found, the method includes abandoning further measurements between state 44a and state 44b, and then starting measurements between another pair of states (i.e., another star system).
[0081] In some embodiments, the predetermined value T2 may be a value between 44a_s1 and 44b_s1. In some embodiments, the predetermined value T2 may be a value of about half of the difference 40. In some embodiments, the predetermined value T2 may be a value of about one-third (1 / 3) of the difference 40. In some embodiments, the predetermined value T2 may be a value of about two-thirds (2 / 3) of the difference 40. In some embodiments, the predetermined value T2 may be a value of about one-quarter (1 / 4) of the difference 40. In some embodiments, the predetermined value T2 may be a value of about three-quarters (3 / 4) of the difference 40. In some embodiments, the predetermined value T2 may be a value less than the difference 40.
[0082] In some embodiments, the method includes starting other measurements between a pair of states that are farthest from a pair of states 44a and 44b. In some embodiments, the method includes starting other measurements between states 46a and 46b. The measurements between states 46a and 46b may be similar to those based on Figure 3B and Figure 3C The methods described above are followed.
[0083] See also Figure 4B, describing one operation of a method according to some embodiments of the present disclosure. State 47 is obtained by providing a signal S1 having a value 47_s1 and a signal S2 having a value 47_s2 to the DUT 28. Once the value 47_s1 equals or exceeds a predetermined value T2 before a state change (i.e., a change from "P" to "F" or vice versa) can be found, the method includes abandoning further measurements between state 46a and state 46b, and then starting measurements between another pair of states.
[0084] In some embodiments, the method includes starting other measurements between state 49a and state 49b. The measurements between state 49a and state 49b may be similar to those based on Figure 3B and Figure 3C The methods described above are followed.
[0085] Figure 4C An operation of the method described in some embodiments of the present disclosure is shown. Figure 4C , the measurements in galaxies C2 and C3 have been completed, because the virtual edge / boundary has been found in galaxies C2 and C3. However, the virtual edge / boundary has not yet been found in galaxies C1 and C4, because the measurements along direction d1 have stopped, as shown by Figure 4A and 4B The method according to some embodiments of the present disclosure may further include performing measurements again on galaxies C1 and C4 along a direction d2 different from the direction d1.
[0086] In some embodiments, measurements of galaxy C1 may be made starting from state 44b toward state 44a. Measurements within galaxy C1 may be made similarly to those made according to Figure 3B and Figure 3C In some embodiments, measurements made on galaxy C4 may be made starting from state 46b toward state 46a. Measurements made within galaxy C4 may be made similarly to those made according to Figure 3B and Figure 3C The methods described above are followed.
[0087] according to Figure 3A , 3B The operations described in 3C, 3D, 4A, 4B and 4C can be applied to several manufacturing stages of semiconductor / integrated devices.
[0088] In some embodiments, according to Figure 3A , 3BThe operations described in 3C, 3D, 4A, 4B, and 4C can be applied to mass production of a newly designed product. By obtaining a two-dimensional representation of the operating region of the newly designed product (i.e., the Shmooth diagram), engineers involved in mass production can easily understand the operating limitations of the newly designed product. For example, engineers involved in the quality control process of the newly designed product can easily understand the criteria for determining the yield of the product.
[0089] In some embodiments, according to Figure 3A , 3B The operations described in 3C, 3D, 4A, 4B and 4C can be applied to graded products. For example, a product with a wider operating range can be classified as a premium product and has a higher price. The wider operating range of the product shows that the product can still operate normally in a harsh environment (for example, in high temperature or in high pressure).
[0090] In accordance with Figure 3A , 3B , 3C, 3D, 4A, 4B and 4C, if a failure result (i.e., "F") is obtained (which means that the feedback signal Z provided by DUT 28 in response to signal S1 and signal S2 fails to comply with or fails to meet the specific requirements of DUT 28), then several operations can be performed.
[0091] In some embodiments, if a failure result is obtained, a failure analysis may be performed with respect to the overall test process. In some embodiments, if a failure result is obtained, a failure analysis may be performed with respect to the equipment used during the test process. For example, the equipment used during the test process may be inspected and verified. Figure 1 Devices and modules of the described apparatus. In some embodiments, if a failure result is obtained, the environment (eg, temperature and / or humidity) in which the test is conducted may be checked and verified.
[0092] If a failure result is obtained when the overall test process is correct (e.g., no anomalies are found in the test equipment and the test environment), the final shmooth map can be provided to the next stage of the mass production process. In some embodiments, the final shmooth map can be provided to downstream manufacturers. Downstream manufacturers can fine-tune their production processes based on the shmooth map.
[0093] Figure 5A and 5B is a schematic diagram showing a visual representation of measurement results after a test is completed according to some embodiments of the present disclosure.
[0094] Methods according to some embodiments of the present disclosure include adjusting difference 40 and difference 42 in order to modify the number of "pilot points" or "pilot measurements" tested. Figure 5A and 5B , Figure 5B The difference in 40 is greater than Figure 5A The difference in Figure 5B The difference 42 is greater than Figure 5A The difference in .
[0095] Figure 5A is a visual representation of the measurement results when the number of "pilot points" is selected to be 25. That is, five different values of signal S1 and five different values of signal S2 are provided to DUT 28. Figure 5A In the embodiment shown in , in addition to the 25 pilot points, an additional 53 measurements are required before the precise operating region of the DUT 28 can be determined. Therefore, a total of 78 measurements are required before the testing of the DUT 28 is completed.
[0096] and Figure 2B Compared with the embodiment shown in Figure 5A The total number of measurements required for the embodiment shown in FIG. 1 is significantly reduced from 400 to 78. As a result, the time required to complete the shmooth diagram is reduced by nearly 80% and Figure 5A The efficiency of the embodiment shown in is significantly improved.
[0097] Figure 5B is a visual representation of the measurement results when the number of "pilot points" is selected to be 9. That is, three different values of signal S1 and three different values of signal S2 are provided to DUT 28. Figure 5B In the embodiment shown in , in addition to the 9 pilot points, an additional 55 measurements are required before the precise operating region of the DUT 28 can be determined. Therefore, a total of 64 measurements are required before the testing of the DUT 28 is completed.
[0098] and Figure 2B Compared with the embodiment shown in Figure 5B The total number of measurements required for the embodiment shown in FIG. 1 is significantly reduced from 400 to 64. Thus, the time required to complete the shmooth diagram is reduced by nearly 84% and Figure 5B The efficiency of the embodiment shown in is significantly improved.
[0099] Fig. 6A is a visual representation of measurement results of an electronic assembly according to a comparative embodiment of the present disclosure. Fig. 6A , both signals S1 and S2 provided to the DUT 28 are voltage signals. In this comparative embodiment, if the provided signal S1 is within the range of about 0.225 volts to 0.75 volts, then the DUT 28 does not operate properly. In this comparative embodiment, if the combination of the signals S1 and S2 is within the region 55, then the DUT 28 does not operate properly. In this comparative embodiment, a total of 6561 measurements are made before the operating region of the DUT 28 is determined.
[0100] Figure 6B is a visual representation of measurement results of an electronic component according to some embodiments of the present disclosure. Figure 6B The measurement results shown in the above can be based on Figure 3A , 3B , 3C, 3D, 4A, 4B and 4C. In this embodiment, only 1038 measurements are made before the operating region of DUT 28 can be determined. Obviously, Figure 6B The efficiency of the embodiment shown in Fig. 6A The efficiency of the embodiment shown in is relatively higher.
[0101] Fig. 7A is a visual representation of measurement results of an electronic assembly according to a comparative embodiment of the present disclosure. Fig. 7A , both signals S1 and S2 provided to the DUT 28 are voltage signals. In this comparative embodiment, if the provided signal S2 is within the range of approximately 0.15 volts to 0.75 volts, then the DUT 28 does not operate properly. In this comparative embodiment, if the combination of the signals S1 and S2 is within the region 56, then the DUT 28 does not operate properly. In this comparative embodiment, a total of 6561 measurements are made before the operating region of the DUT 28 is determined.
[0102] Figure 7B is a visual representation of measurement results of an electronic component according to some embodiments of the present disclosure. Figure 7B The measurement results shown in the above can be based on Figure 3A , 3B , 3C, 3D, 4A, 4B and 4C. In this embodiment, only 1113 measurements are made before the operating region of the DUT 28 can be determined. Obviously, the efficiency of the embodiment shown in FIG. 7B is better than Fig. 7A The efficiency of the embodiment shown in is relatively higher.
[0103] Fig. 8A is a visual representation of measurement results of an electronic assembly according to a comparative embodiment of the present disclosure. Fig. 8A , both signals S1 and S2 provided to the DUT 28 are voltage signals. In this comparative embodiment, if the combination of the signals S1 and S2 is within the region 57, the DUT 28 cannot operate properly. In this comparative embodiment, a total of 6561 measurements are made before the operating region of the DUT 28 is determined.
[0104] Figure 8B is a visual representation of measurement results of an electronic component according to some embodiments of the present disclosure. Figure 8B The measurement results shown in the above can be based on Figure 3A ,3B , 3C, 3D, 4A, 4B and 4C. In this embodiment, only 793 measurements are made before determining the operating region of DUT 28. Obviously, Figure 8B The efficiency of the embodiment shown in Fig. 8A The efficiency of the embodiment shown in is relatively higher.
[0105] Fig. 9A , 9B 9C are various operations for testing electronic components according to some comparative embodiments of the present disclosure.
[0106] The method includes providing signals S1 and S2 with various values so as to obtain a signal similar to that according to Figure 3A Once the "pilot measurements" of those described have been completed, other measurements can be made on groups of four pilot points. Fig. 9A If the states of the four pilot points are not the same (ie, state 60B is different from states 60A, 60C, and 60D), then further measurements are made to determine state 61.
[0107] State 61 may be obtained by providing a signal S1 having a value 61_s1 and a signal S2 having a value 61_s2. State 60A may be obtained by providing a signal S1 having a value 60A_s1 and a signal S2 having a value 60A_s2. State 60B may be obtained by providing a signal S1 having a value 60B_s1 and a signal S2 having a value 60B_s2. State 60C may be obtained by providing a signal S1 having a value 60C_s1 and a signal S2 having a value 60C_s2. State 60D may be obtained by providing a signal S1 having a value 60D_s1 and a signal S2 having a value 60D_s2.
[0108] In some embodiments, state 61 may be the geometric center of the visual representation of states 60A, 60B, 60C, and 60D. In some embodiments, value 61_s1 is between values 60C_s1 and 60B_s1. In some embodiments, value 61_s2 is between values 60A_s2 and 60B_s2.
[0109] See also Fig. 9B On the other hand, if the states of the four pilot points are the same (i.e., states 60A, 60B, 60C, and 60D are all "P"), no other measurements are needed to determine state 62. State 62 can be assigned to be the same as states 60A, 60B, 60C, and 60D. The states obtained by assignment may be referred to as "interpolation points" in subsequent paragraphs.
[0110] See also Fig. 9C, the group consisting of states 60C, 60D, 61 and 62 can be further used to obtain state 63. It can be similar to or equivalent to the state according to Fig. 9A and 9B State 63 is determined in the manner of those described. In some embodiments, if states 60C, 60D, 61, and 62 are identical to one another, then state 63 is designated as being equivalent to states 60C, 60D, 61, and 62.
[0111] In some embodiments, if the states 60C, 60D, 61 and 62 are different from each other, the method includes providing a signal S1 having a value 63_s1 and a signal S2 having a value 63_s2 to the DUT 28 , and determining the state 63 based on a feedback signal output by the DUT 28 .
[0112] As per Fig. 9A , 9B The operations described in 9C may be repeated or iterated. Fig. 9A , 9B By performing the operations described in FIG. 9C , the precise operating region of the DUT 28 can be found.
[0113] However, according to Fig. 9A , 9B The operation described in 9C is computationally more efficient than that described in Figure 3A , 3B , 3C, 3D, 4A, 4B and 4C are more complex. Fig. 9A , 9B The operations described in FIG. 9C include calculations based on trigonometric functions because it is necessary to find the geometric center (e.g., state 61) of four states (e.g., state 60A, state 60B, state 60C, and state 60D) arranged in a rectangular shape. Therefore, as described according to Fig. 9A , 9B The computational complexity of the operation described by and 9C is O(n^2), which means that it takes exponential running time. Figure 3A , 3B The computational complexity of the operations described in , 3C, 3D, 4A, 4B and 4C is O(n) since the operations involved are linear and therefore take linear running time.
[0114] Fig. 10A and 10B is a schematic diagram showing a visual representation of measurement results after testing is completed according to some comparative embodiments of the present disclosure.
[0115] like Fig. 10A and 10B The visual representation of the measurement results shown in Fig. 9A ,9B The method described in 9C is obtained. The method according to the comparative embodiment of the present disclosure includes adjusting the difference 40 and the difference 42 to modify the number of "pilot points" or "pilot measurements" tested. Fig. 10A and 10B , Fig. 10B The difference in 40 is greater than Fig. 10A The difference in Fig. 10B The difference 42 is greater than Fig. 10A The difference in .
[0116] Fig. 10A is a visual representation of the measurement results when the number of "pilot points" is selected to be 25. That is, five different values of signal S1 and five different values of signal S2 are provided to DUT 28. Fig. 10A In the embodiment shown in , in addition to the 25 pilot points, an additional 74 measurements are required before the precise operating region of the DUT 28 can be determined. Therefore, a total of 99 measurements are required before the testing of the DUT 28 is complete. In addition, 24 "interpolation points" are used during testing.
[0117] and Figure 2B Compared with the embodiment shown in Fig. 10A The total number of measurements required for the embodiment shown in is reduced from 400 to 99. Thus, the time required for the measurements is reduced by approximately 75%. Fig. 10A The embodiment shown in requires additional calculation of the "interpolation points" and thus will increase the overall time to complete the shmooth. Fig. 9A , 9B and 9C, Fig. 10A The computational complexity required for the embodiment shown in Figure 5A The computational complexity required for the embodiment shown in is much higher.
[0118] Fig. 10B is a visual representation of the measurement results when the number of "pilot points" is selected to be 9. That is, three different values of signal S1 and three different values of signal S2 are provided to DUT 28. Fig. 10B In the embodiment shown in , in addition to the 9 pilot points, an additional 84 measurements are required before the precise operating region of the DUT 28 can be determined. Therefore, a total of 93 measurements are required before the testing of the DUT 28 is complete. In addition, 35 "interpolation points" are used during testing.
[0119] and Figure 2B Compared with the embodiment shown in Fig. 10B The total number of measurements required for the embodiment shown in is reduced from 400 to 93. Thus, the time required for measurement is reduced by approximately 76%. Fig. 10BThe embodiment shown in requires additional calculation of the "interpolation points" and thus will increase the overall time to complete the shmooth. Fig. 9A , 9B and 9C, Fig. 10B The computational complexity required for the embodiment shown in Figure 5B The computational complexity required for the embodiment shown in is much higher.
[0120] As used herein, for ease of description, spatially relative terms such as "below," "below," "below," "above," "above," "above," "below," "to the left," "to the right," and the like may be used herein to describe the relationship of an element or feature to another element or feature as illustrated in the figures. Spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The device may be oriented in other ways (rotated 90 degrees or in other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly. It should be understood that when an element is referred to as being "connected" or "coupled" to another element, it may be directly connected or coupled to the other element, or there may be intervening elements.
[0121] As used herein, the terms "substantially", "generally", "roughly" and "approximately" are used to describe and take into account small variations. When used in conjunction with an event or situation, the term may refer to individual instances where the event or situation clearly occurs and individual instances where the event or situation is very close to occurring. As used herein with respect to a given value or range, the term "about" generally means within ±10%, ±5%, ±1% or ±0.5% of a given value or range. Ranges may be expressed herein as from one endpoint to another or between two endpoints. Unless otherwise specified, all ranges disclosed herein include endpoints. The term "substantially coplanar" may refer to two surfaces that are within a few microns (μm) along the same plane (e.g., within 10 μm, within 5 μm, within 1 μm or within 0.5 μm along the same plane). When a value or characteristic is said to be "substantially" the same, the term may refer to the value being within ±10%, ±5%, ±1% or ±0.5% of the average value of the value.
[0122] As used herein, the terms "substantially," "generally," "approximately," and "approximately" are used to describe and take into account small variations. When used in conjunction with an event or circumstance, the terms may refer to instances where the event or circumstance clearly occurred as well as instances where the event or circumstance closely approximates to occurring. For example, when used in conjunction with a numerical value, the terms may refer to a range of variation of less than or equal to ±10% of the numerical value, for example, less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. For example, two values may be considered "substantially" or "approximately" the same if the difference between them is less than or equal to ±10% of the average of the values (e.g., less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%). For example, "substantially" parallel may refer to a range of variation less than or equal to ±10° relative to 0°, such as less than or equal to ±5°, less than or equal to ±4°, less than or equal to ±3°, less than or equal to ±2°, less than or equal to ±1°, less than or equal to ±0.5°, less than or equal to ±0.1°, or less than or equal to ±0.05°. For example, "substantially" vertical may refer to a range of variation less than or equal to ±10° relative to 90°, for example, less than or equal to ±5°, less than or equal to ±4°, less than or equal to ±3°, less than or equal to ±2°, less than or equal to ±1°, less than or equal to ±0.5°, less than or equal to ±0.1°, or less than or equal to ±0.05°.
[0123] For example, two surfaces may be considered coplanar or substantially coplanar if the displacement between the two surfaces is equal to or less than 5 μm, equal to or less than 2 μm, equal to or less than 1 μm, or equal to or less than 0.5 μm. A surface may be considered planar or substantially planar if the displacement between any two points on the surface relative to the surface of the plate is equal to or less than 5 μm, equal to or less than 2 μm, equal to or less than 1 μm, or equal to or less than 0.5 μm.
[0124] As used herein, the terms "conductivity", "electrical conduction" and "conductivity" refer to the ability to transmit electric current. Conductive materials generally refer to those materials that present little or no resistance to the flow of electric current. One measure of conductivity is Siemens / meter (S / m). Typically, a conductive material is a material having a conductivity greater than about 104 S / m (e.g., at least 105 S / m or at least 106 S / m). The conductivity of a material can sometimes vary with temperature. Unless otherwise specified, the conductivity of a material is measured at room temperature.
[0125] Unless the context clearly dictates otherwise, as used herein, the singular terms "a", "an", and "the" may include plural referents. In the description of some embodiments, a component being disposed "on" or "over" another component may encompass the case where the former component is directly on (e.g., in physical contact with) the latter component, as well as the case where one or more intervening components are located between the former component and the latter component.
[0126] Unless otherwise specified, spatial descriptions such as "above", "below", "upward", "left", "right", "downward", "top", "bottom", "vertical", "horizontal", "side", "higher", "lower", "lower", "upper", "lower", "below", "below", etc. refer to indications relative to the orientation shown in the figures. It should be understood that the spatial descriptions used herein are for illustrative purposes only, and actual implementations of the structures described herein may be spatially arranged in any orientation or manner, provided that the advantages of the embodiments of the present disclosure are not deviated by such arrangements.
[0127] Although the present disclosure has been described and illustrated with reference to specific embodiments of the present disclosure, such descriptions and illustrations do not limit the present disclosure. It is clearly understood by those skilled in the art that various changes may be made, and equivalent components may be substituted within the embodiments without departing from the true spirit and scope of the present disclosure as defined by the appended claims. The description may not be drawn to scale. Due to variables in the manufacturing process, etc., there may be differences between the process reproduction in the present disclosure and the actual equipment. There may be other embodiments of the present disclosure that are not specifically described. This specification and drawings should be considered illustrative rather than restrictive. Modifications may be made to adapt specific circumstances, materials, material compositions, methods or processes to the goals, spirit and scope of the present disclosure. All such modifications are intended to be within the scope of the claims attached hereto. Although the methods disclosed herein have been described with reference to specific operations performed in a specific order, it is understood that these operations may be combined, subdivided, or reordered to form equivalent methods without departing from the teachings of the present disclosure. Therefore, unless specifically indicated herein, the order and grouping of operations are not limitations on the present disclosure.
[0128] The foregoing summarizes the features of several embodiments and detailed aspects of the present disclosure. The embodiments described in the present disclosure may be readily used as a basis for designing or modifying other processes and structures for carrying out the same or similar purposes and / or achieving the same or similar advantages of the embodiments introduced herein. Such equivalent constructions do not depart from the spirit and scope of the present disclosure, and various changes, substitutions, and modifications may be made without departing from the spirit and scope of the present disclosure.
Claims
1. A device comprising: Control unit; a memory containing computer program code; and The memory and the computer program code are configured to cause the apparatus to execute, through the control unit: applying a first signal having a first value and a second signal having a second value to an electronic component and receiving a first feedback signal; determining a first parameter associated with the first feedback signal; applying a third signal having a third value and the second signal to the electronic component and receiving a second feedback signal; determining a second parameter associated with the second feedback signal; applying a fourth signal having a fourth value and the second signal to the electronic component if the first parameter is different from the second parameter, wherein a first difference exists between the third value and the first value, and wherein a second difference exists between the fourth value and the first value; applying a fifth signal having a fifth value and a sixth signal having a sixth value to the electronic component and receiving a third feedback signal: applying a seventh signal having a seventh value and the sixth signal to the electronic component and receiving a fourth feedback signal; applying an eighth signal having an eighth value and a ninth signal having a ninth value to the electronic component and receiving a fifth feedback signal; and applying a tenth signal having a tenth value and the ninth signal to the electronic component and receiving a sixth feedback signal; Wherein a third parameter associated with the third feedback signal is different from a fourth parameter associated with the fourth feedback signal, and wherein a fifth parameter associated with the fifth feedback signal is different from a sixth parameter associated with the sixth feedback signal.
2. The apparatus according to claim 1, further comprising: receiving a seventh feedback signal from the electronic component in response to the fourth signal and the second signal; determining a seventh parameter associated with the seventh feedback signal; and if the seventh parameter is different from the first parameter, applying the first signal and an eleventh signal having an eleventh value to the electronic component; The third difference exists between the eleventh value and the second value.
3. The apparatus according to claim 2, further comprising: if the eleventh value is equal to the second threshold, applying a twelfth signal having a twelfth value and the sixth signal to the electronic component; Wherein the twelfth value is between the fifth value and the seventh value, and wherein a fourth parameter associated with the fourth feedback signal is different from a third parameter associated with the third feedback signal. The apparatus of claim 1 , wherein a plurality of fourth difference values exist between the sixth value and the second value.
5. The apparatus of claim 1, wherein the first difference and the second difference are positive values, and wherein the first difference is greater than the second difference.
6. The apparatus of claim 1, wherein the first difference and the second difference are negative values, and wherein an absolute value of the first difference is greater than an absolute value of the second difference.
7. A device comprising: Control unit; a memory containing computer program code; and The memory and the computer program code are configured to cause the apparatus to execute, through the control unit: receiving a first parameter associated with a first value of a first coordinate and a second value of a second coordinate; receiving a second parameter associated with a third value of the first coordinate and the second value of the second coordinate; If the first parameter is different from the second parameter, receiving a third parameter associated with a fourth value of the first coordinate and the second value of the second coordinate, wherein a first difference exists between the third value and the first value, and wherein a second difference exists between the fourth value and the first value; receiving a fourth parameter associated with a fifth value of the first coordinate and a sixth value of the second coordinate; receiving a fifth parameter associated with a seventh value of the first coordinate and the sixth value of the second coordinate; receiving a sixth parameter associated with an eighth value of the first coordinate and a ninth value of the second coordinate; receiving a seventh parameter associated with a tenth value of the first coordinate and the ninth value of the second coordinate; wherein the fourth parameter is different from the fifth parameter, and wherein the sixth parameter is different from the seventh parameter.
8. The apparatus of claim 7, further comprising: If the third parameter is different than the first parameter, an eighth parameter associated with the first value of the first coordinate and an eleventh value of the second coordinate is received, wherein a third difference exists between the eleventh value and the second value.
9. The apparatus of claim 8, further comprising: If the eleventh value is equal to a second threshold, receiving a ninth parameter associated with a twelfth value of the first coordinate and the sixth value of the second coordinate; Wherein the twelfth value is between the fifth value and the seventh value, and wherein the fourth parameter is different from the fifth parameter.
Citation Information
Patent Citations
Method and apparatus for discovery of operational boundaries for shmoo tests
US20030120451A1