An adaptive sampling interface circuit

Abstract

The present invention discloses an adaptive sampling interface circuit. When the input source is a voltage source, the back-end sampling circuit is entered through a voltage follower, and the positive and negative judgment is implemented by a comparator + MOS tube. Due to the flexible use of the voltage follower and the comparator, the input interface has a high impedance, which can effectively prevent the sampling signal from interfering with the internal signal, thereby ensuring the accuracy and reliability of the sampling circuit. When the input source is a current source, it is implemented by sampling first and then inputting. Since the implementation principles of the voltage follower and the comparator are both operational amplifiers, their input terminals are in a high-impedance state, so all voltages generated on the resistor can be regarded as the embodiment of the input current signal on the sampling resistor. In the circuit, the present invention can sample normally without distinguishing between voltage and current signals.

Description

Technical Field

[0001] The invention belongs to the technical field of building control PLC, and in particular relates to a sampling interface circuit with adaptive sampling and no need to distinguish between positive and negative. Background Art

[0002] Signal sampling plays an important role in the field of building control. PLC obtains the current status of the controlled equipment through correct sampling of external signals and takes corresponding actions based on the feedback information. Therefore, when the signal sampling function fails, it will lead to functional failure, or even PLC will incorrectly control the controlled equipment, causing serious consequences.

[0003] At present, signal sampling can only be performed through fixed interfaces, that is, the voltage and current sampling range of signal sampling, the connection method of positive and negative terminals, etc. are specified. However, during on-site construction, due to the large number of wiring connections and the inability of construction workers to understand the engineering wiring diagram, it is impossible to execute according to the original design. When construction workers make a wrong connection, the current equipment will be unusable, and even the equipment will be burned, causing a fire, etc.

[0004] For example, the patent application document with publication number CN106501575A and titled “Adaptive Sampling Circuit, Sampling Method, Controller and Power Conversion Device” discloses that the short-circuit switch is controlled by a clock to periodically release the residual charge on the holding capacitor, thereby reducing the influence of the holding capacitor on the back-end sampling circuit, thereby achieving the purpose of improving the sampling accuracy. The adaptation in this invention refers to the adaptation to the periodic changes of the input voltage and current signals. That is, in the case of a constantly changing external sampling voltage, a certain sampling accuracy can still be maintained. However, the implementation of this solution is to discharge the holding capacitor by adding a short-circuit switch, which has certain disadvantages.

[0005] 1. The sampling cycle interval is long. It usually takes about 100-200ms to discharge the capacitor through an analog switch. When the next sampling is performed, it may take about 100-200ms for the capacitor to charge to a stable state. Therefore, the interval between two samplings must be about 0.5S. In some occasions where fast sampling is required, this invention is not applicable.

[0006] 2. The self-adaptation in this solution is for a single case, that is, the self-adaptation for the rapid change of external voltage. The function is relatively single and it cannot distinguish between input voltage or current, interface status, etc.

[0007] 3. For example, the patent application document with publication number CN109374942A and titled “A DC voltage and DC current signal adaptive sampling circuit and method” discloses using an adjustable resistor to determine whether the input source is a voltage signal or a current signal. The adaptation here refers to the adaptation of the input voltage or current signal. By adjusting the resistance value at both ends of the controllable resistor, it is determined whether the voltage at both ends of the resistor changes to determine whether the input signal is a voltage signal or a current signal. If it changes, the input signal is a current signal, and if it does not change, the input signal is a voltage signal. The adaptation in this scheme is adaptation in a single case, that is, adaptation to rapid changes in external voltage. The function is relatively single, and it is unable to distinguish between input voltage or current, interface status, etc., and has the following disadvantages:

[0008] 1. This solution is only applicable to judging voltage and current signals. It cannot solve the problem of equipment damage caused by overvoltage and overcurrent at the interface, nor can it solve the problem of signal sampling failure caused by reverse connection of positive and negative poles at the interface.

[0009] 2. The judgment process requires the coordination of the controller, which occupies part of the controller's resources, thus slowing down the sampling speed of each channel.

[0010] 3. Internal judgment distinguishes between voltage and current signals by adjusting the resistance value of the adjustable resistor. The internally set resistor will consume the energy of the sampling signal to a certain extent, which means that signal sampling must meet certain sampling resistance requirements to be realized. Moreover, the resistor itself is easily affected by the temperature environment, and the error caused by the temperature environment on the sampling result cannot be eliminated. Summary of the invention

[0011] The purpose of the present invention is to provide an adaptive sampling interface circuit, which does not need to distinguish between voltage and current signals and positive and negative wiring modes, and solves the problem of product interface burning due to installers' unfamiliarity with product characteristics during on-site construction.

[0012] To solve the above problems, the technical solution of the present invention is:

[0013] An adaptive sampling interface circuit comprises: a forward circuit and a reverse circuit;

[0014] When the direction of the input source is forward, the input signal flows through the forward circuit, and the forward circuit and the sampling resistor form a forward loop;

[0015] When the direction of the input source is reverse, the input signal flows through the reverse circuit, and the reverse circuit and the sampling resistor form a reverse loop;

[0016] When the input signal values ​​of the forward input source and the reverse input source are equal, the collected signal values ​​on the sampling resistor are equal.

[0017] According to an embodiment of the present invention, the forward circuit includes a forward input voltage source, a first voltage follower, a first comparator, a first MOS transistor, a second MOS transistor, and a third MOS transistor;

[0018] The positive electrode of the positive input voltage source is connected to the positive input terminal of the first voltage follower, the output terminal of the first voltage follower is connected to the source of the first MOS tube, the gate of the first MOS tube is respectively connected to the gate of the second MOS tube, the gate of the third MOS tube and the output terminal of the first comparator, and the positive input terminal of the first comparator is connected to the positive input terminal of the first voltage follower;

[0019] The source of the second MOS tube is connected to the source of the third MOS tube, and the drain of the third MOS tube is grounded; the drain of the first MOS tube is connected to a sampling resistor, and the sampling resistor is grounded.

[0020] According to an embodiment of the present invention, the reverse circuit includes a reverse input voltage source, a second voltage follower, a second comparator, a fourth MOS transistor, a fifth MOS transistor, and a sixth MOS transistor;

[0021] The positive electrode of the reverse input voltage source is connected to the positive input terminal of the second voltage follower, the output terminal of the second voltage follower is connected to the source of the fourth MOS tube, the gate of the fourth MOS tube is respectively connected to the gate of the fifth MOS tube, the gate of the sixth MOS tube and the output terminal of the second comparator, and the positive input terminal of the second comparator is connected to the positive input terminal of the second voltage follower;

[0022] The source of the fifth MOS tube is connected to the source of the sixth MOS tube, and the drain of the sixth MOS tube is grounded; the drain of the fourth MOS tube is connected to a sampling resistor, and the sampling resistor is grounded.

[0023] According to an embodiment of the present invention, the forward circuit includes a current source of a forward input, a resistor, a first voltage follower, a first comparator, a first MOS transistor, a second MOS transistor, and a third MOS transistor;

[0024] Two ends of the current source of the forward input are connected in parallel with the resistor, the positive electrode of the current source is connected to the positive input end of the first voltage follower, the output end of the first voltage follower is connected to the source of the first MOS tube, the gate of the first MOS tube is respectively connected to the gate of the second MOS tube, the gate of the third MOS tube and the output end of the first comparator, and the positive input end of the first comparator is connected to the positive input end of the first voltage follower;

[0025] The source of the second MOS tube is connected to the source of the third MOS tube, and the drain of the third MOS tube is grounded; the drain of the first MOS tube is connected to a sampling resistor, and the sampling resistor is grounded.

[0026] According to an embodiment of the present invention, the reverse circuit includes a reverse input current source, a resistor, a second voltage follower, a second comparator, a fourth MOS transistor, a fifth MOS transistor, and a sixth MOS transistor;

[0027] The two ends of the reverse input current source are connected in parallel with the resistor, the positive electrode of the current source is connected to the positive input end of the second voltage follower, the output end of the second voltage follower is connected to the source of the fourth MOS tube, the gate of the fourth MOS tube is respectively connected to the gate of the fifth MOS tube, the gate of the sixth MOS tube and the output end of the second comparator, and the positive input end of the second comparator is connected to the positive input end of the second voltage follower;

[0028] The source of the fifth MOS tube is connected to the source of the sixth MOS tube, and the drain of the sixth MOS tube is grounded; the drain of the fourth MOS tube is connected to a sampling resistor, and the sampling resistor is grounded.

[0029] Due to the adoption of the above technical solution, the present invention has the following advantages and positive effects compared with the prior art:

[0030] 1) The adaptive sampling interface circuit in one embodiment of the present invention, through the forward circuit and the reverse circuit, when the direction of the input source is forward, the input signal flows through the forward circuit, and when the direction of the input source is reverse, the input signal flows through the reverse circuit; and when the input signal values ​​of the forward input source and the reverse input source are equal, the collected signal values ​​on the sampling resistor are equal. Regardless of the positive and negative wiring, normal sampling can be performed, which facilitates the construction personnel to correctly construct the wiring, and also prevents the occurrence of equipment damage caused by wrong wiring.

[0031] 2) In the adaptive sampling interface circuit in one embodiment of the present invention, when the input source is a voltage source, it enters the back-end sampling circuit through a voltage follower, and the comparator + MOS tube method is adopted to implement the positive and negative judgment; due to the flexible use of the voltage follower and the comparator, the input interface has a high impedance, which can effectively prevent the sampling signal from interfering with the internal signal, thereby ensuring the accuracy and reliability of the sampling circuit.

[0032] 3) The adaptive sampling interface circuit in one embodiment of the present invention, when the input source is a current source, is implemented by sampling first and then inputting. Since the implementation principles of the voltage follower and the comparator are both operational amplifiers, their input terminals are in a high-impedance state, and therefore all voltages generated on the resistor can be regarded as the embodiment of the input current signal on the sampling resistor. In terms of the circuit, the present invention can sample normally without distinguishing between voltage and current signals. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 This is a circuit diagram of an adaptive sampling interface connected to a forward voltage source in one embodiment of the present invention;

[0034] Figure 2 This is a circuit diagram of an adaptive sampling interface connected to a reverse voltage source in one embodiment of the present invention;

[0035] Figure 3 This is a circuit diagram of an adaptive sampling interface connected to a forward current source in one embodiment of the present invention;

[0036] Figure 4 This is a circuit diagram of an adaptive sampling interface connected to a reverse current source in one embodiment of the present invention;

[0037] Figure 5 A simulation diagram of an adaptive sampling interface circuit connected to a forward voltage source in one embodiment of the present invention;

[0038] Figure 6 It is an enlarged diagram of the sampling value of the adaptive sampling interface circuit connected to the forward voltage source in the simulation state in one embodiment of the present invention;

[0039] Figure 7 This is a simulation diagram of an adaptive sampling interface circuit connected to a reverse voltage source in one embodiment of the present invention;

[0040] Figure 8 It is an enlarged diagram of the sampling value of the adaptive sampling interface circuit connected to the reverse voltage source in the simulation state in one embodiment of the present invention;

[0041] Fig. 9 This is a simulation diagram of an adaptive sampling interface circuit connected to a forward current source in one embodiment of the present invention;

[0042] Fig.10 It is an enlarged diagram of the sampling value of the adaptive sampling interface circuit connected to the forward current source in the simulation state in one embodiment of the present invention;

[0043] Fig.11 This is a simulation diagram of an adaptive sampling interface circuit connected to a reverse current source in one embodiment of the present invention;

[0044] Fig.12It is an enlarged diagram of the sampling values ​​of the adaptive sampling interface circuit connected to the reverse current source in the simulation state in one embodiment of the present invention. DETAILED DESCRIPTION

[0045] The following is a further detailed description of an adaptive sampling interface circuit proposed by the present invention in conjunction with the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description and claims.

[0046] The present invention aims at the existing signal sampling that can only be sampled by a fixed interface, that is, the voltage and current sampling range of the signal sampling, the positive and negative terminal connection method, etc. are specified. However, in the on-site construction, due to the large number of wirings and the inability of the construction personnel to understand the engineering wiring diagram, it is impossible to execute according to the original design intention. When the construction personnel make a wrong connection, the current equipment will be unusable, and even the equipment will be burned, causing fire and other problems. An adaptive sampling interface circuit is proposed. The sampling interface circuit uses a voltage follower and a comparator flexibly to make the input interface have high impedance, which well prevents the input of voltages exceeding the sampling range, thereby protecting the operation of the circuit in the device. Through the design of the internal circuit, it is realized that no requirements are made for the external wiring method. That is, as long as it is determined that there is no error in the channel, normal sampling can be performed regardless of the positive and negative line connection method, which facilitates the construction personnel to correctly construct during wiring, and also prevents the occurrence of equipment damage caused by wrong wiring.

[0047] The adaptive sampling interface circuit comprises a forward circuit and a reverse circuit. When the direction of the input source is forward, the input signal flows through the forward circuit, and the forward circuit and the sampling resistor form a forward loop; when the direction of the input source is reverse, the input signal flows through the reverse circuit, and the reverse circuit and the sampling resistor form a reverse loop; when the input signal values ​​of the forward input source and the reverse input source are equal, the collected signal values ​​on the sampling resistor are equal.

[0048] Specifically, when a positive input voltage source is connected, the adaptive sampling interface circuit is as follows: Figure 1 As shown, it includes a voltage source V1, a first voltage follower U1A, a first comparator U3B, a first MOS transistor Q2, a second MOS transistor Q6, and a third MOS transistor Q3.

[0049] The positive electrode of the voltage source V1 is connected to the positive input terminal of the first voltage follower U1A, the output terminal of the first voltage follower U1A is connected to the source of the first MOS transistor Q2, the gate of the first MOS transistor Q2 is respectively connected to the gate of the second MOS transistor Q6, the gate of the third MOS transistor Q3 and the output terminal of the first comparator U3B, the positive input terminal of the first comparator U3B is connected to the positive input terminal of the first voltage follower U1A; the source of the second MOS transistor Q6 is connected to the source of the third MOS transistor Q3, and the drain of the third MOS transistor Q3 is grounded; the drain of the first MOS transistor Q2 is connected to one end of the sampling resistor R1, and the other end of the sampling resistor R1 is grounded.

[0050] When the positive input voltage source V1 is applied, the voltage at the positive input terminal of the first comparator U3B is equal to the input voltage, the first comparator U3B outputs a high level, the first MOS tube Q2, the second MOS tube Q6, and the third MOS tube Q3 are turned on, and the positive circuit is as follows Figure 1 shown in open, while the reverse circuit is closed.

[0051] When the reverse input voltage source is connected, the adaptive sampling interface circuit is as follows Figure 2 As shown, the voltage source V2, the second voltage follower U2A, the second comparator U3A, the fourth MOS transistor Q1, the fifth MOS transistor Q5, and the sixth MOS transistor Q4. The positive electrode of the voltage source V2 is connected to the positive input terminal of the second voltage follower U2A, the output terminal of the second voltage follower U2A is connected to the source of the fourth MOS transistor Q1, the gate of the fourth MOS transistor Q1 is respectively connected to the gate of the fifth MOS transistor Q5, the gate of the sixth MOS transistor Q4 and the output terminal of the second comparator U3A, the positive input terminal of the second comparator U3A is connected to the positive input terminal of the second voltage follower U2A; the source of the fifth MOS transistor Q5 is connected to the source of the sixth MOS transistor Q4, and the drain of the sixth MOS transistor Q4 is grounded; the drain of the fourth MOS transistor Q1 is connected to one end of the sampling resistor R1, and the other end of the sampling resistor R1 is grounded.

[0052] When the reverse input voltage source V2 is applied, the voltage at the positive input terminal of the second comparator U3A is equal to the input voltage, the second comparator U3A outputs a high level, the fourth MOS tube Q1, the sixth MOS tube Q4, and the fifth MOS tube Q5 are turned on, and the reverse loop is as follows: Figure 2 shown open, the forward circuit is closed.

[0053] The first MOS tube Q2, the second MOS tube Q6, the third MOS tube Q3, the fourth MOS tube Q1, the fifth MOS tube Q5, and the sixth MOS tube Q4 can all be NMOS tubes. Since a freewheeling diode is generally added to the NMOS tube during manufacture, in order to eliminate the influence of the freewheeling diode, the second MOS tube Q6 and the third MOS tube Q3, the fifth MOS tube Q5 and the sixth MOS tube Q4 are connected back to back (source to source), so that the freewheeling diodes between the drain and source of the NMOS tube cancel each other out.

[0054] When the current source of the positive input is connected, the adaptive sampling interface circuit is as follows Figure 3 As shown, it includes a current source I1, a resistor R2, a first voltage follower U1A, a first comparator U3B, a first MOS transistor Q2, a second MOS transistor Q6, and a third MOS transistor Q3.

[0055] Both ends of the current source I1 are connected in parallel with the resistor R2, the positive electrode of the current source I1 is connected to the positive input terminal of the first voltage follower U1A, the output terminal of the first voltage follower U1A is connected to the source of the first MOS transistor Q2, the gate of the first MOS transistor Q2 is respectively connected to the gate of the second MOS transistor Q6, the gate of the third MOS transistor Q3 and the output terminal of the first comparator U3B, the positive input terminal of the first comparator U3B is connected to the positive input terminal of the first voltage follower U1A; the source of the second MOS transistor Q6 is connected to the source of the third MOS transistor Q3, and the drain of the third MOS transistor Q3 is grounded; the drain of the first MOS transistor Q2 is connected to one end of the sampling resistor R1, and the other end of the sampling resistor R1 is grounded.

[0056] When the current source I1 is connected in the forward direction, the current signal is converted into a voltage signal through the resistor R2, the voltage at the positive input terminal of the first comparator U3B is equal to the input voltage, the first comparator U3B outputs a high level, the first MOS tube Q2, the second MOS tube Q6, and the third MOS tube Q3 are turned on, and the forward loop is as follows Figure 3 As shown in , the reverse loop is open, while the reverse loop is closed. Since the voltage follower and comparator are both implemented based on operational amplifiers, and their input terminals are in a high impedance state, all voltages generated on the resistors can be regarded as the reflection of the input current signal on the sampling resistor. Therefore, the sampling voltage is equal to the voltage on the sampling resistor R1.

[0057] When the current source of the reverse input is connected, the adaptive sampling interface circuit is as follows Figure 4As shown, it includes a current source I2, a resistor R2, a second voltage follower U2A, a second comparator U3A, a fourth MOS transistor Q1, a fifth MOS transistor Q5, and a sixth MOS transistor Q4. Both ends of the current source I2 are connected in parallel with the resistor R2, the positive electrode of the current source I2 is connected to the positive input end of the second voltage follower U2A, the output end of the second voltage follower U2A is connected to the source of the fourth MOS transistor Q1, the gate of the fourth MOS transistor Q1 is respectively connected to the gate of the fifth MOS transistor Q5, the gate of the sixth MOS transistor Q4 and the output end of the second comparator U3A, the positive input end of the second comparator U3A is connected to the positive input end of the second voltage follower U2A; the source of the fifth MOS transistor Q5 is connected to the source of the sixth MOS transistor Q4, and the drain of the sixth MOS transistor Q4 is grounded; the drain of the fourth MOS transistor Q1 is connected to one end of the sampling resistor R1, and the other end of the sampling resistor R1 is grounded.

[0058] When the current source I2 is connected in reverse, the current signal is converted into a voltage signal through the resistor R2, the voltage at the positive input terminal of the second comparator U3A is equal to the input voltage, the second comparator U3A outputs a high level, the fourth MOS tube Q1, the sixth MOS tube Q4, and the fifth MOS tube Q5 are turned on, and the reverse loop is as follows: Figure 4 The second voltage follower U2A enters the sampling point, and the sampling voltage is equal to the voltage on the sampling resistor R1.

[0059] In order to verify that the present invention does not distinguish between positive and negative sources, and inputs current signals or voltage signals of the same magnitude, the data obtained at the sampling point are the same, the sampling of the above four cases is simulated, as follows:

[0060] Figure 5 , 6 For the sampling simulation when the forward voltage source V1 is connected, Figure 5 It can be seen that the sampling point is set on the sampling resistor R1. Figure 6 It can be seen that the voltage value obtained at this sampling point is 10.0V.

[0061] Figure 7 , 8 For the sampling simulation when the reverse voltage source V2 is connected, Figure 7 It can be seen that the sampling point is set on the sampling resistor R1. Figure 8 It can be seen that the voltage value obtained at this sampling point is 10.0V.

[0062] Fig. 9 , 10 For the sampling simulation when the forward current source I1 is connected, Fig. 9 It can be seen that the sampling point is set on the sampling resistor R1. Fig.10 It can be seen that the voltage value obtained at this sampling point is 1.00V.

[0063] Fig.11 , 12 For the sampling simulation when the reverse current source I2 is connected, Fig.11 It can be seen that the sampling point is set on the sampling resistor R1. Fig.12 It can be seen that the voltage value obtained at this sampling point is 1.00V.

[0064] From this, it can be seen that when the voltage signal of the same magnitude is input, the sampling voltage when connected to the forward voltage source V1 is the same as the sampling voltage when connected to the reverse voltage source V2; when the current signal of the same magnitude is input, the sampling voltage when connected to the forward current source I1 is the same as the sampling voltage when connected to the reverse current source I2.

[0065] In summary, the present invention is more concerned with the protection of the equipment. During construction, the operator only needs to confirm whether the channel is connected correctly, without having to determine the wiring method between the positive and negative lines. Even if the positive and negative signal lines are connected incorrectly, it will not affect the sampling of the equipment and will not damage the equipment. The input signal adopts the voltage follower method, and the high impedance state unique to the input end of the op amp enhances the anti-interference ability of the equipment. Even if a voltage exceeding the sampling range is connected at the port, the equipment will not burn out due to overvoltage.

[0066] The embodiments of the present invention are described in detail above in conjunction with the accompanying drawings, but the present invention is not limited to the above embodiments. Even if various changes are made to the present invention, if these changes fall within the scope of the claims of the present invention and their equivalents, they still fall within the protection scope of the present invention.

Claims

1. An adaptive sampling interface circuit, characterized in that: include: Forward circuit and reverse circuit; When the direction of the input source is forward, the input signal flows through the forward circuit, and the forward circuit and the sampling resistor form a forward loop; When the direction of the input source is reverse, the input signal flows through the reverse circuit, and the reverse circuit and the sampling resistor form a reverse loop; When the input signal values ​​of the forward input source and the reverse input source are equal, the collected signal values ​​on the sampling resistor are equal; The forward circuit includes a forward input voltage source or current source, a resistor, a first voltage follower, a first comparator, a first MOS transistor, a second MOS transistor, and a third MOS transistor; The positive electrode of the voltage source or current source of the forward input is connected to the positive input terminal of the first voltage follower, the output terminal of the first voltage follower is connected to the source of the first MOS tube, the gate of the first MOS tube is respectively connected to the gate of the second MOS tube, the gate of the third MOS tube and the output terminal of the first comparator, and the positive input terminal of the first comparator is connected to the positive input terminal of the first voltage follower; the two ends of the current source of the forward input are connected in parallel with the resistor; The source of the second MOS tube is connected to the source of the third MOS tube, and the drain of the third MOS tube is grounded; the drain of the first MOS tube is connected to a sampling resistor, and the sampling resistor is grounded; The reverse circuit includes a reverse input voltage source or current source, a resistor, a second voltage follower, a second comparator, a fourth MOS tube, a fifth MOS tube, and a sixth MOS tube; The positive electrode of the reverse input voltage source or current source is connected to the positive input terminal of the second voltage follower, the output terminal of the second voltage follower is connected to the source of the fourth MOS tube, the gate of the fourth MOS tube is respectively connected to the gate of the fifth MOS tube, the gate of the sixth MOS tube and the output terminal of the second comparator, and the positive input terminal of the second comparator is connected to the positive input terminal of the second voltage follower; the two ends of the reverse input current source are connected in parallel with the resistor; The source of the fifth MOS tube is connected to the source of the sixth MOS tube, and the drain of the sixth MOS tube is grounded; the drain of the fourth MOS tube is connected to a sampling resistor, and the sampling resistor is grounded.

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