A streaming data processing method and computing device based on many-core processors

Abstract

The present invention provides a computing device for a streaming data processing method based on a many-core processor. The many-core processor includes multiple computing cores. The method includes: dividing the multiple computing cores into N computing core groups, wherein the N computing core groups execute different data processing methods; receiving data, such as images, videos, audio, or data transmitted by sensors; inputting the data into a corresponding computing core group in the N computing core groups to execute a data processing task; and outputting the processed data. The solution provided by the present invention can increase the data processing speed of the many-core processor while reducing the processor's energy consumption and data latency, thereby improving the overall computing efficiency of the many-core processor.

Description

Technical Field

[0001] The present invention relates to the field of processor technology, and in particular to a streaming data processing method and computing device based on a many-core processor. Background Art

[0002] Today, artificial intelligence (AI) technology is rapidly evolving and developing, impacting people's lives and production in all aspects, driving global development and progress. In recent years, researchers have discovered that neural network algorithms are highly effective at processing unstructured data, such as face recognition, speech recognition, and image classification. The exponential growth of this unstructured data is placing increasing demands on processor computing power. The computing power of traditional central processing units (CPUs) and digital signal processors (DSPs) is no longer sufficient, making improving processor computing power and efficiency a pressing issue. Summary of the Invention

[0003] In view of the above problems, the present invention provides a streaming data processing method and computing device based on a multi-core processor, which overcome the above problems or at least partially solve the above problems.

[0004] According to one aspect of the present invention, a method for processing streaming data based on a many-core processor is provided, wherein the many-core processor includes multiple computing cores, and the method includes:

[0005] Dividing the plurality of computing cores into N computing core groups, wherein the N computing core groups execute different data processing methods;

[0006] receiving data, wherein the data includes images, videos, audio, or data transmitted by a sensor;

[0007] Inputting the data into a corresponding computing core group among the N computing core groups to perform a data processing task;

[0008] The processed data is output.

[0009] Optionally, inputting the data into a corresponding computing core group among the N computing core groups to perform a data processing task includes:

[0010] Inputting the data into one computing core group; or inputting the data into multiple computing core groups among the N computing core groups to perform different data processing tasks. Optionally, inputting the data into corresponding computing core groups among the N computing core groups to perform data processing tasks includes:

[0011] The data is input into a first computing core group to execute a first data processing task.

[0012] Optionally, inputting the data into a first computing core group to perform a first data processing task includes:

[0013] Dividing the data into a plurality of data blocks, and dividing the plurality of data blocks into M groups, each of the M groups including the same number K of data blocks, wherein M is greater than or equal to 2, and K is greater than or equal to 1;

[0014] Allocating corresponding K computing cores to the K data blocks;

[0015] The K data blocks in the first group of the M groups are input in parallel to a computing core corresponding to each data block of the K data blocks, and the computing core performs computational processing on the corresponding data block.

[0016] By dividing the data into subtasks according to the processing capabilities of each computing core, the processing process of the multi-core processor on image data can be improved and the processing accuracy can be improved.

[0017] Optionally, after inputting the K data blocks in the first group of the M groups in parallel into a computing core corresponding to each of the K data blocks, and the computing core performing computational processing on the corresponding data block, the method further includes:

[0018] The K data blocks in the second group of the M groups are input in parallel to the K computing cores, which then perform computations on the K data blocks in the second group. Whether the many-core processor uses a parallel operation and transmission mode or a pipelined sequential operation mode between the cores, this ensures orderly data processing and improves processing efficiency.

[0019] Optionally, during the parallel input, for any one operation core, while performing intra-core operations, at least part of the completed data is transmitted to the next operation core in the first operation core group to execute the next layer of calculation in the first data processing task.

[0020] Optionally, each computing core in the many-core processor includes:

[0021] A weight storage unit, used to store data, data weights and / or operation instructions required for performing neural network calculations;

[0022] A computing unit, configured to access the data stored in the weight storage unit and perform computation on the data;

[0023] a control unit for generating an operation instruction and controlling the computing unit to perform data operations based on the operation instruction;

[0024] Routing is used to send and receive data, and to communicate data within the core or with other cores. By setting up a private weight storage unit in each core of the multi-core processor, each core can quickly read the data it needs to perform operations.

[0025] Optionally, the communication mode between the multiple computing cores includes: 2D network mode, 3D ring mode, and one-to-one direct connection mode.

[0026] According to another aspect of the present invention, there is also provided a computing device comprising a multi-core processor for running a computer program, wherein:

[0027] When performing data processing, the many-core processor adopts any of the above-mentioned streaming data processing methods based on the many-core processor.

[0028] Optionally, the computing device further includes:

[0029] The storage device is used to store a computer program, which is loaded and executed by a processor when running in the computing device.

[0030] The present invention provides a more efficient streaming data processing method based on a many-core processor. The method first divides the many-core processor into N computing core groups. Data received by the many-core processor is then input into corresponding computing core groups within the N computing core groups, which then execute data processing tasks in parallel and output data processing results. In the present invention, data can be arranged in a pipeline mode and input in time periods for each computing core to ensure data processing accuracy. The solution provided by the present invention can increase the data processing speed of the many-core processor while reducing its energy consumption and data latency, thereby improving the overall computing efficiency of the many-core processor.

[0031] The above description is only an overview of the technical solution of the present invention. In order to more clearly understand the technical means of the present invention, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present invention more obvious and easy to understand, the specific implementation methods of the present invention are specifically listed below.

[0032] Based on the following detailed description of specific embodiments of the present invention in conjunction with the accompanying drawings, those skilled in the art will become more aware of the above and other objects, advantages and features of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Various other advantages and benefits will become apparent to those skilled in the art upon reading the detailed description of the preferred embodiment below. The accompanying drawings are for illustration purposes only and are not to be considered as limiting the present invention. The same reference symbols are used throughout the drawings to represent the same components. In the drawings:

[0034] Figure 1 shows a schematic diagram of the structure of an operation core according to an embodiment of the present invention;

[0035] Figure 2 A schematic diagram of a many-core processor architecture according to an embodiment of the present invention is shown;

[0036] Figure 3 A schematic diagram of a 2D-mode many-core processor architecture according to an embodiment of the present invention is shown;

[0037] Figure 4 A schematic flow chart of a method for processing streaming data based on a multi-core processor according to an embodiment of the present invention is shown;

[0038] Figure 5 A schematic diagram illustrating dividing a many-core processor into multiple computing core groups according to an embodiment of the present invention is shown;

[0039] Figure 6 A schematic diagram illustrating dividing input data into blocks and performing processing according to an embodiment of the present invention is shown;

[0040] Figure 7 A schematic diagram of a data partitioning process according to an embodiment of the present invention is shown;

[0041] Figure 8 A schematic diagram of a neural network mapping according to an embodiment of the present invention is shown;

[0042] Figure 9 A schematic diagram of input and output of a many-core processor according to an embodiment of the present invention is shown;

[0043] Figure 10 A schematic diagram of a parallel operation and transmission mode of a many-core processor according to an embodiment of the present invention is shown;

[0044] Figure 11 A schematic diagram of an operation and transmission serial mode of a many-core processor according to an embodiment of the present invention is shown;

[0045] Figure 12 A schematic diagram of timing operations in a parallel operation mode in a multi-core processor according to an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0046] Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although exemplary embodiments of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure can be implemented in various forms and should not be limited by the embodiments set forth herein. Rather, these embodiments are provided to enable a more thorough understanding of the present disclosure and to fully convey the scope of the present disclosure to those skilled in the art.

[0047] Adopting a multi-core architecture with integrated storage and processing can effectively improve chip computing power and efficiency. This integration of storage and processing, localizing storage and integrating it with the processor, significantly reduces data movement energy consumption. Furthermore, in deep learning, when computing static graphs through neural networks, the computed images remain unchanged during training or inference applications.

[0048] An embodiment of the present invention provides a many-core processor comprising a plurality of computing cores. Figure 1 Shows a schematic diagram of the structure of the operation core, see Figure 1 As can be seen, each computing core can include modules such as a weight storage unit, a computing unit, a router, and a control unit. The weight storage unit is used to store the data, data weights, and / or operation instructions required for executing neural network calculations or other data processing algorithms. It may also include temporary data or other data. The computing unit is used to access the data stored in the weight storage unit and perform operations on the data. The computing unit may include a multiplier, adder, and other specialized computing processing modules responsible for performing matrix and vector calculations or logical operations. The control unit generates operation instructions and controls the computing unit to perform data operations based on these operation instructions. The control unit can specifically control the flow of data and select corresponding operations. The router is used to send and receive data, conducting data communication within the computing core or with other computing cores. During the operation of the computing core, data required by the computing unit is input to the computing unit through the router, processed by the computing unit, and then output through the router. In addition to the above, each computing core may also include a cache unit or other units, which are not limited by the present invention.

[0049] In addition, the weight storage units of multiple computing cores included in the multi-core processor are separated and merged into one weight storage core, such as Figure 2 As shown, the weight storage core can simultaneously provide weights to operation core 1, operation core 2, and operation core 3. In this mode, partial sharing of weights can be achieved, wherein operation core 1, operation core 2, and operation core 3 can be homogeneous operation cores. In actual applications, when selecting the weight storage units of multiple operation cores in a multi-core processor and merging them into a weight operation core, the selection can be based on different needs or the characteristics of each operation core, and the present invention does not limit this.

[0050] For many-core processors, the communication modes between the cores in the many-core processor can include 2D grid mode, 3D ring mode, one-to-one direct connection mode, etc. Among them, the 2D network mode can be seen in Figure 3 As shown in Figure 1, each computing core is connected to the computing cores in the four directions of up, down, left, and right through routing. In this mode, data can reach any specified computing core through routing.

[0051] For the multi-core processor including multiple computing cores introduced in the above embodiment, the embodiment of the present invention provides a streaming data processing method based on the multi-core processor, see Figure 4 It can be seen that the streaming data processing method based on the many-core processor provided in the embodiment of the present invention may include:

[0052] In step S401, a plurality of computing cores are divided into N computing core groups, wherein the N computing core groups execute different data processing methods, wherein the data processing methods may be neural network algorithms or other data processing algorithms.

[0053] In this embodiment, the multiple computing cores in the many-core processor can be divided into N computing core groups, each computing core group can execute a different data processing method, where N is an integer greater than zero. Figure 5 As shown, the many-core processor is divided into three computing core groups, and three different neural network algorithms (neural network algorithm A, neural network algorithm B, and neural network algorithm C) can be mapped to different computing core groups. Because the computing cores run independently, the three neural networks can receive data simultaneously and perform corresponding data processing in parallel. In actual applications, when dividing the multiple computing cores in the many-core processor, the division can be based on the computing power requirements corresponding to different algorithms or other requirements, which is not limited by the present invention.

[0054] Step S402: Receive data, including images, videos, audio, or data transmitted by sensors. In practical applications, the data requiring the many-core processor to perform calculations may be image data, audio data, video data, or other data to be processed transmitted by sensors.

[0055] Step S403: Input the data into a corresponding computing core group among the N computing core groups to perform the data processing task. Furthermore, the data can be input into one computing core group; or the data can be input into multiple computing core groups among the N computing core groups to perform different data processing tasks.

[0056] Step S404: output the processed data.

[0057] After receiving the data, the many-core processor can input the data into the computing core group for corresponding data processing.

[0058] For example, if the input data needs to execute the neural network A algorithm, the data is input into the operation core group corresponding to the neural network A algorithm for data processing, and the processing results are output.

[0059] Optionally, any set of data may be pre-processed before being input into the computing core for computational processing. That is, in step S403, the data is input into the first computing core group for executing the first data processing task. The specific method is as follows:

[0060] S403-1: Divide the data into a plurality of data blocks, and divide the plurality of data blocks into M groups, where each of the M groups includes the same number K of data blocks, where M is greater than or equal to 2, and K is greater than or equal to 1. When dividing the data blocks, the data may be divided into the plurality of data blocks including the same number K based on the amount of computation performed by each computing core within a specified time.

[0061] Figure 6 This is a schematic diagram of dividing input data into blocks and performing processing. Taking the data into 9 blocks and three groups as an example, the embodiment of the present invention does not limit the number of blocks and groups for data to be divided into. Figure 6 This is just a schematic diagram. Figure 6 As shown, the data is divided into 9 data blocks, and the 9 data blocks are divided into three groups, each group including 3 data blocks.

[0062] S403-2, allocating corresponding K computing cores to the K data blocks.

[0063] like Figure 6 As shown, cores 1 to 3 are allocated to the 1st to 3rd data blocks.

[0064] S403-3, inputting the K data blocks in the first group of the M groups in parallel into a computing core corresponding to each data block of the K data blocks, and having the computing core perform computational processing on the corresponding data block.

[0065] like Figure 6 As shown, the 1st to 3rd data blocks are input to cores 1 to 3 in parallel, and cores 1 to 3 perform calculations on the 1st to 3rd data blocks.

[0066] Figure 7 Schematic diagram of data partitioning process according to an embodiment of the present invention is shown. Figure 7 It can be seen that the data can be divided into equal or unequal tasks according to the processing capacity of each core within a specified time. Figure 7 In the example, time T1 corresponds to Input 1, time T2 corresponds to Input 2, time T3 corresponds to Input 3, and so on. The data block in each data set can correspond to a computational subtask within the entire computational task for that data, or a collection of multiple subtasks.

[0067] therefore, Figure 6 The data blocks in the can be of unequal size.

[0068] Generally speaking, neural networks are composed of multiple layers of calculations, divided into input layer, output layer and middle hidden layer, such as Figure 8 As shown. Figure 8 In the figure, circles represent neurons, and arrows before the output layer and hidden layer represent weights. Weights are composed of matrix functions, and their dimensions are determined by the number of neurons in the previous and next layers. Before the chip processor runs, the weights are distributed and stored in the operation cores (or weight storage cores), that is, the weights of a certain layer in the neural network algorithm are distributed in one or several operation cores (or weight storage cores). When the preprocessed input data is input into the multi-core processor, it will first be sent to the operation core corresponding to the first layer for processing; after processing, the data will be sent to the operation core corresponding to the pre-planned second layer for processing, and then to the operation core corresponding to the third layer, fourth layer, ..., and nth layer, until the output layer of the neural network is completed. In Figure 9 In the figure, a simple neural network corresponding to the core mapping distribution is illustrated. The 8-layer network is distributed and deployed on 8 different cores. Each core completes one layer of neural network operation. Therefore, after passing through the 8 cores, the neural network is output outward from core 7.

[0069] Therefore, after the data is divided into multiple data blocks, each group of divided data blocks can be sequentially input into the pre-configured computing core group of the many-core processor according to the time period to execute the first-layer neural network. In step S403-3, after the K data blocks in the first of the M groups are input in parallel into the computing core corresponding to each of the K data blocks, and the computing core performs computational processing on the corresponding data blocks, the following steps may also be performed:

[0070] In step S403-4, the K data blocks in the second group of the M groups are input in parallel to the K computing cores, and the K computing cores perform computational processing on the K data blocks in the second group. Furthermore, when performing parallel input in steps S403-3 and S403-4, for any computing core, while performing intra-core computation, at least a portion of the completed data is transmitted to the next computing core in the first computing core group to perform computation on the next layer of the first data processing task.

[0071] like Figure 6 As shown, during the calculation process of the 1st to 3rd data blocks, if the partial calculation results that have been completed are sufficient for the 4th operation core to start the calculation, then the 4th operation core starts to execute the calculation. It can be understood that in the same time period, the 4th operation core and the 1st to 3rd operation cores are all performing calculation work.

[0072] Optionally, when multiple computing cores perform computing processing, they may perform computing processing on the multiple data blocks in a parallel computing transmission mode or a serial computing transmission mode. In other words, data transmission within the many-core processor can be performed in two modes: a parallel computing transmission mode and a serial computing transmission mode. Regardless of the parallel or serial computing transmission mode, a pipelined sequential operation mode can be formed between the many cores.

[0073] Figure 10 A schematic diagram illustrates a parallel operation and transmission mode for a many-core processor according to an embodiment of the present invention. When multiple cores perform computations on multiple data blocks in this parallel operation and transmission mode, any core simultaneously transmits at least partially completed data to the next destination core while performing intra-core computations. In other words, in this mode, while intra-core computations are being performed, partially completed data is transmitted to the corresponding next destination core, allowing intra-core computations and inter-core data transmission to proceed simultaneously.

[0074] by Figure 10 Taking the parallel computing transmission mode as an example, first, the input data is input to Core1 for processing in a time sequence. At the same time, the output data after Core1 processing is sent to Core5 via routing and serves as the input data of Core5. After all current computing operations are completed, it takes a while for all data to be fully transmitted. When all data are transmitted, the current time period T1 ends. After the start of time period T2, computing processing is performed in the core of Core5. When all data processing is completed and transmitted to the next destination core (Core2), the current time period T2 ends. In time period T3, Core2 processes and transmits data. After time period T3 ends, in the following time periods (T4-T6), data processing and corresponding transmission are completed in the order of Core3, Core6 and Core9. It is worth noting that the lengths of various time periods may be the same or different. The specific length of each time period is based on the time when the last data is transmitted to the destination core, and the next time period is triggered at the same time.

[0075] Figure 11 A schematic diagram of the serial operation transmission mode of a many-core processor according to an embodiment of the present invention is shown. When multiple cores perform computations on multiple data blocks in this serial operation transmission mode, for any core, after completing the intra-core operation, it transmits all completed data to the next destination core. In this mode, data can only be transmitted to the corresponding next destination core after all intra-core operations are completed, that is, after all input data has been processed. In other words, at the same time, when distributing data between cores within a single core, only one scenario is in effect: the intra-core operation and inter-core data transmission are performed serially.

[0076] The above process can be directly used to process a single set of data. When processing multiple sets of data, that is, when using the same neural network algorithm to process different tasks (such as performing face recognition on different images), the multiple sets of data can also be sorted based on the above steps, and the data processing computing tasks corresponding to each set of data can be divided into multiple computing subtasks in turn; the computing subtasks of the first set of data in the multiple sets of data are input into the multiple computing cores of the multi-core processor in turn for computing processing; wherein, after the multi-core processor completes the first computing subtask of the first set of data, the multiple computing cores in the multi-core processor work simultaneously and in parallel; after the first computing core in the multi-core processor completes the last computing subtask of the first set of data, the second set of data continues to be input into the multi-core processor for computing processing, and so on for the subsequent third to Nth sets.

[0077] like Figure 12 As shown in the figure, suppose two sets of data need to be processed, and the corresponding computing tasks are Task 1 and Task 2. Before inputting them into the many-core processor, Task 1 and Task 2 need to be divided into subtasks. The single task (Task 1, Task 2) can be divided into different subtasks, and then these subtasks are input into the many-core processor in sequence for processing. After completing the first subtask ( Figure 12 In the example (represented as T1 to T7), all cores will work in parallel, processing different layers of the network. Furthermore, once the final subtask of Task 1 is processed by the first core (Core 1), the first subtask of Task 2 can be immediately processed by Core 1, achieving seamless transitions between tasks.

[0078] Building on the pipelined, sequential operation of a single task, the many-core pipeline architecture can also support multi-task parallelism and inter-task interaction. Specifically, when multiple sets of data need to be processed, and when configuring a core in the many-core processor for each set of data, the many-core processor selects multiple core groups, each of which includes multiple cores. The multiple sets of data are input to different core groups in the many-core processor, and each core group executes the computational processing of the multiple sets of data in parallel. The data processing algorithms executed by each core group can be the same or different.

[0079] Based on the same inventive concept, an embodiment of the present invention further provides a computing device including a multi-core processor for running a computer program, wherein:

[0080] When the many-core processor performs data processing, the streaming data processing method based on the many-core processor described in any of the above embodiments is adopted.

[0081] Optionally, the computing device may further include: a storage device for storing a computer program, wherein the computer program is loaded and executed by the processor when running in the computing device.

[0082] Embodiments of the present invention provide a more efficient streaming data processing method and computing device based on a many-core processor. The many-core processor is first divided into N computing core groups. Data received by the many-core processor is then input into the corresponding computing core group in the N computing core groups, which then performs data processing tasks and outputs data processing results. In embodiments of the present invention, for each computing core, data can be arranged in a pipeline mode and input in time periods to ensure data processing accuracy. The solution provided by embodiments of the present invention can improve the data processing speed of the many-core processor while reducing the energy consumption and data latency of the many-core processor, thereby improving the overall computing efficiency of the many-core processor.

[0083] In the description provided herein, numerous specific details are described. However, it is understood that embodiments of the present invention may be practiced without these specific details. In some instances, well-known methods, structures, and techniques are not shown in detail so as not to obscure the understanding of this description.

[0084] Similarly, it should be understood that in order to streamline the present disclosure and aid in understanding one or more of the various inventive aspects, in the above description of exemplary embodiments of the invention, various features of the invention are sometimes grouped together into a single embodiment, figure, or description thereof. However, this disclosed method should not be interpreted as reflecting an intention that the claimed invention requires more features than are expressly recited in each claim. Rather, as reflected in the claims below, inventive aspects lie in less than all the features of the individual embodiments disclosed above. Accordingly, the claims following the detailed description are hereby expressly incorporated into this detailed description, with each claim standing on its own as a separate embodiment of the invention.

[0085] Those skilled in the art will appreciate that the modules in the devices in the embodiments may be adaptively changed and arranged in one or more devices different from the embodiments. The modules or units or components in the embodiments may be combined into one module or unit or component, and in addition may be divided into multiple submodules or subunits or subcomponents. All features disclosed in this specification (including the accompanying claims, abstracts and drawings) and all processes or units of any method or device disclosed herein may be combined in any combination, except that at least some of such features and / or processes or units are mutually exclusive. Unless expressly stated otherwise, each feature disclosed in this specification (including the accompanying claims, abstracts and drawings) may be replaced by an alternative feature providing the same, equivalent or similar purpose.

[0086] Furthermore, those skilled in the art will appreciate that although some embodiments described herein include certain features included in other embodiments but not other features, combinations of features from different embodiments are intended to be within the scope of the present invention and to form different embodiments. For example, in the claims, any of the claimed embodiments may be used in any combination.

[0087] It should be noted that the above embodiments illustrate rather than limit the invention, and that those skilled in the art may devise alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between brackets should not be construed as limiting the claims. The word "comprising" does not exclude the presence of elements or steps not listed in the claims. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The present invention may be implemented by means of hardware comprising several different elements and by means of appropriately programmed computers. In a unit claim enumerating several means, several of these means may be embodied by the same item of hardware. The use of the words first, second, and third etc. does not indicate any order. These words may be interpreted as names.

[0088] At this point, those skilled in the art will recognize that, although a number of exemplary embodiments of the present invention have been shown and described in detail herein, many other variations or modifications consistent with the principles of the present invention may be directly determined or derived from the disclosure of the present invention without departing from the spirit and scope of the present invention. Therefore, the scope of the present invention should be understood and deemed to cover all such other variations or modifications.

Claims

1. A method for processing streaming data based on a many-core processor, the many-core processor comprising a plurality of computing cores, the method comprising: Dividing the plurality of computing cores into N computing core groups, wherein the N computing core groups execute different neural network algorithms; receiving data, wherein the data includes images, videos, audio, or data transmitted by a sensor; Inputting the data into a corresponding operation core group among the N operation core groups to perform a data processing task, wherein different neural network algorithms are respectively mapped to different operation core groups, and for any of the operation cores, while performing an intra-core operation, the operation core transmits at least part of the completed data to a next destination operation core; Output processed data; The dividing the plurality of computing cores into N computing core groups includes: dividing the plurality of computing cores into N computing core groups according to computing power requirements corresponding to different neural network algorithms; Inputting the data into a corresponding computing core group among the N computing core groups to perform a data processing task includes: The data is divided into a plurality of data blocks, and the plurality of data blocks are divided into M groups, each of the M groups includes the same number K of data blocks, wherein M is greater than or equal to 2, and K is greater than or equal to 1, Allocate corresponding K computing cores to the K data blocks, Inputting K data blocks in a first group of the M groups in parallel into a computing core corresponding to each data block of the K data blocks, and having the computing core perform computational processing on the corresponding data block; Particularly, dividing the data into a plurality of data blocks includes dividing the data into a plurality of data blocks of equal or unequal sizes according to the processing capability of a computing core within a prescribed time.

2. The method according to claim 1, wherein Inputting the data into a corresponding computing core group among the N computing core groups to perform a data processing task includes: The data is input into one operation core group; or the data is input into multiple operation core groups among the N operation core groups to perform different data processing tasks.

3. The method according to claim 1, wherein Inputting the data into a corresponding computing core group among the N computing core groups to perform a data processing task includes: The data is input into a first computing core group to execute a first data processing task.

4. The method according to claim 3, wherein The step of inputting the data into a first computing core group to perform a first data processing task includes: Dividing the data into a plurality of data blocks, and dividing the plurality of data blocks into M groups, each of the M groups including the same number K of data blocks, wherein M is greater than or equal to 2, and K is greater than or equal to 1; Allocating corresponding K computing cores to the K data blocks; The K data blocks in the first group of the M groups are input in parallel to a computing core corresponding to each data block of the K data blocks, and the computing core performs computational processing on the corresponding data block.

5. The method according to claim 4, wherein After inputting the K data blocks in the first group of the M groups in parallel into a computing core corresponding to each of the K data blocks, and the computing core performing computational processing on the corresponding data block, the method further includes: The K data blocks in the second group of the M groups are input into the K computing cores in parallel, and the K computing cores perform computational processing on the K data blocks in the second group.

6. The method according to claim 4, wherein: During the parallel input, for any one operation core, while performing the intra-core operation, at least part of the data for which the operation has been completed is transmitted to the next operation core in the first operation core group to execute the calculation of the next layer in the first data processing task.

7. The method according to any one of claims 1 to 6, wherein: Each of the computing cores in the many-core processor includes: A weight storage unit, used to store data, data weights and / or operation instructions required for performing neural network calculations; A computing unit, configured to access the data stored in the weight storage unit and perform computation on the data; a control unit for generating an operation instruction and controlling the computing unit to perform data operations based on the operation instruction; Routing is used to send and receive data and to perform data communication within the computing core or with other computing cores.

8. The method according to claim 7, wherein: The communication modes between the multiple computing cores include: 2D network mode, 3D ring mode, and one-to-one direct connection mode.

9. A computing device comprising a multi-core processor for running a computer program, wherein: When performing data processing, the many-core processor adopts the streaming data processing method based on the many-core processor according to any one of claims 1 to 8.

10. The computing device of claim 9, wherein: The computing device further includes: The storage device is used to store a computer program, which is loaded and executed by a processor when running in the computing device.

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