Display device and method of driving a display panel using the same

Abstract

A display apparatus and a method of driving a display panel using the same are provided. The display apparatus includes a display panel, a gate driver, a data driver, and a driving controller. The display panel displays an image based on input image data. The gate driver outputs a gate signal to a gate line of the display panel. The data driver outputs a data voltage to a data line of the display panel. The driving controller is configured to control an operation of the gate driver and an operation of the data driver to determine a driving mode of the display apparatus as one of a normal driving mode and a low-frequency driving mode, and to determine a driving frequency of the display panel based on the input image data. The driving controller includes a flicker value storage configured to store a flicker value for a portion of all gray values of the input image data.

Description

Technical Field

[0001] This disclosure relates to a display device and a method for driving a display panel using the display device. More specifically, this disclosure relates to a display device that reduces power consumption and improves display quality, and a method for driving a display panel using the display device. Background Technology

[0002] Methods to minimize the power consumption of electronic devices such as tablet PCs and laptop PCs have been studied.

[0003] To minimize the power consumption of electronic devices, including display panels, the power consumption of the display panels themselves must be minimized. When the display panels are displaying still images, they can be driven at a relatively low frequency, thereby reducing their power consumption.

[0004] However, driving the display panel at relatively low frequencies can generate flicker, which degrades display quality. Therefore, a novel and improved method is needed to reduce power consumption and improve display quality. Summary of the Invention

[0005] This disclosure provides a display device that can reduce power consumption and improve display quality.

[0006] This disclosure also provides a method for driving a display panel using the display device.

[0007] In an example embodiment, the display device includes a display panel, a gate driver, a data driver, and a drive controller. The display panel is configured to display an image based on input image data. The gate driver is configured to output a gate signal to a gate line of the display panel. The data driver is configured to output a data voltage to a data line of the display panel. The drive controller is configured to control the operation of the gate driver and the data driver to determine a drive mode of the display device between a normal drive mode and a low-frequency drive mode, and to determine a drive frequency of the display panel based on the input image data. The drive controller includes a flicker value memory configured to store flicker values ​​for a subset of all grayscale values ​​of the input image data.

[0008] In an example embodiment, the drive controller may include a still image determiner and a drive frequency determiner. The still image determiner is configured to determine whether the input image data is a still image or a video image, and is configured to generate a flag indicating whether the input image data is a still image or a video image. The drive frequency determiner is configured to determine the drive mode of the display device as one of a normal drive mode and a low-frequency drive mode based on the flag, and is configured to determine the drive frequency of the display panel through a flicker value memory.

[0009] In an example embodiment, the flash value memory can be configured to set a first reference gray value, to divide gray values ​​equal to or less than the first reference gray value by the number of flash setting levels, and to store flash values ​​for the gray values ​​divided by the number of flash setting levels respectively.

[0010] In an example embodiment, the drive frequency determiner can be configured to determine the drive frequency for a grayscale value that is larger than the first reference grayscale value based on the flicker value of the last flicker setting level among all flicker setting levels.

[0011] In an example embodiment, when the minimum grayscale value of the input image data is 0, the maximum grayscale value of the input image data is 255, the number of flicker setting levels is 64, and the first reference grayscale value is 127, the flicker value memory can be configured to store a single flicker value for two grayscale values.

[0012] In an example embodiment, when the minimum grayscale value of the input image data is 0, the maximum grayscale value of the input image data is 255, the number of flicker setting levels is 64, and the first reference grayscale value is 63, the flicker value memory can be configured to store a single flicker value for a single grayscale value.

[0013] In an example embodiment, the flash value memory can be configured to set a second reference gray value, to divide gray values ​​equal to or greater than the second reference gray value by the number of flash setting levels, and to store flash values ​​for the gray values ​​divided by the number of flash setting levels respectively.

[0014] In an example embodiment, the drive frequency determiner can be configured to determine the drive frequency for a grayscale value smaller than the second reference grayscale value based on the flicker value of a first flicker setting level among all flicker setting levels.

[0015] In an example embodiment, the flash value memory can be configured to set a first reference gray value and a second reference gray value, to divide gray values ​​that are equal to or less than the first reference gray value and equal to or greater than the second reference gray value according to the number of flash setting levels, and to store flash values ​​for the gray values ​​divided according to the number of flash setting levels respectively.

[0016] In an example embodiment, the drive frequency determiner can be configured to determine the drive frequency for grayscale values ​​larger than a first reference grayscale value based on the flicker value of the last flicker setting level among all flicker setting levels. The drive frequency determiner can also be configured to determine the drive frequency for grayscale values ​​smaller than a second reference grayscale value based on the flicker value of the first flicker setting level among all flicker setting levels.

[0017] In an example embodiment, the display panel may include multiple segments arranged in a matrix. The drive controller may be configured to determine the drive frequency of the display panel based on the optimal drive frequency for the segments.

[0018] In an example embodiment, the flicker value memory can be configured to store flicker values ​​for a portion of the brightness of the input image data.

[0019] In an example embodiment of the method for driving a display panel, the method includes the following steps: determining a driving mode of the display device between a normal driving mode and a low-frequency driving mode; determining a driving frequency of the display panel using a flicker value memory configured to store flicker values ​​for a portion of the grayscale values ​​of the input image data; outputting a gate signal to a gate line of the display panel based on the driving frequency; and outputting a data voltage to a data line of the display panel based on the driving frequency.

[0020] In an example embodiment, the step of determining the driving frequency may include: determining whether the input image data is a still image or a video image; generating a flag indicating whether the input image data is a still image or a video image; determining the driving mode of the display device as one of a normal driving mode and a low-frequency driving mode based on the flag; and determining the driving frequency of the display panel through a flicker value memory.

[0021] In an example embodiment, the flash value memory can be configured to set a first reference gray value, to divide gray values ​​equal to or less than the first reference gray value by the number of flash setting levels, and to store flash values ​​for the gray values ​​divided by the number of flash setting levels respectively.

[0022] In an example embodiment, the step of determining the drive frequency may further include determining a drive frequency for a grayscale value that is larger than the first reference grayscale value based on the flicker value of the last flicker setting level among all flicker setting levels.

[0023] In an example embodiment, the flash value memory can be configured to set a second reference gray value, to divide gray values ​​equal to or greater than the second reference gray value by the number of flash setting levels, and to store flash values ​​for the gray values ​​divided by the number of flash setting levels respectively.

[0024] In an example embodiment, the step of determining the drive frequency may further include determining the drive frequency for a grayscale value smaller than the second reference grayscale value based on the flicker value of a first flicker setting level among all flicker setting levels.

[0025] In an example embodiment, the flash value memory can be configured to set a first reference gray value and a second reference gray value, to divide gray values ​​that are equal to or less than the first reference gray value and equal to or greater than the second reference gray value according to the number of flash setting levels, and to store flash values ​​for the gray values ​​divided according to the number of flash setting levels respectively.

[0026] In an example embodiment, the step of determining the drive frequency may further include determining a drive frequency for grayscale values ​​larger than a first reference grayscale value based on the flicker value of the last flicker setting level among all flicker setting levels. The step of determining the drive frequency may further include determining a drive frequency for grayscale values ​​smaller than a second reference grayscale value based on the flicker value of the first flicker setting level among all flicker setting levels.

[0027] Based on the method for driving the display panel and the display device used to execute the display panel, the driving frequency is determined according to the image displayed on the display panel, thereby reducing the power consumption of the display device. Furthermore, using the flicker value of the image on the display panel to determine the driving frequency prevents image flicker and improves the display quality of the display panel. Additionally, the flicker value memory stores flicker values ​​only for a subset of grayscale values, rather than all grayscale values, effectively preventing flicker. Therefore, the display quality of the display panel can be improved. Attached Figure Description

[0028] The above and other features and advantages of this disclosure will become more apparent from the detailed description of exemplary embodiments thereof with reference to the accompanying drawings, in which:

[0029] Figure 1 This is a block diagram illustrating a display device according to an example embodiment of the present disclosure;

[0030] Figure 2 It is shown Figure 1 A block diagram of the drive controller;

[0031] Figure 3 It is shown Figure 2 A table of example flashing value storage;

[0032] Figure 4 It is shown Figure 2 A table of example flashing value storage;

[0033] Figure 5 It shows the basis and Figure 3 The graph of the driving frequency corresponding to the input grayscale value;

[0034] Figure 6 It is shown Figure 2 A table of example flashing value storage;

[0035] Figure 7 It shows the basis and Figure 6 The graph of the driving frequency corresponding to the input grayscale value;

[0036] Figure 8 It is shown Figure 2 A table of example flashing value storage;

[0037] Figure 9 It is shown Figure 2 A table of example flashing value storage;

[0038] Figure 10 It is shown Figure 2 A table of example flashing value storage;

[0039] Figure 11 This is a conceptual diagram illustrating a display panel of a display device according to an exemplary embodiment of the present disclosure;

[0040] Figure 12 It is shown Figure 11 A block diagram of the driver controller for the display device;

[0041] Figure 13 This is a block diagram illustrating a drive controller for a display device according to an exemplary embodiment of the present disclosure;

[0042] Figure 14 It is shown Figure 13 An exemplary table of flash value storage;

[0043] Figure 15 This is a block diagram illustrating a display device according to an example embodiment of the present disclosure;

[0044] Figure 16 It is shown Figure 15 The circuit diagram of the pixels of the display panel; and

[0045] Figure 17 It shows that it is applied to Figure 16 The timing diagram of the input signal of the pixel. Detailed Implementation

[0046] The present disclosure will be explained in detail below with reference to the accompanying drawings.

[0047] Figure 1 This is a block diagram illustrating a display device according to an example embodiment of the present disclosure.

[0048] Reference Figure 1 The display device includes a display panel 100 and a display panel driver. The display panel driver includes a drive controller 200, a gate driver 300, a gamma reference voltage generator 400, and a data driver 500.

[0049] For example, the drive controller 200 and the data driver 500 can be integrally formed. For example, the drive controller 200, the gamma reference voltage generator 400, and the data driver 500 can be integrally formed. A drive module that includes at least the integrally formed drive controller 200 and data driver 500 can be referred to as a data driver (TED) with an embedded timing controller.

[0050] The display panel 100 has a display area on which an image is displayed and a peripheral area adjacent to the display area.

[0051] The display panel 100 includes multiple gate lines GL, multiple data lines DL, and multiple pixels connected to the gate lines GL and the data lines DL. The gate lines GL extend along a first direction D1, and the data lines DL extend along a second direction D2 that intersects the first direction D1.

[0052] The drive controller 200 receives input image data IMG and input control signal CONT from an external device (not shown). The input image data IMG may include multiple image data such as red image data, green image data, and blue image data. The input image data IMG may include white image data. The input image data IMG may include magenta image data, yellow image data, and cyan image data. The input control signal CONT may include a master clock signal and a data enable signal. The input control signal CONT may also include a vertical synchronization signal and a horizontal synchronization signal.

[0053] The drive controller 200 generates a first control signal CONT1, a second control signal CONT2, a third control signal CONT3, and a data signal DATA based on the input image data IMG and the input control signal CONT.

[0054] The drive controller 200 generates a first control signal CONT1 for controlling the operation of the gate driver 300 based on the input control signal CONT, and outputs the first control signal CONT1 to the gate driver 300. The first control signal CONT1 may also include a vertical start signal and a gate clock signal.

[0055] The drive controller 200 generates a second control signal CONT2 based on the input control signal CONT for controlling the operation of the data driver 500, and outputs the second control signal CONT2 to the data driver 500. The second control signal CONT2 may include a horizontal start signal and a load signal.

[0056] The drive controller 200 generates a data signal DATA based on the input image data IMG. The drive controller 200 outputs the data signal DATA to the data driver 500.

[0057] For example, the drive controller 200 can adjust the drive frequency of the display panel 100 based on the input image data IMG.

[0058] The drive controller 200 generates a third control signal CONT3 based on the input control signal CONT for controlling the operation of the gamma reference voltage generator 400, and outputs the third control signal CONT3 to the gamma reference voltage generator 400.

[0059] Reference Figures 2 to 7 The structure and operation of the drive controller 200 are described in detail.

[0060] Return to reference Figure 1 The gate driver 300 generates a gate signal for driving the gate line GL in response to a first control signal CONT1 received from the drive controller 200. The gate driver 300 outputs the gate signal to the gate line GL. For example, the gate driver 300 can sequentially output the gate signal to the gate line GL. For example, the gate driver 300 can be mounted on the display panel 100. For example, the gate driver 300 can be integrated into the display panel 100.

[0061] The gamma reference voltage generator 400 generates a gamma reference voltage VGREF in response to a third control signal CONT3 received from the drive controller 200. The gamma reference voltage generator 400 provides the gamma reference voltage VGREF to the data driver 500. The gamma reference voltage VGREF has a value corresponding to the level of the data signal DATA.

[0062] In an embodiment, the gamma reference voltage generator 400 may be located in the drive controller 200 or the data driver 500.

[0063] Data driver 500 receives a second control signal CONT2 and a data signal DATA from drive controller 200, and receives a gamma reference voltage VGREF from gamma reference voltage generator 400. Data driver 500 uses the gamma reference voltage VGREF to convert the data signal DATA into a data voltage of analog type. Data driver 500 outputs the data voltage to data line DL.

[0064] Figure 2 It is shown Figure 1 Block diagram of the drive controller 200. Figure 3 It is shown Figure 2 Example of a table of flashing value memory 260. Figure 4 It is shown Figure 2 Example of a table of flashing value memory 260. Figure 5 It shows the basis and Figure 3 The table shows the curve of the driving frequency corresponding to the input grayscale value.

[0065] like Figure 2 As shown, the drive controller 200 may include a still image determiner 220, a drive frequency determiner 240, and a flash value memory 260.

[0066] The still image determiner 220 can determine whether the input image data IMG is a still image or a video image. The still image determiner 220 can output a flag SF indicating whether the input image data IMG is a still image or a video image to the drive frequency determiner 240. For example, when the input image data IMG is a still image, the still image determiner 220 can output a flag SF of 1 to the drive frequency determiner 240. When the input image data IMG is a video image, the still image determiner 220 can output a flag SF of 0 to the drive frequency determiner 240. When the display panel 100 operates in normally open mode, the still image determiner 220 can output a flag SF of 1 to the drive frequency determiner 240.

[0067] When the flag SF is 1, the drive frequency determiner 240 can drive the display panel 100 at a low drive frequency.

[0068] When the flag SF is 0, the drive frequency determiner 240 can drive the display panel 100 at the normal drive frequency.

[0069] The drive frequency determiner 240 can refer to the flicker value memory 260 to determine the low drive frequency. The flicker value memory 260 may include flicker values ​​representing the degree of flickering based on the grayscale values ​​of the input image data IMG.

[0070] The flicker value memory 260 can store the grayscale value of the input image data IMG and the flicker value corresponding to the grayscale value of the input image data IMG. The flicker value can be used to determine the driving frequency of the display panel 100.

[0071] exist Figure 3 In the input image data IMG, the input grayscale value can be 8 bits, the minimum grayscale value of the input image data IMG can be 0, and the maximum grayscale value of the input image data IMG can be 255. The number of flicker setting levels in the flicker value memory 260 can be 64. Increasing the number of flicker setting levels can effectively eliminate flicker, but it will increase the logic size of the drive controller 200. Therefore, the number of flicker setting levels can be limited.

[0072] exist Figure 3In this design, the number of grayscale values ​​in the input image data IMG is 256, and the number of flicker setting levels is 64, such that a single flicker value in the flicker value memory 260 can correspond to four grayscale values. For example, the first flicker setting level stores a flicker value of 0 for grayscale values ​​from 0 to 3. Here, a flicker value of 0 can represent a drive frequency of 1 Hz. For example, the second flicker setting level stores a flicker value of 0 for grayscale values ​​from 4 to 7. Here, a flicker value of 0 can represent a drive frequency of 1 Hz. For example, the third flicker setting level stores a flicker value of 40 for grayscale values ​​from 8 to 11. Here, a flicker value of 40 can represent a drive frequency of 2 Hz. For example, the fourth flicker setting level stores a flicker value of 80 for grayscale values ​​from 12 to 15. Here, a flicker value of 80 can represent a drive frequency of 5 Hz. For example, the fifth flicker setting level stores a flicker value of 120 for grayscale values ​​from 16 to 19. Here, a flicker value of 120 can represent a drive frequency of 10 Hz. For example, the sixth flicker setting level stores a flicker value of 160 for grayscale values ​​of 20 to 23. Here, a flicker value of 160 can represent a drive frequency of 30Hz. For example, the seventh flicker setting level stores a flicker value of 200 for grayscale values ​​of 24 to 27. Here, a flicker value of 200 can represent a drive frequency of 60Hz. For example, the sixty-second flicker setting level stores a flicker value of 0 for grayscale values ​​of 244 to 247. Here, a flicker value of 0 can represent a drive frequency of 1Hz. For example, the sixty-third flicker setting level stores a flicker value of 0 for grayscale values ​​of 248 to 251. Here, a flicker value of 0 can represent a drive frequency of 1Hz. For example, the sixty-fourth flicker setting level stores a flicker value of 0 for grayscale values ​​of 252 to 255. Here, a flicker value of 0 can represent a drive frequency of 1Hz.

[0073] exist Figure 4 In this context, the input grayscale value of the input image data IMG can be 10 bits, the minimum grayscale value of the input image data IMG can be 0, and the maximum grayscale value of the input image data IMG can be 1023. The number of flashing setting levels in the flashing value memory 260 can be 64.

[0074] exist Figure 4 In the input image data IMG, the number of grayscale values ​​is 1024, and the number of flicker setting levels is 64, so that a single flicker value in the flicker value memory 260 can correspond to sixteen grayscale values.

[0075] Figure 5 The curve represents according to Figure 3 The driving frequency of the input grayscale value of the flash value memory 260. Figure 5In the blink value memory 260, the input grayscale values ​​can be divided into a first blink setting level ST1 to a sixty-fourth blink setting level ST64. For example, the driving frequency corresponding to grayscale values ​​0 to 3 of the first blink setting level ST1 can be 1Hz. For example, the driving frequency corresponding to grayscale values ​​4 to 7 of the second blink setting level ST2 can be 1Hz. For example, the driving frequency corresponding to grayscale values ​​8 to 11 of the third blink setting level ST3 can be 2Hz. For example, the driving frequency corresponding to grayscale values ​​12 to 15 of the fourth blink setting level ST4 can be 5Hz. For example, the driving frequency corresponding to grayscale values ​​16 to 19 of the fifth blink setting level ST5 can be 10Hz. For example, the driving frequency corresponding to grayscale values ​​20 to 23 of the sixth blink setting level ST6 can be 30Hz. For example, the driving frequency corresponding to grayscale values ​​24 to 27 of the seventh blink setting level ST7 can be 60Hz.

[0076] exist Figure 3 and Figure 5 In this context, due to the size limitation of the flash value memory 260, the flash value memory 260 can store only one flash value for four grayscale values. Additionally, in... Figure 4 In this context, due to the size limitation of the flash value memory 260, the flash value memory 260 can store only one flash value for sixteen grayscale values.

[0077] Suppose that when the grayscale value is 8 or 9 and the driving frequency is 1Hz, no flickering is displayed to the user, but when the grayscale value is 10 or 11 and the driving frequency is 1Hz, flickering is displayed to the user. In this case, according to Figure 3 It can drive the display panel 100 at a driving frequency of 2Hz for grayscale values ​​of 8 to 11.

[0078] If flicker values ​​can be set separately for grayscale values ​​of 8 and 9 and for grayscale values ​​of 10 and 11, then the display panel 100 can be driven at a driving frequency of 1Hz for grayscale values ​​of 8 and 9, and at a driving frequency of 2Hz for grayscale values ​​of 10 and 11, thereby further reducing power consumption.

[0079] Figure 6 It is shown Figure 2 Example of a table of flashing value memory 260. Figure 7 It shows the basis and Figure 6 The table shows the curve of the driving frequency corresponding to the input grayscale value.

[0080] Reference Figures 1 to 7 The blink value memory 260 can store blink values ​​for a subset of gray values ​​(e.g., 0 to 127) of all gray values ​​(e.g., 0 to 256) of the input image data IMG.

[0081] exist Figure 6 In this context, the input grayscale value of the input image data IMG can be 8 bits. Figure 6 The flash value memory 260 can set a first reference gray value (e.g., 127), and can divide gray values ​​equal to or less than the first reference gray value (e.g., 0 to 127) by a number of flash setting levels (e.g., 64), and can store flash values ​​separately for the gray values ​​(e.g., 0 to 127) divided by the number of flash setting levels (e.g., 64).

[0082] For example, the minimum grayscale value of the input image data IMG can be 0, the maximum grayscale value of the input image data IMG can be 255, the number of flash setting levels of the flash value memory 260 can be 64, and the first reference grayscale value can be set to 127. Therefore, Figure 6 The flicker value memory 260 stores flicker values ​​only for grayscale values ​​(e.g., 0 to 127) that are equal to or less than the first reference grayscale value. When the minimum grayscale value of the input image data IMG is 0, the maximum grayscale value of the input image data IMG is 255, the number of flicker setting levels is 64, and the first reference grayscale value is 127, the flicker value memory 260 can store a single flicker value for two grayscale values. For example, the first flicker setting level stores the flicker value of 0 for grayscale values ​​of 0 and 1. Here, the flicker value of 0 can represent a drive frequency of 1Hz. For example, the second flicker setting level stores the flicker value of 0 for grayscale values ​​of 2 and 3. Here, the flicker value of 0 can represent a drive frequency of 1Hz. For example, the third flicker setting level stores the flicker value of 0 for grayscale values ​​of 4 and 5. Here, the flicker value of 0 can represent a drive frequency of 1Hz. For example, the fourth flicker setting level stores the flicker value of 0 for grayscale values ​​of 6 and 7. Here, the flicker value of 0 can represent a drive frequency of 1Hz. For example, the fifth flicker setting level stores a flicker value of 10 for grayscale values ​​of 8 and 9. Here, a flicker value of 10 can represent a drive frequency of 1Hz. For example, the sixth flicker setting level stores a flicker value of 50 for grayscale values ​​of 10 and 11. Here, a flicker value of 50 can represent a drive frequency of 2Hz. For example, the seventh flicker setting level stores a flicker value of 60 for grayscale values ​​of 12 and 13. Here, a flicker value of 60 can represent a drive frequency of 2Hz. For example, the eighth flicker setting level stores a flicker value of 90 for grayscale values ​​of 14 and 15. Here, a flicker value of 90 can represent a drive frequency of 5Hz. For example, the ninth flicker setting level stores a flicker value of 110 for grayscale values ​​of 16 and 17. Here, a flicker value of 110 can represent a drive frequency of 10Hz. For example, the tenth flicker setting level stores a flicker value of 120 for grayscale values ​​of 18 and 19. Here, a flicker value of 120 can represent a drive frequency of 10Hz.

[0083] The drive frequency determiner 240 can determine the drive frequency (e.g., 1 Hz) for gray values ​​(e.g., 128 to 255) that are larger than the first reference gray value (e.g., 127) based on the flicker value (e.g., 0) of the last flicker setting level (e.g., the sixty-fourth flicker setting level).

[0084] Based on the characteristics of the display panel 100, when flickering occurs in a low grayscale area but not in a high grayscale area, the flicker value memory 260 can selectively store flicker values ​​for grayscale values ​​in the low grayscale area, not for all grayscale values, so that flicker values ​​can be subdivided and stored for the target grayscale area (low grayscale area) under the constraint of the size of the flicker value memory 260.

[0085] Figure 7 The curve represents according to Figure 6 The driving frequency of the input grayscale value of the flash value memory 260. Figure 7 In the blink value memory 260, the input grayscale values ​​can be divided into a first blink setting level ST1 to a sixty-fourth blink setting level ST64. For example, the driving frequency corresponding to the grayscale values ​​of 0 and 1 in the first blink setting level ST1 can be 1Hz. For example, the driving frequency corresponding to the grayscale values ​​of 2 and 3 in the second blink setting level ST2 can be 1Hz. For example, the driving frequency corresponding to the grayscale values ​​of 4 and 5 in the third blink setting level ST3 can be 1Hz. For example, the driving frequency corresponding to the grayscale values ​​of 6 and 7 in the fourth blink setting level ST4 can be 1Hz. For example, the driving frequency corresponding to the grayscale values ​​of 8 and 9 in the fifth blink setting level ST5 can be 1Hz. For example, the driving frequency corresponding to the grayscale values ​​of 10 and 11 in the sixth blink setting level ST6 can be 2Hz. For example, the driving frequency corresponding to the grayscale values ​​of 12 and 13 in the seventh blink setting level ST7 can be 2Hz. For example, the driving frequency corresponding to the grayscale values ​​of 14 and 15 in the eighth blink setting level ST8 can be 5Hz. For example, the drive frequency corresponding to the grayscale values ​​of 16 and 17 of the ninth flash setting level ST9 can be 10Hz. For example, the drive frequency corresponding to the grayscale values ​​of 18 and 19 of the tenth flash setting level ST10 can be 10Hz.

[0086] Suppose that when the grayscale value is 8 or 9 and the driving frequency is 1Hz, no flickering is displayed to the user, but when the grayscale value is 10 or 11 and the driving frequency is 1Hz, flickering is displayed to the user. In this case, according to Figure 6 The display panel 100 can be driven at a driving frequency of 1Hz for grayscale values ​​of 8 and 9, and at a driving frequency of 2Hz for grayscale values ​​of 10 and 11. Therefore, compared with... Figure 3 Compared to the flash value memory 260 in the middle, Figure 6The flicker value memory 260 in the memory can further reduce power consumption and effectively prevent flickering.

[0087] Figure 8 It is shown Figure 2 Example of a table of flashing value memory 260.

[0088] Reference Figure 1 , Figure 2 and Figure 8 The blink value memory 260 can store blink values ​​for a subset of gray values ​​(e.g., 0 to 63) of all gray values ​​(e.g., 0 to 256) of the input image data IMG.

[0089] exist Figure 8 In this context, the input grayscale value of the input image data IMG can be 8 bits. Figure 8 The flash value memory 260 can set a first reference gray value (e.g., 63), and can divide gray values ​​equal to or less than the first reference gray value (e.g., 0 to 63) by a number of flash setting levels (e.g., 64), and can store flash values ​​separately for the gray values ​​(e.g., 0 to 63) divided by the number of flash setting levels (e.g., 64).

[0090] For example, the minimum grayscale value of the input image data IMG can be 0, the maximum grayscale value of the input image data IMG can be 255, the number of flash setting levels of the flash value memory 260 can be 64, and the first reference grayscale value can be set to 63. Therefore, Figure 8The flicker value memory 260 stores flicker values ​​only for grayscale values ​​(e.g., 0 to 63) that are equal to or less than the first reference grayscale value. When the minimum grayscale value of the input image data IMG is 0, the maximum grayscale value of the input image data IMG is 255, the number of flicker setting levels is 64, and the first reference grayscale value is 63, the flicker value memory 260 can store a single flicker value for a single grayscale value. For example, the first flicker setting level stores a flicker value of 0 for a grayscale value of 0. Here, a flicker value of 0 can represent a drive frequency of 1Hz. For example, the second flicker setting level stores a flicker value of 0 for a grayscale value of 1. Here, a flicker value of 0 can represent a drive frequency of 1Hz. For example, the third flicker setting level stores a flicker value of 0 for a grayscale value of 2. Here, a flicker value of 0 can represent a drive frequency of 1Hz. For example, the fourth flicker setting level stores a flicker value of 0 for a grayscale value of 3. Here, a flicker value of 0 can represent a drive frequency of 1Hz. For example, the ninth flicker setting level stores a flicker value of 10 for a grayscale value of 8. Here, a flicker value of 10 can represent a drive frequency of 1Hz. For example, the tenth flicker setting level stores a flicker value of 20 for a grayscale value of 9. Here, a flicker value of 20 can represent a drive frequency of 1Hz. For example, the eleventh flicker setting level stores a flicker value of 40 for a grayscale value of 10. Here, a flicker value of 40 can represent a drive frequency of 2Hz. For example, the twelfth flicker setting level stores a flicker value of 55 for a grayscale value of 11. Here, a flicker value of 55 can represent a drive frequency of 2Hz.

[0091] The drive frequency determiner 240 can determine the drive frequency (e.g., 1 Hz) for gray values ​​(e.g., 64 to 255) that are larger than the first reference gray value (e.g., 63) based on the flicker value (e.g., 0) of the last flicker setting level (e.g., the sixty-fourth flicker setting level).

[0092] Based on the characteristics of the display panel 100, when flickering occurs in a low grayscale area but not in a high grayscale area, the flicker value memory 260 can selectively store flicker values ​​for grayscale values ​​in the low grayscale area, not for all grayscale values, so that flicker values ​​can be subdivided and stored for the target grayscale area (low grayscale area) under the constraint of the size of the flicker value memory 260.

[0093] Figure 9 It is shown Figure 2 Example of a table of flashing value memory 260.

[0094] Reference Figure 1 , Figure 2 and Figure 9The blink value memory 260 can store blink values ​​for a subset of gray values ​​(e.g., 128 to 255) of all gray values ​​(e.g., 0 to 256) of the input image data IMG.

[0095] exist Figure 9 In this context, the input grayscale value of the input image data IMG can be 8 bits. Figure 9 The flash value memory 260 can set a second reference gray value (e.g., 128), and can divide gray values ​​equal to or greater than the second reference gray value (e.g., 128 to 255) by a number of flash setting levels (e.g., 64), and can store flash values ​​separately for the gray values ​​(e.g., 128 to 255) divided by a number of flash setting levels (e.g., 64).

[0096] For example, the minimum grayscale value of the input image data IMG can be 0, the maximum grayscale value of the input image data IMG can be 255, the number of flash setting levels of the flash value memory 260 can be 64, and the second reference grayscale value can be set to 128. Therefore, Figure 9The flicker value memory 260 stores flicker values ​​only for grayscale values ​​(e.g., 128 to 255) that are equal to or greater than the second reference grayscale value. When the minimum grayscale value of the input image data IMG is 0, the maximum grayscale value of the input image data IMG is 255, the number of flicker setting levels is 64, and the second reference grayscale value is 128, the flicker value memory 260 can store a single flicker value for both grayscale values. For example, the first flicker setting level stores a flicker value of 0 for grayscale values ​​128 and 129. Here, a flicker value of 0 can represent a drive frequency of 1Hz. For example, the second flicker setting level stores a flicker value of 0 for grayscale values ​​130 and 131. Here, a flicker value of 0 can represent a drive frequency of 1Hz. For example, the third flicker setting level stores a flicker value of 20 for grayscale values ​​132 and 133. Here, a flicker value of 20 can represent a drive frequency of 1Hz. For example, the fourth flicker setting level stores a flicker value of 30 for grayscale values ​​134 and 135. Here, a flicker value of 30 can represent a drive frequency of 1Hz. For example, the fifth flicker setting level stores a flicker value of 40 for grayscale values ​​of 136 and 137. Here, a flicker value of 40 can represent a drive frequency of 2Hz. For example, the sixth flicker setting level stores a flicker value of 60 for grayscale values ​​of 138 and 139. Here, a flicker value of 60 can represent a drive frequency of 2Hz. For example, the seventh flicker setting level stores a flicker value of 110 for grayscale values ​​of 140 and 141. Here, a flicker value of 110 can represent a drive frequency of 10Hz. For example, the eighth flicker setting level stores a flicker value of 130 for grayscale values ​​of 142 and 143. Here, a flicker value of 130 can represent a drive frequency of 10Hz. For example, the ninth flicker setting level stores a flicker value of 160 for grayscale values ​​of 144 and 145. Here, a flicker value of 160 can represent a drive frequency of 30Hz. For example, the tenth flicker setting level stores a flicker value of 200 for grayscale values ​​of 146 and 147. Here, a flicker value of 200 can represent a drive frequency of 60Hz.

[0097] The drive frequency determiner 240 can determine the drive frequency (e.g., 1 Hz) for gray values ​​(e.g., 0 to 127) that are smaller than the second reference gray value (e.g., 128) based on the flicker value (e.g., 0) of the first flicker setting level among all flicker setting levels.

[0098] Based on the characteristics of the display panel 100, when flickering occurs in a high grayscale area but not in a low grayscale area, the flicker value memory 260 can selectively store flicker values ​​for grayscale values ​​in the high grayscale area but not for all grayscale values, so that flicker values ​​can be subdivided and stored for the target grayscale area (high grayscale area) under the constraint of the size of the flicker value memory 260.

[0099] Figure 10It is shown Figure 2 Example of a table of flashing value memory 260.

[0100] Reference Figure 1 , Figure 2 and Figure 10 The blink value memory 260 can store blink values ​​for a subset of gray values ​​(e.g., 64 to 191) of all gray values ​​(e.g., 0 to 256) of the input image data IMG.

[0101] exist Figure 10 In this context, the input grayscale value of the input image data IMG can be 8 bits. Figure 10 The flash value memory 260 can set a first reference gray value (e.g., 191) and a second reference gray value (e.g., 64), and can divide gray values ​​that are equal to or less than the first reference gray value and equal to or greater than the second reference gray value (e.g., 64 to 191) according to the number of flash setting levels (e.g., 64), and can store flash values ​​separately for the gray values ​​(e.g., 64 to 191) divided according to the number of flash setting levels (e.g., 64).

[0102] For example, the minimum grayscale value of the input image data IMG can be 0, the maximum grayscale value of the input image data IMG can be 255, the number of flashing setting levels of the flashing value memory 260 can be 64, the first reference grayscale value can be set to 191, and the second reference grayscale value can be set to 64. Therefore, Figure 10The flicker value memory 260 stores flicker values ​​only for gray values ​​(e.g., 64 to 191) that are equal to or less than a first reference gray value and equal to or greater than a second reference gray value. When the minimum gray value of the input image data IMG is 0, the maximum gray value of the input image data IMG is 255, the number of flicker setting levels is 64, the first reference gray value is 191, and the second reference gray value is 64, the flicker value memory 260 can store a single flicker value for both gray values. For example, the first flicker setting level stores a flicker value of 0 for gray values ​​64 and 65. Here, a flicker value of 0 can represent a drive frequency of 1Hz. For example, the second flicker setting level stores a flicker value of 0 for gray values ​​66 and 67. Here, a flicker value of 0 can represent a drive frequency of 1Hz. For example, the fifth flicker setting level stores a flicker value of 10 for gray values ​​72 and 73. Here, a flicker value of 10 can represent a drive frequency of 1Hz. For example, the sixth flicker setting level stores a flicker value of 10 for grayscale values ​​of 74 and 75. Here, a flicker value of 10 can represent a drive frequency of 1Hz. For example, the ninth flicker setting level stores a flicker value of 90 for grayscale values ​​of 80 and 81. Here, a flicker value of 90 can represent a drive frequency of 5Hz. For example, the tenth flicker setting level stores a flicker value of 90 for grayscale values ​​of 82 and 83. Here, a flicker value of 90 can represent a drive frequency of 5Hz.

[0103] The drive frequency determiner 240 can determine the drive frequency (e.g., 1Hz) for gray values ​​(e.g., 192 to 255) that are larger than the first reference gray value (e.g., 191) based on the flicker value (e.g., 10) of the last flicker setting level (e.g., the sixty-fourth flicker setting level).

[0104] The drive frequency determiner 240 can determine the drive frequency (e.g., 1 Hz) for gray values ​​(e.g., 0 to 63) smaller than the second reference gray value (e.g., 64) based on the flicker value (e.g., 0) of the first flicker setting level among all flicker setting levels.

[0105] Based on the characteristics of the display panel 100, when flickering occurs in the medium gray level area but not in the low gray level area or the high gray level area, the flicker value memory 260 can selectively store flicker values ​​for gray level values ​​in the medium gray level area but not for all gray level values, so that flicker values ​​can be subdivided and stored for the target gray level area (medium gray level area) under the constraint of the size of the flicker value memory 260.

[0106] According to the example embodiment, the driving frequency is determined based on the image displayed on the display panel 100, thereby reducing the power consumption of the display device. Furthermore, using the flicker value of the image on the display panel 100 to determine the driving frequency prevents image flicker and improves the display quality of the display panel 100. Additionally, the flicker value memory 260 stores flicker values ​​only for a subset of grayscale values, rather than all grayscale values, effectively preventing flicker. Therefore, the display quality of the display panel 100 can be improved.

[0107] Figure 11 This is a conceptual diagram illustrating a display panel 100 of a display device according to an example embodiment. Figure 12 It is shown Figure 11 Block diagram of the drive controller 200A for the display device.

[0108] In addition to the display panel 100 being divided into multiple segments, the display device and method for driving the display panel according to this example embodiment are also referenced. Figures 1 to 10 The display device and the method of driving the display panel explained in the previous example embodiments are substantially the same. Therefore, the same reference numerals will be used to refer to the same... Figures 1 to 10 The components described in the previous example embodiments are the same as or similar to those described above, and any repeated descriptions of the above elements will be omitted.

[0109] Reference Figure 1 and Figures 3 to 12 The display device includes a display panel 100 and a display panel driver. The display panel driver includes a drive controller 200A, a gate driver 300, a gamma reference voltage generator 400, and a data driver 500.

[0110] like Figure 11 As depicted, the display panel 100 may include multiple segments from SEG11 to SEG55. Although the display panel 100 includes segments in a 5x5 matrix format in this example embodiment, this disclosure is not limited. For example, the display panel 100 may include segments in a matrix format smaller than or larger than 5x5.

[0111] When a flicker value is determined for a pixel and only one pixel has a high flicker value, the entire display panel is driven at a high driving frequency to prevent flickering in that single pixel. For example, if only one pixel is prevented from flickering at a driving frequency of 30 Hz and other pixels do not flicker at a driving frequency of 1 Hz, the display panel 100 will be driven at a driving frequency of 30 Hz, and the power consumption of the display device will be higher than the required power consumption.

[0112] Therefore, when the display panel 100 is divided into segments and the flicker value is determined for each segment unit, the power consumption of the display device can be effectively reduced.

[0113] The drive controller 200A can determine the optimal drive frequency for a segment, and can determine the maximum drive frequency among the optimal drive frequencies for a segment as the low drive frequency for the display panel 100.

[0114] For example, when the optimal drive frequency for the first segment SEG11 is 10Hz and the optimal drive frequency for the other segments SEG12 to SEG55 is 2Hz, the drive controller 200A can determine the low drive frequency as 10Hz.

[0115] like Figure 12 As shown, the drive controller 200A may include a still image determiner 220, a drive frequency determiner 240, and a flicker value memory 260A.

[0116] The drive frequency determiner 240 can determine the low drive frequency by referring to the information of the flash value memory 260A and the segments of the display panel 100.

[0117] According to this example embodiment, the driving frequency is determined based on the image displayed on the display panel 100, thereby reducing the power consumption of the display device. Furthermore, using the flicker values ​​of segments of the image on the display panel 100 to determine the driving frequency prevents image flicker and improves the display quality of the display panel 100. Additionally, the flicker value memory 260A stores flicker values ​​only for a portion of grayscale values, rather than all grayscale values, effectively preventing flicker. Therefore, the display quality of the display panel 100 can be improved.

[0118] Figure 13 This is a block diagram illustrating a drive controller 200B of a display device according to an example embodiment of the present disclosure. Figure 14 It is shown Figure 13 Example of a table for a flash value memory 260B.

[0119] In addition to the flicker value memory, the display device and method for driving the display panel according to this example embodiment are referenced. Figures 1 to 10 The display device and the method of driving the display panel explained in the previous example embodiments are substantially the same. Therefore, the same reference numerals will be used to refer to the same... Figures 1 to 10 The components described in the previous exemplary embodiments are the same as or similar to those described above, and any repeated descriptions of the above elements will be omitted.

[0120] Reference Figure 1 , Figure 2 , Figure 13 and Figure 14The display device includes a display panel 100 and a display panel driver. The display panel driver includes a drive controller 200B, a gate driver 300, a gamma reference voltage generator 400, and a data driver 500.

[0121] like Figure 13 As shown, the drive controller 200B may include a still image determiner 220, a drive frequency determiner 240, and a flicker value memory 260B.

[0122] The still image determiner 220 can determine whether the input image data IMG is a still image or a video image. The still image determiner 220 can output a flag SF indicating whether the input image data IMG is a still image or a video image to the drive frequency determiner 240.

[0123] When the flag SF is 1, the drive frequency determiner 240 can drive the display panel 100 at a low drive frequency.

[0124] When the flag SF is 0, the drive frequency determiner 240 can drive the display panel 100 at the normal drive frequency.

[0125] The drive frequency determiner 240 can refer to the flicker value memory 260B to determine the low drive frequency. The flicker value memory 260B may include flicker values ​​representing the degree of flicker based on the brightness of the input image data IMG.

[0126] The flicker value memory 260B can store the brightness of the input image data IMG and the flicker value corresponding to the brightness of the input image data IMG. The flicker value can be used to determine the driving frequency of the display panel 100.

[0127] exist Figure 14In this design, the brightness of the input image data (IMG) can be divided into brightness regions from the first brightness region LA1 to the sixty-fourth brightness region LA64. Additionally, the number of flicker setting levels is 64. For example, the first flicker setting level stores a flicker value of 0 for the first brightness region LA1. Here, a flicker value of 0 can represent a drive frequency of 1Hz. For example, the second flicker setting level stores a flicker value of 0 for the second brightness region LA2. Here, a flicker value of 0 can represent a drive frequency of 1Hz. For example, the third flicker setting level stores a flicker value of 40 for the third brightness region LA3. Here, a flicker value of 40 can represent a drive frequency of 2Hz. For example, the fourth flicker setting level stores a flicker value of 80 for the fourth brightness region LA4. Here, a flicker value of 80 can represent a drive frequency of 5Hz. For example, the sixty-third flicker setting level stores a flicker value of 0 for the sixty-third brightness region LA63. Here, a flicker value of 0 can represent a drive frequency of 1Hz. For example, the sixty-fourth flicker setting level stores a flicker value of 0 for the sixty-fourth brightness region LA64. Here, a flicker value of 0 can represent a drive frequency of 1Hz.

[0128] In this example embodiment, the drive frequency determiner 240 can convert the grayscale values ​​of the input image data IMG into brightness values ​​corresponding to the grayscale values. The drive frequency determiner 240 can extract the flicker values ​​corresponding to the brightness from the flicker value memory 260B to determine the drive frequency.

[0129] According to this example embodiment, the driving frequency is determined based on the image displayed on the display panel 100, thereby reducing the power consumption of the display device. Furthermore, using the flicker value of the image on the display panel 100 to determine the driving frequency prevents image flicker and improves the display quality of the display panel 100. Additionally, the flicker value memory 260B stores flicker values ​​for a portion of the brightness, not all brightness levels, effectively preventing flicker. Therefore, the display quality of the display panel 100 can be improved.

[0130] Figure 15 This is a block diagram illustrating a display device according to an example embodiment of the present disclosure. Figure 16 It is shown Figure 15 Circuit diagram of a display panel with 100 pixels. Figure 17 It shows that it is applied to Figure 16 The timing diagram of the input signal of the pixel.

[0131] Apart from the structure of the display panel, the display device and the method for driving the display panel according to this example embodiment are referenced. Figures 1 to 10 The display device and the method of driving the display panel explained in the previous example embodiments are substantially the same. Therefore, the same reference numerals will be used to refer to the same... Figures 1 to 10The components described in the previous example embodiments are the same as or similar to those described above, and any repeated descriptions of the above elements will be omitted.

[0132] Reference Figures 2 to 10 and Figures 15 to 17 The display device includes a display panel 100 and a display panel driver. The display panel driver includes a drive controller 200, a gate driver 300, a gamma reference voltage generator 400, a data driver 500, and a transmit driver 600.

[0133] The display panel 100 has a display area on which an image is displayed and a peripheral area adjacent to the display area.

[0134] The display panel 100 includes multiple gate lines GWPL, GWNL, GIL, and GBL, multiple data lines DL, multiple emitter lines EL, and multiple pixels electrically connected to the gate lines GWPL, GWNL, GIL, and GBL, the data lines DL, and the emitter lines EL. The gate lines GWPL, GWNL, GIL, and GBL can extend along a first direction D1, the data lines DL can extend along a second direction D2 intersecting the first direction D1, and the emitter lines EL can extend along the first direction D1.

[0135] The drive controller 200 receives input image data IMG and input control signal CONT from an external device (not shown).

[0136] The drive controller 200 generates a first control signal CONT1, a second control signal CONT2, a third control signal CONT3, a fourth control signal CONT4, and a data signal DATA based on the input image data IMG and the input control signal CONT.

[0137] The transmitter driver 600 generates a transmit signal for driving the transmitter line EL in response to a fourth control signal CONT4 received from the drive controller 200. The transmitter driver 600 can output the transmit signal to the transmitter line EL.

[0138] The display panel 100 includes multiple pixels. Each pixel includes an organic light-emitting element (OLED).

[0139] Each OLED pixel receives data write gate signals GWP and GWN, data initialization gate signal GI, OLED initialization signal GB, data voltage VDATA, and emission signal EM as input signals, and emits light corresponding to the level of data voltage VDATA to display an image.

[0140] In this example embodiment, a pixel may include a first type of switching element and a second type of switching element different from the first type. For example, the first type of switching element may be a polycrystalline silicon thin-film transistor. For example, the first type of switching element may be a low-temperature polycrystalline silicon (LTPS) thin-film transistor. For example, the second type of switching element may be an oxide thin-film transistor. For example, the first type of switching element may be a P-type transistor, and the second type of switching element may be an N-type transistor.

[0141] For example, the data write gate signal may include a first data write gate signal GWP and a second data write gate signal GWN. The first data write gate signal GWP may be applied to a P-type transistor, such that the first data write gate signal GWP has a low-level valid signal corresponding to the data write timing. The second data write gate signal GWN may be applied to an N-type transistor, such that the second data write gate signal GWN has a high-level valid signal corresponding to the data write timing.

[0142] like Figure 16 As depicted, at least one of the pixels may include a first pixel switching element T1, a second pixel switching element T2, a third pixel switching element T3, a fourth pixel switching element T4, a fifth pixel switching element T5, a sixth pixel switching element T6 and a seventh pixel switching element T7, a storage capacitor CST and an organic light-emitting element OLED.

[0143] The first pixel switching element T1 includes a control electrode connected to the first node N1, an input electrode connected to the second node N2, and an output electrode connected to the third node N3.

[0144] For example, the first pixel switching element T1 can be a polysilicon thin-film transistor. For example, the first pixel switching element T1 can be a P-type thin-film transistor. The control electrode of the first pixel switching element T1 can be a gate electrode, the input electrode of the first pixel switching element T1 can be a source electrode, and the output electrode of the first pixel switching element T1 can be a drain electrode.

[0145] The second pixel switching element T2 includes a control electrode to which a first data write gate signal GWP is applied, an input electrode to which a data voltage VDATA is applied, and an output electrode connected to the second node N2.

[0146] For example, the second pixel switching element T2 can be a polysilicon thin-film transistor. For example, the second pixel switching element T2 can be a P-type thin-film transistor. The control electrode of the second pixel switching element T2 can be a gate electrode, the input electrode of the second pixel switching element T2 can be a source electrode, and the output electrode of the second pixel switching element T2 can be a drain electrode.

[0147] The third pixel switching element T3 includes a control electrode to which a second data write gate signal GWN is applied, an input electrode connected to the first node N1, and an output electrode connected to the third node N3.

[0148] For example, the third pixel switching element T3 can be an oxide thin-film transistor. Alternatively, the third pixel switching element T3 can be an N-type thin-film transistor. The control electrode of the third pixel switching element T3 can be a gate electrode, the input electrode of the third pixel switching element T3 can be a source electrode, and the output electrode of the third pixel switching element T3 can be a drain electrode.

[0149] The fourth pixel switching element T4 includes a control electrode to which a data initialization gate signal GI is applied, an input electrode to which an initialization voltage VI is applied, and an output electrode connected to the first node N1 and the third pixel switching element T3.

[0150] For example, the fourth pixel switching element T4 can be an oxide thin-film transistor. Alternatively, the fourth pixel switching element T4 can be an N-type thin-film transistor. The control electrode of the fourth pixel switching element T4 can be a gate electrode, the input electrode of the fourth pixel switching element T4 can be a source electrode, and the output electrode of the fourth pixel switching element T4 can be a drain electrode.

[0151] The fifth pixel switching element T5 includes a control electrode to which a transmission signal EM is applied, an input electrode to which a high power voltage ELVDD is applied, and an output electrode connected to the second node N2, the first pixel switching element T1, and the second pixel switching element T2.

[0152] For example, the fifth pixel switching element T5 can be a polysilicon thin-film transistor. For example, the fifth pixel switching element T5 can be a P-type thin-film transistor. The control electrode of the fifth pixel switching element T5 can be a gate electrode, the input electrode of the fifth pixel switching element T5 can be a source electrode, and the output electrode of the fifth pixel switching element T5 can be a drain electrode.

[0153] The sixth pixel switching element T6 includes a control electrode to which an emission signal EM is applied, an input electrode connected to the third node N3, the first pixel switching element T1 and the third pixel switching element T3, and an output electrode connected to the anode electrode of the organic light-emitting element OLED.

[0154] For example, the sixth pixel switching element T6 can be a polysilicon thin-film transistor. For example, the sixth pixel switching element T6 can be a P-type thin-film transistor. The control electrode of the sixth pixel switching element T6 can be a gate electrode, the input electrode of the sixth pixel switching element T6 can be a source electrode, and the output electrode of the sixth pixel switching element T6 can be a drain electrode.

[0155] The seventh pixel switching element T7 includes a control electrode to which an organic light-emitting element initialization gate signal GB is applied, an input electrode to which an initialization voltage VI is applied, an anode electrode connected to the organic light-emitting element OLED, and an output electrode of the sixth pixel switching element T6.

[0156] For example, the seventh pixel switching element T7 can be an oxide thin-film transistor. Alternatively, the seventh pixel switching element T7 can be an N-type thin-film transistor. The control electrode of the seventh pixel switching element T7 can be a gate electrode, the input electrode of the seventh pixel switching element T7 can be a source electrode, and the output electrode of the seventh pixel switching element T7 can be a drain electrode.

[0157] The storage capacitor CST includes a first electrode to which a high electrical voltage ELVDD is applied and a second electrode connected to a first node N1.

[0158] The organic light-emitting element (OLED) includes an anode electrode connected to the output electrode of the sixth pixel switching element T6 and a cathode electrode to which a low power voltage ELVSS is applied.

[0159] exist Figure 17 During the first duration DU1, the first node N1 and the storage capacitor CST are initialized in response to the data initialization gate signal GI. During the second duration DU2, in response to the first data write gate signal GWP and the second data write gate signal GWN, the threshold voltage VTH of the first pixel switching element T1 is compensated, and the data voltage VDATA compensated for the threshold voltage VTH is written to the first node N1. Additionally, during the second duration DU2, the anode electrode of the organic light-emitting element (OLED) is initialized in response to the organic light-emitting element initialization gate signal GB. During the third duration DU3, the organic light-emitting element (OLED) emits light in response to the emission signal EM, causing the display panel 100 to display an image.

[0160] In this example embodiment, oxide thin-film transistors can be used to design some of the pixel switching elements. In this example embodiment, the third pixel switching element T3, the fourth pixel switching element T4, and the seventh pixel switching element T7 can be oxide thin-film transistors. The first pixel switching element T1, the second pixel switching element T2, the fifth pixel switching element T5, and the sixth pixel switching element T6 can be polysilicon thin-film transistors.

[0161] The display panel 100 can be driven in normal driving mode and low-frequency driving mode. In normal driving mode, the display panel 100 is driven at the normal driving frequency. In low-frequency driving mode, the display panel 100 is driven at a frequency lower than the normal driving frequency.

[0162] For example, when the input image data represents a video image, the display panel 100 can be driven in a normal driving mode. For example, when the input image data represents a still image, the display panel 100 can be driven in a low-frequency driving mode. For example, when the display device operates in normally-on mode, the display panel 100 can be driven in a low-frequency driving mode.

[0163] The display panel 100 can be driven in frames. In normal driving mode, the display panel 100 can be refreshed in each frame. Therefore, normal driving mode only includes write frames in which data is written to pixels.

[0164] The display panel 100 can refresh at the frequency of the low-frequency drive mode. Therefore, the low-frequency drive mode includes write frames in which data is written to pixels and hold frames in which the written data is held but no data is written to pixels.

[0165] For example, when the frequency of the normal drive mode is 60Hz and the frequency of the low-frequency drive mode is 1Hz, the low-frequency drive mode includes one write frame and fifty-nine hold frames per second. For example, when the frequency of the normal drive mode is 60Hz and the frequency of the low-frequency drive mode is 1Hz, fifty-nine consecutive hold frames are set between two adjacent write frames.

[0166] For example, when the normal drive mode frequency is 60Hz and the low-frequency drive mode frequency is 10Hz, the low-frequency drive mode includes ten write frames and fifty hold frames per second. For example, when the normal drive mode frequency is 60Hz and the low-frequency drive mode frequency is 10Hz, five consecutive hold frames are set between two adjacent write frames.

[0167] In this example embodiment, the second data write gate signal GWN and the data initialization gate signal GI can have a first frequency in low-frequency drive mode. The first frequency can be the frequency of the low-frequency drive mode. Conversely, the first data write gate signal GWP, the transmit signal EM, and the organic light-emitting element initialization gate signal GB can have a second frequency higher than the first frequency. The second frequency can be the normal frequency of the normal drive mode.

[0168] Figure 2 The drive controller 200 can be applied to the structure of the display panel in this example embodiment. Additionally, Figure 12 The drive controller 200A can be applied to the structure of the display panel in this example embodiment. Additionally, Figure 13 The drive controller 200B can be applied to the structure of the display panel in this example embodiment.

[0169] According to this example embodiment, the driving frequency is determined based on the image displayed on the display panel 100, thereby reducing the power consumption of the display device. Furthermore, using the flicker value of the image on the display panel 100 to determine the driving frequency prevents image flicker and improves the display quality of the display panel 100. Additionally, the flicker value memory 260 stores flicker values ​​only for a subset of grayscale values, rather than all grayscale values, effectively preventing flicker. Therefore, the display quality of the display panel 100 can be improved.

[0170] As mentioned above, this can reduce the power consumption of the display device and improve the display quality of the display panel.

[0171] The foregoing is illustrative of this disclosure and should not be construed as limiting. Although some exemplary embodiments of this disclosure have been described, it will be readily understood by those skilled in the art that many modifications are possible in the exemplary embodiments without substantially departing from the novel teachings and advantages of this disclosure. Therefore, all such modifications are intended to be included within the scope of this disclosure as defined in the claims. In the claims, the device plus function clause is intended to cover structures described herein as performing the stated functions, and not only structural equivalents but also equivalent structures. Therefore, it will be understood that the foregoing is illustrative of this disclosure and should not be construed as limiting to the specific exemplary embodiments disclosed, and modifications to the disclosed exemplary embodiments and other exemplary embodiments are intended to be included within the scope of the appended claims. This disclosure is defined by the claims, including equivalents of the claims.

Claims

1. A display device, the display device comprising: The display panel is configured to display images based on input image data; A gate driver is configured to output a gate signal to the gate line of the display panel; A data driver is configured to output data voltage to the data lines of the display panel; as well as A drive controller is configured to control the operation of the gate driver and the data driver, and to determine the drive frequency of the display panel based on the input image data. The drive controller includes: a flicker value memory configured to store flicker values ​​for a subset of grayscale values ​​among all grayscale values ​​of the input image data; a still image determiner configured to determine whether the input image data is a still image or a video image; and a drive frequency determiner configured to selectively determine the drive mode of the display device between a normal drive mode and a low-frequency drive mode based on whether the input image data is a still image or a video image. The flashing value memory is configured to set a first reference grayscale value, to divide grayscale values ​​equal to or less than the first reference grayscale value according to the number of flashing setting levels, and to store flashing values ​​for each of the grayscale values ​​divided according to the number of flashing setting levels. The drive frequency determiner is configured to determine the drive frequency for a grayscale value that is larger than the first reference grayscale value based on the flicker value of the last flicker setting level among all flicker setting levels.

2. The display device according to claim 1, wherein, When the minimum grayscale value of the input image data is 0, the maximum grayscale value of the input image data is 255, the number of flicker setting levels is 64, and the first reference grayscale value is 127, the flicker value memory is configured to store a single flicker value for two grayscale values.

3. The display device according to claim 1, wherein, When the minimum grayscale value of the input image data is 0, the maximum grayscale value of the input image data is 255, the number of flicker setting levels is 64, and the first reference grayscale value is 63, the flicker value memory is configured to store a single flicker value for a single grayscale value.

4. The display device according to claim 1, wherein, The still image determiner is configured to generate a flag indicating whether the input image data is a still image or a video image, and The drive frequency determiner is configured to selectively determine the drive mode of the display device between the normal drive mode and the low-frequency drive mode based on the flag, and is configured to determine the drive frequency of the display panel through the flicker value memory.

5. The display device according to claim 1, wherein, The display panel comprises multiple segments arranged in a matrix. The drive controller is configured to determine the drive frequency of the display panel based on the optimal drive frequency for the plurality of segments.

6. The display device according to claim 1, wherein, The flicker value memory is configured to store flicker values ​​for a portion of all brightness levels in the input image data.

7. A display device, the display device comprising: The display panel is configured to display images based on input image data; A gate driver is configured to output a gate signal to the gate line of the display panel; A data driver is configured to output data voltage to the data lines of the display panel; as well as A drive controller is configured to control the operation of the gate driver and the data driver, and to determine the drive frequency of the display panel based on the input image data. The drive controller includes: a flicker value memory configured to store flicker values ​​for a subset of grayscale values ​​among all grayscale values ​​of the input image data; a still image determiner configured to determine whether the input image data is a still image or a video image; and a drive frequency determiner configured to selectively determine the drive mode of the display device between a normal drive mode and a low-frequency drive mode based on whether the input image data is a still image or a video image. The flashing value memory is configured to set a second reference grayscale value, to divide grayscale values ​​equal to or greater than the second reference grayscale value according to the number of flashing setting levels, and to store flashing values ​​for each of the grayscale values ​​divided according to the number of flashing setting levels. The drive frequency determiner is configured to determine the drive frequency for a grayscale value smaller than the second reference grayscale value based on the flicker value of a first flicker setting level among all the flicker setting levels.

8. The display device according to claim 7, wherein, The still image determiner is configured to generate a flag indicating whether the input image data is a still image or a video image, and The drive frequency determiner is configured to selectively determine the drive mode of the display device between the normal drive mode and the low-frequency drive mode based on the flag, and is configured to determine the drive frequency of the display panel through the flicker value memory.

9. The display device according to claim 7, wherein, The display panel comprises multiple segments arranged in a matrix. The drive controller is configured to determine the drive frequency of the display panel based on the optimal drive frequency for the plurality of segments.

10. The display device according to claim 7, wherein, The flicker value memory is configured to store flicker values ​​for a portion of all brightness levels in the input image data.

11. A display device, the display device comprising: The display panel is configured to display images based on input image data; A gate driver is configured to output a gate signal to the gate line of the display panel; A data driver is configured to output data voltage to the data lines of the display panel; as well as A drive controller is configured to control the operation of the gate driver and the data driver, and to determine the drive frequency of the display panel based on the input image data. The drive controller includes: a flicker value memory configured to store flicker values ​​for a subset of grayscale values ​​among all grayscale values ​​of the input image data; a still image determiner configured to determine whether the input image data is a still image or a video image; and a drive frequency determiner configured to selectively determine the drive mode of the display device between a normal drive mode and a low-frequency drive mode based on whether the input image data is a still image or a video image. The flashing value memory is configured to set a first reference grayscale value and a second reference grayscale value, to divide grayscale values ​​that are equal to or less than the first reference grayscale value and equal to or greater than the second reference grayscale value according to the number of flashing setting levels, and to store flashing values ​​for each of the grayscale values ​​divided according to the number of flashing setting levels. The drive frequency determiner is configured to determine the drive frequency for a grayscale value larger than the first reference grayscale value based on the flicker value of the last flicker setting level among all the flicker setting levels. The drive frequency determiner is configured to determine the drive frequency for a grayscale value smaller than the second reference grayscale value based on the flicker value of a first flicker setting level among all the flicker setting levels.

12. The display device according to claim 11, wherein, The still image determiner is configured to generate a flag indicating whether the input image data is a still image or a video image, and The drive frequency determiner is configured to selectively determine the drive mode of the display device between the normal drive mode and the low-frequency drive mode based on the flag, and is configured to determine the drive frequency of the display panel through the flicker value memory.

13. The display device according to claim 11, wherein, The display panel comprises multiple segments arranged in a matrix. The drive controller is configured to determine the drive frequency of the display panel based on the optimal drive frequency for the plurality of segments.

14. The display device according to claim 11, wherein, The flicker value memory is configured to store flicker values ​​for a portion of all brightness levels in the input image data.

15. A method for driving a display panel, the method comprising the following steps: The steps to determine whether the input image data is a still image or a video image; The step of determining the driving mode of the display device between normal driving mode and low-frequency driving mode based on whether the input image data is a still image or a video image; The step of determining the driving frequency of the display panel through a flicker value memory, wherein the flicker value memory is configured to store flicker values ​​for a subset of all gray values ​​of the input image data; The step of outputting a gate signal to the gate line of the display panel based on the driving frequency; as well as The step of outputting data voltage to the data line of the display panel based on the driving frequency. The flashing value memory is configured to set a first reference grayscale value, to divide grayscale values ​​equal to or less than the first reference grayscale value according to the number of flashing setting levels, and to store flashing values ​​for each of the grayscale values ​​divided according to the number of flashing setting levels. The step of determining the driving frequency further includes determining the driving frequency for a grayscale value that is larger than the first reference grayscale value based on the flicker value of the last flicker setting level among all the flicker setting levels.

16. The method according to claim 15, wherein, The step of determining the driving frequency includes: The step of generating a flag indicating whether the input image data is a still image or a video image; The step of determining the driving mode of the display device based on the flag between the normal driving mode and the low-frequency driving mode; and The step of determining the driving frequency of the display panel through the flicker value memory.

17. A method for driving a display panel, the method comprising the following steps: The steps to determine whether the input image data is a still image or a video image; The step of determining the driving mode of the display device between normal driving mode and low-frequency driving mode based on whether the input image data is a still image or a video image; The step of determining the driving frequency of the display panel through a flicker value memory, wherein the flicker value memory is configured to store flicker values ​​for a subset of all gray values ​​of the input image data; The step of outputting a gate signal to the gate line of the display panel based on the driving frequency; as well as The step of outputting data voltage to the data line of the display panel based on the driving frequency. The flashing value memory is configured to set a second reference grayscale value, to divide grayscale values ​​equal to or greater than the second reference grayscale value according to the number of flashing setting levels, and to store flashing values ​​for each of the grayscale values ​​divided according to the number of flashing setting levels. The step of determining the driving frequency further includes determining the driving frequency for a grayscale value smaller than the second reference grayscale value based on the flicker value of the first flicker setting level among all the flicker setting levels.

18. The method according to claim 17, wherein, The step of determining the driving frequency includes: The step of generating a flag indicating whether the input image data is a still image or a video image; The step of determining the driving mode of the display device based on the flag between the normal driving mode and the low-frequency driving mode; and The step of determining the driving frequency of the display panel through the flicker value memory.

19. A method for driving a display panel, the method comprising the following steps: The steps to determine whether the input image data is a still image or a video image; The step of determining the driving mode of the display device between normal driving mode and low-frequency driving mode based on whether the input image data is a still image or a video image; The step of determining the driving frequency of the display panel through a flicker value memory, wherein the flicker value memory is configured to store flicker values ​​for a subset of all gray values ​​of the input image data; The step of outputting a gate signal to the gate line of the display panel based on the driving frequency; as well as The step of outputting data voltage to the data line of the display panel based on the driving frequency. The flashing value memory is configured to set a first reference grayscale value and a second reference grayscale value, to divide grayscale values ​​that are equal to or less than the first reference grayscale value and equal to or greater than the second reference grayscale value according to the number of flashing setting levels, and to store flashing values ​​for each of the grayscale values ​​divided according to the number of flashing setting levels. The step of determining the driving frequency further includes determining the driving frequency for a grayscale value larger than the first reference grayscale value based on the flicker value of the last flicker setting level among all the flicker setting levels. The step of determining the driving frequency further includes determining the driving frequency for a grayscale value smaller than the second reference grayscale value based on the flicker value of the first flicker setting level among all the flicker setting levels.

20. The method according to claim 19, wherein, The step of determining the driving frequency includes: The step of generating a flag indicating whether the input image data is a still image or a video image; The step of determining the driving mode of the display device based on the flag between the normal driving mode and the low-frequency driving mode; and The step of determining the driving frequency of the display panel through the flicker value memory.

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