Patch Antenna
By integrating the patch radiator array, feed network and calibration network on the multi-layer printed circuit board, the problems of complex electrical connections and large space occupancy of existing patch antennas when achieving high integration and miniaturization designs are solved, and higher integration and miniaturization designs are achieved.
Patent Information
- Application Number
- CN201910652414.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2019-07-19
- Publication Date
- 2025-05-23
- Estimated Expiration
- 2039-07-19
AI Technical Summary
When existing patch antennas achieve high integration and miniaturization design, it is difficult to effectively integrate patch radiator arrays, feed networks and calibration networks, resulting in complex electrical connections and large space occupancy.
The multi-layer printed circuit board is used to integrate the patch radiator array, feed network and calibration network, and electrical connections are achieved through multiple dielectric substrates and metal patterns, simplifying electrical connections and achieving greater integration and miniaturization.
The high integration and miniaturization of patch antennas are achieved, which simplifies electrical connections, reduces space usage, and improves the performance of the overall system.
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Figure CN112242612B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of radio communications, and more specifically, to a patch antenna, in particular to an integrated patch antenna. Background Art
[0002] Compared with metal waveguides, microstrip transmission lines have the advantages of small size, light weight, wide bandwidth, high reliability and low manufacturing cost. With the development of microwave low-loss dielectric materials, microstrip antennas based on microstrip transmission lines have been widely used.
[0003] At present, patch antennas usually include dielectric substrates, patch radiator arrays, feed networks and other microstrip integrated circuits. Currently, with the rapid development of large-scale multi-input multi-output technology, it is necessary to integrate more microstrip integrated circuits in a limited space. Therefore, how to achieve the high integration and miniaturization requirements of the overall antenna structure has become a technical problem that technicians in this field need to solve in recent years. Summary of the invention
[0004] It is therefore an object of the present invention to provide a patch antenna that overcomes at least one of the drawbacks of the prior art.
[0005] According to a first aspect of the present invention, a patch antenna is provided, the patch antenna comprising a multi-layer printed circuit board, wherein a calibration network for the patch antenna, a patch radiator array and a feeding network for the patch radiator array are integrated on the multi-layer printed circuit board.
[0006] The integrated patch antenna array according to the various embodiments of the present invention is advantageous: the patch antenna integrates a patch radiator array, a feeding network and a calibration network on a multi-layer printed circuit board, which is conducive to relatively simple electrical connection between them, thereby realizing the integrated and miniaturized design concept of the patch antenna.
[0007] In some embodiments, the multilayer printed circuit board includes a plurality of dielectric substrates, wherein the patch radiator array and the calibration network are provided on different dielectric substrates, and the dielectric substrate provided with the patch radiator array is located above the dielectric substrate provided with the calibration network.
[0008] In some embodiments, the multilayer printed circuit board includes a first dielectric substrate and a second dielectric substrate located below the first dielectric substrate, the first and second dielectric substrates respectively having an upper main surface and a lower main surface opposite to the upper main surface, wherein a first metal pattern is provided on the upper main surface of the first dielectric substrate, the first metal pattern including a patch radiator array, and a second metal pattern is provided on the lower main surface of the second dielectric substrate, the second metal pattern including the calibration network.
[0009] In some embodiments, the first metal pattern also includes a first feed network for the array of patch radiators.
[0010] In some embodiments, the second metal pattern further includes a second feed network for the patch radiator array.
[0011] In some embodiments, the second metal pattern further includes a coupler configured to electrically couple the calibration network with the second feeding network.
[0012] In some embodiments, a first grounding metal layer is disposed between the first dielectric substrate and the second dielectric substrate.
[0013] In some embodiments, the second feed network is electrically connected to the first feed network via a conductive element that passes through the second dielectric substrate, the first grounded metal layer, and the first dielectric substrate.
[0014] In some embodiments, the multilayer printed circuit board further includes: a third dielectric substrate, the third dielectric substrate having an upper main surface and a lower main surface opposite to the upper main surface, and the third dielectric substrate is located below the second dielectric substrate, wherein a second grounding metal layer is provided on the lower main surface of the third dielectric substrate.
[0015] In some embodiments, the patch antenna further comprises a fourth dielectric substrate located above the multi-layer printed circuit board, and a parasitic patch radiator array is disposed on the fourth dielectric substrate.
[0016] In some embodiments, the fourth dielectric substrate is mechanically connected to the multilayer printed circuit board via a connecting device.
[0017] In some embodiments, the calibration network includes a calibration port, from which a calibration signal can be electrically coupled to the second feed network via a corresponding signal transmission line, a power divider, and a coupler.
[0018] In some embodiments, the first metal pattern further includes a debugging line, and the debugging line is electrically connected to one end of a corresponding transmission line in the calibration network via corresponding conductive elements at both ends.
[0019] In some embodiments, the multilayer printed circuit board comprises, from top to bottom, a first dielectric substrate, a second dielectric substrate, a third dielectric substrate and a fourth dielectric substrate, each dielectric substrate having an upper main surface and a lower main surface opposite to the upper main surface.
[0020] In some embodiments, a patch radiator array is provided on an upper main surface of a first dielectric substrate, wherein a first grounded metal layer is provided between the first dielectric substrate and the second dielectric substrate, wherein a first metal pattern is provided between the second dielectric substrate and the third dielectric substrate, the first metal pattern comprising a first feeding network for the corresponding patch radiator array, wherein a second metal pattern is provided between the third dielectric substrate and the fourth dielectric substrate, the second metal pattern comprising a calibration network.
[0021] In some embodiments, the second metal pattern further includes a second feed network for the patch radiator array.
[0022] In some embodiments, the second metal pattern further includes a coupler configured to electrically couple the calibration network with the second feeding network.
[0023] In some embodiments, the second feeding network is electrically connected to the first feeding network through the third dielectric substrate via corresponding conductive elements.
[0024] In some embodiments, a second grounding metal layer is disposed on the lower main surface of the fourth dielectric substrate.
[0025] In some embodiments, the multilayer printed circuit board includes, from top to bottom, a first dielectric substrate, a second dielectric substrate, a third dielectric substrate, a fourth dielectric substrate and a fifth dielectric substrate, each of which has an upper main surface and a lower main surface opposite to the upper main surface.
[0026] In some embodiments, a patch radiator array is provided on an upper main surface of a first dielectric substrate, wherein a first grounded metal layer is provided between the first dielectric substrate and the second dielectric substrate, wherein a first metal pattern is provided between the second dielectric substrate and the third dielectric substrate, the first metal pattern including a first feeding network for the corresponding patch radiator array, wherein a second grounded metal layer is provided between the third dielectric substrate and the fourth dielectric substrate, wherein a second metal pattern is provided between the fourth dielectric substrate and the fifth dielectric substrate, the second metal pattern including a calibration network.
[0027] In some embodiments, the second metal pattern further includes a second feed network for the patch radiator array.
[0028] In some embodiments, the second metal pattern further includes a coupler configured to electrically couple the calibration network with the second feeding network.
[0029] In some embodiments, the second feed network is electrically connected to the first feed network via a conductive element that passes through the fourth dielectric substrate, the second ground metal layer, and the third dielectric substrate.
[0030] In some embodiments, a third grounding metal layer is disposed on the lower main surface of the fifth dielectric substrate.
[0031] According to a second aspect of the present invention, a patch antenna is provided, characterized in that the patch antenna includes a multilayer printed circuit board, the multilayer printed circuit board includes at least a first dielectric substrate and a second dielectric substrate, wherein a patch radiator array is arranged on the first dielectric substrate, and a calibration network for the patch antenna is arranged on the second dielectric substrate, wherein the first dielectric substrate is above the second dielectric substrate, and the multilayer printed circuit board also includes a first feeding network for the patch radiator array.
[0032] In some embodiments, a second feeding network is further provided on the second dielectric substrate, and the second feeding network is electrically connected to the calibration network via a coupler.
[0033] In some embodiments, the calibration network and the second feed network include stripline transmission lines.
[0034] In some embodiments, the calibration network and the second feed network include microstrip transmission lines.
[0035] In some embodiments, the first feed network includes a stripline transmission line.
[0036] In some embodiments, the first feed network includes a microstrip transmission line. BRIEF DESCRIPTION OF THE DRAWINGS
[0037] In the figure:
[0038] Figure 1 shows a schematic side view of a patch antenna according to a first embodiment of the present invention;
[0039] Figure 2 Shows Figure 1 A schematic side view of a multilayer printed circuit board of a first embodiment of a patch antenna;
[0040] Figure 3a , 3b Shows Figure 2 A schematic circuit diagram of a conductive pattern on an upper main surface of a first dielectric substrate of a multilayer printed circuit board;
[0041] Figure 4 Shows Figure 1 A schematic circuit diagram of a calibration network of a patch antenna together with a second feeding network;
[0042] Figure 5 A schematic side view of a multilayer printed circuit board showing a patch antenna according to a second embodiment of the present invention. DETAILED DESCRIPTION
[0043] The specific implementation of the present invention will be described below with reference to the accompanying drawings, wherein the accompanying drawings illustrate several embodiments of the present invention. However, it should be understood that the present invention can be presented in many different ways and is not limited to the embodiments described below; in fact, the embodiments described below are intended to make the disclosure of the present invention more complete and fully illustrate the scope of protection of the present invention to those skilled in the art. It should also be understood that the embodiments disclosed herein can be combined in various ways to provide more additional embodiments.
[0044] It should be understood that the terms used in the specification are only used to describe specific embodiments and are not intended to limit the present invention. All terms (including technical terms and scientific terms) used in the specification have the meanings commonly understood by those skilled in the art unless otherwise defined. For the sake of simplicity and / or clarity, well-known functions or structures may not be described in detail.
[0045] The singular forms "a", "said" and "the" used in the specification include plural forms unless clearly indicated. The terms "include", "comprise" and "contain" used in the specification indicate the presence of the claimed features, but do not exclude the presence of one or more other features. The term "and / or" used in the specification includes any and all combinations of one or more of the relevant listed items.
[0046] In the specification, spatial relational terms such as "upper", "lower", "left", "right", "front", "back", "higher", "lower", etc. may describe the relationship of one feature to another feature in the drawings. It should be understood that the spatial relational terms include different orientations of the device in use or operation in addition to the orientation shown in the drawings. For example, when the device in the drawings is turned upside down, features that were originally described as being "below" other features may now be described as being "above" the other features. The device may also be oriented in other ways (rotated 90° or in other orientations), and the relative spatial relationships will be interpreted accordingly.
[0047] It will be understood that, although the terms first, second, etc. can be used to describe various elements in this article, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. For example, the first element can be referred to as the second element, and similarly, the second element can be referred to as the first element, without departing from the scope of the present invention. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.
[0048] It will be understood that when an element is referred to as being "on" another element, it may be directly on the other element, or there may be an intermediate element. In contrast, when an element is referred to as being "directly" "on" another element, there are no intermediate elements. It will also be understood that when an element is referred to as being "connected" or "coupled" to another element, it may be directly connected or coupled to the other element, or there may be an intermediate element. In contrast, when an element is referred to as being "directly connected" or "directly coupled" to another element, there are no intermediate elements. Other words used to describe the relationship between elements should be interpreted in a similar manner (i.e., "between" versus "directly between," "adjacent" versus "directly adjacent," etc.).
[0049] It should be understood that the same reference numerals represent the same elements throughout the drawings. In the drawings, the dimensions of certain features may be distorted for clarity.
[0050] In Massive MIMO antennas and / or beamforming antennas, due to uncontrollable errors in the design, manufacture or use of the RF control system (e.g., RRU) or the antenna network, additional circuits are usually required to compensate for the phase difference and / or amplitude difference given by the antenna to the RF signals input at different RF ports. This process is usually called "calibration".
[0051] Typically, the patch radiator and its feeding network can be integrated on a first printed circuit board, while the calibration device is constructed as a second printed circuit board separate therefrom. The calibration device may, for example, include: a dielectric substrate, a microstrip calibration circuit disposed on the upper main surface of the dielectric substrate, and a grounded metal layer disposed on the lower main surface of the dielectric substrate. In other cases, the calibration circuit may be implemented in a printed circuit board including two dielectric substrates, wherein the grounded metal layer may be disposed on the upper surface of the upper dielectric substrate and the lower surface of the lower dielectric substrate, and the calibration circuit is disposed in the metal layer between the two dielectric substrates. In either of the above two cases, an additional connection device, such as a bolt connection, is required to fix the second printed circuit board including the calibration device and the first printed circuit board including the patch radiator to the radiator.
[0052] In order to calibrate the antenna, it is necessary to connect the microstrip calibration circuit on the calibration device to the feeding network of each patch radiator with the help of corresponding conductive elements. As a result, the design of the antenna system becomes complicated and occupies a large space. Therefore, it is necessary to improve the high integration and miniaturization of the entire antenna system.
[0053] Next, the specific construction of the patch antenna according to the present invention will be described in detail with reference to the accompanying drawings.
[0054] Figure 1FIG. 4 shows a schematic side view of a patch antenna according to a first embodiment of the present invention. Figure 1 As shown, the patch antenna 1 includes a multi-layer printed circuit board 2. Figure 1 In the embodiment, the multilayer printed circuit board 2 may have four metal layers separated by three dielectric substrates, and the three dielectric substrates are respectively a first dielectric substrate 201, a second dielectric substrate 202 and a third dielectric substrate 203 from top to bottom. In addition, the patch antenna 1 may also include a fourth dielectric substrate 204 that is separately provided from the multilayer printed circuit board 2, and an array of parasitic metal patch radiators may be provided on the fourth dielectric substrate 204, and these parasitic metal patch radiators are configured to be electrically floating, and their function is to expand the working bandwidth of each patch radiator of the patch antenna 1. In addition, the patch antenna 1 also includes a connecting device 4, which includes a bolt 401, a nut 402, a sleeve 403 and a gasket 404. The connecting device 4 is configured to fix the multilayer printed circuit board 2 and the fourth dielectric substrate 204 together.
[0055] Next, with the help of Figure 2 , 3a , 3b and 4 illustrate in detail the multilayer printed circuit board 2 of the patch antenna according to the first embodiment of the present invention.
[0056] Figure 2 FIG. 2 shows a schematic side view of a multilayer printed circuit board 2 according to a first embodiment of a patch antenna 1 of the present invention. Figure 2 As shown, the multilayer printed circuit board 2 comprises, from top to bottom, a first dielectric substrate 201, a second dielectric substrate 202 and an (optional) third dielectric substrate 203. Each dielectric substrate 201, 202 and 203 has an upper main surface and a lower main surface opposite to the upper main surface.
[0057] A patch radiator array (on the upper main surface of the first dielectric substrate 201) may be provided. Figure 2 ) and a first feed network for the patch radiator array (in Figure 2 A first grounding metal layer 5 is provided between the first dielectric substrate 201 (its lower main surface) and the second dielectric substrate 202 (its upper main surface).
[0058] A corresponding calibration network may be provided on the lower main surface of the second dielectric substrate 202 (at Figure 2 In addition, a second feeding network for the corresponding patch radiator array may also be provided on the lower main surface of the second dielectric substrate 202 (not specifically shown in FIG. 1 ). Figure 2 (not specifically shown). Figure 2As can be seen, the conductive pattern 11 on the second dielectric substrate 202 (which includes a calibration network and a second feeding network) can be electrically connected to the first feeding network on the first dielectric substrate 201 by means of a metallized via PTH (which is schematically shown exaggeratedly here).
[0059] In Figure 2 In an embodiment, a third dielectric substrate 203 is provided, and the third dielectric substrate is located below the second dielectric substrate 202. A second ground metal layer 5' is provided on the lower main surface of the third dielectric substrate 203. Thus, the calibration network and the second feeding network on the lower main surface of the second dielectric substrate 202 are surrounded by the first and second ground metal layers 5 and 5' on both sides respectively, so that the calibration network and the second feeding network are configured as a strip transmission line network. The strip transmission line may be advantageous because they can have reduced radiation signal loss and can shield the RF transmission line from external radiation.
[0060] In other embodiments, the calibration network and the second feeding network on the lower main surface of the second dielectric substrate 202 can also be configured as a microstrip transmission line network. For this purpose, an additional third dielectric substrate 203 is not required. That is to say, the multilayer printed circuit board 2 in the patch antenna 1 according to the first embodiment of the present invention can only include the first dielectric substrate 201 and the second dielectric substrate 202. Here, the third dielectric substrate 203 can be omitted.
[0061] Next, with the help of attached Figure 3a 、 3b and 4, the specific implementation manners in the multilayer printed circuit board 2 in Figure 1 and 2 are introduced in detail.
[0062] Figure 3a 、 3b shows Figure 1 and 2 a schematic circuit diagram of the conductive pattern on the upper main surface of the first dielectric substrate 201 of the multilayer printed circuit board 2 in
[0063] As Figure 3a 、 3b shown, a plurality of patch radiation elements 6 are constructed on the first dielectric substrate 201. Each patch radiation element is respectively composed of a metal patch radiator 7 constructed on the upper main surface of the first dielectric substrate 201 and a metal part corresponding to the patch radiator 7 on the first ground metal layer 5. The patch radiator 7 is configured as a part of the conductive pattern 8 on the upper main surface of the first dielectric substrate 201. Another part of the conductive pattern 8 can be configured as a first feeding network 9 for receiving and transmitting RF signals from and to the corresponding patch radiator 7.
[0064] As Figure 3b As shown, each patch radiator 7 may include a thin metal layer (e.g., a copper layer) which may have any suitable shape, including rectangular, square, or circular. Figure 3a and 3b In the embodiment, each patch radiator 7 is configured as a square radiator, the length and width of which may be equivalent to approximately half of the wavelength corresponding to the center frequency of the operating frequency band targeted by the patch radiator 7 .
[0065] like Figure 3a , 3b As shown, every two adjacent patch radiators 7 in the vertical direction can be configured as a pair of commonly fed patch radiators. The patch radiator 7 can be fed by cross feeding, such as positive and negative 45° feeding. Specifically, in the conductive pattern 8 on the upper main surface of the first dielectric substrate 201, the RF signal from the upstream feeding network reaches the connection terminal 10 in the first feeding network 9 from the upstream, and then is transmitted from the connection terminal 10 to the negative 45° feeding end of one of the patch radiators 7 in the pair of patch radiators 7 via a first length of the feeding line and / or the transmission line. At the same time, it is transmitted from the same connection terminal 10 to the negative 45° feeding end of the other patch radiator 7 in the pair of patch radiators 7 via a second length of the feeding line and / or the transmission line, wherein the first length and the second length may differ by about half of the wavelength corresponding to the center frequency, thereby improving the isolation between adjacent patch radiators 7. The feeding method of the patch radiator 7 at the positive 45° feeding end is the same as the feeding method at the negative 45° feeding end, which will not be described in detail here.
[0066] The thickness and / or dielectric constant of the material of the first dielectric substrate 201 may be selected based on the desired width of the first feed network 9 and the desired bandwidth of the patch radiator 7. The first dielectric substrate 201 may include other functional elements in addition to the patch radiator 7 and the first feed network 9 formed therein and / or mounted thereon, for example, a filter network or active elements (not shown) may be installed.
[0067] The first grounded metal layer 5 may include a continuous or discontinuous metal layer (e.g., a copper layer) formed on the lower main surface of the first dielectric substrate 201. In some embodiments, the first grounded metal layer 5 may include one or more openings, which may extend through the first grounded metal layer 5 and the first dielectric substrate 201 as metallized holes PTH and couple to the conductive pattern 8 on the upper main surface of the first dielectric substrate 201. The metallized holes PTH on the first grounded metal layer 5 may also extend through the second dielectric substrate 202 and couple to the conductive pattern 11 on the lower main surface of the second dielectric substrate 202, such as the calibration network 12 and / or the second feeding network 13 described in detail below.
[0068] Figure 4 A schematic circuit diagram showing the calibration network 12 together with the second feeding network 13 on the lower main surface of the second dielectric substrate 202 of the multilayer printed circuit board 2 of the patch antenna according to the first embodiment of the present invention is shown.
[0069] like Figure 4 As shown, the calibration network 12 is roughly marked with a dotted box, and the calibration network 12 includes a calibration port 121, a transmission line 122 and a power divider 123. The remote radio unit (RRU) inputs the corresponding calibration signal to the calibration port 121 via a cable. Then, the calibration signal is transmitted from the calibration port 121 to each feeding branch in the second feeding network 13 in multiple ways via the corresponding transmission line 122, the power divider 123 and the coupler 14. These feeding branches are electrically coupled to the first feeding network 9 respectively via conductive elements (such as PTH). Figure 4 In the embodiment of FIG. 1 , the coupler 14 is disposed between the calibration network 12 and the second feeding network 13. By means of the coupler 14, the calibration network 12 is electrically coupled to the second feeding network 13. That is, the calibration signal is electrically coupled to the second feeding network 13 via the coupler 14. Figure 4 As shown, the second feeding network 13 may further include a radio frequency port 131 and a transmission line 132. The remote radio frequency unit may read the amplitude and / or phase of the radio frequency signal electrically coupled to the radio frequency port 131 via the coupler 14 from the calibration signal. Thus, the radio frequency control system may be calibrated through the S parameters of the radio frequency port 131 and the calibration port 121. In other words, the radio frequency control system may be calibrated through the amplitude and / or phase of the radio frequency signal on the radio frequency port 131 and the calibration port 121.
[0070] In addition, the remote radio frequency unit can input a radio frequency signal to the corresponding radio frequency port 131. Then, the radio frequency signal is coupled from the radio frequency port 131 to the connection terminal 10 of the corresponding first feeding network 13 via the corresponding transmission line 132 and the metallized hole PTH extending through the second dielectric substrate 202, the first ground metal layer 5 and the first dielectric substrate 201, thereby transmitting the radio frequency signal to the corresponding patch radiator.
[0071] The calibration process can include the following steps:
[0072] First, the remote radio unit transmits the calibration signal to each radio port 131 via the calibration network (calibration port, power division network and coupler);
[0073] Then, the remote radio unit reads the corresponding amplitude and / or phase of the radio frequency signal on each radio frequency port;
[0074] Finally, the remote radio unit performs calibration based on the amplitude and / or phase of the radio frequency signal on the radio frequency port, that is, assigns different amplitude and / or phase weight values to each radio frequency signal.
[0075] In addition, combined Figure 3b and Figure 4 It can be seen that the calibration network 12 also includes a “discontinuous” transmission line 15. Figure 4 One end of the circuit (circled in the figure) is connected to the debugging circuit 15' (circled in the figure) on the upper surface of the first dielectric substrate 201 by means of the first metallized hole PTH. Figure 3b The debugging circuit 15' is connected to one end of the first dielectric substrate 201 (circled in the figure), and the other end of the debugging circuit 15' is connected to the other end of the discontinuous transmission line by means of the second metallized hole PTH. Since the test results of the patch antenna may be different due to the lamination process and the tolerance of the device itself, debugging is required, such as impedance matching or return loss debugging. In some embodiments, the calibration network and the second feeding network can be configured as a strip transmission line network, and these debugging may become difficult due to the closed structure of the strip transmission line. Because the stripline calibration network is provided with grounded metal layers on both sides, it is not easily accessible to the operator. Therefore, it is advantageous to provide an additional debugging circuit 15', because the debugging circuit 15' is constructed on the upper surface of the first dielectric substrate 201 in the form of a microstrip transmission line, so the operator can easily approach the debugging circuit 15', for example, the length, width, etc. of the debugging circuit 15' can be changed to improve impedance matching.
[0076] Next, with the help of Figure 5 A schematic diagram illustrating a second embodiment of a patch antenna according to the present invention.
[0077] like Figure 5 As shown, the patch antenna comprises a multi-layer printed circuit board 2'. Figure 5 In the embodiment of the present invention, the multilayer printed circuit board 2' may include five metal layers and four dielectric substrates, namely, from top to bottom, a first dielectric substrate 201', a second dielectric substrate 202', a third dielectric substrate 203' and a fourth dielectric substrate 204'. The dielectric substrates 201', 202', 203' and 204' respectively have an upper main surface and a lower main surface opposite to the upper main surface.
[0078] A corresponding patch radiator array 8' may be provided on the upper main surface of the first dielectric substrate 201'. A first grounded metal layer 501 is provided between the first dielectric substrate 201' and the second dielectric substrate 202'. Different from the first embodiment, a first feeding network 9' for the patch radiator array is provided between the second dielectric substrate 202' and the third dielectric substrate 203'. A conductive pattern 11' (including a calibration network and a second feeding network) is provided between the third dielectric substrate 203' and the fourth dielectric substrate 204', and a second grounded metal layer 502 may be provided on the lower surface of the fourth dielectric substrate 204'.
[0079] In some embodiments, the first feed network 9' can be electrically connected to the corresponding patch radiator array by means of a metallized hole PTH. In some embodiments, the first feed network 9' can also be electrically connected to the corresponding patch radiator array 8' by means of a probe. The electrical connection method by means of a metallized hole PTH or a probe is also applicable to the connection method between the first feed network 9' and the second feed network 13'. Those skilled in the art can also conceive of any other feasible method to achieve electrical connection between the conductive patterns of each layer.
[0080] In some embodiments, Figure 5 The multilayer printed circuit board 2' in the embodiment may further include a fifth dielectric substrate and a sixth metal layer. In this embodiment, a grounded metal layer may be provided between the third dielectric substrate and the fourth dielectric substrate. A calibration network and a second feed network may be provided between the fourth dielectric substrate and the fifth dielectric substrate. A grounded metal layer may be provided on the lower surface of the fifth dielectric substrate. Thus, the calibration network and the second feed network may be configured as a strip transmission line network.
[0081] It should be understood that the implementation of the patch antenna according to the various embodiments of the present invention can be varied, and the above embodiments are merely exemplary. Advantageously, a patch radiator array, a feeding network, and a calibration network are integrated into a multilayer printed circuit board of an integrated patch antenna array. In some embodiments, more functional networks can be integrated into the multilayer printed circuit board of the patch antenna, wherein the design method, quantity, and arrangement position of the feeding network and the calibration network can be varied. The patch radiator array and the feeding network and / or the calibration network can be arranged on different dielectric substrates, and the dielectric substrate provided with the patch radiator array can be above the dielectric substrate provided with the feeding network and / or the calibration network.
[0082] The integrated patch antenna array according to the various embodiments of the present invention is advantageous: the patch antenna integrates a patch radiator array, a feeding network and a calibration network on a multi-layer printed circuit board, which is conducive to relatively simple electrical connection between them, thereby realizing the integrated and miniaturized design concept of the patch antenna.
[0083] Although some specific embodiments of the present disclosure have been described in detail by way of example, it should be understood by those skilled in the art that the above examples are only for illustration and not for limiting the scope of the present disclosure. The various embodiments disclosed herein may be combined arbitrarily without departing from the spirit and scope of the present disclosure. It should also be understood by those skilled in the art that various modifications may be made to the embodiments without departing from the scope and spirit of the present disclosure.
Claims
1. A patch antenna, comprising: a multilayer printed circuit board, wherein a calibration network for the patch antenna, a patch radiator array, and a feeding network for the patch radiator array are integrated on the multilayer printed circuit board, wherein the multilayer printed circuit board includes, from top to bottom: a first dielectric substrate, a second dielectric substrate, a third dielectric substrate, and a fourth dielectric substrate, wherein each of the first dielectric substrate, the second dielectric substrate, the third dielectric substrate, and the fourth dielectric substrate has an upper main surface and a lower main surface opposite to the upper main surface, wherein the feeding network for the patch radiator array includes a first feeding network and a second feeding network, wherein the patch radiator array is disposed on the upper main surface of the first dielectric substrate, wherein a first ground metal layer is provided between the first dielectric substrate and the second dielectric substrate, wherein a first metal pattern is provided between the second dielectric substrate and the third dielectric substrate, wherein the first metal pattern includes the first feeding network for the patch radiator array, and a second metal pattern is provided between the third dielectric substrate and the fourth dielectric substrate, wherein the second metal pattern includes the calibration network and the second feeding network for the patch radiator array.
2. The patch antenna according to claim 1, wherein, the second metal pattern further includes a coupler configured to electrically couple the calibration network and the second feeding network.
3. The patch antenna according to claim 1, wherein, the second feeding network is electrically connected to the first feeding network via a conductive element that passes through the second dielectric substrate, the first ground metal layer, and the first dielectric substrate.
4. The patch antenna according to claim 2, wherein, the calibration network includes a calibration port, a power divider, and a coupler.
5. The patch antenna according to claim 1, wherein, the second feeding network is electrically connected to the first feeding network via a corresponding conductive element that passes through the third dielectric substrate.
6. The patch antenna according to claim 1, wherein, a second ground metal layer is provided on the lower main surface of the fourth dielectric substrate.
7. The patch antenna according to claim 1, the patch antenna further comprising: an additional dielectric substrate disposed above the multilayer printed circuit board, and a parasitic patch radiator array is provided on the additional dielectric substrate.
8. The patch antenna according to claim 7, wherein, the additional dielectric substrate is mechanically connected to the multilayer printed circuit board via a connecting device.
9. The patch antenna according to claim 1, wherein, the first metal pattern further includes a debugging line, and two end portions of the debugging line are respectively electrically connected to one end of a corresponding transmission line in the calibration network via corresponding conductive elements.
10. A patch antenna, wherein, The patch antenna includes a multilayer printed circuit board, which includes at least a first dielectric substrate, a second dielectric substrate and a third dielectric substrate, wherein the patch radiator array is arranged on the first dielectric substrate, and the calibration network for the patch antenna is arranged on the second dielectric substrate, wherein the first dielectric substrate is above the second dielectric substrate, and the multilayer printed circuit board also includes a feeding network for the patch radiator array, the feeding network includes a first feeding network and a second feeding network, wherein the first feeding network is arranged on the third dielectric substrate, wherein the second feeding network is also arranged on the second dielectric substrate, and the second feeding network is electrically connected to the calibration network via a coupler.
11. The patch antenna according to claim 10, It is characterized in that The calibration network and the second feeding network include strip transmission lines, respectively.
12. The patch antenna according to claim 10, It is characterized in that The calibration network and the second feeding network include microstrip transmission lines respectively.
13. The patch antenna according to claim 10, It is characterized in that The first feeding network includes a stripline transmission line.
14. The patch antenna according to claim 10, It is characterized in that The first feeding network includes a microstrip transmission line.
Citation Information
Patent Citations
Intelligent antenna device
CN204243214U
Patch antenna
CN210006926U