Semantic parsing using encoded structured representations

Abstract

Embodiments of the present application relate to semantic parsing using encoded structured representations. Aspects described herein include a method of semantic parsing and a related system and computer program product. The method includes: receiving an input including a plurality of words; generating a structured representation of the plurality of words; encoding the structured representation into a potential embedding space; and decoding the encoded structured representation from the potential embedding space into a logical representation of the plurality of words.

Description

Technical Field

[0001] Various embodiments of the present application are directed to semantic parsing using structured representations of encodings. Background Art

[0002] The present invention relates to semantic parsing, and more particularly to using encoded structured representations of text within semantic parsing.

[0003] Semantic parsing is the task of translating natural language text into a machine-interpretable representation of the meaning of the natural language text, such as a logical form or an executable query. Semantic parsing plays an important role in question answering systems, deep learning systems, etc. In semantic parsing, the meaning of a natural language text can be represented as a structured object, such as a tree structure. However, many neural semantic parsers tend to only consider word sequence information, while ignoring the grammatical information that structured objects can present. Summary of the invention

[0004] According to one embodiment of the present invention, a method of semantic parsing includes: receiving an input comprising multiple words; generating a structured representation of the multiple words; encoding the structured representation into a latent embedding space; and decoding the encoded structured representation from the latent embedding space into a logical representation of the multiple words.

[0005] According to another embodiment of the present invention, a system includes one or more computer processors configured to perform operations for semantic parsing. The operations include: receiving an input including a plurality of words; generating a structured representation of the plurality of words; encoding the structured representation into a latent embedding space; and decoding the encoded structured representation from the latent embedding space into a logical representation of the plurality of words.

[0006] According to another embodiment of the present invention, a computer program product includes a computer-readable storage medium, the computer-readable storage medium containing a computer-readable program code. The computer-readable program code is executable by one or more computer processors to perform operations for semantic parsing. The operations include: receiving an input including a plurality of words; generating a structured representation of the plurality of words; encoding the structured representation into a potential embedding space; and decoding the encoded structured representation from the potential embedding space into a logical representation of the plurality of words. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 is a block diagram illustrating an exemplary system capable of performing semantic parsing according to one or more embodiments;

[0008] Figure 2 is a block diagram illustrating an exemplary graph encoder and tree decoder according to one or more embodiments;

[0009] Figure 3 is an exemplary method of performing semantic parsing according to one or more embodiments;

[0010] Figure 4 is a diagram illustrating dependencies included in an exemplary graph according to one or more embodiments;

[0011] Figure 5 is a diagram showing a selection area included in an exemplary diagram according to one or more embodiments; and

[0012] Figure 6 is a block diagram illustrating exemplary operations of a graph encoder and a tree decoder according to one or more embodiments. DETAILED DESCRIPTION

[0013] The description of various embodiments of the present invention has been given for the purpose of illustration and is not intended to be exhaustive or limited to the disclosed embodiments. Many modifications and variations will be clear to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terms used herein are selected to best explain the principles of the embodiments, practical applications, or technical improvements to technologies found on the market, or to enable other persons of ordinary skill in the art to understand the embodiments disclosed herein.

[0014] In the following, reference is made to the embodiments presented in the present disclosure. However, the scope of the present disclosure is not limited to the specifically described embodiments. On the contrary, it is contemplated that any combination of the following features and elements (whether or not related to different embodiments) can realize and practice the contemplated embodiments. In addition, although the embodiments disclosed herein can achieve advantages over other possible solutions or prior art, whether a specific advantage can be achieved by a given embodiment does not limit the scope of the present disclosure. Therefore, the following aspects, features, embodiments and advantages are merely exemplary and are not considered to be elements or limitations of the appended claims unless explicitly stated in the claims. Similarly, reference to the "present invention" should not be interpreted as a summary of any inventive subject matter disclosed herein, and should not be regarded as elements or limitations of the appended claims unless explicitly stated in the claims.

[0015] Aspects of the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment (including firmware, resident software, microcode, etc.), or an embodiment combining software and hardware aspects, which may generally be collectively referred to herein as a "circuit," "module," or "system."

[0016] The embodiments discussed herein generally relate to a neural semantic parser based on a graph neural network (GNN) that considers grammatical information presented in a structured object of a meaning representation. The semantic parser can be implemented as a graph to tree (or "Graph2Tree") semantic parser. In some embodiments, the semantic parser includes a graph encoder that learns from a grammatical graph constructed from a word sequence and a corresponding dependency parse tree, a constituency parse tree, or an abstract meaning representation. The semantic parser also includes a tree decoder that captures the structure of the logical form from the vector representation of the learned graph. Some embodiments also include an attention mechanism for learning soft alignment between the grammatical graph and the logical form. Advantageously, by using the grammatical information contained in the grammatical graph, the performance of the semantic parser is improved compared to existing methods such as sequence to sequence ("Seq2Seq"), sequence to tree ("Seq2Tree"), and graph to sequence ("Graph2Seq") models.

[0017] Figure 1 is a block diagram illustrating an exemplary system 100 capable of performing semantic parsing according to one or more embodiments. System 100 includes one or more processors 105, and memory 110. One or more processors 105 may be implemented in any suitable form, such as a general-purpose microprocessor, a controller, an application-specific integrated circuit (ASIC), etc. Memory 110 may include various computer-readable media selected for their size, relative performance or other capabilities: volatile and / or non-volatile media, removable and / or non-removable media, etc. In addition, one or more processors 105 and / or memory 110 may be included in a single computing device, or may be distributed between multiple communicatively coupled computing devices.

[0018] Memory 110 may include one or more "modules" or "sub-modules" for performing the various functions described herein. In one embodiment, each module or sub-module includes program code executable by one or more processors 105. However, other embodiments may have functionality implemented partially or completely in hardware (i.e., circuitry) or firmware of system 100. As shown, system 100 includes parsing module 115, graph generation module 120, and graph to tree module 125, although other combinations of the described functions are also contemplated.

[0019] Parsing module 115 receives natural language text and generates a structural (hierarchical) representation of the natural language text. In some embodiments, parsing module 115 generates one of a dependency parse tree, a constituency parse tree, and an abstract meaning representation (AMR) from the natural language text. Parsing module 115 may include additional functions, such as processing natural language text to generate tokens from character sequences, checking the correct syntax of the natural language text, and the like.

[0020] The graph generation module 120 receives the structural representation from the parsing module 115 and constructs (or otherwise generates) a grammatical graph from the structural representation. The grammatical graph can be represented in the form of G=(V, E), where V represents a set of vertices and E represents a set of ordered vertex pairs. The set of vertices V can correspond to a set of words included in a natural language text, and in some cases can also correspond to punctuation marks, stems, and affixes, etc. The set of ordered vertex pairs E can reflect the head-related relationships and grammatical relationships between the elements included in the set of vertices V. In other embodiments, the graph generation module 120 constructs an AMR graph (e.g., a semantic graph for representing a structural representation).

[0021] The graph to tree module 125 includes a graph encoder 130 that encodes the syntax graph into a vector representation. In some embodiments, the graph encoder 130 is an inductive node embedding algorithm. The inductive node embedding algorithm can generate bidirectional node embeddings (i.e., forward and backward embeddings). Each node embedding learns its vector representation by aggregating information from the node's local neighborhood (e.g., within K hops within the graph).

[0022] The graph-to-tree module 125 also includes a tree decoder 135 that learns a logical form conditioned on the graph-level vector representation provided by the graph encoder. In some embodiments, the tree decoder 135 defines multiple tokens, such as "nonterminal" for starting decoding a subtree. <n>Tokens and special tokens indicating the end of a sequence. In some embodiments, the tree decoder 135 uses a long short-term memory (LSTM) unit to decode the logical form of the subtree until a special token is encountered. The tree decoder 135 can generate parts of the logical form by conditioning on the hidden representation of the corresponding non-terminal node. In order to make full use of the information stored in each non-terminal node, the tree decoder 135 can use a parent feeding scheme to provide additional inputs of the non-terminal node embedding to be enhanced with the input and fed into the LSTM unit. In some embodiments, the tree decoder 135 uses one or more attention mechanisms to incorporate the hidden vectors of the input into the decoding process. Although the discussion of the tree decoder 135 focuses on implementations with LSTM units, other implementations may use other decoders for structured outputs, such as modular decoders.

[0023] The system 100 also includes an input device 140 communicatively coupled to the one or more processors 105. In some embodiments, natural language text for semantic parsing is provided via the input device 140. The input device 140 can be implemented in any suitable form, such as a keyboard or touch screen that receives natural language text from a user input, an external computing device coupled to the one or more processors 105 via one or more networks, and the like. Therefore, in some embodiments, the input device 140 can be integrated with the one or more processors 105 and the memory 110. In other embodiments, the input device 140 can be external to the one or more processors 105 and / or the memory 110. In the case where the input device 140 is implemented using an external computing device, the input device 140 can store natural language text, can perform speech recognition processing from a microphone or an audio file, and the like.

[0024] The system 100 also includes a display device 145 that displays a visual interface to the user. The display device 145 can be implemented with any suitable display technology: light emitting diode (LED), organic LED (OLED), cathode ray tube (CRT), liquid crystal display (LCD), plasma, electroluminescence (EL), etc. In some embodiments, the display device 145 is integrated with one or more processors 105 and memory 110 (e.g., a display of a laptop, tablet computer, smart phone). In other embodiments, the display device 145 is external to the one or more processors 105 and memory 110, such as an external display that is integrated with or external to the input device 140.

[0025] In some embodiments, display device 145 displays input provided via input device (e.g., natural language text including a plurality of words), and a logical representation of the plurality of words (e.g., determined using graph to tree module 125). A user may provide feedback regarding the accuracy of the logical representation via input device 140. In some embodiments, feedback provided by a user may adjust the construction of the grammar graph, as some iterations of graph construction may perform better or worse than others.

[0026] Figure 2 is a block diagram 200 illustrating an exemplary graph encoder 130 and tree decoder 135 in accordance with one or more embodiments. Figure 2 The features shown may be used in combination with other embodiments.

[0027] The graph encoder 130 includes a node embedding submodule 205 that determines a node embedding 220. In some embodiments, the node embedding submodule 205 implements a bidirectional embedding model such that the node embedding 220 includes a forward and a backward embedding. In some embodiments, the node embedding submodule 205 receives a graph G = (V, E) and generates feature vectors for all nodes from the text attributes of v using, for example, an LSTM unit. In another embodiment, by looking up the embedding matrix W k Convert the text attribute of node v into feature vector a v . Eigenvector a v can be used as an initial iteration of node embedding 220, which can be expressed as:

[0028] The node embedding submodule 205 can classify the neighbors of node v into forward neighbors according to the edge direction. and the backward neighbors In other words, Returns the node that node v is directed to. Returns the node that is directed to node v.

[0029] The node embedding submodule 205 can embed the forward neighbors The forward representation of is aggregated into a single vector: where k∈{1,…,K} represents the iteration index, represents the forward aggregator function. The node embedding submodule 205 can The current forward representation of Cascade, which can be expressed as The node embedding submodule 205 uses a nonlinear activation function σ to convert the concatenated vector is fed into the fully connected layer 210 of the graph encoder 130, which can be expressed as: This will update the next iteration The forward representation of node v used in .

[0030] The node embedding submodule 205 can be based on To update the backward representation of node v, represents the backward aggregator function, and The current backward representation of the neighborhood vector Cascade, which can be expressed as The node embedding submodule 205 feeds the concatenated vector into the fully connected layer 210 using a nonlinear activation function σ, which can be expressed as: This will update the next iteration The forward representation of node v used in .

[0031] After computing the forward representation and backward representation of node v K times, the concatenation of the final forward representation and backward representation can be used as the final bidirectional representation of node v: Since neighbor information from different hops of the graph may affect node embeddings differently, a different aggregator can be determined at each iteration.

[0032] The graph encoder 130 also includes a pooling submodule 215 that performs an aggregation function on the node embeddings 220 to generate a graph embedding 225. The vectors of each node's neighbors have been fed through the fully connected layer 210, and the pooling submodule 215 applies an element-wise max pooling operation: Where max represents an element-wise maximum operator. By applying max pooling, the graph encoder 130 can capture different information across neighborhood sets. In other embodiments, the pooling submodule 215 can be replaced with other aggregation functions, such as attention-based aggregation functions.

[0033] The tree decoder 135 receives the node embedding 220 and the graph embedding 225. The tree decoder 135 outputs a logical representation 235 of a plurality of words of the natural language text.

[0034] The tree decoder 135 includes a plurality of LSTM units 230-1, 230-2, ..., 230-N. In some embodiments, the plurality of LSTM units 230-1, 230-2, ..., 230-N are arranged in a plurality of stages, so that a first portion of the plurality of LSTM units 230-1, 230-2, ..., 230-N performs decoding in a first stage, and a second portion of the plurality of LSTM units 230-1, 230-2, ..., 230-N performs decoding in a second stage downstream of the first stage.

[0035] In some embodiments, the first part of the decoding graph embedding 225 of the plurality of LSTM units 230-1, 230-2, ..., 230-N stops decoding when encountering a special token indicating the end of the sequence. In some embodiments, the first part of the plurality of LSTM units 230-1, 230-2, ..., 230-N generates a portion of the logical form by conditioning on the hidden representation of the corresponding non-terminal node. In order to make full use of the information of the non-terminal node, the parent feeding scheme can provide other inputs of the non-terminal node embedding to be enhanced with the input and fed into the second part of the plurality of LSTM units 230-1, 230-2, ..., 230-N.

[0036] Figure 3 is an exemplary method 300 for performing semantic parsing according to one or more embodiments. The method 300 may be performed in conjunction with other embodiments, for example, using Figure 1 system 100.

[0037] Method 300 begins at block 305, where the system receives input including a plurality of words. At block 315, the system generates a structured representation of the plurality of words. In some embodiments, the structured representation is one of a dependency parse tree, a constituency parse tree, and an abstract meaning representation.

[0038] At block 325, the system encodes the structured representation into a latent embedding space. In some embodiments, encoding the structured representation includes encoding the syntax graph into a vector representation including bidirectional node embeddings.

[0039] At box 335, the system decodes the encoded structural representation from the potential embedding space into a logical representation of multiple words. In some embodiments, the decoding of the encoded structural representation is performed using multiple LSTM units. At box 345, the system displays the input and the logical representation. In some embodiments, the user input can provide feedback on the accuracy of the logical representation. After box 345 is completed, method 300 ends.

[0040] Figure 4 is a diagram 400 illustrating dependencies included in an exemplary graph in accordance with one or more embodiments. More specifically, diagram 400 illustrates a dependency parse tree of a reference word sequence. Figure 4 The features shown may be used in combination with other embodiments.

[0041] In diagram 400, word sequence 410 provides corresponding nodes 415-1, ..., 415-6 for each word of the input text ("are there ada jobs outside austin"). Node 415-1 is connected to node 415-2, which is connected to node 415-3, and so on.

[0042] Dependencies 405 indicating a grammatical relationship between two words of a word sequence 410 are shown. Dependencies 405 include an exclusive (expl) dependency associated with nodes 415-1, 415-2 ("are", "there"), a nominal subject (nsubj) dependency associated with nodes 415-1, 415-4 ("are", "jobs"), a nominal modifier (nmod) dependency associated with nodes 415-4, 415-6 ("jobs", "austin"), a compound dependency associated with nodes 415-4, 415-3 ("jobs", "ada"), and a case label (case) dependency associated with nodes 415-6, 415-5 ("austin", "outside"). Each dependency 405 can have its label converted to a corresponding node included in the grammar graph with nodes 415-1, ..., 415-6.

[0043] Figure 5 5 is a diagram 500 illustrating a selection included in an exemplary diagram according to one or more embodiments. More specifically, diagram 500 illustrates a selection tree of reference word sequence 410. Figure 5 The features shown may be used in combination with other embodiments.

[0044] In diagram 500, a selection 505 is shown for indicating phrase structure information included in word sequence 410. Within the first level (level 1), "are" is represented as VBP (non-third person singular verb), "there" is represented as EX (existential "there"), "ada" is represented as FW (foreign word), "jobs" is represented as NNS (plural noun), "outside" is represented as IN (preposition), and "austin" is represented as NN (noun).

[0045] In the second level (Level 2), EX is linked to the first noun phrase (NP), FW and NNS are linked to the second NP, and NN is linked to the third NP. In the third level (Level 3), IN and the third NP are linked to the first prepositional phrase (PP). In the fourth level, the second NP and the first PP are linked to the second PP. In the fifth level, VBP, the first NP, and the second PP are linked to the question (SQ). Then, SQ is linked to the root level (ROOT).

[0046] Figure 6 is a block diagram 600 illustrating exemplary operation of the graph encoder 130 and the tree decoder 135 in accordance with one or more embodiments. Figure 6 The features shown can be used in combination with other embodiments, for example, using Figure 1 The system 100 is executed.

[0047] The system receives input 605 including a plurality of words ("are there ada jobs outside austin"). The system parses input 605 and determines dependencies 610 between the words. The system constructs a graph 615 from dependencies 610. As shown, graph 615 includes nodes for each word and each dependency, which are arranged at different hops.

[0048] The system generates a bidirectional node embedding 620 (an example of the node embedding 220) from the graph 615. As shown, for each node, the bidirectional node embedding 620 includes a concatenation of the forward representation and the backward representation of the node. The bidirectional node embedding 620 is fed through the fully connected (FC) layer 210 of the graph neural network, and an element-wise max pooling operation is performed on the bidirectional node embedding 620 to generate the graph embedding 225.

[0049] The tree decoder 135 receives the graph embedding 225. The tree decoder 135 decodes the logical form corresponding to the portion of the logical form t at depth 1 of the subtree using LSTM units until a special token is encountered. The tree decoder 135 also generates portions of the logical form by conditioning on the hidden representation of the corresponding non-terminal node. In order to fully utilize the information of the non-terminal nodes, a parent feeding scheme is adopted to provide additional input of the non-terminal node embedding to enhance the input and feed into the LSTM.

[0050] In some embodiments, the tree decoder 135 includes an attention mechanism for determining the alignment between the graph 615 and the logical representation generated by the tree decoder 135. The attention mechanism can incorporate the input hidden vector into the decoding performed by the tree decoder 135. In some embodiments, the tree decoder 135 determines the context vector 625 (denoted as s j ), the context vector 625 depends on the set of node representations (h1, ..., h2) to which the graph encoder 130 maps the input graph 615. V ).

[0051] In some embodiments, the tree decoder 135 computes separate attention mechanisms on the node representations corresponding to the original word tokens and the parse tree nodes to compute the final context vector 630 (represented as hidden state ) to decode the output of the tree structure. Hidden state where d J (∑α i s i +∑α j S j ). The model can be jointly trained to maximize the conditional log-probability of the correct description given a grammatical graph G.

[0052] The present invention may be a system, method and / or computer program product. The computer program product may include a computer-readable storage medium having computer-readable program instructions thereon for causing a processor to execute various aspects of the present invention.

[0053] A computer-readable storage medium may be a tangible device that can hold and store instructions used by an instruction execution device. A computer-readable storage medium may be, for example, but not limited to, an electrical storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the foregoing. More specific examples of computer-readable storage media (a non-exhaustive list) include: a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a static random access memory (SRAM), a portable compact disk read-only memory (CD-ROM), a digital versatile disk (DVD), a memory stick, a floppy disk, a mechanical encoding device, such as a punch card or a raised structure in a groove on which instructions are stored, and any suitable combination of the foregoing. As used herein, a computer-readable storage medium is not to be interpreted as a transient signal per se, such as a radio wave or other freely propagating electromagnetic wave, an electromagnetic wave propagating through a waveguide or other transmission medium (e.g., a light pulse through a fiber optic cable), or an electrical signal transmitted through a wire.

[0054] The computer-readable program instructions described herein can be downloaded from a computer-readable storage medium to each computing / processing device, or downloaded to an external computer or external storage device via a network, such as the Internet, a local area network, a wide area network, and / or a wireless network. The network can include copper transmission cables, optical fiber transmissions, wireless transmissions, routers, firewalls, switches, gateway computers, and / or edge servers. The network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards the computer-readable program instructions for storage in the computer-readable storage medium in each computing / processing device.

[0055] The computer-readable program instructions for performing the operation of the present invention may be assembler instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state setting data, or source code or object code written in any combination of one or more programming languages ​​(including object-oriented programming languages, such as Smalltalk, C++, etc.; and conventional process programming languages, such as "C" programming language or similar programming languages). The computer-readable program instructions may be executed as follows: entirely on the user's computer, partially on the user's computer, as an independent software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the latter case, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (for example, via the Internet using an Internet service provider). In some embodiments, an electronic circuit system including, for example, a programmable logic circuit system, a field programmable gate array (FPGA), or a programmable logic array (PLA) may execute computer-readable program instructions to personalize the electronic circuit system to perform various aspects of the present invention by utilizing the state information of the computer-readable program instructions.

[0056] Various aspects of the present invention are described herein with reference to the flow charts and / or block diagrams of the methods, devices (systems) and computer program products according to embodiments of the present invention. It should be understood that each box of the flow chart and / or block diagram and the combination of each box in the flow chart and / or block diagram can be implemented by computer-readable program instructions.

[0057] These computer-readable program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, thereby producing a machine, so that when these instructions are executed by the processor of the computer or other programmable data processing device, a device that implements the functions / actions specified in one or more boxes in the flowchart and / or block diagram is generated. These computer-readable program instructions can also be stored in a computer-readable storage medium, and these instructions cause the computer, programmable data processing device, and / or other equipment to work in a specific manner, so that the computer-readable medium storing the instructions includes a manufactured product, which includes instructions for implementing various aspects of the functions / actions specified in one or more boxes in the flowchart and / or block diagram.

[0058] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device so that a series of operating steps are performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, thereby causing the instructions executed on the computer, other programmable data processing apparatus, or other device to implement the functions / actions specified in one or more boxes in the flowchart and / or block diagram.

[0059] The flow chart and block diagram in the accompanying drawings show the possible architecture, function and operation of the system, method and computer program product according to multiple embodiments of the present invention. In this regard, each square box in the flow chart or block diagram can represent a part of a module, program segment or instruction, and a part of the module, program segment or instruction includes one or more executable instructions for realizing the specified logical function. In some alternative implementations, the function marked in the square box can also occur in a sequence different from that marked in the accompanying drawings. For example, two continuous square boxes can actually be executed substantially in parallel, and they can sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each square box in the block diagram and / or flow chart, and the combination of the square boxes in the block diagram and / or flow chart can be implemented with a dedicated hardware-based system that performs the specified function or action, or can be implemented with a combination of special hardware and computer instructions.

[0060] While the foregoing is directed to embodiments of the present invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof, and the scope of the invention is determined by the claims that follow.< / n>

Claims

1. A method for semantic parsing, the method comprising: receiving input comprising a plurality of words; generating a structured representation of the plurality of words, wherein generating the structured representation comprises generating a graph comprising semantic information and grammatical information of the plurality of words; Encoding the structured representation into a latent embedding space, wherein encoding the structured representation comprises: generating a bidirectional node embedding for each of a plurality of nodes of the graph; and generating a graph embedding from the bidirectional node embedding; and The encoded structured representation from the latent embedding space is decoded into a logical representation of the plurality of words.

2. The method of claim 1 , wherein generating the graph comprises: determining a word sequence of the plurality of words; as well as At least one of a dependency parse tree, a constituency parse tree, and an abstract meaning representation graph that is referenced to the word sequence is determined.

3. The method of claim 1, wherein generating the graph embedding comprises one of: performing a max pooling operation on the node embeddings; and Attention-based aggregation is performed on the node embeddings.

4. The method of claim 1 , wherein decoding the encoded structured representation comprises: An attention mechanism is used to determine the alignment between the graph and the logical representation.

5. The method according to claim 1, further comprising: The input and the logical representation are displayed.

6. The method of claim 1, wherein generating the bidirectional node embedding comprises: For each node of the plurality of nodes, classifying each neighboring node of the node as one of a forward neighbor and a backward neighbor; In multiple iterations, aggregating the forward neighbors corresponding to the multiple nodes into a first vector; as well as In the plurality of iterations, the backward neighbors corresponding to the plurality of nodes are aggregated into a second vector.

7. The method of claim 6, wherein generating the bidirectional node embedding further comprises: For each iteration of the plurality of iterations: concatenating a current forward representation of the node with a first neighborhood vector to provide a first concatenated vector; as well as The current backward representation of the node is concatenated with a second neighborhood vector to provide a second concatenated vector.

8. The method of claim 7, wherein generating the bidirectional node embedding further comprises: updating the current forward representation of the node by feeding the first concatenated vector into a fully connected layer with a non-linear activation function; as well as The current backward representation of the node is updated by feeding the second concatenated vector into the fully connected layer.

9. The method according to claim 8, wherein updating the current forward representation of the node and updating the current backward representation of the node occurs at each iteration before a final iteration of the plurality of iterations, and Wherein generating the bidirectional node embedding further comprises: At the final iteration, a final forward representation of the node is concatenated with a final backward representation of the node.

10. The method according to claim 6, Wherein for each iteration in the plurality of iterations, different aggregators are used when aggregating the forward neighbors and when aggregating the backward neighbors.

11. The method of claim 1 , wherein generating the graph embedding comprises: The bidirectional node embeddings are aggregated using one of the following: an element-wise max pooling operation, or an attention-based aggregation function.

12. A system comprising: One or more computer processors configured to perform operations for semantic parsing, the operations comprising: receiving input comprising a plurality of words; generating a structured representation of the plurality of words, wherein generating the structured representation comprises generating a graph comprising semantic information and grammatical information of the plurality of words; Encoding the structured representation into a latent embedding space, wherein encoding the structured representation comprises: generating a bidirectional node embedding for each of a plurality of nodes of the graph; and generating a graph embedding from the bidirectional node embedding; and The encoded structured representation from the latent embedding space is decoded into a logical representation of the plurality of words.

13. The system of claim 12, wherein generating the graph comprises: determining a word sequence of the plurality of words; as well as At least one of a dependency parse tree, a constituency parse tree, and an abstract meaning representation graph that is referenced to the word sequence is determined.

14. The system of claim 12, wherein generating the graph embedding comprises one of: performing a max pooling operation on the node embeddings; and Attention-based aggregation is performed on the node embeddings.

15. The system of claim 12, wherein decoding the encoded structured representation comprises: An attention mechanism is used to determine the alignment between the graph and the logical representation.

16. The system of claim 12, further comprising: The input and the logical representation are displayed.

17. A computer-readable storage medium having computer-readable program code embodied therewith, the computer-readable program code being executable by one or more computer processors to perform operations for semantic parsing, the operations comprising the steps in the method according to any one of claims 1 to 11.

18. A computer system comprising modules configured to perform the steps of the method according to any one of claims 1 to 11.

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