Automatic identification of power supply type multi-power equalizer energy-saving acquisition equipment and control method

Abstract

The present invention discloses an energy-saving acquisition device for a multi-power equalizer capable of automatically identifying power supply types, including a multi-power equalization control circuit for realizing switching between three power supply modes: mains power supply, solar power supply, and battery power supply; an automatic power supply type detection circuit for detecting the current power supply mode; and a CPU module, which is respectively connected to the multi-power equalization control circuit and the automatic power supply type detection circuit for realizing automatic switching between different power supply modes. The present invention can solve the deficiencies of the prior art and achieve the purpose of saving energy consumption and reducing costs.

Description

Technical Field

[0001] The invention belongs to the technical field of data communication, and in particular is an energy-saving acquisition device for a multi-power equalizer that automatically identifies power supply types and a control method. Background Art

[0002] At present, data acquisition equipment generally adopts a single power supply method, and the equipment installation conditions in different regions are different, especially how to get power for the equipment has caused great trouble, and a single power supply method is difficult to adapt to the complex equipment installation conditions on site. Therefore, it is also necessary to redevelop equipment with different power supply methods for different sites, which not only wastes R&D costs, but also increases the cost of on-site equipment debugging. Summary of the invention

[0003] The technical problem to be solved by the present invention is to provide an energy-saving acquisition device and a control method for a multi-power equalizer that automatically identifies power supply types, which can solve the shortcomings of the existing technology and achieve the purpose of saving energy consumption and reducing costs.

[0004] The content of the present invention includes:

[0005] Multi-power balancing control circuit, used to switch between three power supply modes: mains power supply, solar power supply and battery power supply;

[0006] Automatic identification of power supply type detection circuit, used to detect the current power supply mode;

[0007] The CPU module is respectively connected to the multi-power supply balance control circuit and the automatic identification power supply type detection circuit for communication, so as to realize automatic switching of different power supply modes.

[0008] Preferably, the multi-power balancing control circuit includes a mains power supply end, a solar power supply end and a battery power supply end. The solar power supply end is connected in series with a third diode and a second MOS tube, connected in parallel with the power supply end, and then connected to the power supply output end through a first diode. The battery power supply end is connected to the power supply output end through a first MOS tube and a third MOS tube connected in series.

[0009] Preferably, the gate of the third MOS tube is connected to the emitter of the fourth transistor, the collector of the fourth transistor is grounded, and the base of the fourth transistor is connected to the control signal terminal through the thirty-seventh diode.

[0010] Preferably, the battery power supply end is connected to the first pin of the logic OR gate chip through a button, the fourth pin of the logic OR gate chip is connected to the base of the fifth transistor, and the collector of the fifth transistor is connected to the gate and source of the first MOS tube.

[0011] Preferably, the second pin of the logic OR gate chip is connected to the latch memory signal terminal on the CPU module.

[0012] Preferably, the fifth pin of the logic OR gate chip is connected to the battery power supply terminal through a seventh diode, and the battery power supply terminal is grounded through an eighth capacitor.

[0013] Preferably, the third pin of the logic OR gate chip is connected to the second pin of the logic OR gate chip through the seventy-fifth capacitor and the twentieth resistor connected in parallel, and the third pin of the logic OR gate chip is grounded.

[0014] Preferably, a negative temperature coefficient thermistor is provided between the first diode and the power output terminal, and the first diode and the negative temperature coefficient thermistor are grounded via an electrolytic capacitor.

[0015] Preferably, the automatic identification power supply type detection circuit includes the following three detection sub-circuits:

[0016] The first detection subcircuit

[0017] The mains power supply signal terminal is connected to the base of the first transistor through a fourth voltage-stabilizing diode and a fourth resistor connected in series, the emitter of the first transistor is grounded, the base and emitter of the first transistor are connected through a fifth resistor, the collector of the first transistor is connected to a high level, and the collector of the first transistor is connected to the mains power supply detection terminal of the CPU module;

[0018] The second detection subcircuit

[0019] The solar power supply signal terminal is connected to the base of the third triode through the sixth voltage-stabilizing diode and the tenth resistor connected in series, the emitter of the third triode is grounded, the base and emitter of the third triode are connected through the eleventh resistor, the collector of the third triode is connected to the high level, and the collector of the third triode is connected to the solar power supply detection terminal of the CPU module;

[0020] The third detection sub-circuit

[0021] The battery power signal terminal is connected to the base of the second transistor through the fifth voltage-stabilizing diode and the seventh resistor connected in series, the emitter of the second transistor is grounded, the base and emitter of the second transistor are connected through the eighth resistor, the collector of the second transistor is connected to a high level, and the collector of the second transistor is connected to the battery power detection terminal of the CPU module.

[0022] A control method for the above-mentioned automatic identification of power supply type multi-power equalizer energy-saving collection device includes the following steps: the multi-power equalization control circuit has three power supply modes: mains power supply, solar power supply and battery power supply. The default state is mains power supply. At this time, solar power supply and battery power supply are in a disconnected state. When it is inconvenient to take the mains power or the mains power is off on site, the CPU module determines whether to turn on the solar power supply according to the clock time and the local weather conditions through its own network. If the mains power outage time is during the day, that is, from 9 am to 4 pm and the weather is sunny, the solar power supply will be turned on. If the above conditions are not met, it will switch to battery power supply;

[0023] The current power supply status is automatically identified by the automatic power supply type detection circuit and sent to the CPU module.

[0024] The beneficial effects of the present invention are: the present invention can be compatible with mains power supply, solar power supply, and battery power supply without affecting each other, and through the intelligent management of the CPU module, automatically identify and switch the power supply type, thereby achieving intelligent energy saving and seamless power supply, ensuring that the equipment is compatible with installation sites with different power supply types, thereby reducing the debugging cost and ensuring normal debugging. In addition, the battery power supply circuit has a state automatic latch memory function and strong anti-interference ability. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 It is a schematic diagram of the present invention.

[0026] Figure 2 It is a circuit diagram of the multi-power supply balancing control circuit of the present invention.

[0027] Figure 3 This is a circuit diagram of the first detection sub-circuit of the present invention.

[0028] Figure 4 is a circuit diagram of the second detection sub-circuit of the present invention.

[0029] Figure 5 is a circuit diagram of the third detection sub-circuit of the present invention. DETAILED DESCRIPTION

[0030] Reference Figure 1-5 , a multi-power equalizer energy-saving acquisition device for automatically identifying power supply types, comprising,

[0031] A multi-power balancing control circuit 1 is used to realize the switching of three power supply modes: mains power supply, solar power supply and battery power supply;

[0032] Automatic identification of power supply type detection circuit 2, used to detect the current power supply mode;

[0033] The CPU module 3 is respectively connected to the multi-power supply balance control circuit 1 and the automatic power supply type detection circuit 2 for communication, so as to realize automatic switching of different power supply modes.

[0034] The multi-power balancing control circuit 1 includes a mains power supply terminal AC-DC, a solar power supply terminal Solar Energy and a battery power supply terminal Battery. The solar power supply terminal Solar Energy is connected in series with a third diode D3 and a second MOSFET Q2, and then connected in parallel with the mains power supply terminal AC-DC, and then connected to a power output terminal VCC through a first diode D1. The battery power supply terminal Battery is connected to the power output terminal VCC through a first MOSFET Q1 and a third MOSFET Q3 connected in series.

[0035] The gate of the third MOS transistor Q3 is connected to the emitter of the fourth transistor N4, the collector of the fourth transistor N4 is grounded, and the base of the fourth transistor N4 is connected to the control signal terminal VDD through the thirty-seventh diode D37.

[0036] The battery power supply terminal Battery is connected to the first pin of the logic OR gate chip U33 through the button SW6, the fourth pin of the logic OR gate chip U33 is connected to the base of the fifth transistor N5, and the collector of the fifth transistor N5 is connected to the gate and source of the first MOS tube Q1.

[0037] The second pin of the logic OR gate chip U33 is connected to the latch memory signal terminal BAT_KEEP on the CPU module 3 .

[0038] The fifth pin of the logic OR gate chip U33 is connected to the battery power supply terminal Battery through the seventh diode D7, and the battery power supply terminal Battery is grounded through the eighth capacitor C8.

[0039] The third pin of the logic OR gate chip U33 is connected to the second pin of the logic OR gate chip U33 through the seventy-fifth capacitor C75 and the twentieth resistor R20 connected in parallel, and the third pin of the logic OR gate chip U33 is grounded.

[0040] A negative temperature coefficient thermistor NTC1 is provided between the first diode D1 and the power output terminal VCC, and the first diode D1 and the negative temperature coefficient thermistor NTC1 are grounded via an electrolytic capacitor EC1.

[0041] The automatic identification power supply type detection circuit 2 includes the following three detection sub-circuits:

[0042] The first detection subcircuit

[0043] The mains power supply signal terminal AC_DET is connected to the base of the first transistor N1 through a fourth voltage stabilizing diode D4 and a fourth resistor R4 connected in series, the emitter of the first transistor N1 is grounded, the base and emitter of the first transistor N1 are connected through a fifth resistor R5, the collector of the first transistor N1 is connected to a high level, and the collector of the first transistor N1 is connected to the mains power supply detection terminal AC_STAT of the CPU module 3;

[0044] The second detection subcircuit

[0045] The solar power supply signal terminal SUN_DET is connected to the base of the third transistor N3 through the sixth voltage stabilizing diode D6 and the tenth resistor R10 connected in series, the emitter of the third transistor N3 is grounded, the base and emitter of the third transistor N3 are connected through the eleventh resistor R11, the collector of the third transistor N3 is connected to the high level, and the collector of the third transistor N3 is connected to the solar power supply detection terminal SUN_STAT of the CPU module 3;

[0046] The third detection sub-circuit

[0047] The battery power signal terminal Battery_DET is connected to the base of the second transistor N2 through the fifth voltage-stabilizing diode D5 and the seventh resistor R7 connected in series, the emitter of the second transistor N2 is grounded, the base and emitter of the second transistor N2 are connected through the eighth resistor R8, the collector of the second transistor N2 is connected to a high level, and the collector of the second transistor N2 is connected to the battery power detection terminal Battery_STAT of the CPU module 3.

[0048] A control method for the above-mentioned automatic identification of power supply type multi-power equalizer energy-saving collection device includes the following steps: the multi-power equalization control circuit 1 has three power supply modes: mains power supply, solar power supply and battery power supply. The default state is mains power supply. At this time, the solar power supply and the battery power supply are in a disconnected state. When it is inconvenient to take the mains power or the mains power is off on site, the CPU module 3 determines whether to turn on the solar power supply according to the clock time and the local weather conditions through its own network. If the mains power outage time is during the day, that is, from 9 am to 4 pm and the weather is sunny, the solar power supply will be turned on. If the above conditions are not met, it will switch to battery power supply;

[0049] The current power supply status is automatically identified by the automatic power supply type detection circuit 2 and sent to the CPU module 3.

[0050] Under normal circumstances, the battery power supply will not activate itself. When the solar power supply and the mains power supply are normal, the control signal terminal VDD signal reaches the thirty-seventh diode D37 through the network, which will give the fourth transistor N4 a high level. This transistor is always in the cut-off state to ensure that the battery power supply channel is closed, thus ensuring the battery life and battery safety. On the contrary, when the solar power supply and the mains power are cut off, the control signal terminal VDD becomes a low level, and the fourth transistor N4 is automatically turned on through the pull-down resistor R29 connected in parallel to its base. The fourth N4 transistor will give a low level through the one hundred and sixty-sixth resistor R166 to turn on the third MOS tube Q3. At this time, you only need to press the button SW6 to give a logic high level. According to the principle of logic "or", as long as one end of the input terminal A and B is guaranteed to be "high", the output is "high". At this time, the fourth foot of the logic OR gate chip U33 will Automatically output a high level to turn on the fifth transistor N5 through the sixtieth resistor R60. The turning on of the fifth transistor N5 will give a low level to turn on the first MOSFET Q1 through the one hundred and sixty-ninth resistor R169, thereby ensuring that the battery voltage reaches the power output terminal VCC for the system to use after passing through the battery power supply terminal Battery and the double conduction of the first MOSFET Q1 and the third Q3. After the button is released, by detecting the state of the button, the CPU module 3 will output a high level through the IO port and pass through the latch memory signal terminal BAT_KEEP to the second pin of the logic OR gate chip U33. High level, then the logic OR gate chip U33 can latch the state of the fourth pin output of the memory chip regardless of the state of the first pin, ensuring that the fourth pin of the logic OR gate chip U33 outputs a high level, thereby ensuring that the stability of the battery power supply can be guaranteed regardless of changes in the external environment.

Claims

1. An energy-saving acquisition device for a multi-power equalizer capable of automatically identifying power supply types, characterized in that: include, A multi-power balancing control circuit (1) is used to realize the switching of three power supply modes: mains power supply, solar power supply and battery power supply; Automatic identification of power supply type detection circuit (2), used to detect the current power supply mode; The CPU module (3) is respectively connected to the multi-power supply balance control circuit (1) and the automatic power supply type detection circuit (2) for communication, so as to realize automatic switching of different power supply modes; The multi-power balancing control circuit (1) comprises a mains power supply end (AC-DC), a solar power supply end (Solar Energy) and a battery power supply end (Battery); the solar power supply end (Solar Energy) is connected in series with a third diode (D3) and a second MOSFET (Q2), connected in parallel with the mains power supply end (AC-DC), and then connected to a power supply output end (VCC) through a first diode (D1); the battery power supply end (Battery) is connected to the power supply output end (VCC) through a first MOSFET (Q1) and a third MOSFET (Q3) connected in series; The gate of the third MOS transistor (Q3) is connected to the emitter of the fourth transistor (N4), the collector of the fourth transistor (N4) is grounded, and the base of the fourth transistor (N4) is connected to the control signal terminal (VDD) through a thirty-seventh diode (D37); The battery power supply terminal (Battery) is connected to the first pin of the logic OR gate chip (U33) through the button (SW6), the fourth pin of the logic OR gate chip (U33) is connected to the base of the fifth transistor (N5), and the collector of the fifth transistor (N5) is connected to the gate and source of the first MOS tube (Q1); The second pin of the logic OR gate chip (U33) is connected to the latch memory signal terminal (BAT_KEEP) on the CPU module (3); The fifth pin of the logic OR gate chip (U33) is connected to the battery power supply terminal (Battery) through the seventh diode (D7), and the battery power supply terminal (Battery) is grounded through the eighth capacitor (C8); The automatic identification power supply type detection circuit (2) includes the following three detection sub-circuits: The first detection subcircuit The mains power supply signal terminal (AC_DET) is connected to the base of the first triode (N1) through a fourth voltage stabilizing diode (D4) and a fourth resistor (R4) connected in series, the emitter of the first triode (N1) is grounded, the base and emitter of the first triode (N1) are connected through a fifth resistor (R5), the collector of the first triode (N1) is connected to a high level, and the collector of the first triode (N1) is connected to the mains power supply detection terminal (AC_STAT) of the CPU module (3); The second detection subcircuit The solar power supply signal terminal (SUN_DET) is connected to the base of the third triode (N3) through a sixth voltage stabilizing diode (D6) and a tenth resistor (R10) connected in series, the emitter of the third triode (N3) is grounded, the base and emitter of the third triode (N3) are connected through an eleventh resistor (R11), the collector of the third triode (N3) is connected to a high level, and the collector of the third triode (N3) is connected to the solar power supply detection terminal (SUN_STAT) of the CPU module (3); The third detection sub-circuit The battery power signal terminal (Battery_DET) is connected to the base of the second triode (N2) through a fifth voltage-stabilizing diode (D5) and a seventh resistor (R7) connected in series, the emitter of the second triode (N2) is grounded, the base and emitter of the second triode (N2) are connected through an eighth resistor (R8), the collector of the second triode (N2) is connected to a high level, and the collector of the second triode (N2) is connected to a battery power detection terminal (Battery_STAT) of the CPU module (3).

2. The automatic identification of power supply type multi-power equalizer energy-saving acquisition device according to claim 1, characterized in that: The third pin of the logic OR gate chip (U33) is connected to the second pin of the logic OR gate chip (U33) through the seventy-fifth capacitor (C75) and the twentieth resistor (R20) connected in parallel, and the third pin of the logic OR gate chip (U33) is grounded.

3. The energy-saving acquisition device with multiple power supply equalizers capable of automatically identifying power supply types according to claim 1, characterized in that: A negative temperature coefficient thermistor (NTC1) is arranged between the first diode (D1) and the power output terminal (VCC), and the first diode (D1) and the negative temperature coefficient thermistor (NTC1) are grounded via an electrolytic capacitor (EC1).

4. A control method for a multi-power equalizer energy-saving acquisition device with automatic identification of power supply type according to any one of claims 1 to 3, characterized in that The following steps are involved: The multi-power balancing control circuit (1) has three power supply modes: mains power supply, solar power supply and battery power supply. The default state is mains power supply. At this time, solar power supply and battery power supply are in a disconnected state. When it is inconvenient to take the mains power or the mains power is off at the site, the CPU module (3) determines whether to turn on the solar power supply according to the clock time and the local weather conditions through its own network. If the mains power outage time is during the day, that is, from 9 am to 4 pm and the weather is sunny, the solar power supply will be turned on. If the above conditions are not met, the battery power supply will be switched on. The current power supply status is automatically identified by the automatic power supply type detection circuit (2) and sent to the CPU module (3).

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