Display device and driving method thereof

Abstract

The present disclosure relates to a display device and a driving method thereof. The display device includes a display panel, a data driver, and a power supply voltage generator. The display panel includes a plurality of pixels and displays an image. The data driver applies a data voltage to the display panel. The power supply voltage generator provides a power supply voltage and an initialization voltage to the display panel. The power supply voltage generator receives feedback of an initialization voltage from the display panel and compensates the initialization voltage based on the feedback initialization voltage.

Description

Technical Field

[0001] The present disclosure relates to a display device and a driving method thereof, and to a display device and a driving method thereof that receives feedback of an initialization voltage of a pixel for compensation. Background Art

[0002] Typically, a display device includes a display panel and a display panel driver. The display panel includes a plurality of gate lines, a plurality of data lines, a plurality of emission lines, and a plurality of pixels. The display panel driver includes a gate driver that provides gate signals to the plurality of gate lines, a data driver that provides data voltages to the data lines, an emission driver that provides emission signals to the emission lines, and a drive control unit that controls the gate driver, the data driver, and the emission driver. Furthermore, the display panel driver may also include a power supply voltage generator that applies a power supply voltage and an initialization voltage to the display panel.

[0003] If the level of the initialization voltage applied to the pixel is unstable, the image displayed by the display panel may be unstable, thereby deteriorating the display quality of the display panel. Summary of the Invention

[0004] The present disclosure aims to provide a display device that receives feedback of an initialization voltage of a pixel and performs compensation to thereby improve the display quality of a display panel.

[0005] Another object of the present disclosure is to provide a driving method of the display device.

[0006] A display device according to an embodiment for achieving the above-described objectives of the present disclosure includes a display panel, a data driver, and a power supply voltage generator. The display panel includes a plurality of pixels and displays an image. The data driver applies a data voltage to the display panel. The power supply voltage generator provides a power supply voltage and an initialization voltage to the display panel. The power supply voltage generator receives feedback of an initialization voltage from the display panel and compensates the initialization voltage based on the feedback initialization voltage.

[0007] In one embodiment of the present disclosure, the pixels may each include an organic light-emitting element. The pixels may receive inputs of a data write gate signal, a data initialization gate signal, an emission signal, the data voltage, and the initialization voltage, and cause the organic light-emitting element to emit light according to the level of the data voltage to display the image.

[0008] In an embodiment of the present disclosure, when a data writing gate signal of a first pixel among the pixels is activated, a data initialization gate signal of a second pixel among the pixels may be activated.

[0009] In one embodiment of the present disclosure, at least any one of the pixels may include: a first pixel switching element including a control electrode connected to the first node, an input electrode connected to the second node, and an output electrode connected to the third node; a second pixel switching element including a control electrode to which the data write gate signal is applied, an input electrode to which the data voltage is applied, and an output electrode connected to the second node; a third pixel switching element including a control electrode to which the data write gate signal is applied, an input electrode connected to the first node, and an output electrode connected to the third node; and a fourth pixel switching element including a control electrode to which the data initialization gate signal is applied, an input electrode to which the initialization voltage is applied, and an output electrode connected to the first node. a fifth pixel switching element, comprising a control electrode to which the emission signal is applied, an input electrode to which a high power supply voltage is applied, and an output electrode connected to the second node; a sixth pixel switching element, comprising a control electrode to which the emission signal is applied, an input electrode connected to the third node, and an output electrode connected to the anode electrode of the organic light-emitting element; a seventh pixel switching element, comprising a control electrode to which the data initialization gate signal is applied, an input electrode to which the initialization voltage is applied, and an output electrode connected to the anode electrode of the organic light-emitting element; a storage capacitor, comprising a first electrode to which the high power supply voltage is applied and a second electrode connected to the first node; and the organic light-emitting element, comprising the anode electrode and the cathode electrode to which a low power supply voltage is applied.

[0010] In one embodiment of the present disclosure, the power supply voltage generating unit may include: an amplifier including a first input terminal, a second input terminal, and an output terminal; an input resistor having a first end to which the feedback initialization voltage is applied and a second end connected to the first input terminal; and an output resistor connected between the first input terminal and the output terminal. Alternatively, a reference voltage may be applied to the second input terminal. Alternatively, the output terminal may output the initialization voltage.

[0011] In an embodiment of the present disclosure, the power supply voltage generating unit may adjust a gain indicating a ratio between the feedback initialization voltage and the initialization voltage.

[0012] In one embodiment of the present disclosure, the power supply voltage generating unit may include: an amplifier including a first input terminal, a second input terminal, and an output terminal; an input resistor including a first end to which the feedback initialization voltage is applied and a second end connected to the first input terminal; a plurality of switches connected to the first input terminal; and a plurality of output resistors connected between the switches and the output terminal. Alternatively, a reference voltage may be applied to the second input terminal. Alternatively, the output terminal may output the initialization voltage.

[0013] In an embodiment of the present disclosure, the power supply voltage generating unit may receive feedback of a first feedback initialization voltage from a first position of the display panel, and receive feedback of a second feedback initialization voltage from a second position of the display panel.

[0014] In one embodiment of the present disclosure, the power supply voltage generating unit may include: an amplifier including a first input terminal, a second input terminal, and an output terminal; a first input switch to which the first feedback initialization voltage is applied; a second input switch to which the second feedback initialization voltage is applied; an input resistor including a first end connected to the first input switch and the second input switch, and a second end connected to the first input terminal; a plurality of switches connected to the first input terminal; and a plurality of output resistors connected between the switches and the output terminal. A reference voltage may be applied to the second input terminal. The output terminal may output the initialization voltage.

[0015] In one embodiment of the present disclosure, it may be that if the second distance from the second position of the display panel to the power supply voltage generating unit is greater than the first distance from the first position of the display panel to the power supply voltage generating unit, the second gain representing the ratio of the second feedback initialization voltage to the initialization voltage is greater than the first gain representing the ratio of the first feedback initialization voltage to the initialization voltage.

[0016] In an embodiment of the present disclosure, the power supply voltage generating unit may adjust a conversion rate of the initialization voltage.

[0017] In one embodiment of the present disclosure, the power supply voltage generating unit may include: an amplifier including a first input terminal, a second input terminal, and an output terminal; an input resistor including a first end to which the feedback initialization voltage is applied and a second end connected to the first input terminal; an output resistor connected between the first input terminal and the output terminal; a slew rate adjustment switch connected to the first input terminal; and a capacitor including a first end connected to the slew rate adjustment switch and a second end connected to the output terminal. A reference voltage may be applied to the second input terminal. The output terminal may output the initialization voltage.

[0018] In an embodiment of the present disclosure, the power supply voltage generating unit may adjust a gain indicating a ratio between the feedback initialization voltage and the initialization voltage.

[0019] In an embodiment of the present disclosure, the power supply voltage generating unit may further include: a plurality of switches connected to the first input terminal; and a plurality of output resistors connected between the switches and the output terminal.

[0020] In one embodiment of the present disclosure, the power supply voltage generating unit may further include: a plurality of conversion rate adjustment switches connected to the first input terminal; and a plurality of capacitors connected between the conversion rate adjustment switches and the output terminal.

[0021] According to an embodiment of a driving method for a display device for achieving the above-mentioned other purposes of the present disclosure, the method includes: applying a gate signal to a plurality of pixels of a display panel; applying a data voltage to the pixels; providing a power supply voltage and an initialization voltage to the pixels using a power supply voltage generating unit; receiving feedback of a feedback initialization voltage from the display panel; and compensating the initialization voltage based on the feedback initialization voltage.

[0022] In one embodiment of the present disclosure, the power supply voltage generating unit may include: an amplifier including a first input terminal, a second input terminal, and an output terminal; an input resistor including a first end to which the feedback initialization voltage is applied and a second end connected to the first input terminal; and an output resistor connected between the first input terminal and the output terminal. Alternatively, a reference voltage may be applied to the second input terminal. Alternatively, the output terminal may output the initialization voltage.

[0023] In an embodiment of the present disclosure, the power supply voltage generating unit may adjust a gain indicating a ratio between the feedback initialization voltage and the initialization voltage.

[0024] In an embodiment of the present disclosure, the power supply voltage generating unit may receive feedback of a first feedback initialization voltage from a first position of the display panel, and receive feedback of a second feedback initialization voltage from a second position of the display panel.

[0025] According to an embodiment of the present disclosure, the power supply voltage generating unit may adjust a conversion rate of the initialization voltage.

[0026] (Effect of disclosure)

[0027] According to this display device and its driving method, the display device includes a power supply voltage generator that receives feedback from a pixel's initialization voltage and performs compensation. This prevents distortion of the initialization voltage, which can cause a change in the pixel's output current and prevent the display from failing to achieve the desired brightness. Consequently, the display quality of the display panel can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 is a block diagram illustrating a display device according to an embodiment of the present disclosure.

[0029] Figure 2 It shows Figure 1 Circuit diagram of a pixel of a display panel.

[0030] Figure 3 is shown applied to Figure 2 Timing diagram of the pixel input signal.

[0031] Figure 4 is a diagram showing the display of the first image Figure 1 Schematic diagram of a display panel.

[0032] Figure 5 It shows that Figure 1 A timing diagram of the initialization voltage and output current corresponding to the A region and the B region when the display panel displays the first image.

[0033] Figure 6 is a diagram showing the display of the second image Figure 1 Schematic diagram of a display panel.

[0034] Figure 7 is a diagram showing the display of the third image Figure 1 Schematic diagram of a display panel.

[0035] Figure 8 is a diagram showing the fourth image being displayed Figure 1 Schematic diagram of a display panel.

[0036] Figure 9 is a diagram showing the display of the fifth image Figure 1 Schematic diagram of a display panel.

[0037] Figure 10 It shows Figure 6 Circuit diagram of pixels in area C and pixels in area D.

[0038] Figure 11 It shows Figure 1 Display panels and Figure 1 Schematic diagram of the power supply voltage generating section.

[0039] Figure 12 It shows Figure 1 Circuit diagram of the power supply voltage generating section.

[0040] Figure 13 It shows Figure 12 The timing diagram of the input voltage and output voltage of the power supply voltage generating unit.

[0041] Figure 14 1 is a circuit diagram illustrating a power supply voltage generating unit of a display device according to an embodiment of the present disclosure.

[0042] Figure 15 It shows Figure 14 The timing diagram of the input voltage and output voltage of the power supply voltage generating unit.

[0043] Figure 16 FIG. 1 is a schematic diagram illustrating a display panel and a power supply voltage generating unit of a display device according to an embodiment of the present disclosure.

[0044] Figure 17 It shows Figure 16 Circuit diagram of the power supply voltage generating section.

[0045] Figure 18 1 is a circuit diagram illustrating a power supply voltage generating unit of a display device according to an embodiment of the present disclosure.

[0046] Figure 19 It shows Figure 18 The timing diagram of the input voltage and output voltage of the power supply voltage generating unit.

[0047] Figure 20 1 is a circuit diagram illustrating a power supply voltage generating unit of a display device according to an embodiment of the present disclosure.

[0048] (Explanation of Reference Numerals)

[0049] 100: Display panel 200: Drive control unit

[0050] 300: Gate driving unit 400: Gamma reference voltage generating unit

[0051] 500: Data driving unit 600: Transmitting driving unit

[0052] 700: Power supply voltage generation unit DETAILED DESCRIPTION

[0053] Hereinafter, the present disclosure will be described in further detail with reference to the accompanying drawings.

[0054] Figure 1 is a block diagram illustrating a display device according to an embodiment of the present disclosure.

[0055] Reference Figure 1 The display device includes a display panel 100 and a display panel driving unit. The display panel driving unit includes a driving control unit 200, a gate driving unit 300, a gamma reference voltage generating unit 400, a data driving unit 500, and an emission driving unit 600. The display panel driving unit also includes a power supply voltage generating unit 700.

[0056] For example, the drive control unit 200 and the data drive unit 500 may be integrated. For example, the drive control unit 200, the data drive unit 500, and the power supply voltage generator 700 may be integrated. For example, the drive control unit 200, the gamma reference voltage generator 400, and the data drive unit 500 may be integrated. For example, the drive control unit 200, the gate drive unit 300, the gamma reference voltage generator 400, and the data drive unit 500 may be integrated. For example, the drive control unit 200, the gate drive unit 300, the gamma reference voltage generator 400, and the data drive unit 500 may be integrated. For example, the drive control unit 200, the gate drive unit 300, the gamma reference voltage generator 400, the data drive unit 500, the emission drive unit 600, and the power supply voltage generator 700 may be integrated.

[0057] The display panel 100 includes a plurality of gate lines GWL, GIL, and GBL, a plurality of data lines DL, a plurality of emission lines EL, and a plurality of pixels electrically connected to the gate lines GWL, GIL, and GBL, the data lines DL, and the emission lines EL, respectively. The gate lines GWL, GIL, and GBL extend in a first direction D1, the data lines DL extend in a second direction D2 intersecting the first direction D1, and the emission lines EL extend in the first direction D1.

[0058] The drive control unit 200 receives input image data IMG and an input control signal CONT from an external device. For example, the input image data IMG may include red image data, green image data, and blue image data. The input image data IMG may include white image data. The input image data IMG may include magenta image data, yellow image data, and cyan image data. The input control signal CONT may include a main clock signal and a data enable signal. The input control signal CONT may also include a vertical synchronization signal and a horizontal synchronization signal.

[0059] The driving control unit 200 generates a first control signal CONT1 , a second control signal CONT2 , a third control signal CONT3 , a fourth control signal CONT4 , and a data signal DATA based on the input image data IMG and the input control signal CONT.

[0060] The driving control unit 200 generates the first control signal CONT1 for controlling the operation of the gate driving unit 300 based on the input control signal CONT and outputs the first control signal CONT1 to the gate driving unit 300. The first control signal CONT1 may include a vertical start signal and a gate clock signal.

[0061] The driving control unit 200 generates a second control signal CONT2 for controlling the operation of the data driving unit 500 based on the input control signal CONT and outputs the second control signal CONT2 to the data driving unit 500. The second control signal CONT2 may include a horizontal start signal and a load signal.

[0062] The driving control unit 200 generates a data signal DATA based on the input image data IMG and outputs the data signal DATA to the data driving unit 500 .

[0063] The driving control unit 200 generates the third control signal CONT3 for controlling the operation of the gamma reference voltage generator 400 based on the input control signal CONT, and outputs the third control signal CONT3 to the gamma reference voltage generator 400 .

[0064] The drive control unit 200 generates the fourth control signal CONT4 for controlling the operation of the transmit drive unit 600 based on the input control signal CONT, and outputs the fourth control signal CONT4 to the transmit drive unit 600 .

[0065] The gate driver 300 generates gate signals for driving the gate lines GWL, GIL, and GBL in response to the first control signal CONT1 received from the driver control unit 200. The gate driver 300 can output the gate signals to the gate lines GWL, GIL, and GBL. For example, the gate driver 300 can be mounted on the display panel 100. For example, the gate driver 300 can be integrated with the display panel 100.

[0066] The gamma reference voltage generator 400 generates gamma reference voltages VGREF in response to the third control signal CONT3 input from the driving controller 200. The gamma reference voltage generator 400 provides the gamma reference voltages VGREF to the data driver 500. The gamma reference voltages VGREF have values corresponding to the respective data signals DATA.

[0067] For example, the gamma reference voltage generating section 400 may be disposed in the driving control section 200 or in the data driving section 500 .

[0068] The data driving unit 500 receives the second control signal CONT2 and the data signal DATA from the driving control unit 200, and receives the gamma reference voltage VGREF from the gamma reference voltage generating unit 400. The data driving unit 500 converts the data signal DATA into an analog data voltage using the gamma reference voltage VGREF. The data driving unit 500 outputs the data voltage to the data line DL.

[0069] The emission driving section 600 generates an emission signal for driving the emission line EL in response to the fourth control signal CONT4 input from the driving control section 200. The emission driving section 600 may output the emission signal to the emission line EL.

[0070] The power supply voltage generating unit 700 may generate the power supply voltage required for the operation of the display panel 100 and the display panel driving unit. For example, the power supply voltage generating unit 700 may output a high power supply voltage ELVDD to the pixel circuits of the display panel 100. For example, the power supply voltage generating unit 700 may output a low power supply voltage ELVSS to the pixel circuits of the display panel 100. For example, the power supply voltage generating unit 700 may output an initialization voltage V1 to the pixel circuits of the display panel 100.

[0071] Figure 2 It shows Figure 1 1 is a circuit diagram of a pixel of the display panel 100. Figure 3 is shown applied to Figure 2 Timing diagram of the pixel input signal.

[0072] Reference Figures 1 to 3 The display panel 100 includes a plurality of pixels, each of which includes an organic light emitting element OLED.

[0073] The pixel receives inputs of a data write gate signal GW, a data initialization gate signal GI, an organic light emitting element initialization gate signal, the data voltage VDATA, and the emission signal EM, and causes the organic light emitting element OLED to emit light according to the level of the data voltage VDATA to display the image. In one embodiment of the present disclosure, the organic light emitting element initialization gate signal may be the same signal as the data initialization gate signal GI.

[0074] At least one of the pixels may include a first pixel switching element T1, a second pixel switching element T2, a third pixel switching element T3, a fourth pixel switching element T4, a fifth pixel switching element T5, a sixth pixel switching element T6, a seventh pixel switching element T7, a storage capacitor CST and the organic light emitting element OLED.

[0075] The first pixel switching element T1 includes a control electrode connected to the first node N1, an input electrode connected to the second node N2, and an output electrode connected to the third node N3.

[0076] For example, the first pixel switch element T1 may be a P-type thin film transistor, wherein the control electrode of the first pixel switch element T1 is a gate electrode, the input electrode of the first pixel switch element T1 is a source electrode, and the output electrode of the first pixel switch element T1 is a drain electrode.

[0077] The second pixel switching element T2 includes a control electrode to which the data write gate signal GW is applied, an input electrode to which the data voltage VDATA is applied, and an output electrode connected to the second node N2.

[0078] For example, the second pixel switch element T2 may be a P-type thin film transistor, wherein the control electrode of the second pixel switch element T2 is a gate electrode, the input electrode of the second pixel switch element T2 is a source electrode, and the output electrode of the second pixel switch element T2 is a drain electrode.

[0079] The third pixel switching element T3 includes a control electrode to which the data write gate signal GW is applied, an input electrode connected to the first node N1 , and an output electrode connected to the third node N3 .

[0080] For example, the third pixel switch element T3 may be a P-type thin film transistor, wherein the control electrode of the third pixel switch element T3 is a gate electrode, the input electrode of the third pixel switch element T3 is a source electrode, and the output electrode of the third pixel switch element T3 is a drain electrode.

[0081] The fourth pixel switching element T4 includes a control electrode to which the data initialization gate signal GI is applied, an input electrode to which the initialization voltage VI is applied, and an output electrode connected to the first node N1.

[0082] For example, the fourth pixel switch element T4 may be a P-type thin film transistor, wherein the control electrode of the fourth pixel switch element T4 is a gate electrode, the input electrode of the fourth pixel switch element T4 is a source electrode, and the output electrode of the fourth pixel switch element T4 is a drain electrode.

[0083] The fifth pixel switching element T5 includes a control electrode to which the emission signal EM is applied, an input electrode to which the high power voltage ELVDD is applied, and an output electrode connected to the second node N2.

[0084] For example, the fifth pixel switch element T5 may be a P-type thin film transistor, wherein the control electrode of the fifth pixel switch element T5 is a gate electrode, the input electrode of the fifth pixel switch element T5 is a source electrode, and the output electrode of the fifth pixel switch element T5 is a drain electrode.

[0085] The sixth pixel switching element T6 includes a control electrode to which the emission signal EM is applied, an input electrode connected to the third node N3 , and an output electrode connected to the anode electrode of the organic light emitting element OLED.

[0086] For example, the sixth pixel switch element T6 may be a P-type thin film transistor, wherein the control electrode of the sixth pixel switch element T6 is a gate electrode, the input electrode of the sixth pixel switch element T6 is a source electrode, and the output electrode of the sixth pixel switch element T6 is a drain electrode.

[0087] The seventh pixel switching element T7 includes a control electrode to which the organic light emitting element initialization gate signal GI is applied, an input electrode to which the initialization voltage VI is applied, and an output electrode connected to the anode electrode of the organic light emitting element.

[0088] For example, the seventh pixel switch element T7 may be a P-type thin film transistor, wherein the control electrode of the seventh pixel switch element T7 is a gate electrode, the input electrode of the seventh pixel switch element T7 is a source electrode, and the output electrode of the seventh pixel switch element T7 is a drain electrode.

[0089] The storage capacitor CST includes a first electrode to which the high power voltage ELVDD is applied and a second electrode connected to the first node N1.

[0090] The organic light emitting element OLED includes the anode electrode and a cathode electrode to which a low power voltage ELVSS is applied.

[0091] Reference Figure 3During the first interval DU1, the first node N1 and the storage capacitor CST of the pixels arranged in the Nth row are initialized by the data initialization gate signal GI[N]. During the first interval DU1, the anode electrode of the organic light-emitting element OLED is initialized by the organic light-emitting element initialization gate signal GI[N]. During the second interval DU2, the threshold voltage |VTH| of the first pixel switching element T1 is compensated by the data write gate signal GW[N], and the data voltage VDATA compensated by the threshold voltage |VTH| is written to the first node N1. During the fourth interval DU4, the fifth interval DU5, and thereafter, the organic light-emitting element OLED emits light via the emission signal EM[N], and the pixels arranged in the Nth row display an image.

[0092] During the second interval DU2, the first node N1 and the storage capacitor CST of the pixels arranged in the N+1th row are initialized by the data initialization gate signal GI[N+1]. During the second interval DU2, the anode electrode of the organic light-emitting element OLED is initialized by the organic light-emitting element initialization gate signal GI[N+1]. During the third interval DU3, the threshold voltage |VTH| of the first pixel switching element T1 is compensated by the data write gate signal GW[N+1], and the data voltage VDATA compensated by the threshold voltage |VTH| is written into the first node N1. During the fifth interval DU5 and thereafter, the organic light-emitting element OLED emits light via the emission signal EM[N+1], and the pixels arranged in the N+1th row display an image.

[0093] During the first interval DU1, the data initialization gate signal GI[N] corresponding to the pixels in the Nth row may have an activation level. For example, the activation level of the data initialization gate signal GI[N] may be a low level. When the data initialization gate signal GI[N] has the activation level, the fourth pixel switching element T4 of the pixel in the Nth row is turned on, and the initialization voltage V1 may be applied to the first node N1.

[0094] During the first interval DU1, the organic light emitting element initialization gate signal GI[N] may have an activation level. In this embodiment, the organic light emitting element initialization gate signal GI[N] may be the same signal as the data initialization gate signal GI[N]. When the organic light emitting element initialization gate signal GI[N] has the activation level, the seventh pixel switch element T7 of the pixel in the Nth row is turned on, and the initialization voltage V1 may be applied to the anode electrode of the organic light emitting element OLED of the pixel in the Nth row.

[0095] During the second interval DU2, the data write gate signal GW[N] corresponding to the pixels in the Nth row may have an active level. For example, the active level of the data write gate signal GW[N] may be a low level. When the data write gate signal GW[N] has the active level, the second pixel switch element T2 and the third pixel switch element T3 of the pixels in the Nth row are turned on. Furthermore, the first pixel switch element T1 of the pixels in the Nth row is also turned on by the initialization voltage V1.

[0096] Along the path formed by the turned-on first pixel switching element T1, second pixel switching element T2 and third pixel switching element T3, a voltage obtained by subtracting the absolute value |VTH| of the threshold voltage of the first pixel switching element T1 from the data voltage VDATA is set at the first node N1 of the pixel in the Nth row.

[0097] During the fourth interval DU4 and the fifth interval DU5, the emission signal EM[N] corresponding to the pixels in the Nth row may have an activation level. For example, the activation level of the emission signal EM[N] may be a low level. When the emission signal EM[N] has the activation level, the fifth pixel switch element T5 and the sixth pixel switch element T6 of the pixels in the Nth row are turned on. In addition, the first pixel switch element T1 of the pixels in the Nth row is also turned on by the data voltage VDATA.

[0098] A driving current may sequentially flow through the fifth pixel switch element T5, the first pixel switch element T1, and the sixth pixel switch element T6 to drive the organic light emitting element OLED. The intensity of the driving current may be determined based on the level of the data voltage VDATA. The brightness of the organic light emitting element OLED may be determined based on the intensity of the driving current. A driving current ISD flowing along a path formed from the input electrode to the output electrode of the first pixel switch element T1 may be expressed as shown in the following formula 1.

[0099] [Formula 1]

[0100]

[0101] In Formula 1, u is the mobility of the first pixel switch element T1, Cox is the capacitance per unit area of the first pixel switch element T1, W / L is the ratio of the width to the length of the first pixel switch element T1, VSG means the voltage between the input electrode and the control electrode of the first pixel switch element T1, and |VTH| means the threshold voltage of the first pixel switch element T1.

[0102] In the second interval DU2 , the voltage VG of the first node N1 that compensates for the threshold voltage |VTH| can be expressed as shown in Formula 2.

[0103] [Formula 2]

[0104] VG=VDATA-|VTH|

[0105] In the fourth interval DU4 , when the organic light emitting element OLED emits light, the driving voltage VOV and the driving current ISD may be expressed by the following formulas 3 and 4. In formula 3, VS is the voltage of the second node N2 .

[0106] [Formula 3]

[0107] VOV=VS-VG-|VTH|=ELVDD-(VDATA-|VTH|)-|VTH|=ELVDD-VDATA

[0108] [Formula 4]

[0109]

[0110] In the second interval DU2 , the threshold voltage |VTH| is compensated. Therefore, in the fourth interval DU4 , when the organic light emitting element OLED emits light, the driving current ISD can be determined regardless of the threshold voltage |VTH| component of the first pixel switch element T1 .

[0111] Figure 4 is a diagram showing the display of the first image Figure 1 Schematic diagram of a display panel 100. Figure 5 It shows that Figure 1 A timing diagram of the initialization voltage V1 and the output current IO corresponding to the A region and the B region when the display panel 100 displays the first image.

[0112] Reference Figures 1 to 5 In this embodiment, when the data write gate signal GW[N] of the first pixel (e.g., the pixel in the Nth row) is activated, the data initialization gate signal GI[N+1] of the second pixel (e.g., the pixel in the N+1th row) may be activated. That is, the data write gate signal GW[N] of the first pixel and the data initialization gate signal GI[N+1] of the storage capacitor CST of the second pixel are activated simultaneously. Therefore, due to the data voltage VDATA writing operation, the level of the initialization voltage V1 is variable.

[0113] Figure 4The A area PA and the B area PB are areas where white images are displayed, but the difference is that the left and right areas of the A area PA all display white images, while the left and right areas of the B area PB display black images.

[0114] In this embodiment, the data voltage corresponding to the black image can have a larger value than the data voltage corresponding to the white image. Therefore, when the rows corresponding to the A area PA are scanned and data is written to the rows corresponding to the A area PA, the level of the initialization voltage VI(A) can be relatively slightly variable due to the white image around the A area PA. Conversely, when the rows corresponding to the B area PB are scanned and data is written to the rows corresponding to the B area PB, the level of the initialization voltage VI(B) can be relatively significantly variable due to the black image around the B area PB.

[0115] When data is written into a row corresponding to the B region PB, the level of the initialization voltage VI(B) is greatly variable, and the level of the high power supply voltage ELVDD is also greatly increased by the coupling capacitor, so that sufficient output current IO(B) may not flow in the B region PB.

[0116] On the contrary, when data is written into the horizontal row corresponding to the A area PA, the level of the initialization voltage VI(A) can be slightly changed, and the level of the high power supply voltage ELVDD can also be slightly increased through the coupling capacitor, so that sufficient output current IO(A) can flow in the A area PA.

[0117] Thus, although the A region PA and the B region PB have the same target brightness, a display defect in which the B region PB is displayed darker than the A region PA may occur.

[0118] Figure 6 is a diagram showing the display of the second image Figure 1 Schematic diagram of a display panel 100. Figure 7 is a diagram showing the display of the third image Figure 1 Schematic diagram of a display panel 100. Figure 8 is a diagram showing the fourth image being displayed Figure 1 Schematic diagram of a display panel 100. Figure 9 is a diagram showing the display of the fifth image Figure 1 Schematic diagram of a display panel 100. Figure 10 It shows Figure 6 Circuit diagram of pixels in the C region PC and pixels in the D region PD.

[0119] Reference Figures 1 to 10 , showing the following situation: Figure 6 The black area PC around the white area PD is relatively small. Figure 7 The ratio of the black area PE around the white area PF Figure 6 big, Figure 8 The ratio of the black area PG around the white area PH Figure 7 big.

[0120] like Figure 10 As shown, the application electrodes of the high power supply voltage ELVDD applied to the pixels of the display panel 100 (for example, the pixels in the C region and the pixels in the D region) are connected to each other. Therefore, if the level of the initialization voltage V1 in the C region PC is variable, the level of the high power supply voltage ELVDD can also be changed via the coupling capacitors in the pixels in the C region PC. The change in the level of the high power supply voltage ELVDD can also affect the brightness of the image in the pixels in the D region PD.

[0121] Similar to the above description, when data is written to a row corresponding to the D region PD, the level of the initialization voltage V1 can be changed by the C region PC displaying a black image. The level of the initialization voltage V1 affects the level of the high power supply voltage ELVDD through the coupling capacitor, thereby reducing the brightness of the D region PD.

[0122] When data is written into a row corresponding to the F region PF, the level of the initialization voltage VI can be changed through the E region PE displaying a black image. The level of the initialization voltage VI affects the level of the high power supply voltage ELVDD through the coupling capacitor, thereby reducing the brightness of the F region PF. Figure 7 The E area PE ratio of the black image shows Figure 6 The C area PC of the black image is large, so Figure 7 The brightness of the F area PF can be better than Figure 6 The brightness of the D region PD is low.

[0123] When data is written into a row corresponding to the H region PH, the level of the initialization voltage VI can be changed by the G region PG displaying a black image. The level of the initialization voltage VI affects the level of the high power supply voltage ELVDD through the coupling capacitor, thereby reducing the brightness of the H region PH. Figure 8 The G area PG ratio of the black image is displayed Figure 7 The E area PE of the black image is large, so Figure 8 The brightness of the H region PH can be compared Figure 7 The brightness of the F area PF is low.

[0124] observe Figure 9When the display panel 100 outputs an image containing only 128 gradations (128G) based on a horizontal line and then outputs an image containing a frame of 0 gradation (0G), the data voltage may be switched. The level of the initialization voltage V1 may be variable by switching the data voltage. The level of the initialization voltage V1 affects the level of the high power supply voltage ELVDD through a coupling capacitor, thereby increasing the brightness of the first horizontal line HL1.

[0125] When the display panel 100 outputs an image having a frame with 0 gradation (0G) and then outputs an image having only 128 gradations (128G) based on a horizontal line, the data voltage may be switched. The level of the initialization voltage V1 may be variable by switching the data voltage. The level of the initialization voltage V1 affects the level of the high power supply voltage ELVDD via a coupling capacitor, thereby reducing the brightness of the second horizontal line HL2.

[0126] At this time, the conversion direction of the data voltage is opposite in the first horizontal line HL1 and the second horizontal line HL2 , so that one of the first horizontal line HL1 and the second horizontal line HL2 may be a relatively bright line and the other may be a relatively dark line.

[0127] Figure 9 The first horizontal line HL1 is shown as a bright line and the second horizontal line HL2 is a dark line. However, depending on the panel structure, driving mode, data voltage, etc., the first horizontal line HL1 may be a dark line and the second horizontal line HL2 may be a bright line.

[0128] Figure 11 It shows Figure 1 The display panel 100 and Figure 1 Schematic diagram of the power supply voltage generating unit 700. Figure 12 It shows Figure 1 1 is a circuit diagram of the power supply voltage generating unit 700. Figure 13 It shows Figure 12 1 and 2. A timing diagram of the input voltage VFB and the output voltage VI of the power supply voltage generating unit 700 is shown in FIG.

[0129] Ginseng Figures 1 to 13The power supply voltage generating unit 700 may receive feedback of the feedback initialization voltage VFB from the display panel 100 and compensate the initialization voltage V1 based on the feedback initialization voltage VFB. The power supply voltage generating unit 700 may output the compensated initialization voltage V1 to the display panel 100. The power supply voltage generating unit 700 may output the initialization voltage V1 to both ends of the display panel 100. For example, the power supply voltage generating unit 700 may receive feedback of the feedback initialization voltage VFB from a first feedback region F1 of the display panel 100. The first feedback region F1 may refer to a location of an initialization voltage wiring formed on the display panel 100. The first feedback region F1 may be a lower end portion of a first side portion of the display panel 100.

[0130] For example, the power supply voltage generating unit 700 may be mounted on the display panel 100. For example, the power supply voltage generating unit 700 may be integrated with the driving control unit 200 and the data driving unit 500.

[0131] The power supply voltage generating unit 700 may include a first input terminal, an amplifier AMP including a second input terminal and an output terminal, an input resistor R1 , and an output resistor R2 .

[0132] The feedback initialization voltage VFB may be applied to a first end of the input resistor R1 , a second end of the input resistor R1 may be connected to the first input terminal, and the output resistor R2 may be connected between the first input terminal and the output terminal.

[0133] A reference voltage VREF may be applied to the second input terminal, and the output terminal may output the initialization voltage VI.

[0134] The gain of the amplifier AMP may be determined by the input resistor R1 and the output resistor R2. The gain may represent a ratio of the feedback initialization voltage VFB to the initialization voltage V1. The absolute value of the gain may be greater than or equal to 1.

[0135] The power supply voltage generating unit 700 may output the initialization voltage VI having a decrement waveform corresponding to the increment waveform of the feedback initialization voltage VFB. The decrement waveform of the initialization voltage VI may be greater than or equal to the increment waveform of the feedback initialization voltage VFB.

[0136] According to this embodiment, the display device includes a power supply voltage generating unit 700 that receives feedback of the feedback initialization voltage VFB of the pixel and performs compensation. Therefore, it is possible to prevent the output current of the pixel from changing due to the distortion of the initialization voltage V1, thereby preventing the display image from failing to display the desired brightness. For example, by compensating the initialization voltage V1, Figure 6 The white area PD, Figure 7 The white area PF and Figure 8 The white area PH can have the same brightness. In addition, the initialization voltage VI is compensated, Figure 9 The first horizontal line HL1 and the second horizontal line HL1 may have the same brightness. Therefore, the display quality of the display panel 100 can be improved.

[0137] Figure 14 FIG. 1 is a circuit diagram illustrating a power supply voltage generating unit 700 of a display device according to an embodiment of the present disclosure. Figure 15 It shows Figure 14 1 and 2. A timing diagram of the input voltage VFB and the output voltage VI of the power supply voltage generating unit 700 is shown in FIG.

[0138] The display device and the method for driving the display device according to this embodiment are similar to the above-mentioned display device except for the configuration of the power supply voltage generating unit. Figures 1 to 13 The display device and the driving method of the display device are substantially the same, so the same figure marks are used for the same or similar components and repeated descriptions are omitted.

[0139] Reference Figures 1 to 3 、 Figure 11 、 Figure 14 and Figure 15 The display device includes a display panel 100 and a display panel driving unit. The display panel driving unit includes a driving control unit 200, a gate driving unit 300, a gamma reference voltage generating unit 400, a data driving unit 500, and an emission driving unit 600. The display panel driving unit also includes a power supply voltage generating unit 700.

[0140] The power supply voltage generating unit 700 may receive feedback of the feedback initialization voltage VFB from the display panel 100 and compensate the initialization voltage V1 based on the feedback initialization voltage VFB. The power supply voltage generating unit 700 may output the compensated initialization voltage V1 to the display panel 100. The power supply voltage generating unit 700 may output the initialization voltage V1 to both ends of the display panel 100. For example, the power supply voltage generating unit 700 may receive feedback of the feedback initialization voltage VFB from a first feedback region F1 of the display panel 100. The first feedback region F1 may refer to a location of an initialization voltage wiring formed on the display panel 100. The first feedback region F1 may be a lower end portion of a first side portion of the display panel 100.

[0141] In this embodiment, the power voltage generating unit 700 may adjust a gain representing a ratio between the feedback initialization voltage VFB and the initialization voltage V1.

[0142] The power supply voltage generating unit 700 may include a first input terminal, an amplifier AMP having a second input terminal and an output terminal, an input resistor R1 , a plurality of switches SW1 , SW2 , SW3 , and SW4 , and a plurality of output resistors R21 , R22 , R23 , and R24 .

[0143] The feedback initialization voltage VFB may be applied to a first end of the input resistor R1 , and a second end of the input resistor R1 may be connected to the first input terminal.

[0144] The switches SW1, SW2, SW3, and SW4 may be connected to the first input terminal. The plurality of output resistors R21, R22, R23, and R24 may be connected between the switches SW1, SW2, SW3, and SW4 and the output terminal.

[0145] A reference voltage VREF may be applied to the second input terminal, and the output terminal may output the initialization voltage VI.

[0146] The gain of the amplifier AMP may be determined by the input resistor R1 and the output resistors R21, R22, R23, and R24. The gain may represent a ratio of the feedback initialization voltage VFB to the initialization voltage V1. The absolute value of the gain may be greater than or equal to 1.

[0147] If the first switch SW1 is turned on and the second switch SW2 , the third switch SW3 , and the fourth switch SW4 are turned off, the gain is determined by the ratio of the input resistor R1 to the first output resistor R21 , and the power supply voltage generating unit 700 can output the first initialization voltage VI1 .

[0148] If the second switch SW2 is turned on and the first switch SW1, the third switch SW3 and the fourth switch SW4 are turned off, the gain is determined by the ratio of the input resistor R1 and the second output resistor R22, and the power supply voltage generating unit 700 can output the second initialization voltage VI2 having a decreasing waveform larger than the first initialization voltage VI1.

[0149] If the third switch SW3 is turned on and the first switch SW1, the second switch SW2 and the fourth switch SW4 are turned off, the gain is determined by the ratio of the input resistor R1 and the third output resistor R23, and the power supply voltage generating unit 700 can output the third initialization voltage VI3 having a decreasing waveform larger than the second initialization voltage VI2.

[0150] If the fourth switch SW4 is turned on and the first switch element T1, the second switch element T2 and the third switch element T3 are turned off, the gain is determined by the ratio of the input resistor R1 and the fourth output resistor R24, and the power supply voltage generating unit 700 can output the fourth initialization voltage VI4 having a decreasing waveform larger than the third initialization voltage VI3.

[0151] The present disclosure is not limited by the number of the switches SW1 , SW2 , SW3 , and SW4 and the number of the output resistors R21 , R22 , R23 , and R24 corresponding to the switches SW1 , SW2 , SW3 , and SW4 .

[0152] According to this embodiment, the display device includes a power supply voltage generator 700 that receives feedback from the pixel's feedback initialization voltage VFB and performs compensation. This prevents distortion of the initialization voltage V1, which can cause changes in the pixel's output current and prevent the display from failing to achieve the desired brightness. Consequently, the display quality of the display panel 100 can be improved.

[0153] Figure 16 FIG. 1 is a schematic diagram illustrating a display panel 100 and a power supply voltage generating unit 700 of a display device according to an embodiment of the present disclosure. Figure 17 It shows Figure 16 1 is a circuit diagram of the power supply voltage generating unit 700.

[0154] The display device and the driving method of the display device according to this embodiment are similar to the above-mentioned display device except for the structure of the power supply voltage generating unit and the feedback region. Figures 1 to 13 The display device and the driving method of the display device are substantially the same, so the same figure marks are used for the same or similar components and repeated descriptions are omitted.

[0155] Reference Figures 1 to 3 、 Figure 16and Figure 17 The display device includes a display panel 100 and a display panel driving unit. The display panel driving unit includes a driving control unit 200, a gate driving unit 300, a gamma reference voltage generating unit 400, a data driving unit 500, and an emission driving unit 600. The display panel driving unit also includes a power supply voltage generating unit 700.

[0156] The power supply voltage generator 700 may receive feedback of the feedback initialization voltage VFB from the display panel 100 and compensate the initialization voltage V1 based on the feedback initialization voltage VFB. The power supply voltage generator 700 may output the compensated initialization voltage V1 to the display panel 100. The power supply voltage generator 700 may output the initialization voltage V1 to both ends of the display panel 100. For example, the power supply voltage generator 700 may receive feedback of the first feedback initialization voltage VFB1 from the first feedback region F1 of the display panel 100 and receive feedback of the second feedback initialization voltage VFB2 from the second feedback region F2 of the display panel 100. The first feedback region F1 and the second feedback region F2 may refer to locations of initialization voltage wiring formed on the display panel 100. The first feedback region F1 may be the lower end of the first side portion of the display panel 100. The second feedback region F2 may be the upper end of the first side portion of the display panel 100.

[0157] When the power voltage generating unit 700 receives the input of the plurality of feedback initialization voltages VFB1 and VFB2 from the plurality of feedback regions F1 and F2 , the compensation accuracy of the initialization voltage V1 can be improved.

[0158] The power supply voltage generating unit 700 may select any one of the plurality of feedback initialization voltages VFB1 and VFB2 fed back from the plurality of feedback regions F1 and F2 to compensate the initialization voltage V1.

[0159] The power supply voltage generating unit 700 may include a first input terminal, an amplifier AMP having a second input terminal and an output terminal, a first input switch ISW1 , a second input switch ISW2 , an input resistor R1 , multiple switches SW1 , SW2 , SW3 , and SW4 , and multiple output resistors R21 , R22 , R23 , and R24 .

[0160] The first feedback initialization voltage VFB1 may be applied to the first input switch ISW1 , the second feedback initialization voltage VFB2 may be applied to the second input switch ISW2 , and the input resistor R1 may include a first end connected to the first input switch ISW1 and the second input switch ISW2 , and a second end connected to the first input terminal.

[0161] The switches SW1, SW2, SW3, and SW4 may be connected to the first input terminal. The plurality of output resistors R21, R22, R23, and R24 may be connected between the switches SW1, SW2, SW3, and SW4 and the output terminal.

[0162] A reference voltage VREF may be applied to the second input terminal, and the output terminal may output the initialization voltage VI.

[0163] The gain of the amplifier AMP may be determined by the input resistor R1 and the output resistors R21, R22, R23, and R24. The gain may represent a ratio of the feedback initialization voltage VFB to the initialization voltage V1. The absolute value of the gain may be greater than or equal to 1.

[0164] If the first switch SW1 is turned on and the second switch SW2 , the third switch SW3 , and the fourth switch SW4 are turned off, the gain is determined by the ratio of the input resistor R1 to the first output resistor R21 , and the power supply voltage generating unit 700 can output the first initialization voltage VI1 .

[0165] If the second switch SW2 is turned on and the first switch SW1, the third switch SW3 and the fourth switch SW4 are turned off, the gain is determined by the ratio of the input resistor R1 and the second output resistor R22, and the power supply voltage generating unit 700 can output the second initialization voltage VI2 having a decreasing waveform larger than the first initialization voltage VI1.

[0166] If the third switch SW3 is turned on and the first switch SW1, the second switch SW2 and the fourth switch SW4 are turned off, the gain is determined by the ratio of the input resistor R1 and the third output resistor R23, and the power supply voltage generating unit 700 can output the third initialization voltage VI3 having a decreasing waveform larger than the second initialization voltage VI2.

[0167] If the fourth switch SW4 is turned on and the first switch SW1, the second switch SW2 and the third switch SW3 are turned off, the gain is determined by the ratio of the input resistor R1 and the fourth output resistor R24, and the power supply voltage generating unit 700 can output the fourth initialization voltage VI4 having a decreasing waveform larger than the third initialization voltage VI3.

[0168] If the second distance from the second position of the second feedback area F2 of the display panel 100 to the power supply voltage generating unit 700 is greater than the first distance from the first position of the first feedback area F1 of the display panel 100 to the power supply voltage generating unit 700, the second gain representing the ratio of the second feedback initialization voltage VFB2 to the initialization voltage VI may be greater than the first gain representing the ratio of the first feedback initialization voltage VFB1 to the initialization voltage VI.

[0169] The second feedback initialization voltage VFB2 may be transmitted smaller than the average feedback voltage due to a large transmission distance, noise, impedance, etc. Therefore, when the second feedback initialization voltage VFB2 is input, the initialization voltage V1 needs to be compensated with a relatively large gain.

[0170] The first feedback initialization voltage VFB1 may be larger than the average feedback voltage due to its short transmission distance. Therefore, when the first feedback initialization voltage VFB1 is input, the initialization voltage V1 needs to be compensated with a relatively small gain.

[0171] The plurality of switches SW1 , SW2 , SW3 , and SW4 may be controlled according to the feedback initialization voltages VFB1 and VFB2 to determine a compensation gain of the initialization voltage V1.

[0172] According to this embodiment, the display device includes a power supply voltage generator 700 that receives feedback from the pixel's feedback initialization voltage VFB and performs compensation. This prevents distortion of the initialization voltage V1, which can cause changes in the pixel's output current and prevent the display from failing to achieve the desired brightness. Consequently, the display quality of the display panel 100 can be improved.

[0173] Figure 18 FIG. 5 is a circuit diagram of a power supply voltage generating unit 700 of a display device according to an embodiment of the present disclosure. Figure 19 It shows Figure 18 1 and 2. A timing diagram of the input voltage VFB and the output voltage VI of the power supply voltage generating unit 700 is shown in FIG.

[0174] The display device and the method for driving the display device according to this embodiment are similar to the above-mentioned display device except for the configuration of the power supply voltage generating unit. Figures 1 to 13 The display device and the driving method of the display device are substantially the same, and therefore, the same reference numerals are used for the same or similar components, and repeated descriptions are omitted.

[0175] Reference Figures 1 to 3 、 Figure 11 、 Figure 18 and Figure 19The display device includes a display panel 100 and a display panel driving unit. The display panel driving unit includes a driving control unit 200, a gate driving unit 300, a gamma reference voltage generating unit 400, a data driving unit 500, and an emission driving unit 600. The display panel driving unit also includes a power supply voltage generating unit 700.

[0176] The power supply voltage generating unit 700 may receive feedback of the feedback initialization voltage VFB from the display panel 100 and compensate the initialization voltage V1 based on the feedback initialization voltage VFB. The power supply voltage generating unit 700 may output the compensated initialization voltage V1 to the display panel 100. The power supply voltage generating unit 700 may output the initialization voltage V1 to both ends of the display panel 100. For example, the power supply voltage generating unit 700 may receive feedback of the feedback initialization voltage VFB from a first feedback region F1 of the display panel 100. The first feedback region F1 may refer to a location of an initialization voltage wiring formed on the display panel 100. The first feedback region F1 may be a lower end portion of a first side portion of the display panel 100.

[0177] In this embodiment, the power voltage generating unit 700 can adjust the conversion rate of the initialization voltage V1.

[0178] The power supply voltage generating unit 700 may include a first input terminal, an amplifier AMP having a second input terminal and an output terminal, an input resistor R1 , an output resistor R2 , a slew rate adjustment switch SSW, and a capacitor CS.

[0179] The slew rate adjustment switch SSW may be connected to the first input terminal. The capacitor CS may include a first end connected to the slew rate adjustment switch SSW and a second end connected to the output terminal.

[0180] A reference voltage VREF may be applied to the second input terminal, and the output terminal may output the initialization voltage VI.

[0181] If the slew rate adjustment switch SSW is off, the initialization voltage V1 can have a relatively high slew rate. If the slew rate adjustment switch SSW is on, the initialization voltage VIS can be output with a reduced slew rate by the capacitor CS. In this embodiment, in order to improve the display quality of the display panel 100, the slew rate of the initialization voltage V1 can be appropriately adjusted.

[0182] According to this embodiment, the display device includes a power supply voltage generator 700 that receives feedback from the pixel's feedback initialization voltage VFB and performs compensation. This prevents distortion of the initialization voltage V1, which can cause changes in the pixel's output current and prevent the display from failing to achieve the desired brightness. Consequently, the display quality of the display panel 100 can be improved.

[0183] Figure 20 FIG. 4 is a circuit diagram of a power supply voltage generating unit of a display device according to an embodiment of the present disclosure.

[0184] The display device and the method for driving the display device according to this embodiment are similar to the above-mentioned display device except for the configuration of the power supply voltage generating unit. Figures 1 to 13 The display device and the driving method of the display device are substantially the same, so the same figure marks are used for the same or similar components and repeated descriptions are omitted.

[0185] Reference Figures 1 to 3 、 Figure 11 、 Figure 20 The display device includes a display panel 100 and a display panel driving unit. The display panel driving unit includes a driving control unit 200, a gate driving unit 300, a gamma reference voltage generating unit 400, a data driving unit 500, and an emission driving unit 600. The display panel driving unit also includes a power supply voltage generating unit 700.

[0186] The power supply voltage generating unit 700 may receive feedback of the feedback initialization voltage VFB from the display panel 100 and compensate the initialization voltage V1 based on the feedback initialization voltage VFB. The power supply voltage generating unit 700 may output the compensated initialization voltage V1 to the display panel 100. The power supply voltage generating unit 700 may output the initialization voltage V1 to both ends of the display panel 100. For example, the power supply voltage generating unit 700 may receive feedback of the feedback initialization voltage VFB from a first feedback region F1 of the display panel 100. The first feedback region F1 may refer to a location of an initialization voltage wiring formed on the display panel 100. The first feedback region F1 may be a lower end portion of a first side portion of the display panel 100.

[0187] In this embodiment, the power supply voltage generating unit 700 may adjust a gain representing a ratio between the feedback initialization voltage VFB and the initialization voltage V1. In addition, the power supply voltage generating unit 700 may adjust a conversion rate of the initialization voltage V1.

[0188] The power supply voltage generating unit 700 may include a first input terminal, an amplifier AMP having a second input terminal and an output terminal, an input resistor R1 , a plurality of switches SW1 , SW2 , SW3 , and SW4 , and a plurality of output resistors R21 , R22 , R23 , and R24 .

[0189] The switches SW1, SW2, SW3, and SW4 may be connected to the first input terminal. The plurality of output resistors R21, R22, R23, and R24 may be connected between the switches SW1, SW2, SW3, and SW4 and the output terminal.

[0190] The power supply voltage generating unit may further include a plurality of slew rate adjustment switches SW5 and SW6 connected to the first input terminal, and a plurality of capacitors CS1 and CS2 connected between the slew rate adjustment switches SW5 and SW6 and the output terminal.

[0191] The compensation gain of the initialization voltage VI can be adjusted according to the switching of the first switch SW1, the second switch SW2, the third switch SW3 and the fourth switch SW4, and the conversion rate of the initialization voltage VI can be adjusted according to the switching of the first conversion rate adjustment switch SW5 and the second conversion rate adjustment switch SW6.

[0192] The present disclosure is not limited by the number of the switches SW1, SW2, SW3, and SW4, the number of output resistors R21, R22, R23, and R24 corresponding to the switches SW1, SW2, SW3, and SW4, the number of the conversion rate adjustment switches SW5 and SW6, and the number of capacitors CS1 and CS2 corresponding to the conversion rate adjustment switches SW5 and SW6.

[0193] According to this embodiment, the display device includes a power supply voltage generator 700 that receives feedback from the pixel's feedback initialization voltage VFB and performs compensation. This prevents distortion of the initialization voltage V1, which can cause changes in the pixel's output current and prevent the display from failing to achieve the desired brightness. Consequently, the display quality of the display panel 100 can be improved.

[0194] (Industrial Applicability)

[0195] According to the display device and the method for driving the display device according to the present disclosure described above, the display quality of the display panel can be improved by compensating the initialization voltage.

[0196] Although the above description has been made with reference to the embodiments, it will be apparent to those skilled in the art that various modifications and changes can be made to the present disclosure without departing from the spirit and scope of the present disclosure described in the claims.

Claims

1. A display device, characterized in that: include: a display panel including a plurality of pixels and displaying an image; a data driving unit, applying a data voltage to the display panel; as well as a power supply voltage generating unit, providing a power supply voltage and an initialization voltage to the display panel; The power supply voltage generating unit receives feedback of an initialization voltage from the display panel and compensates the initialization voltage based on the feedback initialization voltage. The power supply voltage generating unit receives feedback of a first feedback initialization voltage from a first position of the display panel, and receives feedback of a second feedback initialization voltage from a second position of the display panel. If the second distance from the second position of the display panel to the power supply voltage generating unit is greater than the first distance from the first position of the display panel to the power supply voltage generating unit, the second gain representing the ratio of the second feedback initialization voltage to the initialization voltage is greater than the first gain representing the ratio of the first feedback initialization voltage to the initialization voltage.

2. The display device according to claim 1, wherein The pixels each include an organic light emitting element, The pixel receives inputs of a data writing gate signal, a data initialization gate signal, an emission signal, the data voltage, and the initialization voltage, and enables the organic light emitting element to emit light according to the level of the data voltage to display the image.

3. The display device according to claim 2, wherein: When the data write gate signal of a first pixel among the pixels is activated, the data initialization gate signal of a second pixel among the pixels is activated.

4. The display device according to claim 2, wherein: At least any one of the pixels includes: a first pixel switching element, including a control electrode connected to the first node, an input electrode connected to the second node, and an output electrode connected to the third node; a second pixel switching element, including a control electrode to which the data write gate signal is applied, an input electrode to which the data voltage is applied, and an output electrode connected to the second node; a third pixel switching element, including a control electrode to which the data write gate signal is applied, an input electrode connected to the first node, and an output electrode connected to the third node; a fourth pixel switching element, including a control electrode to which the data initialization gate signal is applied, an input electrode to which the initialization voltage is applied, and an output electrode connected to the first node; a fifth pixel switching element a pixel switching element comprising a control electrode to which the emission signal is applied, an input electrode to which a high power supply voltage is applied, and an output electrode connected to the second node; a sixth pixel switching element comprising a control electrode to which the emission signal is applied, an input electrode connected to the third node, and an output electrode connected to the anode electrode of the organic light-emitting element; a seventh pixel switching element comprising a control electrode to which the data initialization gate signal is applied, an input electrode to which the initialization voltage is applied, and an output electrode connected to the anode electrode of the organic light-emitting element; a storage capacitor comprising a first electrode to which the high power supply voltage is applied and a second electrode connected to the first node; and the organic light-emitting element comprising the anode electrode and a cathode electrode to which a low power supply voltage is applied.

5. The display device according to claim 1, wherein The power supply voltage generating unit includes: an amplifier comprising a first input terminal, a second input terminal, and an output terminal; an input resistor having a first end to which the feedback initialization voltage is applied and a second end connected to the first input terminal; and an output resistor connected between the first input terminal and the output terminal, A reference voltage is applied to the second input terminal. The output terminal outputs the initialization voltage.

6. The display device according to claim 1, wherein The power supply voltage generating unit adjusts a gain indicating a ratio between the feedback initialization voltage and the initialization voltage.

7. The display device according to claim 6, wherein: The power supply voltage generating unit includes: an amplifier comprising a first input terminal, a second input terminal, and an output terminal; an input resistor comprising a first end to which the feedback initialization voltage is applied and a second end connected to the first input terminal; a plurality of switches connected to the first input terminal; and a plurality of output resistors connected between the switch and the output terminal; A reference voltage is applied to the second input terminal. The output terminal outputs the initialization voltage.

8. The display device according to claim 1, wherein The power supply voltage generating unit includes: an amplifier comprising a first input terminal, a second input terminal, and an output terminal; A first input switch, to which the first feedback initialization voltage is applied; a second input switch to which the second feedback initialization voltage is applied; an input resistor comprising a first end connected to the first input switch and the second input switch and a second end connected to the first input terminal; a plurality of switches connected to the first input terminal; and a plurality of output resistors connected between the switch and the output terminal; A reference voltage is applied to the second input terminal. The output terminal outputs the initialization voltage.

9. The display device according to claim 1, wherein The power supply voltage generating section adjusts a conversion rate of the initialization voltage.

10. The display device according to claim 9, wherein The power supply voltage generating unit includes: an amplifier comprising a first input terminal, a second input terminal, and an output terminal; an input resistor comprising a first end to which the feedback initialization voltage is applied and a second end connected to the first input terminal; an output resistor connected between the first input terminal and the output terminal; a conversion rate adjustment switch connected to the first input terminal; and a capacitor comprising a first end connected to the conversion rate adjustment switch and a second end connected to the output terminal, A reference voltage is applied to the second input terminal. The output terminal outputs the initialization voltage.

11. The display device according to claim 10, wherein: The power supply voltage generating unit adjusts a gain indicating a ratio between the feedback initialization voltage and the initialization voltage.

12. The display device according to claim 11, wherein The power supply voltage generating unit further includes: a plurality of switches connected to the first input terminal; and A plurality of output resistors are connected between the switch and the output terminal.

13. The display device according to claim 12, wherein: The power supply voltage generating unit further includes: a plurality of conversion rate adjustment switches connected to the first input terminal; and A plurality of capacitors are connected between the conversion rate adjustment switch and the output terminal.

14. A method for driving a display device, characterized in that: include: applying a gate signal to a plurality of pixels of the display panel; applying a data voltage to the pixel; A step of supplying a power supply voltage and an initialization voltage to the pixel using the power supply voltage generating unit according to any one of claims 1 to 13; receiving feedback of a feedback initialization voltage from the display panel; as well as The step of compensating the initialization voltage based on the feedback initialization voltage.

Images