MRAM storage array temperature self-detection method, storage control method and system

Abstract

The present invention provides an MRAM storage array temperature self-detection method, a storage control method, and a system, belonging to the field of memory. The method comprises: allocating corresponding write error detection area addresses and read error detection area addresses to a first storage array partition; generating multiple random arrays, performing a read / write operation on each of the multiple random arrays in the first storage array corresponding to the write error detection area address, and obtaining a write error rate measurement value of the first storage array; generating a fixed array, writing the fixed array into a second storage array corresponding to the read error detection area address, performing multiple read operations, and obtaining a read error rate measurement value of the second storage array; and determining the current temperature range of the first storage array partition to which the first storage array and the second storage array belong based on a write error rate base value, a read error rate base value, a write error rate measurement value, and a read error rate measurement value.

Description

Technical Field

[0001] The present invention relates to the field of memory, and in particular to an MRAM memory array temperature self-detection method, an MRAM memory array temperature self-detection system, an MRAM memory array storage control method, and an MRAM memory array storage control system. Background Art

[0002] The chip industry has garnered global attention, serving as a key indicator of a country's industrial competitiveness and overall national strength. Memory, a crucial module within chips, is used to store the data generated by the chips. In industry, memory primarily serves as a storage device for data such as operating parameters, logs, and load records, playing a crucial role within the device.

[0003] MRAM (Magnetic Random Access Memory) is a state-of-the-art memory. It offers non-volatility, fast read and write speeds, and virtually unlimited rewritable data. It offers the same rapid random read and write speeds as SRAM / DRAM, while retaining data after a power outage, similar to Flash. It has already seen initial application in aerospace, industrial automation, smart grids, and other fields requiring high data security and reliability. Unlike traditional silicon-based memory, MRAM stores information in a magnetic material, with the memory cells read and written via an electric current. Therefore, ambient temperature fluctuations can affect the memory chip. Typically, at low temperatures, the ferromagnetic material becomes more difficult to flip, making it difficult to write data to MRAM at low temperatures. At higher temperatures, the ferromagnetic material is more easily flipped, but the tunneling magnetoresistance ratio of the memory cell decreases with increasing temperature, increasing the effect of read disturbances and making data readout more difficult. Therefore, the normal operating temperature range of MRAM is limited in everyday applications.

[0004] Currently, research on MRAM data security in wide-temperature environments is not yet in-depth and complete. The industry generally adopts a multi-chip packaging method of memory chips and temperature sensors to detect the operating temperature of the entire memory chip module. However, the external temperature sensor has a serious lag in responding to the operating temperature of the memory array and cannot accurately characterize the temperature of different storage partitions. As a result, the current memory chips can only operate in a relatively low temperature range, which cannot fully meet the environmental adaptability of outdoor smart meters. Summary of the Invention

[0005] The purpose of the embodiments of the present invention is to provide an MRAM storage array temperature self-detection method, storage control method, and system. The MRAM storage array temperature self-detection method detects data read and write error rates based on the read and write characteristics of ferromagnetic materials in high and low temperature zones, analyzes the data read and write error rates, and obtains the temperature of the corresponding storage array partition. The method can be quickly deployed on existing memory and has the characteristics of fast response and fine detection area. The storage control method changes the operating frequency of different storage array partitions according to the temperature to balance the ambient temperature and the temperature generated by the memory operation, thereby ensuring the chip's wide temperature range operating characteristics.

[0006] In order to achieve the above-mentioned object, the first aspect of the present invention provides a method for self-detecting the temperature of an MRAM storage array, the method comprising:

[0007] Allocating corresponding write error detection area addresses and read error detection area addresses to the first storage array partition;

[0008] Generate a plurality of random arrays, and perform a read and write operation on each of the plurality of random arrays in a first storage array corresponding to an address in a write error detection area to obtain a write error rate measurement value of the first storage array;

[0009] Generate a fixed array, write the fixed array into a second storage array corresponding to an address of a read error detection area, perform multiple read operations, and obtain a read error rate measurement value of the second storage array;

[0010] determining a current temperature range of a first storage array partition to which the first storage array and the second storage array belong based on a write error rate base value, a read error rate base value, the write error rate measurement value, and the read error rate measurement value;

[0011] The write error rate base value and the read error rate base value are write error rate values ​​and read error rate values ​​when the MRAM storage array operates normally.

[0012] Optionally, the method further includes:

[0013] The write error detection area address and the read error detection area address are changed to the address of the second storage array partition, and the temperature of the second array partition is detected according to the same steps as the first storage array partition. By changing the write error detection area address and the read error detection area address, the storage array partition to be detected can be changed, thereby achieving a partition scan of the entire MRAM storage array to obtain a precise temperature distribution map of the storage array partition temperature, thereby more accurately controlling the distribution of data flow and improving the temperature range for reliable operation of the memory.

[0014] Furthermore, generating a plurality of random arrays, performing a read and write operation on each of the plurality of random arrays in a storage array corresponding to an address in a write error detection area, and obtaining a write error rate measurement value corresponding to the storage array includes:

[0015] Generating a plurality of random arrays, performing a read and write operation on each of the plurality of random arrays in a first storage array corresponding to an address in a write error detection area, and obtaining a write error rate measurement value of the first storage array includes:

[0016] S101: Generate a random array, recorded as the first array;

[0017] S102: writing the first array into a first storage array corresponding to the write error detection area address;

[0018] S103: Reading data in the first storage array to obtain a second array;

[0019] S104: Compare the first array and the second array, and record a number of write errors when the first array and the second array are inconsistent;

[0020] S105: Repeat steps S101-S104 j times;

[0021] S106: Calculate a write error rate measurement value of the first storage array based on the recorded number of write errors and the number of repetitions j. By repeating multiple read and write operations, the write error rate of the same storage array can be measured.

[0022] Furthermore, generating a fixed array, writing the fixed array into a second storage array corresponding to an address of a read error detection area, performing multiple read operations, and obtaining a read error rate measurement value of the second storage array includes:

[0023] Generate a fixed array, recorded as the third array;

[0024] Writing the third array into the second storage array corresponding to the address of the read error detection area;

[0025] Repeatedly reading the data in the second storage array y times to obtain y fourth arrays;

[0026] Comparing each fourth array with the third array, and recording a number of read errors when the third array is inconsistent with the fourth array;

[0027] The read error rate measurement value of the second storage array is calculated based on the recorded number of read errors and the number of repeated reads y. The read error rate of the same storage array can be measured by repeating the read operation multiple times.

[0028] Furthermore, determining a current temperature range of a first storage array partition to which the first storage array and the second storage array belong based on the write error rate base value, the read error rate base value, the write error rate measurement value, and the read error rate measurement value includes:

[0029] comparing the write error rate base value, the read error rate base value, the write error rate measurement value, and the read error rate measurement value;

[0030] If the write error rate measurement value is less than or equal to the write error rate base value, and the read error rate measurement value is less than or equal to the read error rate base value, then the temperature of the first storage array partition to which the storage array belongs is within the rated operating temperature range;

[0031] If the write error rate measurement value is greater than the write error rate base value, and the read error rate measurement value is less than or equal to the read error rate base value, then the temperature of the first storage array partition to which the storage array belongs is lower than the rated operating temperature range;

[0032] If the measured read error rate value is greater than the base read error rate value, the temperature of the first storage array partition to which the storage array belongs is above the rated operating temperature range. Due to the characteristics of ferromagnetic materials that make it difficult to write data to an MRAM in low-temperature regions and difficult to read data in high-temperature regions, the measured write error rate and read error rate values ​​are compared with the base write error rate and read error rate values ​​to analyze and determine the temperature range of the measured storage array partition, providing a temperature reference for control of the storage controller.

[0033] A second aspect of the present invention provides an MRAM storage array temperature self-detection system, the system comprising:

[0034] A detection area address allocation unit, configured to allocate a corresponding write error detection area address and a read error detection area address to each storage array partition;

[0035] An array generation unit, used to generate a random array and a fixed array corresponding to each storage array partition;

[0036] a write error rate measurement value acquisition unit, configured to perform a read and write operation on each random array in the random array corresponding to the storage array partition in the storage array corresponding to the corresponding write error detection area address, to obtain a write error rate measurement value of the storage array corresponding to the write error detection area address;

[0037] a read error rate measurement value acquisition unit, configured to write the fixed array corresponding to the storage array partition into the storage array corresponding to the corresponding read error detection area address, perform multiple read operations, and obtain a read error rate measurement value of the storage array corresponding to the read error detection area address;

[0038] A temperature range determination unit is configured to determine the current temperature range of the write error detection region address and the storage array partition to which the read error detection region address belongs based on the write error rate baseline value, the read error rate baseline value, the write error rate measurement value, and the read error rate measurement value. This system allocates specific addresses within the storage array as detection units, enabling rapid, real-time detection of any storage array partition. By detecting and analyzing data read and write error rates, the system determines the temperature of the corresponding storage array partition. This system can be quickly deployed on existing storage devices, offering fast response times and precise detection areas.

[0039] A third aspect of the present invention provides a method for controlling storage of an MRAM storage array, the method comprising:

[0040] Detecting the temperature of the MRAM storage array using the MRAM storage array temperature self-detection method;

[0041] The operating frequencies of different memory array partitions of the MRAM memory array are controlled according to the temperature of the MRAM memory array to ensure the wide-temperature operating characteristics of the MRAM memory array. The operating frequencies of different memory array partitions are changed according to the temperature to balance the ambient temperature and the temperature generated by the memory operation to ensure the wide-temperature operating characteristics of the chip.

[0042] Furthermore, controlling the operating frequencies of different storage array partitions of the MRAM storage array according to the temperature of the MRAM storage array includes:

[0043] When the temperature of a storage array partition of the MRAM storage array is lower than a rated operating temperature range, increasing the operating frequency of the storage array partition;

[0044] When the temperature of the memory array partition of the MRAM memory array is within a rated operating temperature range, maintaining an operating frequency for the memory array partition;

[0045] When the temperature of a memory array partition of the MRAM memory array is higher than a rated operating temperature range, the operating frequency of the memory array partition is reduced.

[0046] A fourth aspect of the present invention provides an MRAM storage array storage control system, the system comprising:

[0047] The memory controller is configured to detect the temperature of the MRAM memory array using the aforementioned MRAM memory array temperature self-detection method; the operating frequencies of different memory array partitions of the MRAM memory array are controlled based on the temperature of the MRAM memory array to ensure the wide-temperature operating characteristics of the MRAM memory array. This system utilizes the memory's existing controller, eliminating the need to modify the existing MRAM chip structure. Temperature detection of the MRAM memory array is implemented directly within the existing chip structure, enabling rapid deployment on existing memory devices. It features fast response and a precise detection area.

[0048] On the other hand, the present invention provides a machine-readable storage medium having instructions stored thereon, wherein the instructions are used to enable a machine to execute the MRAM storage array temperature self-detection method.

[0049] Through the above technical solution, the method for detecting MRAM temperature is based on the read and write characteristics of ferromagnetic materials in high and low temperature zones. By detecting data read and write error rates and analyzing the data read and write error rates, the temperature of the corresponding storage array partition is obtained. This method can be quickly deployed on existing memory and has the characteristics of fast response and fine detection area. The storage control method changes the operating frequency of different storage array partitions according to the temperature to balance the ambient temperature and the temperature generated by the memory operation, thereby ensuring the wide temperature range operating characteristics of the chip.

[0050] Other features and advantages of the embodiments of the present invention will be described in detail in the subsequent detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] The accompanying drawings are used to provide a further understanding of the embodiments of the present invention and constitute a part of the specification. Together with the following detailed description, they are used to explain the embodiments of the present invention, but do not constitute a limitation of the embodiments of the present invention. In the accompanying drawings:

[0052] Figure 1 This is a flow chart of a method for self-detecting temperature of an MRAM storage array provided by one embodiment of the present invention;

[0053] Figure 2 This is a block diagram of an MRAM storage array temperature self-detection system provided by one embodiment of the present invention;

[0054] Figure 3 Schematic diagram of the MRAM memory structure used in one embodiment of the present invention;

[0055] Figure 4 The present invention provides an MRAM storage array temperature self-detection flow chart according to an embodiment of the present invention. DETAILED DESCRIPTION

[0056] The following describes the specific embodiments of the present invention in detail with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are only used to illustrate and explain the present invention and are not intended to limit the present invention.

[0057] Figure 1 This is a flow chart of a method for self-detecting the temperature of an MRAM storage array provided by an embodiment of the present invention. Figure 1 As shown, the method includes:

[0058] Allocating corresponding write error detection area addresses and read error detection area addresses to the first storage array partition;

[0059] Generate a plurality of random arrays, and perform a read and write operation on each of the plurality of random arrays in a first storage array corresponding to an address in a write error detection area to obtain a write error rate measurement value of the first storage array;

[0060] Generate a fixed array, write the fixed array into a second storage array corresponding to an address of a read error detection area, perform multiple read operations, and obtain a read error rate measurement value of the second storage array;

[0061] determining a current temperature range of a first storage array partition to which the first storage array and the second storage array belong based on a write error rate base value, a read error rate base value, the write error rate measurement value, and the read error rate measurement value;

[0062] The write error rate base value and the read error rate base value are write error rate values ​​and read error rate values ​​when the MRAM storage array operates normally.

[0063] Optionally, the method further includes:

[0064] The write error detection area address and the read error detection area address are changed to the address of the second storage array partition, and the temperature of the second array partition is detected according to the same steps as the first storage array partition. By changing the write error detection area address and the read error detection area address, the storage array partition to be detected can be changed, thereby achieving a partition scan of the entire MRAM storage array to obtain a precise temperature distribution map of the storage array partition temperature, thereby more accurately controlling the distribution of data flow and improving the temperature range for reliable operation of the memory.

[0065] Furthermore, generating a plurality of random arrays, performing a read and write operation on each of the plurality of random arrays in a first storage array corresponding to an address in a write error detection area, and obtaining a write error rate measurement value of the first storage array includes:

[0066] S101: Generate a random array, recorded as the first array;

[0067] S102: writing the first array into a first storage array corresponding to the write error detection area address;

[0068] S103: Reading data in the first storage array to obtain a second array;

[0069] S104: Compare the first array and the second array, and record a number of write errors when the first array and the second array are inconsistent;

[0070] S105: Repeat steps S101-S104 j times;

[0071] S106: Calculate a write error rate measurement value of the first storage array based on the recorded number of write errors and the number of repetitions j. By repeating multiple read and write operations, the write error rate of the same storage array can be measured.

[0072] In other embodiments of the present invention, j random arrays may be generated at one time, and then the j random arrays may be used in sequence to perform write error detection, thereby obtaining a write error rate measurement value of the first storage array.

[0073] Furthermore, generating a fixed array, writing the fixed array into a second storage array corresponding to an address of a read error detection area, performing multiple read operations, and obtaining a read error rate measurement value of the second storage array includes:

[0074] Generate a fixed array, recorded as the third array;

[0075] Writing the third array into the second storage array corresponding to the address of the read error detection area;

[0076] Repeatedly reading the data in the second storage array y times to obtain y fourth arrays;

[0077] comparing each fourth array with the third array, and recording a number of read errors when the third array is inconsistent with the fourth array;

[0078] The read error rate measurement value of the second storage array is calculated based on the recorded number of read errors and the number of repeated reads y. The read error rate of the same storage array can be measured by repeating the read operation multiple times.

[0079] It should be noted that in the present invention, the number of repetitions j and the number of repetitions y are set according to empirical values. The larger the values ​​of j and y are, the more accurate the obtained write error rate measurement values ​​and read error rate measurement values ​​are.

[0080] Furthermore, determining a current temperature range of a first storage array partition to which the first storage array and the second storage array belong based on the write error rate base value, the read error rate base value, the write error rate measurement value, and the read error rate measurement value includes:

[0081] comparing the write error rate base value, the read error rate base value, the write error rate measurement value, and the read error rate measurement value;

[0082] If the write error rate measurement value is less than or equal to the write error rate base value, and the read error rate measurement value is less than or equal to the read error rate base value, then the temperature of the first storage array partition to which the storage array belongs is within the rated operating temperature range;

[0083] If the write error rate measurement value is greater than the write error rate base value, and the read error rate measurement value is less than or equal to the read error rate base value, then the temperature of the first storage array partition to which the storage array belongs is lower than the rated operating temperature range;

[0084] If the measured read error rate value is greater than the base read error rate value, the temperature of the first storage array partition to which the storage array belongs is above the rated operating temperature range. Due to the characteristics of ferromagnetic materials that make it difficult to write data to an MRAM in low-temperature regions and difficult to read data in high-temperature regions, the measured write error rate and read error rate values ​​are compared with the base write error rate and read error rate values ​​to analyze and determine the temperature range of the measured storage array partition, providing a temperature reference for control of the storage controller.

[0085] Figure 2 This is a block diagram of an MRAM storage array temperature self-detection system provided by an embodiment of the present invention. Figure 2 As shown, the system includes:

[0086] A detection area address allocation unit, configured to allocate a corresponding write error detection area address and a read error detection area address to each storage array partition;

[0087] An array generation unit, used to generate a random array and a fixed array corresponding to each storage array partition;

[0088] a write error rate measurement value acquisition unit, configured to perform a read and write operation on each random array in the random array corresponding to the storage array partition in the storage array corresponding to the corresponding write error detection area address, to obtain a write error rate measurement value of the storage array corresponding to the write error detection area address;

[0089] a read error rate measurement value acquisition unit, configured to write the fixed array corresponding to the storage array partition into the storage array corresponding to the corresponding read error detection area address, perform multiple read operations, and obtain a read error rate measurement value of the storage array corresponding to the read error detection area address;

[0090] A temperature range determination unit is configured to determine the current temperature range of the write error detection region address and the storage array partition to which the read error detection region address belongs based on the write error rate baseline value, the read error rate baseline value, the write error rate measurement value, and the read error rate measurement value. This system allocates specific addresses within the storage array as detection units, enabling rapid, real-time detection of any storage array partition. By detecting and analyzing data read and write error rates, the system determines the temperature of the corresponding storage array partition. This system can be quickly deployed on existing storage devices, offering fast response times and precise detection areas.

[0091] A third aspect of the present invention provides a method for controlling storage of an MRAM storage array, the method comprising:

[0092] Detecting the temperature of the MRAM storage array using the MRAM storage array temperature self-detection method;

[0093] The operating frequencies of different memory array partitions of the MRAM memory array are controlled according to the temperature of the MRAM memory array to ensure the wide-temperature operating characteristics of the MRAM memory array. The operating frequencies of different memory array partitions are changed according to the temperature to balance the ambient temperature and the temperature generated by the memory operation to ensure the wide-temperature operating characteristics of the chip.

[0094] Furthermore, controlling the operating frequencies of different storage array partitions of the MRAM storage array according to the temperature of the MRAM storage array includes:

[0095] When the temperature of a storage array partition of the MRAM storage array is lower than a rated operating temperature range, increasing the operating frequency of the storage array partition;

[0096] When the temperature of the memory array partition of the MRAM memory array is within a rated operating temperature range, maintaining an operating frequency for the memory array partition;

[0097] When the temperature of a memory array partition of the MRAM memory array is higher than a rated operating temperature range, the operating frequency of the memory array partition is reduced.

[0098] A fourth aspect of the present invention provides an MRAM storage array storage control system, the system comprising:

[0099] The memory controller is configured to detect the temperature of the MRAM memory array using the aforementioned MRAM memory array temperature self-detection method; the operating frequencies of different memory array partitions of the MRAM memory array are controlled based on the temperature of the MRAM memory array to ensure the wide-temperature operating characteristics of the MRAM memory array. This system utilizes the memory's existing controller, eliminating the need to modify the existing MRAM chip structure. Temperature detection of the MRAM memory array is implemented directly within the existing chip structure, enabling rapid deployment on existing memory devices. It features fast response and a precise detection area.

[0100] In a specific embodiment of the present invention, Figure 3 As shown, the MRAM memory includes a storage controller, a read / write controller, a row address decoder, and a column address decoder. The MRAM storage array temperature self-detection method is executed by the storage controller, as shown in FIG. Figure 4 As shown, the memory controller first allocates a write error detection area address I and a read error detection area address II to a storage array partition in the MRAM memory.

[0101] For write error detection, the storage controller generates an n-bit random array M and writes the random data M into the storage array corresponding to address I through the read-write controller. Address I is determined by decoding the row address decoder and the column address decoder. Then, the array M' at address I is read and the data M' is compared with the random data M. If M'≠M, the number of write errors i is increased by one. The process of generating the random array and comparing is repeated j times to obtain the write error rate measurement value P of address I. I .

[0102] For read error detection, the storage control generates an n-bit fixed array A and writes array A to the memory array corresponding to address II through the read / write controller. Then, array A' in address II is read repeatedly y times and compared with fixed array A. If A'≠A, the number of read errors x is increased by one, and the read error rate measurement value of address II is P. II .

[0103] The memory controller then writes the error rate measurement value P I and the read error rate measurement value P II Compared with the write error rate base value P under the defined normal temperature range I0 And the read error rate base value P II0 For comparison, when P I ≤P I0 And P II ≤P II0 When P I >P I0 And PII ≤P II0 When , it proves that the temperature of the storage array area is lower than the rated temperature range, and P I The larger the value, the lower the temperature in the area. II >P II0 When , it proves that the temperature of the storage array area is higher than the rated temperature range, and P I The larger the value, the higher the temperature in that area. The above steps can be used to measure the temperature of a storage array partition. By changing address I and address II, different storage array partitions of the entire memory can be scanned, and accurate temperature maps of different storage array partitions of the memory can be obtained.

[0104] It should be noted that when the temperature of the storage array area is higher than the rated temperature range, the data writing process will also be affected. Therefore, in order to more accurately determine that the temperature of the storage array area is higher than the normal operating temperature range, P can be used in the judgment. I >P I0 And P II >P II0 It is used as a more accurate judgment condition for whether the temperature of the storage array area is higher than the rated temperature range.

[0105] After obtaining accurate temperature maps of different array partitions, the storage controller can control the distribution of data streams according to the temperatures of different storage array partitions, thereby improving the temperature range for reliable operation of the memory.

[0106] It should be understood that the rated temperature range referred to in the present invention refers to the temperature range in which the MRAM memory array can operate normally. This temperature range varies depending on the rated operating environment of different MRAM memory arrays. Generally, the rated operating environment temperature of commonly used MRAM memory arrays is 0-50°C. For such MRAM memory arrays, temperatures below 0°C are considered below the rated temperature range, and temperatures above 50°C are considered above the rated temperature range. The same applies to other MRAM memory arrays.

[0107] On the other hand, the present invention provides a machine-readable storage medium having instructions stored thereon, wherein the instructions are used to enable a machine to execute the MRAM storage array temperature self-detection method.

[0108] Those skilled in the art will appreciate that all or part of the steps in the methods of the aforementioned embodiments can be accomplished by instructing the relevant hardware through a program, which is stored in a storage medium and includes a number of instructions for causing a single-chip microcomputer, chip, or processor to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0109] The above describes in detail the optional embodiments of the present invention in conjunction with the accompanying drawings. However, the embodiments of the present invention are not limited to the specific details in the above embodiments. Within the technical concept of the embodiments of the present invention, a variety of simple modifications can be made to the technical solutions of the embodiments of the present invention, and these simple modifications all fall within the scope of protection of the embodiments of the present invention. It should also be noted that the various specific technical features described in the above specific embodiments can be combined in any suitable manner unless there is any contradiction. In order to avoid unnecessary repetition, the embodiments of the present invention will no longer describe the various possible combinations separately.

[0110] In addition, the various embodiments of the present invention may be arbitrarily combined, and as long as they do not violate the concept of the embodiments of the present invention, they should also be regarded as the contents disclosed in the embodiments of the present invention.

Claims

1. A method for self-detecting temperature of an MRAM storage array, characterized in that: The method utilizes the reading and writing characteristics of ferromagnetic materials in high temperature and low temperature regions, and the method includes: Allocating corresponding write error detection area addresses and read error detection area addresses to the first storage array partition; Generate a plurality of random arrays, and perform a read and write operation on each of the plurality of random arrays in a first storage array corresponding to an address in a write error detection area to obtain a write error rate measurement value of the first storage array; Generate a fixed array, write the fixed array into a second storage array corresponding to an address of a read error detection area, perform multiple read operations, and obtain a read error rate measurement value of the second storage array; Determining a current temperature range of a first storage array partition to which the first storage array and the second storage array belong based on a write error rate base value, a read error rate base value, the write error rate measurement value, and the read error rate measurement value includes: comparing the write error rate base value, the read error rate base value, the write error rate measurement value, and the read error rate measurement value; If the write error rate measurement value is less than or equal to the write error rate base value, and the read error rate measurement value is less than or equal to the read error rate base value, then the temperature of the first storage array partition to which the first storage array and the second storage array belong is within the rated operating temperature range; If the write error rate measurement value is greater than the write error rate base value, and the read error rate measurement value is less than or equal to the read error rate base value, then the temperature of the first storage array partition to which the first storage array and the second storage array belong is lower than the rated operating temperature range; If the read error rate measurement value is greater than the read error rate base value, the temperature of the first storage array partition to which the first storage array and the second storage array belong is higher than the rated operating temperature range; The write error rate base value and the read error rate base value are write error rate values ​​and read error rate values ​​when the MRAM storage array operates normally.

2. The MRAM storage array temperature self-detection method according to claim 1, characterized in that: The method further comprises: The write error detection area address and the read error detection area address are changed to the address of the second storage array partition, and the temperature detection of the second array partition is implemented according to the same steps as the first storage array partition.

3. The MRAM storage array temperature self-detection method according to claim 1, wherein: Generating a plurality of random arrays, performing a read and write operation on each of the plurality of random arrays in a first storage array corresponding to an address in a write error detection area, and obtaining a write error rate measurement value of the first storage array includes: S101: Generate a random array, recorded as the first array; S102: writing the first array into a first storage array corresponding to the write error detection area address; S103: Reading data in the first storage array to obtain a second array; S104: Compare the first array and the second array, and record a number of write errors when the first array and the second array are inconsistent; S105: Repeat steps S101-S104 j times; S106: Calculate a write error rate measurement value of the first storage array according to the recorded number of write errors and the number of repetitions j.

4. The MRAM storage array temperature self-detection method according to claim 3, characterized in that: The generating of the fixed array, writing the fixed array into the second storage array corresponding to the address of the read error detection area, performing multiple read operations, and obtaining a read error rate measurement value of the second storage array includes: Generate a fixed array, recorded as the third array; Writing the third array into the second storage array corresponding to the address of the read error detection area; Repeatedly reading the data in the second storage array y times to obtain y fourth arrays; Comparing each fourth array with the third array, and recording a number of read errors when the third array is inconsistent with the fourth array; The read error rate measurement value of the second storage array is calculated based on the recorded number of read errors and the number of repeated reads y.

5. An MRAM storage array temperature self-detection system, characterized in that: The system utilizes the reading and writing characteristics of ferromagnetic materials in high temperature and low temperature regions, and includes: A detection area address allocation unit, configured to allocate a corresponding write error detection area address and a read error detection area address to each storage array partition; An array generation unit, used to generate a random array and a fixed array corresponding to each storage array partition; a write error rate measurement value acquisition unit, configured to perform a read and write operation on each random array in the random array corresponding to the storage array partition in the first storage array corresponding to the corresponding write error detection area address, to obtain a write error rate measurement value of the first storage array corresponding to the write error detection area address; a read error rate measurement value acquisition unit, configured to write the fixed array corresponding to the storage array partition into the second storage array corresponding to the corresponding read error detection area address, perform multiple read operations, and obtain a read error rate measurement value of the second storage array corresponding to the read error detection area address; a temperature range determination unit, configured to determine a current temperature range of the storage array partitions to which the first storage array and the second storage array belong based on a write error rate base value, a read error rate base value, the write error rate measurement value, and the read error rate measurement value, comprising: comparing the write error rate base value, the read error rate base value, the write error rate measurement value, and the read error rate measurement value; If the write error rate measurement value is less than or equal to the write error rate base value, and the read error rate measurement value is less than or equal to the read error rate base value, then the temperature of the storage array partition to which the first storage array and the second storage array belong is within a rated operating temperature range; If the write error rate measurement value is greater than the write error rate base value, and the read error rate measurement value is less than or equal to the read error rate base value, then the temperature of the storage array partition to which the first storage array and the second storage array belong is lower than the rated operating temperature range; If the read error rate measurement value is greater than the read error rate base value, the temperature of the storage array partition to which the first storage array and the second storage array belong is higher than the rated operating temperature range; The write error rate base value and the read error rate base value are write error rate values ​​and read error rate values ​​when the MRAM storage array operates normally.

6. A method for controlling storage of an MRAM storage array, characterized in that: The method comprises: Detecting the temperature of the MRAM memory array using the MRAM memory array temperature self-detection method according to any one of claims 1 to 4; The operating frequencies of different memory array partitions of the MRAM memory array are controlled according to the temperature of the MRAM memory array to ensure wide temperature range operating characteristics of the MRAM memory array.

7. The MRAM storage array storage control method according to claim 6, wherein: The controlling the operating frequencies of different storage array partitions of the MRAM storage array according to the temperature of the MRAM storage array includes: When the temperature of a storage array partition of the MRAM storage array is lower than a rated operating temperature range, increasing the operating frequency of the storage array partition; When the temperature of the memory array partition of the MRAM memory array is within a rated operating temperature range, maintaining an operating frequency for the memory array partition; When the temperature of a memory array partition of the MRAM memory array is higher than a rated operating temperature range, the operating frequency of the memory array partition is reduced.

8. An MRAM storage array storage control system, characterized in that: The system comprises: A memory controller, configured to detect the temperature of an MRAM memory array using the MRAM memory array temperature self-detection method according to any one of claims 1 to 4; and control operating frequencies of different memory array partitions of the MRAM memory array according to the temperature of the MRAM memory array to ensure wide-temperature operating characteristics of the MRAM memory array.

9. A machine-readable storage medium having stored thereon instructions for causing a machine to execute the MRAM storage array temperature self-detection method according to any one of claims 1 to 4 of the present application.

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