A self-powered voltage energy harvesting interface circuit with wide output voltage range voltage synchronous flip

Abstract

The application discloses a self-powered voltage piezoelectric energy harvesting interface circuit with wide output voltage range and voltage synchronous flip, inserts two resonance loops in the voltage synchronous flip stage, improves the output voltage range of the piezoelectric energy harvesting interface circuit, and realizes the purpose of efficient piezoelectric energy harvesting in a wide voltage range. The self-powered voltage piezoelectric energy harvesting interface circuit with wide output voltage range and voltage synchronous flip is composed of a full-bridge circuit, a triode, a capacitor and an inductor.

Description

Technical Field

[0001] This invention mainly relates to a self-powered voltage energy harvesting interface circuit with voltage synchronous switching and a wide output voltage range. Background Technology

[0002] Due to the inherent output impedance characteristics of piezoelectric generators, a dedicated interface circuit is required. Typical synchronous switching inductor technology effectively reduces the waste of piezoelectric generator output charge during rectification, increasing the load's output power. Its main working principle is to briefly close the synchronous switch when the piezoelectric generator's output current crosses zero or near the peak of the output voltage. A resonant cavity composed of an external inductor and the piezoelectric generator's internal capacitor collects the charge that would otherwise be wasted, thereby increasing the power from the piezoelectric generator to the load. However, typical synchronous switching inductor technology has a drawback: when the output rectified voltage of the interface circuit is too high, the load may not be able to obtain power from the piezoelectric generator, resulting in a narrow operating range of the output voltage. This situation of the load not being able to collect power often occurs under excitation conditions of vibration variation. Therefore, it is necessary to design a high-efficiency piezoelectric energy harvesting interface circuit with a wide output voltage range, capable of achieving efficient piezoelectric energy harvesting with synchronous voltage switching even under high rectified voltage conditions. Summary of the Invention

[0003] To address the aforementioned problems, a self-supplied voltage energy harvesting interface circuit with wide output voltage range and synchronous voltage switching is proposed. The solution is as follows: A self-supplied voltage energy harvesting interface circuit with wide output voltage range and synchronous voltage switching, characterized by: a full-bridge circuit, transistors, capacitors, and inductors; a piezoelectric generator connected in series with the inductor and connected to the AC input terminal of the full-bridge circuit; a filter capacitor and a load resistor connected to the DC output terminal of the full-bridge circuit; the full-bridge circuit consists of four diodes; the diodes can be either passive or active diodes; the transistors include two NPN transistors Q1 and Q3 and two PNP transistors Q2 and Q4; the capacitor is C1; the transistors and the capacitor form a detection circuit that can detect both the peak value of the piezoelectric generator output voltage and the peak value of the inductor current. The NPN transistor Q3 and PNP transistor Q4 are connected as synchronous switches across diodes D3 and D4 in the full-bridge circuit, respectively. One end of the AC input of the full-bridge circuit is connected to one end of the inductor. The other end of the inductor is connected to one end of the piezoelectric generator and then to the bases of the NPN transistor Q1 and the PNP transistor Q2. The emitters of the NPN transistor Q1 and the PNP transistor Q2 are connected to one end of the capacitor C1. The other end of the capacitor C1 is connected to the other end of the piezoelectric generator. The collector of the NPN transistor Q1 is connected to the base of the PNP transistor Q4. The collector of the PNP transistor Q2 is connected to the base of the NPN transistor Q3. The collector of the NPN transistor Q3 is connected to the DC output of the full-bridge circuit. The collector of the PNP transistor Q4 is connected to ground. The emitters of the NPN transistor Q3 and the PNP transistor Q4 are connected and then to the other end of the capacitor C1.

[0004] The present invention proposes a self-supplied voltage energy harvesting interface circuit with voltage synchronous switching and a wide output voltage range, the advantages of which are:

[0005] 1. The circuit is simple;

[0006] 2. Wide output voltage range;

[0007] 3. Self-powered. Attached Figure Description

[0008] Figure 1 This invention discloses a self-powered voltage energy harvesting interface circuit with voltage synchronous switching and a wide output voltage range.

[0009] Figure 2 This is a schematic diagram of key waveforms of the self-powered voltage energy harvesting interface circuit with wide output voltage range and voltage synchronous switching, which is disclosed in this invention, operating in P-SSHI mode.

[0010] Figure 3 This is a schematic diagram of key waveforms of the self-powered voltage energy harvesting interface circuit with wide output voltage range and voltage synchronous switching, which is disclosed in this invention, operating in S-SSHI mode. Detailed Implementation

[0011] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0012] Figure 1 This invention relates to a self-supplied voltage energy harvesting interface circuit with a wide output voltage range and synchronous voltage reversal. The piezoelectric voltage V is based on the voltage V during each half-cycle of vibration. BA Is it rectified by voltage V? rect The clamping circuit has two operating modes. If the piezoelectric voltage is rectified by voltage V... rect Clamping occurs when the circuit operates in P-SSHI mode, otherwise in S-SSHI mode. The following is a detailed description of the operation of the self-supplied voltage energy harvesting interface circuit with wide output voltage range and synchronous voltage switching.

[0013] If the circuit operates in P-SSHI mode, refer to the appendix. Figure 2 The key waveforms and circuit operation process are described below:

[0014] 1. The piezoelectric generator outputs AC current i P Before the piezoelectric generator output voltage crosses zero from positive to negative, that is, before it reaches its peak value, the piezoelectric voltage is clamped, diodes D1 and D4 conduct, and the current i P The piezoelectric generator (L-D1-D4) flows into the load R. L and C L Because the base-emitter PN junction of NPN transistor Q1 is forward biased and conducts, capacitor C1 is connected in parallel with the piezoelectric generator through the PN junction;

[0015] 2. When the current i P After the zero-crossing point, that is, after the piezoelectric generator output voltage exceeds the peak value, due to the current i P When the polarity is reversed, the voltage across the internal capacitor of the piezoelectric generator is lower than the voltage across capacitor C1, causing the PN junction of the base-emitter of NPN transistor Q1 to be reverse-biased, while the PN junction of the base-emitter of PNP transistor Q2 is forward-biased and conducts. This, in turn, turns on transistor Q3, forming two resonant circuits: one through the device (piezoelectric generator – L – D1 – Q3 – piezoelectric generator), and the other through the device (C1 – Q2 – L – D1 – Q3 – C1). The internal capacitor C... P The energy stored in capacitor C1 is transferred to the inductor, causing the inductor current to rise. When all the energy from the capacitor has been transferred to the inductor, the piezoelectric voltage V... BA Dropped to near zero;

[0016] 3. When the inductor current i L Reaching peak value due to inductor voltage and piezoelectric voltage V BA Both are close to zero, causing Q3 to cut off, forming another device (piezoelectric generator – L – D1 – R). L With C L –D4– The resonant circuit of the piezoelectric generator (D4–) allows part of the energy in the inductor to be transferred to the load via the resonant circuit, while the other part is transferred back to the internal capacitor C. P In capacitor C P A voltage reversal is achieved, realizing the desired synchronous voltage reversal. Because the loop includes a diode, when the inductor current i... L The loop breaks after the temperature drops to zero. Note that step 3 is an innovation of this patent.

[0017] 4. Piezoelectric generator current i P Continue in reverse to the internal capacitor C P Charge until the piezoelectric voltage V BA Rise to the rectified voltage V rect Clamping occurs when diodes D2 and D3 are conducting, and the piezoelectric current i P Inflow load C L and R L .

[0018] 5. When the piezoelectric generator current i P When crossing zero from negative to positive, due to the symmetrical circuit structure, the circuit will perform a synchronous voltage reversal process based on the same operating principle, but different resonant circuits are used.

[0019] 6. When the current i P When the circuit crosses zero again from positive to negative, it returns to the operating state of number 1 and repeats the above process.

[0020] If the circuit operates in S-SSHI mode, refer to the appendix. Figure 3 The key waveforms and the specific working process of the circuit are roughly similar to P-SSHI, so they will not be described in detail here. The main difference between the P-SSHI and P-SSHI operating modes lies in the piezoelectric voltage V. BA No longer rectified by voltage V rect Clamping. Therefore, in S-SSHI mode, the full-bridge circuit is only enabled during the voltage synchronization switching phase.

[0021] Typical synchronous switching inductor technology uses only one resonant circuit to achieve voltage switching, limiting the operating range of the rectified voltage to the open-circuit voltage of the piezoelectric generator. Unlike typical synchronous switching inductor technology, the circuit proposed in this patent uses two resonant circuits instead of one to achieve voltage switching of the internal capacitor of the piezoelectric generator every half oscillation cycle. Using the extra resonant circuit, i.e., step 3, the piezoelectric voltage can be boosted. Even with very high rectified voltage, the circuit can extract energy from the piezoelectric generator and transfer it to the load, thus significantly increasing the operating range of the rectified voltage and overcoming the problem of typical synchronous switching technology failing to extract the piezoelectric generator's output power. It is worth noting that the extra resonant circuit is used regardless of whether the circuit operates in P-SSHI or S-SSHI mode, therefore the boost operation is applicable to all operating modes.

[0022] While the invention has been described with respect to a relatively limited number of embodiments, those skilled in the art who benefit from this disclosure will understand the many modifications and variations that arise therefrom. The appended claims are intended to cover such modifications and variations that fall within the true spirit and scope of the invention.

Claims

1. A self-supplied voltage energy harvesting interface circuit with voltage synchronous switching and a wide output voltage range, characterized in that: The circuit includes a full-bridge circuit, transistors, capacitors, and an inductor. A piezoelectric generator is connected in series with the inductor to the AC input terminal of the full-bridge circuit. The DC output terminal of the full-bridge circuit is connected to a filter capacitor and a load resistor. The full-bridge circuit consists of four diodes, which can be passive or active diodes. The transistors include two NPN transistors Q1 and Q3 and two PNP transistors Q2 and Q4. The capacitor is C1. The transistors and the capacitor form a detection circuit for detecting the peak value of the piezoelectric generator output voltage and the peak value of the inductor current. The NPN transistors Q3 and Q4 act as synchronous switches, respectively connected across diodes D3 and D4 in the full-bridge circuit. One end of the AC input of the full-bridge circuit is connected to the inductor. One end of the inductor is connected to the other end of the piezoelectric generator, and then connected to the base of NPN transistor Q1 and the base of PNP transistor Q2. The emitters of NPN transistor Q1 and PNP transistor Q2 are connected to one end of capacitor C1. The other end of capacitor C1 is connected to the other end of the piezoelectric generator. The collector of NPN transistor Q1 is connected to the base of PNP transistor Q4. The collector of PNP transistor Q2 is connected to the base of NPN transistor Q3. The collector of NPN transistor Q3 is connected to the DC output terminal of the full-bridge circuit. The collector of PNP transistor Q4 is connected to ground. The emitters of NPN transistor Q3 and PNP transistor Q4 are connected to the other end of capacitor C1.

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