A power amplifier system for a high-power 6000W digital amplifier

Abstract

The present invention discloses a power amplifier system for a high-power 6000W digital power amplifier, wherein the power supply adopts PFC and half-bridge switching power supply technology, power supply overcurrent and overvoltage protection, voltage detection / online control, start / shutdown detection control, output mode / output power detection control, temperature control, and fan two-stage acceleration control. The alternating current of the present invention is input to the first bridge rectifier filter circuit, and the flyback switching power supply circuit is started by manually closing the soft switch circuit. After the power supply control circuit obtains the power supply, the relay of the soft switch start circuit is connected, and the alternating current is boosted by the switch impact current protection circuit, the bridge rectifier filter circuit, and the PFC circuit, and then reaches the half-bridge switching power supply circuit. The power amplifier module of the present invention is arranged as a double-layer board, with a reasonable layout, and is uniformly locked on a U-shaped heat sink, with good heat dissipation effect and good sound quality fidelity effect.

Description

Technical Field

[0001] The present invention relates to a power amplifier device, and in particular to a pulse width modulated power amplifier module. Background Art

[0002] Audio amplifiers are widely used in life. Power amplifiers are referred to as amplifiers. Their main function is to amplify the weaker signal input by the sound source equipment and generate a large enough current to drive the speaker to reproduce the sound. After amplifying the audio electrical signal, it drives the speaker of the speaker to make a sound. Professional amplifiers are generally used for conferences, performances, halls, venues, and halls. The design is based on large output power, perfect protection circuits, and good heat dissipation. The performance of the audio amplifier directly affects the sound quality of the entire speaker. There are often situations such as sound distortion. At present, speaker amplifiers have different powers, and different places use amplifiers of different powers. How to improve the design of signal processing in the amplifier to make it suitable for the needs of various occasions is what this article wants to discuss. Considering power, impedance, distortion, dynamics, different use ranges and control adjustment functions, different amplifiers are also different in internal signal processing, circuit design and production technology. Professional amplifiers are generally used for conferences, performances, halls, venues, and halls. The design is based on large output power, perfect protection circuits, and good heat dissipation. Summary of the invention

[0003] The purpose of the present invention is to overcome the shortcomings of the prior art. The power supply adopts PFC and half-bridge switching power supply technology, the power supply over-current and over-voltage protection, the power amplifier part adopts PWM pulse width modulation circuit and MCU control unit, the MCU control unit is controlled by the MCU single chip, and performs voltage detection / online control, start / shutdown detection control, output mode / output power detection control, temperature control, and two-stage acceleration control of the fan.

[0004] To achieve the above purpose, the power amplifier system of a high-power 6000W digital power amplifier of the present invention adopts the following technical solutions:

[0005] A power amplifier system for a high-power 6000W digital power amplifier comprises a first bridge rectifier filter circuit, wherein alternating current is input to the first bridge rectifier filter circuit, and a flyback switch power supply circuit is started through a manually closed soft switch circuit. After the power supply control circuit obtains power, the relay of the soft switch start circuit is turned on. The alternating current passes through a switch surge current protection circuit, a second bridge rectifier filter circuit, and a PFC circuit, and then reaches a half-bridge switch power supply circuit. The main power supply and various auxiliary power supplies are boosted and output through a transformer isolation output circuit to supply power to a power amplifier PWM drive, and the power amplifier is started. A weak signal passes through an audio compression circuit and reaches a digital power amplifier PWM pulse width modulation circuit for amplification, and is output through an LC filter circuit. The maximum power is 3000W / 4 ohms. At the same time, the auxiliary power supply supplies power to an MCU control unit, and the temperature in the circuit is detected to control the compression of the input signal and the voltage output by the fan power supply output circuit.

[0006] Furthermore, the flyback switching power supply circuit is connected to the soft switch starting circuit. The AC input is first rectified and filtered by a bridge, and the rectified DC enters the flyback switching power supply circuit. The output power is rectified and filtered to supply power to the power control circuit, the PFC circuit, and the half-bridge switching power supply circuit. After the power control circuit is powered on, it controls the soft switch starting circuit and connects to the main power bridge rectifier filter circuit (main power line).

[0007] Furthermore, the AC input (AC power supply) first passes through the first bridge rectifier filter circuit and reaches the flyback switching power supply circuit. After the driving optocoupler IC1 is started, the VCC-PRI voltage is obtained through secondary rectification and filtering of the transformer T3. After voltage stabilization, the voltages of +15V-PRI and +5VP are obtained. The +5VP voltage supplies power to the power control circuit. After obtaining power, the control chip controls the relay RY1 of the soft switch start circuit to close. The AC power passes through the relay RY1 to reach the switch inrush current protection circuit, the second bridge rectifier filter circuit, and the PFC circuit, and then reaches the half-bridge switching power supply circuit. The transformer isolation output circuit boosts the voltage, and the main power supply bridge rectifier filter circuit rectifies and filters the main voltage and its auxiliary power supply.

[0008] The auxiliary power supply 1 rectifier and filter circuit drives transistor Q3 and transistor Q12 after rectification and filtering, and then the relay RY2 coil is energized and closed, short-circuiting the resistor R3, resistor R4 and thermistor PR1 on the switch surge current protection circuit to reduce losses;

[0009] The voltage induced by the rectifier and filter circuit of auxiliary power supply 2 is based on the negative voltage of the main power supply. After rectification and filtering, the voltage is stabilized to obtain a +12V / -VCC voltage, which is output to the digital power amplifier PWM pulse width modulation circuit for use;

[0010] The auxiliary power supply 3 rectifier filter circuit obtains ±12V voltage after voltage stabilization, and the output end is respectively connected to the PWM drive power circuit, the audio compression circuit, the +5V auxiliary power circuit, and the temperature detection circuit. The +12V voltage of the ±12V auxiliary power circuit is stabilized by the +5V auxiliary power circuit to obtain a +5V power supply, and the output is connected to the MCU control unit;

[0011] The voltage output by the rectification and filtering circuit of the auxiliary power supply 4 is connected to the cooling fan of the fan power supply output circuit, and the fan speed is controlled by the MCU control unit.

[0012] Further, the input end of the first bridge rectifier filter circuit is connected to the AC input, the output end of the first bridge rectifier filter circuit is connected to the power control circuit, the soft switch start circuit, and the half-bridge switch power supply circuit through the flyback switch power supply circuit, and the power control circuit is connected to the soft switch start circuit;

[0013] The AC input reaches the half-bridge switching power supply circuit after passing through the soft switch start circuit, the switch surge current protection circuit, the second bridge rectifier filter circuit, and the PFC circuit. The half-bridge switching power supply circuit is connected to the auxiliary power supply 1 rectifier filter circuit, the main power supply bridge rectifier filter circuit, the auxiliary power supply 2 rectifier filter circuit, the auxiliary power supply 3 rectifier filter circuit, and the auxiliary power supply 4 rectifier filter circuit after passing through the transformer isolation output circuit;

[0014] The auxiliary power supply 2 rectifier filter circuit passes through the PWM drive power circuit, the digital power amplifier PWM pulse width modulation circuit, and the LC filter circuit, and then the circuit channel outputs 3000W / 4 ohms;

[0015] The rectifier and filter circuit of auxiliary power supply 3 is connected to the MCU control unit after passing through the ±12V auxiliary power supply circuit and the +5V auxiliary power supply circuit; the rectifier and filter circuit of auxiliary power supply 4 is connected to the MCU control unit after passing through the fan power supply output circuit; the MCU control unit is connected to the audio compression circuit and the temperature detection circuit, the input end of the audio compression circuit is connected to the signal input, and the output end of the audio compression circuit is connected to the digital power amplifier PWM pulse width modulation circuit;

[0016] The auxiliary power supply 2 rectifier filter circuit is connected to the digital power amplifier PWM pulse width modulation circuit after passing through the main power supply bridge rectifier filter circuit;

[0017] The MCU control unit is connected to the fan power output circuit.

[0018] In some embodiments, the input power adopts a soft switching design, using weak current to control the input high-voltage part. When processing the startup impact current, after the power supply starts normally, the impact current protection components are short-circuited through a relay to avoid additional useless power loss when working at high power. The power driver chip is powered by a flyback switching power supply, which enables the power driver chip to work stably when working at high power.

[0019] Further, the PFC circuit drives two parallel NMOS tubes Q4 and Q5 by the PFC driver chip U8 in a totem pole manner. The pin 3 of the PFC driver chip U8 is connected to the source S of the NMOS tubes Q4 and Q5 after passing through the resistor R1 and the parallel resistors R11 to R18; the pin 4 of the PFC driver chip U8 is connected to the drain D of the NMOS tubes Q4 and Q5 after passing through the resistor R64, the resistor R63, and the inductor L2; the source S of the NMOS tubes Q4 and Q5 is grounded, and the drain D of the NMOS tubes Q4 and Q5 is connected to the positive power supply VCC after passing through the positive and negative electrodes of the diode BD2; the gate G and source S of the NMOS tube Q4 are connected to a parallel resistor R21, and the gate G and source S of the NMOS tube Q5 are connected to a parallel resistor R22;

[0020] Pin 7 of PFC driver chip U8 is connected to emitter E of NPN transistor Q2 in soft switch startup circuit through resistor R10, collector C of NPN transistor Q2 is connected to +15V-PRI terminal (i.e. pin 7 of PFC driver chip U8 is connected to +15V-PRI terminal through resistor R10 and NPN transistor Q2), pin 8 of PFC driver chip U8 is connected to base B of NPN transistor Q1 and base B of PNP transistor Q14; emitter of NPN transistor Q1 and emitter of PNP transistor Q14 are connected to +15V-PRI terminal. The emitter of NPN transistor Q1 and the emitter of PNP transistor Q14 are connected to the gate G of NMOS transistor Q4 through driving resistor R19, and the emitter of NPN transistor Q1 and the emitter of PNP transistor Q14 are connected to the gate G of NMOS transistor Q5 through driving resistor R20; the collector of PNP transistor Q14 is grounded, the collector of NPN transistor Q1 is connected to pin 2 of PFC driver chip U8 through resistor R5, and the collector of PNP transistor Q14 is connected to pin 1 of PFC driver chip U8;

[0021] The driving resistor R19 and the driving resistor R20 are respectively connected in parallel with the fast diode D18 and the fast diode D19. The anode of the fast diode D18 and the anode of the fast diode D19 are connected to the gate G of the NMOS tube Q4. The gate G and the source S of the NMOS tube Q4 and the NMOS tube Q5 are respectively connected in parallel with the resistor R21 and the resistor R22. The drain D and the source S of the NMOS tube Q4 and the NMOS tube Q5 are respectively connected in parallel with the capacitor C16 and the capacitor C17. The resistors R11 to R18 are connected in parallel to the source S of the NMOS tube Q4 and the source S of the NMOS tube Q5. The resistors R11 to R18 are connected in parallel to serve as short-circuit protection for the NMOS tube Q4 and the NMOS tube Q5. The drain D of the NMOS tube Q4 and the drain D of the NMOS tube Q5 are connected to the anode of the fast diode BD2. The cathode of the fast diode BD2 is connected to the positive power supply VCC. The resistor R24 ​​and the capacitor C20 are connected in series and then connected in parallel to the fast diode BD2. The source S of the NMOS tube Q5 is grounded.

[0022] Furthermore, the half-bridge switching power supply circuit adopts a totem pole method to drive the NMOS tube, the power driver chip U7 pin 2 and pin 3 are connected to +15V-PRI, and a low-power switching power supply is used for power supply. The power driver chip U7 pin 14 is connected to +15V-PRI through the cathode-positive pole of the diode D21, and the power driver chip U7 pin 14 is connected to the power driver chip U7 pin 12 through the parallel capacitor C52 and the capacitor C53. The power driver chip U7 pin 13 is connected to the base of the NPN transistor Q8 and the base of the PNP transistor Q7 through the resistor R38. The power driver chip U7 pin 13 is connected to the optocoupler U2 pin 1 through the resistor R43, and the power driver chip U7 pin 11 is connected to the NPN through the resistor R37. The base of transistor Q9 and the base of PNP transistor Q6, the base of NPN transistor Q9 and the base of PNP transistor Q6 are connected to pin 1 of optocoupler U3 through resistor R44, the emitter of NPN transistor Q8 and PNP transistor Q7 are connected, the emitter of NPN transistor Q8 and PNP transistor Q7 is connected to the gate of NMOS transistor Q10 through two parallel driving resistors R41 and R42, the fast diode D22 is connected in parallel to the driving resistor R41 and R42, the resistor R48 is connected in parallel between the gate and source of NMOS transistor Q10, the fast diode D27 and the RC absorption circuit (composed of a resistor R54 and a capacitor C57 connected in series) are connected in parallel between the drain and source of NMOS transistor Q10;

[0023] In some embodiments, the half-bridge switching power supply circuit uses a totem pole driving method to drive the power NMOS tube, a fast diode is connected in parallel to the driving resistor, a fast diode and an RC absorption circuit are connected in parallel to the drain and source of the NMOS tube, and a resistor is connected in parallel to the gate and source of the NMOS tube;

[0024] The emitter of NPN transistor Q9 is connected to the emitter of PNP transistor Q6, and the emitter of PN transistor Q9 and the emitter of PNP transistor Q6 are connected to the gate of NMOS transistor Q11 through parallel driving resistor R39 and driving resistor R40, fast diode D23 is connected in parallel to driving resistor R39 and driving resistor R40, resistor R47 is connected in parallel to the gate and source of NMOS transistor Q11, fast diode D28 and another RC absorption circuit (composed of series resistor R55 and capacitor C58) are connected in parallel to the drain and source of NMOS transistor Q11, and pins 8 and 9 of power driver chip U7 are grounded;

[0025] The main winding J4 of transformer T2 is connected to pin 4 of high-frequency transformer T1, and pin 2 of high-frequency transformer T1 returns to the center point (CEN) of the main voltage through two parallel capacitors C61 and C62. The voltage of the secondary of high-frequency transformer T1 after bridge rectification is connected to pin 3 of comparator U5A, and pin 1 of comparator U5A is connected to pin 10 of power driver chip U7.

[0026] Furthermore, the digital power amplifier PWM pulse width modulation circuit includes two groups of PWM power amplifier units. The first group of power amplifier units is provided with an over-temperature protection circuit. The power supply +5V-D is grounded via a resistor R448 and a thermistor PR400. The voltage drop of the thermistor PR400 is detected using pins 40 and 42 of the microcontroller U16 of the MCU control unit. The thermistor PR400 is located next to the power amplifier NMOS tube. The digital power amplifier PWM pulse width modulation circuit is distributed on the upper circuit board, and the remaining circuits are arranged on the lower circuit board. The entire circuit is assembled on a U-shaped heat sink, which has good heat dissipation conditions and is also convenient for assembly and maintenance.

[0027] Pin 15 of the pulse width modulation chip U201 of the first group of power amplifier units is connected to the positive main power supply J1 interface after passing through resistor R218, pin 9 of the pulse width modulation chip U201 is connected to the negative main power supply J2 interface, pin 14 of the pulse width modulation chip U201 is connected to the gate G of the NMOS tube FET202 through resistor R220, pin 13 of the pulse width modulation chip U201 is connected to the source S of the NMOS tube FET202 and the drain D of the NMOS tube FET203, pin 13 of the pulse width modulation chip U201 outputs the power amplifier signal, the drain of the NMOS tube FET202 is connected to the positive main power supply J1 interface, and pin 16 of the pulse width modulation chip U201 is connected in series with the resistor R220. The resistor R504 and the positive and negative electrodes of the diode D206 are connected to the drain D of the NMOS tube FET202, the resistor R216 is connected in parallel to the pins 16 and 13 of the pulse width modulation chip U201, one end of the resistor R215 is connected to the positive electrode of the diode D206, and the other end of the resistor R215 is connected to the pin 15 of the pulse width modulation chip U201, an RC absorption circuit (composed of a capacitor C213 and a resistor R222 connected in series) is connected in parallel between the drain D and the source S of the NMOS tube FET202, and another RC absorption circuit (composed of a resistor R223 and a capacitor C226 connected in series) is connected in parallel between the drain D and the source S of the NMOS tube FET203;

[0028] Pin 10 of the pulse width modulation chip U201 is connected to the source of the NMOS tube FET203 through the resistor R253 and the positive and negative electrodes of the light-emitting diode DS201. The second group of power amplifier units is the same as the first group of power amplifier units. The digital power amplifier PWM pulse width modulation circuit is connected to the interfaces J9, J10, J12, J7, 11, and J8 of other lines through interfaces J1, J2, J3, J4, J5, and J6.

[0029] Further, the MCU control chip U16 pin 38 of the MCU control unit is connected to the +5V power supply +5V; the MCU control chip U16 pin 44 is connected to the inductor L5, and then connected to the main power supply positive voltage detection (power supply +85V); the MCU control chip U16 pin 1 is connected to the inductor L8, and then connected to the output negative terminal voltage detection; the MCU control chip U16 pin 3 is connected to the inductor L9, and connected to the output positive terminal voltage detection; the MCU control chip U16 pin 5 and pin 7 are connected to the interface COM1 for program download and update; the MCU control chip U16 pin 12 is connected to the power supply +5V through the resistor R178 and the cathode-positive pole of the light-emitting diode D81;

[0030] The pin 18 of the control chip U16 is connected to the base B of the NPN transistor Q13 through the inductor L3, the positive electrode and the negative electrode of the diode D4, and the resistor R67. The pin 19 of the control chip U16 is connected to the base B of the NPN transistor Q13 through the inductor L4, the positive electrode and the negative electrode of the diode D5, and the resistor R68; the pin 21 of the control chip U16 is connected to the positive electrode of the diode D76 through the resistor R187, and the pin 23 is connected to the positive electrode of the diode D76 through the resistor R186. The pin 22 of the control chip U16 is connected to the positive electrode of the diode D75 through the resistor R185, and the pin 24 is connected to the positive electrode of the diode D75 through the resistor R184. The negative electrodes of the diode D75 and the diode D76 are connected to the pin 1 of the optocoupler U18 of the audio compression circuit;

[0031] Pin 30 of the control chip U16 is connected to the base of the NPN transistor Q22 through a resistor R145, the emitter of the NPN transistor Q22 is connected to the positive electrode of the light-emitting diode D82, the negative electrode of the light-emitting diode D82 is grounded, and the collector of the NPN transistor Q22 is connected to the power supply +12V through a resistor R146.

[0032] Furthermore, pin 1 of the compression chip IC2 of the audio compression circuit is connected to pin 3 of the optocoupler U18 and pin 3 of the switch tube (bidirectional thyristor) D78 through resistors R161 and R165, pin 4 of the optocoupler U18 is connected to the +12V terminal of the power supply through resistor R159, pin 2 of the compression chip IC2 is connected to the +12V terminal of the power supply through resistor R166, pin 3 of the compression chip IC2 is grounded through resistor R167, pin 4 of the compression chip IC2 is connected to pin 2 of the op amp U20A through resistor R169, pin 5 of the compression chip IC2 is connected to pin 3 of the op amp U20A, and pin 1 (output end) of the op amp U20A is connected to pin 3 of the comparator U19A and pin 6 of the comparator U19B through resistor R164.

[0033] Furthermore, in the main power bridge rectifier and filter circuit, a positive voltage series resistor is connected after the main power is rectified and filtered, and the voltage drop on the resistor is detected by transistor Q15. When the load of the power supply is too high, the transistor Q15 drives the triode Q16 to provide a signal to the audio compression circuit to compress the input signal and avoid output distortion.

[0034] The power amplifier module of the present invention is arranged in a double-layer board, the digital power amplifier PWM pulse width modulation circuit is distributed on the upper circuit board (PCB board), and the remaining circuits are arranged on the lower circuit board. The layout is reasonable, and the assembly method is that two PCBs are plugged in through pin headers and sockets, and are uniformly locked on a U-shaped heat sink, which has good heat dissipation effect and good sound quality fidelity effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 Shown is a circuit principle block diagram of the present invention;

[0036] Figure 2A Shown is a circuit diagram of a flyback switching power supply circuit of the present invention;

[0037] Figure 2B Shown is a circuit diagram of a soft switch starting circuit of the present invention;

[0038] Figure 2C Shown is a circuit diagram of a power supply control circuit of the present invention;

[0039] Figure 3 Shown is a circuit diagram of a PFC circuit of the present invention;

[0040] Figure 4 Shown is a circuit diagram of a half-bridge switching power supply circuit of the present invention;

[0041] Figure 5 The figure shows a circuit diagram of a first group of digital power amplifier digital power amplifier PWM power amplifier units of the digital power amplifier PWM pulse width modulation circuit of the present invention;

[0042] Figure 6 Shown is a circuit diagram of a digital power amplifier PWM pulse width modulation circuit of the present invention;

[0043] Fig. 7A Shown is a circuit diagram of the MCU control unit of the present invention;

[0044] Figure 7B Shown is a circuit diagram of a detection circuit of an MCU control unit of the present invention;

[0045] Figure 7C Shown is a circuit diagram of a fan connection circuit of an MCU control unit of the present invention;

[0046] Figure 8 Shown is a circuit diagram of the audio compression circuit of the present invention.

[0047] The following are the descriptions of the reference numerals:

[0048] The first bridge rectifier filter circuit 01, the flyback switching power supply circuit 02, the power supply control circuit 03, the soft switch start circuit 04, the switch impact current protection circuit 05, the second bridge rectifier filter circuit 06, the PFC circuit 07, the half-bridge switching power supply circuit 08, the transformer isolation output circuit 09, the auxiliary power supply 1 rectifier filter circuit 10, the main power supply bridge rectifier filter circuit 11, the auxiliary power supply 2 rectifier filter circuit 12, the PWM drive power supply circuit 13, the digital power amplifier PWM pulse width modulation circuit 14, the LC filter circuit 15, the auxiliary power supply 3 rectifier filter circuit 16, the ±12V auxiliary power supply circuit 17, the +5V auxiliary power supply circuit 18, the MCU control unit 19, the audio compression circuit 20, the temperature detection circuit 21, the auxiliary power supply 4 rectifier filter circuit 22, the fan power supply output circuit 23. DETAILED DESCRIPTION

[0049] In order to further understand the features, technical means and specific objectives and functions achieved by the present invention, and analyze the advantages and spirit of the present invention, a further understanding is obtained through the following detailed description of the present invention in combination with the accompanying drawings and specific implementation methods.

[0050] The power amplifier module of the present invention is arranged in a double-layer board, the digital power amplifier PWM pulse width modulation circuit 24 (pulse width modulation power amplifier circuit) is distributed on the upper circuit board, and the others are arranged on the lower circuit board.

[0051] The principle block diagram of the present invention is shown in the attached Figure 1 , the present invention comprises a first bridge rectifier filter circuit 01, a power control circuit 03, a soft switch start circuit 04, a PFC circuit 07, a transformer isolation output circuit 09, an MCU control unit 19, and a fan power output circuit 23;

[0052] The AC power is input to the first bridge rectifier filter circuit 01, and the flyback switching power supply circuit 02 is started by manually closing the soft switch circuit 04. After the power supply control circuit 03 obtains the power supply, it turns on the relay of the soft switch start circuit 04. The AC power passes through the switch surge current protection circuit 05, the second bridge rectifier filter circuit 06, and the PFC circuit 07 for boosting, and then reaches the half-bridge switching power supply circuit 08. The main power supply and various auxiliary power supplies are output through the transformer isolation output circuit 09 to power the power amplifier PWM drive and start the power amplifier. The weak signal passes through the audio compression circuit 20 and reaches the digital power amplifier PWM pulse width modulation circuit 14 for amplification and output through the LC filter circuit 15. The maximum power is 3000W / 4 ohms. At the same time, the auxiliary power supply supplies power to the MCU control unit 19, and the temperature in the circuit is detected to control the compression of the input signal and the voltage output by the fan power supply output circuit 23.

[0053] Furthermore, the AC input first passes through the bridge rectifier filter 01, and the rectified DC enters the flyback switching power supply circuit 02. The output power is rectified and filtered to supply power to the power control circuit 03, the PFC circuit 07, and the half-bridge switching power supply circuit 08. After the power control circuit 03 is powered on, it controls the soft switch start circuit 04 to connect the main power line.

[0054] The incoming AC power first passes through the first bridge rectifier filter circuit 01, and reaches the flyback switching power supply circuit 02. After the driving optocoupler IC1 is started, the secondary rectifier and filter of the transformer T3 obtains the VCC-PRI voltage, and the voltage of +15V-PRI and +5VP is obtained through voltage stabilization. The +5VP voltage supplies power to the power control circuit 03. After obtaining the power supply, the control chip controls the relay RY1 of the soft switch start circuit 04 to close. The AC power passes through the relay RY1 to reach the switch inrush current protection circuit 05, the second bridge rectifier filter circuit 06, and the PFC circuit 07, and then reaches the half-bridge switching power supply circuit 08. The transformer isolation output circuit 09 boosts the voltage, and the main power supply bridge rectifier filter circuit 11 rectifies and filters to obtain the main voltage and its auxiliary power supply.

[0055] The auxiliary power supply 1 rectifier filter circuit 10 drives transistor Q3 and transistor Q12 after rectification and filtering, and then the relay RY2 coil is energized and closed, and the resistor R3, resistor R4 and thermistor PR1 on the switch surge current protection circuit 05 are short-circuited to reduce loss;

[0056] The voltage sensed by the rectifier and filter circuit 12 of the auxiliary power supply 2 is based on the negative voltage of the main power supply. After rectification and filtering, the voltage is stabilized to obtain a voltage of +12V / -VCC, which is output to the digital power amplifier PWM pulse width modulation circuit 14 for use;

[0057] The auxiliary power supply 3 rectifier filter circuit 16 obtains ±12V voltage after voltage stabilization, and the output end is respectively connected to the PWM drive power supply circuit 13, the audio compression circuit 20, the +5V auxiliary power supply circuit 18, and the temperature detection circuit 21. The +12V voltage of the ±12V auxiliary power supply circuit 17 is stabilized by the +5V auxiliary power supply circuit 18 to obtain a +5V power supply, and the output is connected to the MCU control unit 19;

[0058] The voltage output by the rectifier filter circuit 22 of the auxiliary power supply 4 is connected to the cooling fan of the fan power output circuit 23, and the fan speed is controlled by the MCU control unit 19.

[0059] In some embodiments, the input power adopts a soft switching design, using weak current to control the input high-voltage part. When processing the startup impact current, after the power supply starts normally, the impact current protection components are short-circuited through a relay to avoid additional useless power loss when working at high power. The power driver chip is powered by a flyback switching power supply, which enables the power driver chip to work stably when working at high power.

[0060] Further, the PFC circuit 07 is driven by the PFC driver chip U8 in a totem pole manner to drive two parallel NMOS tubes Q4 and Q5. The pin 3 of the PFC driver chip U8 is connected to the source S of the NMOS tubes Q4 and Q5 after passing through the resistor R1 and the resistor group (composed of parallel resistors R11 to R18); the pin 4 of the PFC driver chip U8 is connected to the drain D of the NMOS tubes Q4 and Q5 after passing through the resistor R64, the resistor R63, and the inductor L2; the source S of the NMOS tubes Q4 and Q5 is grounded, and the drain D of the NMOS tubes Q4 and Q5 is connected to the positive power supply VCC after passing through the positive and negative electrodes of the diode BD2; the gate G and source S of the NMOS tube Q4 are connected in parallel with a resistor R21, and the gate G and source S of the NMOS tube Q5 are connected in parallel with a resistor R22;

[0061] Pin 7 of the PFC driver chip U8 is connected to the emitter E of the NPN transistor Q2 in the flyback switching power supply circuit 02 through the resistor R10, and the collector C of the NPN transistor Q2 is connected to the +15V-PRI terminal (that is, pin 7 of the PFC driver chip U8 is connected to the +15V-PRI terminal through the resistor R10 and the NPN transistor Q2), and pin 8 of the PFC driver chip U8 is connected to the base B of the NPN transistor Q1 and the base B of the PNP transistor Q14; the emitter of the NPN transistor Q1 and the PNP transistor Q14 The emitter is connected, the emitter of the NPN transistor Q1 and the emitter of the PNP transistor Q14 are connected to the gate G of the NMOS transistor Q4 through the driving resistor R19, and the emitter of the NPN transistor Q1 and the emitter of the PNP transistor Q14 are connected to the gate G of the NMOS transistor Q5 through the driving resistor R20; the collector of the PNP transistor Q14 is grounded, the collector of the NPN transistor Q1 is connected to the pin 2 of the PFC driver chip U8 through the resistor R5, and the collector of the PNP transistor Q14 is connected to the pin 1 of the PFC driver chip U8;

[0062] The driving resistor R19 and the driving resistor R20 are respectively connected in parallel with the fast diode D18 and the fast diode D19. The anode of the fast diode D18 and the anode of the fast diode D19 are connected to the gate G of the NMOS tube Q4. The gate G and the source S of the NMOS tube Q4 and the NMOS tube Q5 are respectively connected in parallel with the resistor R21 and the resistor R22. The drain D and the source S of the NMOS tube Q4 and the NMOS tube Q5 are respectively connected in parallel with the capacitor C16 and the capacitor C17. The resistors R11 to R18 are connected in parallel to the source S of the NMOS tube Q4 and the source S of the NMOS tube Q5. The resistors R11 to R18 are connected in parallel to serve as short-circuit protection for the NMOS tube Q4 and the NMOS tube Q5. The drain D of the NMOS tube Q4 and the drain D of the NMOS tube Q5 are connected to the anode of the fast diode BD2. The cathode of the fast diode BD2 is connected to the positive power supply VCC. The resistor R24 ​​and the capacitor C20 are connected in series and then connected in parallel to the fast diode BD2. The source S of the NMOS tube Q5 is grounded.

[0063] PFC circuit 07 see attached Figure 3 After the PFC driver chip U8 is powered on and started, the output from the pin 8 of the PFC driver chip U8 is used to drive the NMOS tubes Q4 and Q5 of the PFC in a totem pole manner. The collector of the NPN transistor Q1 is grounded after passing through the resistor R188 and the positive and negative electrodes of the light-emitting diode D56. The resistor R188 and the light-emitting diode D56 act as indicators; the resistors R11 to R18 act as short-circuit protection for the NMOS tubes Q4 and Q5 of the PFC. The fast diodes D18 and D19 are connected in parallel to the driving resistors R19 and R20 respectively. The resistors R21 and R22 are connected in parallel between the gate and source of the NMOS tubes Q4 and Q5 respectively. The capacitors C16 and C17 are connected in parallel between the drain and source of the NMOS tubes Q4 and Q5. The rectifier fast diode BD2 is connected in parallel with an RC absorption circuit (composed of a resistor R24 ​​and a capacitor C20 in series).

[0064] Furthermore, the half-bridge switching power supply circuit 08 uses a totem pole method to drive the NMOS tube, the power driver chip U7 pin 2 and pin 3 are connected to +15V-PRI, and a small power switching power supply is used for power supply. The power driver chip U7 pin 14 is connected to +15V-PRI through the cathode-positive pole of the diode D21, and the power driver chip U7 pin 14 is connected to the power driver chip U7 pin 12 through the parallel capacitor C52 and the capacitor C53. The power driver chip U7 pin 13 is connected to the base of the NPN transistor Q8 and the base of the PNP transistor Q7 through the resistor R38. The power driver chip U7 pin 13 is connected to the optocoupler U2 pin 1 through the resistor R43, and the power driver chip U7 pin 11 is connected to the NP transistor Q8 through the resistor R37. The base of the N transistor Q9 and the base of the PNP transistor Q6, the base of the NPN transistor Q9 and the base of the PNP transistor Q6 are connected to pin 1 of the optocoupler U3 through the resistor R44, the emitters of the NPN transistor Q8 and the PNP transistor Q7 are connected, the emitters of the NPN transistor Q8 and the PNP transistor Q7 are connected to the gate of the NMOS tube Q10 through two parallel driving resistors R41 and the driving resistor R42, the fast diode D22 is connected in parallel to the driving resistor R41 and the driving resistor R42, the resistor R48 is connected in parallel between the gate and the source of the NMOS tube Q10, and the fast diode D27 and the RC absorption circuit (composed of a resistor R54 and a capacitor C57 connected in series) are connected in parallel between the drain and the source of the NMOS tube Q10.

[0065] Further, in some embodiments, the half-bridge switching power supply circuit 08 is shown in the attached Figure 4 The circuit has over-temperature / over-voltage / over-current protection, DC protection, and uses a temperature control switch to achieve thermal protection automatic shutdown, power limitation, hiccup protection, cooling self-start, Reset protection, power-on reset, and software reset. Pins 2 and 3 of the power driver chip U7 are powered by the flyback switching power supply circuit 02. When the power is output, the power supply of the power driver chip U7 is stable. Pins 13 and 11 of the power driver chip U7 drive the totem poles through the driving resistors R38 and R37 respectively to indirectly drive the NMOS tube Q1 The NMOS tube Q0 and the NMOS tube Q11, the NMOS tube driving resistor R54 and the driving resistor R55 are connected in parallel with the fast diode D27 and the fast diode D28 respectively, the fast diode D27 and the diode D28 are connected in parallel between the drain and the source of the NMOS tube Q10 and the NMOS tube Q11 respectively, and the RC absorption circuits are connected in parallel between the drain and the source of the NMOS tube Q10 and the NMOS tube Q11: R54-C57 (resistor R54 is connected in series with capacitor C57) and R55-C58 (resistor R55 is connected in series with capacitor C58).

[0066] The gate and source of NMOS tube Q10 and NMOS tube Q11 are connected in parallel with resistor R47 and resistor R48 respectively. Pin 12 of power driver chip U7 is output to the main winding J3 of transformer T2. The parallel resistors R56 and R57 are current detection resistors. The current detection resistor is connected to the source of NMOS tube Q11. The current detection resistor is connected to pin 3 of comparator U5A through resistor R53 and the positive and negative electrodes of diode D37. Pin 1 of comparator U5A is connected to pin 10 of power driver chip U7 to realize overcurrent protection.

[0067] The main winding J4 of the main transformer T2 flows through the primary of the high-frequency transformer T1, and after rectification and filtering at the secondary of the high-frequency transformer T1, it is connected to the pin 3 of the comparator U5 through the positive and negative electrodes of the diode D39 to achieve overvoltage protection; the secondary winding pin 8 of the transformer T2 is rectified and filtered to power the relay RY2, and the startup impact current protection component resistor R3, resistor R4, and thermistor PR1 are short-circuited to reduce the loss of useless power at high power.

[0068] The bases of transistors Q7 and Q8 are connected to pin 1 of optocoupler U2 through resistor R43, and pin 2 of optocoupler U2 is connected to pin 12 of power driver chip U7, which is used to detect the high-end drive of power driver chip U7, and the output result is connected from pin 3 of optocoupler U2 to pin 8 of power control chip U15 via resistor R45; the bases of transistors Q6 and Q9 are connected to pin 1 of optocoupler U3 through resistor R44, and pin 2 of optocoupler U3 is grounded, which is used to detect the low-end drive of power driver chip U7, and the output result is connected from pin 3 of optocoupler U3 to pin 7 of power control chip U15 via resistor R46, which is used to monitor the operating status of power driver chip U7.

[0069] In some embodiments, the half-bridge switching power supply circuit 08 drives the power supply NMOS tube using a totem pole driving method, connects a fast diode in parallel to the driving resistor, connects a fast diode and an RC absorption circuit in parallel to the drain and source of the NMOS tube, and connects a resistor in parallel to the gate and source of the NMOS tube;

[0070] The emitter of NPN transistor Q9 is connected to the emitter of PNP transistor Q6, and the emitter of PN transistor Q9 and the emitter of PNP transistor Q6 are connected to the gate of NMOS transistor Q11 through parallel driving resistor R39 and driving resistor R40, fast diode D23 is connected in parallel to driving resistor R39 and driving resistor R40, resistor R47 is connected in parallel to the gate and source of NMOS transistor Q11, fast diode D28 and another RC absorption circuit (composed of series resistor R55 and capacitor C58) are connected in parallel to the drain and source of NMOS transistor Q11, and pins 8 and 9 of power driver chip U7 are grounded;

[0071] The main winding J4 of transformer T2 is connected to pin 4 of high-frequency transformer T1, and pin 2 of high-frequency transformer T1 returns to the center point (CEN) of the main voltage through two parallel capacitors C61 and C62. The voltage of the secondary of high-frequency transformer T1 after bridge rectification is connected to pin 3 of comparator U5A, and pin 1 of comparator U5A is connected to pin 10 of power driver chip U7.

[0072] Furthermore, the digital power amplifier PWM pulse width modulation circuit 14 includes two groups of PWM power amplifier units. The first group of power amplifier units is provided with an over-temperature protection circuit. The power supply +5V-D is grounded via a resistor R448 and a thermistor PR400. The voltage drop of the thermistor PR400 is detected using pins 40 and 42 of the microcontroller U16 of the MCU control unit 19. The thermistor PR400 is located next to the power amplifier NMOS tube. The digital power amplifier PWM pulse width modulation circuit 14 is distributed on the upper circuit board, and the remaining circuits are arranged on the lower circuit board. The entire circuit is assembled on a U-shaped heat sink, which has good heat dissipation conditions and is also convenient for assembly and maintenance.

[0073] Digital power amplifier PWM pulse width modulation circuit 14 see attached Figure 5 and attached Figure 6 , the PWM chip U201 pin 15 of the first group of power amplifier units is connected to the positive main power supply J1 interface through the resistor R218, the PWM chip U201 pin 9 is connected to the negative main power supply J2 interface, the PWM chip U201 pin 14 is connected to the gate G of the NMOS tube FET202 through the resistor R220, the PWM chip U201 pin 13 is connected to the source S of the NMOS tube FET202 and the drain D of the NMOS tube FET203, the PWM chip U201 pin 13 outputs the power amplifier signal, the drain of the NMOS tube FET202 is connected to the positive main power supply J1 interface, the PWM chip U201 pin 16 is connected in series with the resistor R220. Resistor R504 and diode D206 are connected to drain D of NMOS tube FET202 after positive and negative poles are connected, resistor R216 is connected in parallel to pins 16 and 13 of pulse width modulation chip U201, one end of resistor R215 is connected to the positive pole of diode D206, and the other end of resistor R215 is connected to pin 15 of pulse width modulation chip U201, an RC absorption circuit (composed of capacitor C213 and resistor R222 connected in series) is connected in parallel between drain D and source S of NMOS tube FET202, and another RC absorption circuit (composed of resistor R223 and capacitor C226 connected in series) is connected in parallel between drain D and source S of NMOS tube FET203;

[0074] Pin 10 of the pulse width modulation chip U201 is connected to the source of the NMOS tube FET203 through the resistor R253 and the positive and negative electrodes of the light-emitting diode DS201. The second group of power amplifier units is the same as the first group of power amplifier units. When the signal is input, the signal of the second group is the inversion of the first group. The output part is bridged after LC filtering, and the maximum power is 3000W / 4 ohms.

[0075] The digital power amplifier PWM pulse width modulation circuit 14 is connected to interfaces J9, J10, J12, J7, 11 and J8 of other lines through interfaces J1, J2, J3, J4, J5 and J6.

[0076] Further, the circuit of the MCU control unit 19 is shown in FIG7 , wherein the MCU control chip U16 pin 38 of the MCU control unit 19 is connected to the power supply +5V; the MCU control chip U16 pin 44 is connected to the inductor L5, and then connected to the main power supply positive voltage detection (power supply +85V); the MCU control chip U16 pin 1 is connected to the inductor L8, and then connected to the output negative terminal voltage detection; the MCU control chip U16 pin 3 is connected to the inductor L9, and connected to the output positive terminal voltage detection; the MCU control chip U16 pin 5 and pin 7 are connected to the interface COM1 for program download and update; the MCU control chip U16 pin 12 is connected to the power supply +5V through the resistor R178 and the cathode-positive pole of the light-emitting diode D81;

[0077] Pin 18 of the control chip U16 is connected to the base B of the NPN transistor Q13 through the inductor L3, the positive and negative electrodes of the diode D4, and the resistor R67. Pin 19 of the control chip U16 is connected to the base B of the NPN transistor Q13 through the inductor L4, the positive and negative electrodes of the diode D5, and the resistor R68, which is used for the fan acceleration circuit; pin 21 of the control chip U16 is connected to the positive electrode of the diode D76 through the resistor R187, and pin 23 is connected to the positive electrode of the diode D76 through the resistor R186, pin 22 of the control chip U16 is connected to the positive electrode of the diode D75 through the resistor R185, and pin 24 is connected to the positive electrode of the diode D75 through the resistor R184, and the negative electrodes of the diode D75 and the diode D76 are connected to pin 1 of the optocoupler U18 of the audio compression circuit 20; it is used to control the compression of the input signal.

[0078] Pin 30 of the control chip U16 is connected to the base of the NPN transistor Q22 through a resistor R145, the emitter of the NPN transistor Q22 is connected to the positive electrode of the light-emitting diode D82, the negative electrode of the light-emitting diode D82 is grounded, and the collector of the NPN transistor Q22 is connected to the power supply +12V through a resistor R146.

[0079] Further, the compression chip IC2 pin 1 of the audio compression circuit 20 is connected to the optocoupler U18 pin 3 and the switch tube (bidirectional thyristor) D78 pin 3 through resistors R161 and R165, the optocoupler U18 pin 4 is connected to the power supply +12V terminal through resistor R159, the compression chip IC2 pin 2 is connected to the power supply +12V terminal through resistor R166, the compression chip IC2 pin 3 is grounded through resistor R167, the compression chip IC2 pin 4 is connected to the op amp U20A pin 2 through resistor R169, the compression chip IC2 pin 5 is connected to the op amp U20A pin 3, the op amp U20A pin 1 (output end) is connected to the comparator U19A pin 3 and the comparator U19B pin 6 through resistor R164.

[0080] Pins 31 and 34 of the control chip U16 are connected to the base of the transistor Q20 through diodes D45 and D44 respectively, and are used to control the shutdown of the PWM chip. Pins 32 and 35 of the control chip U16 are connected to pin 1 of the comparator U13 through resistors, and are used to detect the status of the PWM chip.

[0081] Furthermore, in the main power bridge rectifier filter circuit 11, the positive voltage after the main power is rectified and filtered is connected in series with a resistor, and the voltage drop on the resistor is detected by the transistor Q15. When the load of the power supply is too high, the transistor Q15 drives the transistor Q16 to provide a signal to the audio compression circuit 20 to compress the input signal and avoid output distortion.

[0082] See the attached for power startup method Figure 2A , Attachment Figure 2B , Attachment Figure 2C The AC input reaches pin 1 and pin 3 of the socket J16, reaches the socket J15 through the cable holder, reaches the fuse F1 and thermistor PR2, and enters the bridge stack rectifier filter bridge BD1 of the first bridge rectifier filter circuit 01, where D20 is a gas discharge tube. When used in the 110VAC voltage range, when the power supply is 220VAC, the gas discharge tube D20 will act to break the fuse F1, which plays a protective role; when the switch connected to the plug interface CN3 is closed, the flyback switching power supply circuit 02 is started, and the three voltages of VCC-PRI, +15V-PRI and +5VP are obtained after rectification, filtering and voltage stabilization at the secondary end of the transformer T3. The secondary winding of the transformer T3 is grounded after passing through the positive and negative electrodes of the diode D42 and the capacitor C102. The secondary winding of the transformer T3 is rectified and filtered after passing through the positive and negative electrodes of the diode D42 and the capacitor C102. The secondary winding of the transformer T3 is grounded after passing through the positive and negative electrodes of the diode D42, the resistor R88 and the positive and negative electrodes of the light-emitting diode D53. The light-emitting diode D53 plays an indicating role;

[0083] The cathode of diode D42 is connected to the cathode of voltage regulator tube D54, the anode of voltage regulator tube D54 is connected to pin 1 of optocoupler IC1 through resistor R89, pin 5 of optocoupler IC1 is connected to the cathode of diode D41, the anode of diode D41 is connected to pin 4 of transformer T3, pin 4 of optocoupler IC1 is connected to pin 4 of flyback switching power supply driver chip U10, and is used for feedback, wherein the +5VP voltage supplies power to power control chip U15 of power control circuit 03, and then pin 5 of power control chip U15 controls the closing of relay RY1 of soft switch start circuit 04 through transistor Q18, and the alternating current passes through relay RY1 to reach resistor R3, resistor R4 and thermistor PR1 of switch inrush current protection circuit 05, and reaches the second bridge rectifier filter circuit 06.

[0084] Audio compression circuit 20 circuit see Figure 8 , pin 1 of compression chip IC2 is connected to pin 3 of optocoupler U18 and pin 3 of switch tube (bidirectional thyristor) D78 through resistors R161 and R165 respectively, pin 4 of optocoupler U18 is connected to resistor R159 to power supply +12V, pin 2 of compression chip IC2 is connected to power supply +12V through resistor R166, pin 3 of compression chip IC2 is grounded through resistor R167, pin 4 of compression chip IC2 is connected to pin 2 of op amp U20A through resistor R169, pin 5 of compression chip IC2 is connected to pin 3 of op amp U20A, output of pin 1 of op amp U20A is connected to pin 3 of comparator U19A and pin 6 of comparator U19B through resistor R164, when the main power supply load is too heavy, transistor Q16 is driven by transistor Q15 to turn on optocoupler U18 to play a compression role, when MCU detects that the temperature of power amplifier is too high, it controls pins 21 to 24 of chip U16 to control audio compression circuit 20 at the input end.

[0085] The above-described embodiments only express some implementation methods of the present invention, and the description thereof is relatively specific and detailed, but it cannot be understood as limiting the scope of the present invention. It should be pointed out that, for those of ordinary skill in the art, several modifications and improvements can be made without departing from the concept of the present invention, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the attached claims.

Claims

1. A power amplifier system for a high-power 6000W digital power amplifier, comprising: a first bridge rectifier filter circuit (01), characterized in that: The AC power is input to the first bridge rectifier filter circuit (01), and the flyback switch power supply circuit (02) is started by manually closing the soft switch start circuit (04). After the power supply control circuit (03) obtains the power supply, it is connected to the soft switch start circuit (04). The AC power passes through the switch surge current protection circuit (05), the second bridge rectifier filter circuit (06), and the PFC circuit (07), and then reaches the half-bridge switch power supply circuit (08). The AC power is boosted and output to the main power supply and various auxiliary power supplies through the transformer isolation output circuit (09), and the power is supplied to the power amplifier PWM drive to start the power amplifier. The weak signal passes through the audio compression circuit (20) and reaches the digital power amplifier PWM pulse width modulation circuit (14) for amplification and output through the LC filter circuit (15). The maximum power is 3000W / 4 ohms. At the same time, the auxiliary power supply supplies power to the MCU control unit (19), and the temperature in the circuit is detected to control the compression of the input signal and the voltage output by the fan power supply output circuit (23); The flyback switching power supply circuit (02) is connected to the soft switch starting circuit (04); the AC input first passes through the first bridge rectifier filter circuit (01); the rectified DC enters the flyback switching power supply circuit (02); the output power is rectified and filtered to supply power to the power control circuit (03), the PFC circuit (07), and the half-bridge switching power supply circuit (08); after the power control circuit (03) is powered on, it controls the soft switch starting circuit (04) and connects the main power supply line; The PFC circuit (07) is driven by the PFC driver chip U8 through a totem pole mode to drive two parallel NMOS tubes Q4 and Q5. The pin 3 of the PFC driver chip U8 is connected to the source S of the NMOS tubes Q4 and Q5 after passing through the resistor R1 and the parallel resistors R11 to R18; the pin 4 of the PFC driver chip U8 is connected to the drain D of the NMOS tubes Q4 and Q5 after passing through the resistor R64, the resistor R63 and the inductor L2; Pin 7 of the PFC driver chip U8 is connected to the emitter E of the NPN transistor Q2 in the flyback switching power supply circuit (02) through a resistor R10, the collector C of the NPN transistor Q2 is connected to the +15V-PRI terminal, and pin 8 of the PFC driver chip U8 is connected to the base B of the NPN transistor Q1 and the base B of the PNP transistor Q14; the emitter of the NPN transistor Q1 and the emitter of the PNP transistor Q14 are connected, the emitter of the NPN transistor Q1 and the emitter of the PNP transistor Q14 are connected to the gate G of the NMOS transistor Q4 through a driving resistor R19, the emitter of the NPN transistor Q1 and the emitter of the PNP transistor Q14 are connected to the gate G of the NMOS transistor Q5 through a driving resistor R20; the collector of the PNP transistor Q14 is grounded, the collector of the NPN transistor Q1 is connected to pin 2 of the PFC driver chip U8 through a resistor R5, and the collector of the PNP transistor Q14 is connected to pin 1 of the PFC driver chip U8; The half-bridge switching power supply circuit (08) uses a totem pole method to drive the NMOS tube. Pins 2 and 3 of the power driver chip U7 are connected to +15V-PRI. A low-power switching power supply is used for power supply. Pin 14 of the power driver chip U7 is connected to +15V-PRI through the cathode-anode of the diode D21. Pin 14 of the power driver chip U7 is connected to pin 12 of the power driver chip U7 through capacitors C52 and C53 connected in parallel. Pin 13 of the power driver chip U7 is connected to the base of the NPN transistor Q8 and the base of the PNP transistor Q7 through resistor R38. Pin 13 of the power driver chip U7 is connected to pin 1 of the optocoupler U2 through resistor R43. Pin 11 of the power driver chip U7 is connected to the optocoupler U2 through resistor R43. The resistor R37 is connected to the base of the NPN transistor Q9 and the base of the PNP transistor Q6, the base of the NPN transistor Q9 and the base of the PNP transistor Q6 are connected to the pin 1 of the optocoupler U3 through the resistor R44, the emitters of the NPN transistor Q8 and the PNP transistor Q7 are connected, the emitters of the NPN transistor Q8 and the PNP transistor Q7 are connected to the gate of the NMOS tube Q10 through two parallel driving resistors R41 and R42, the fast diode D22 is connected in parallel to the driving resistor R41 and R42, the resistor R48 is connected in parallel between the gate and the source of the NMOS tube Q10, and the fast diode D27 and the RC absorption circuit are connected in parallel between the drain and the source of the NMOS tube Q10; The digital power amplifier PWM pulse width modulation circuit (14) comprises two groups of PWM power amplifier units. The first group of power amplifier units is provided with an over-temperature protection circuit. The power supply +5V-D is grounded via a resistor R448 and a thermistor PR400. The voltage drop of the thermistor PR400 is detected by using the pins 40 and 42 of the MCU control chip U16 of the MCU control unit (19). The thermistor PR400 is located next to the power amplifier NMOS tube. Pin 15 of the pulse width modulation chip U201 of the first group of power amplifier units is connected to the positive main power supply J1 interface through resistor R218, pin 9 of the pulse width modulation chip U201 is connected to the negative main power supply J2 interface, pin 14 of the pulse width modulation chip U201 is connected to the gate G of the NMOS tube FET202 through resistor R220, pin 13 of the pulse width modulation chip U201 is connected to the source S of the NMOS tube FET202 and the drain D of the NMOS tube FET203, pin 13 of the pulse width modulation chip U201 outputs the power amplifier signal, and the drain of the NMOS tube FET202 is connected to the positive main power supply J 1 interface, the pin 16 of the pulse width modulation chip U201 is connected in series with the resistor R504, the positive electrode and the negative electrode of the diode D206, and then connected to the drain D of the NMOS tube FET202, the resistor R216 is connected in parallel to the pin 16 and the pin 13 of the pulse width modulation chip U201, one end of the resistor R215 is connected to the positive electrode of the diode D206, and the other end of the resistor R215 is connected to the pin 15 of the pulse width modulation chip U201, an RC absorption circuit is connected in parallel between the drain D and the source S of the NMOS tube FET202, and another RC absorption circuit is connected in parallel between the drain D and the source S of the NMOS tube FET203; Pin 10 of the pulse width modulation chip U201 is connected to the source of the NMOS tube FET203 through the resistor R253 and the positive and negative electrodes of the light emitting diode DS201. The second group of power amplifier units is the same as the first group of power amplifier units. The digital power amplifier PWM pulse width modulation circuit (14) is connected to the interfaces J9, J10, J12, J7, 11 and J8 of other lines through interfaces J1, J2, J3, J4, J5 and J6.

2. According to claim 1, a high-power 6000W digital power amplifier power amplifier system is characterized in that: The AC input first passes through the first bridge rectifier filter circuit (01) and reaches the flyback switch power supply circuit (02). After the drive optical coupler IC1 is started, the secondary rectifier and filter of the transformer T3 obtains the VCC-PRI voltage, and the voltage of +15V-PRI and +5VP is obtained through voltage stabilization. The +5VP voltage is used to supply power to the power control circuit (03). After obtaining the power supply, the control chip controls the relay RY1 of the soft switch start circuit (04) to close. The AC passes through the relay RY1 to reach the switch surge current protection circuit (05), the second bridge rectifier filter circuit (06), and the PFC circuit (07), and then reaches the half-bridge switch power supply circuit (08). The transformer isolation output circuit (09) boosts the voltage, and after rectification and filtering by the main power bridge rectifier filter circuit (11), the main voltage and its auxiliary power are obtained.

3. The power amplifier system of a high-power 6000W digital power amplifier according to claim 1, characterized in that: The driving resistor R19 and the driving resistor R20 are respectively connected in parallel with a fast diode D18 and a fast diode D19, the anode of the fast diode D18 is connected to the gate G of the NMOS tube Q4, and the anode of the fast diode D19 is connected to the gate G of the NMOS tube Q5; the gate G and the source S of the NMOS tube Q4 and the NMOS tube Q5 are respectively connected in parallel with a resistor R21 and a resistor R22, and the drain D and the source S of the NMOS tube Q4 and the NMOS tube Q5 are respectively connected in parallel with a capacitor C16 and a capacitor C 17. Resistors R11~R18 are connected in parallel to the source S of NMOS tube Q4 and the source S of NMOS tube Q5. Resistors R11~R18 are connected in parallel to serve as short-circuit protection for NMOS tube Q4 and NMOS tube Q5. The drain D of NMOS tube Q4 and the drain D of NMOS tube Q5 are connected to the positive electrode of fast diode BD2. The negative electrode of fast diode BD2 is connected to the positive power supply VCC. Resistor R24 ​​and capacitor C20 are connected in series and then connected in parallel to fast diode BD2. The source S of NMOS tube Q5 is grounded.

4. The power amplifier system of a high-power 6000W digital power amplifier according to claim 1, characterized in that: The emitter of the NPN transistor Q9 is connected to the emitter of the PNP transistor Q6, the emitter of the PN transistor Q9 and the emitter of the PNP transistor Q6 are connected to the gate of the NMOS transistor Q11 through the parallel driving resistor R39 and the driving resistor R40, the fast diode D23 is connected in parallel to the driving resistor R39 and the driving resistor R40, the resistor R47 is connected in parallel to the gate and source of the NMOS transistor Q11, the fast diode D28 and another RC absorption circuit are connected in parallel to the drain and source of the NMOS transistor Q11, and the pins 8 and 9 of the power driver chip U7 are grounded; The main winding J4 of transformer T2 is connected to pin 4 of high-frequency transformer T1, and pin 2 of high-frequency transformer T1 returns to the center point of the main voltage through two parallel capacitors C61 and capacitor C62. The voltage of the secondary of high-frequency transformer T1 after bridge rectification is connected to pin 3 of comparator U5A, and pin 1 of comparator U5A is connected to pin 10 of power driver chip U7.

5. The power amplifier system of the high-power 6000W digital power amplifier according to claim 1 is characterized in that: The MCU control chip U16 pin 38 of the MCU control unit (19) is connected to a +5V power supply +5V; the MCU control chip U16 pin 44 is connected to the inductor L5 and then connected to the main power supply positive voltage detection; the MCU control chip U16 pin 1 is connected to the inductor L8 and then connected to the output negative terminal voltage detection; the MCU control chip U16 pin 3 is connected to the inductor L9 and then connected to the output positive terminal voltage detection; the MCU control chip U16 pin 5 and pin 7 are connected to the interface COM1 for program download and update; the MCU control chip U16 pin 12 is connected to the power supply +5V through the resistor R178 and the cathode-anode of the light-emitting diode D81; The pin 18 of the MCU control chip U16 is connected to the base B of the NPN transistor Q13 through the inductor L3, the positive electrode and the negative electrode of the diode D4, and the resistor R67; the pin 19 of the MCU control chip U16 is connected to the base B of the NPN transistor Q13 through the inductor L4, the positive electrode and the negative electrode of the diode D5, and the resistor R68; the pin 21 of the MCU control chip U16 is connected to the positive electrode of the diode D76 through the resistor R187, and the pin 23 is connected to the positive electrode of the diode D76 through the resistor R186; the pin 22 of the MCU control chip U16 is connected to the positive electrode of the diode D75 through the resistor R185, and the pin 24 is connected to the positive electrode of the diode D75 through the resistor R184; the cathodes of the diode D75 and the diode D76 are connected to the pin 1 of the optocoupler U18 of the audio compression circuit (20); Pin 30 of the MCU control chip U16 is connected to the base of the NPN transistor Q22 through a resistor R145, the emitter of the NPN transistor Q22 is connected to the positive electrode of the light-emitting diode D82, the negative electrode of the light-emitting diode D82 is grounded, and the collector of the NPN transistor Q22 is connected to the power supply +12V through a resistor R146.

6. The power amplifier system of a high-power 6000W digital power amplifier according to claim 1, characterized in that: Pin 1 of the compression chip IC2 of the audio compression circuit (20) is connected to pin 3 of the optocoupler U18 and pin 3 of the switch tube D78 through resistors R161 and R165, pin 4 of the optocoupler U18 is connected to the +12V terminal of the power supply through resistor R159, pin 2 of the compression chip IC2 is connected to the +12V terminal of the power supply through resistor R166, pin 3 of the compression chip IC2 is grounded through resistor R167, pin 4 of the compression chip IC2 is connected to pin 2 of the operational amplifier U20A through resistor R169, pin 5 of the compression chip IC2 is connected to pin 3 of the operational amplifier U20A, and pin 1 of the operational amplifier U20A is connected to pin 3 of the comparator U19A and pin 6 of the comparator U19B through resistor R164.

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