Solid-state imaging device and electronic equipment

Abstract

It is desirable to provide a solid-state imaging device capable of further improving the quality and reliability of the solid-state imaging device and an electronic device equipped with such a solid-state imaging device. A solid-state imaging device is provided, comprising: a first semiconductor device including an imaging element that generates a pixel signal in units of pixels; a second semiconductor device in which a first signal processing circuit required for signal processing of the pixel signal is embedded using a buried component; a third semiconductor device in which a second signal processing circuit required for signal processing of the pixel signal is embedded using a buried component; and a silicon-containing layer. The first semiconductor device and the second semiconductor device are electrically connected to each other, the first semiconductor device and the third semiconductor device are electrically connected to each other, the first semiconductor device, the silicon-containing layer, and the second semiconductor device are arranged in this order, and the first semiconductor device, the silicon-containing layer, and the third semiconductor device are arranged in this order.

Description

Technical Field

[0001] The present technology relates to a solid-state imaging device and an electronic device. Background Art

[0002] Generally, solid-state imaging devices such as CMOS (complementary metal oxide semiconductor) image sensors and CCD (charge coupled device) are widely used in digital cameras, digital video cameras, and the like.

[0003] In recent years, technologies for miniaturizing solid-state imaging devices have been actively developed, and for example, a technology has been proposed for combining solid-state imaging elements with circuits such as signal processing circuits and storage circuits in a wafer state and stacking them by a WoW (wafer on wafer) method.

[0004] Cited technical literature

[0005] Patent Literature

[0006] Patent Document 1: Japanese Patent Application Laid-Open No. 2014-099582 Summary of the invention

[0007] Technical issues to be solved

[0008] However, although the technology proposed in Patent Document 1 can realize the miniaturization of the solid-state imaging device, there is still a problem that the quality and reliability of the solid-state imaging device cannot be further improved.

[0009] Therefore, the present technology has been made in view of such a situation, and a main object of the present technology is to provide a solid-state imaging device capable of further improving the quality and reliability of the solid-state imaging device and an electronic device equipped with such a solid-state imaging device.

[0010] Solutions to technical problems

[0011] The inventors of the present invention have conducted intensive studies to solve the above-mentioned problems, and as a result, have succeeded in further improving the quality and reliability of the solid-state imaging device, thereby completing the present technology.

[0012] That is, as a first aspect, the present technology provides a solid-state imaging device provided with:

[0013] A first semiconductor device including an imaging element that generates a pixel signal in units of pixels;

[0014] a second semiconductor device in which a signal processing circuit necessary for signal processing of the pixel signal is embedded using an embedded component; and

[0015] Silicon-containing layer,

[0016] wherein the first semiconductor device and the second semiconductor device are electrically connected to each other, and

[0017] The first semiconductor device, the silicon-containing layer, and the second semiconductor device are arranged in this order.

[0018] In the solid-state imaging device according to the first aspect of the present technology, a penetration via penetrating the silicon-containing layer may be formed, and the first semiconductor device and the second semiconductor device may be electrically connected to each other via the penetration via.

[0019] In the solid-state imaging device according to the first aspect of the present technology, the first semiconductor device and the second semiconductor device may be electrically connected to each other by Cu-Cu bonding.

[0020] In the solid-state imaging device according to the first aspect of the present technology, the first semiconductor device and the second semiconductor device may be electrically connected to each other by Cu-Cu bonding, and

[0021] The silicon-containing layer may be formed at an interface of the Cu-Cu bond between the first semiconductor device and the second semiconductor device.

[0022] In the solid-state imaging device according to the first aspect of the present technology, a penetration via penetrating the silicon-containing layer may be formed, and the first semiconductor device and the second semiconductor device may be electrically connected to each other through the Cu-Cu bonding via the penetration via.

[0023] In the solid-state imaging device according to the first aspect of the present technology, the silicon-containing layer may be formed continuously across a plurality of pixels.

[0024] In the solid-state imaging device according to the first aspect of the present technology, the silicon-containing layer may contain at least one type of silicon selected from the group consisting of single crystal silicon, amorphous silicon, and polycrystalline silicon.

[0025] In the solid-state imaging device according to the first aspect of the present technology, the silicon-containing layer may contain a dopant, and a content of the dopant in the silicon-containing layer may be 1E18 atoms / cm 3 above.

[0026] Furthermore, as a second aspect, the present technology provides a solid-state imaging device provided with:

[0027] A first semiconductor device including an imaging element that generates a pixel signal in units of pixels;

[0028] a second semiconductor device in which a first signal processing circuit required for signal processing of the pixel signal is embedded by using an embedded component;

[0029] a third semiconductor device in which a second signal processing circuit required for signal processing of the pixel signal is embedded using an embedded component; and

[0030] Silicon-containing layer,

[0031] wherein the first semiconductor device and the second semiconductor device are electrically connected to each other,

[0032] The first semiconductor device and the third semiconductor device are electrically connected to each other,

[0033] The first semiconductor device, the silicon-containing layer, and the second semiconductor device are arranged in this order, and

[0034] The first semiconductor device, the silicon-containing layer, and the third semiconductor device are arranged in this order.

[0035] In the solid-state imaging device according to the second aspect of the present technology, the second semiconductor device and the third semiconductor device may be formed in substantially the same layer.

[0036] In the solid-state imaging device according to the second aspect of the present technology, a first through via and a second through via may be formed penetrating the silicon-containing layer.

[0037] The first semiconductor device and the second semiconductor device may be electrically connected to each other via the first through via, and

[0038] The first semiconductor device and the third semiconductor device may be electrically connected to each other via a second through via.

[0039] In the solid-state imaging device according to the second aspect of the present technology, the first semiconductor device and the second semiconductor device may be electrically connected to each other by Cu-Cu bonding, and

[0040] The first semiconductor device and the third semiconductor device may be electrically connected to each other by Cu-Cu bonding.

[0041] In the solid-state imaging device according to the second aspect of the present technology, the first semiconductor device and the second semiconductor device may be electrically connected to each other by Cu-Cu bonding,

[0042] The first semiconductor device and the third semiconductor device may be electrically connected to each other by Cu-Cu bonding, and

[0043] The silicon-containing layer may be formed at interfaces of the Cu—Cu bonding between the first semiconductor device and the second semiconductor device and between the first semiconductor device and the third semiconductor device.

[0044] In the solid-state imaging device according to the second aspect of the present technology, a first through via and a second through via may be formed penetrating the silicon-containing layer.

[0045] The first semiconductor device and the second semiconductor device may be electrically connected to each other by Cu-Cu bonding via the first through via, and

[0046] The first semiconductor device and the third semiconductor device may be electrically connected to each other by Cu-Cu bonding via the second through via.

[0047] In the solid-state imaging device according to the second aspect of the present technology, the silicon-containing layer may be formed continuously across a plurality of pixels.

[0048] In the solid-state imaging device according to the second aspect of the present technology, the silicon-containing layer may contain at least one type of silicon selected from the group consisting of single crystal silicon, amorphous silicon, and polycrystalline silicon.

[0049] In the solid-state imaging device according to the second aspect of the present technology, the silicon-containing layer may contain a dopant, and a content of the dopant in the silicon-containing layer may be 1E18 atoms / cm 3 above.

[0050] Furthermore, as a third aspect, the present technology provides an electronic device equipped with a solid-state imaging device, the solid-state imaging device being provided with:

[0051] A first semiconductor device including an imaging element that generates a pixel signal in units of pixels;

[0052] a second semiconductor device in which a signal processing circuit required for signal processing of the pixel signal is embedded using an embedded component; and

[0053] Silicon-containing layer,

[0054] wherein the first semiconductor device and the second semiconductor device are electrically connected to each other, and

[0055] The first semiconductor device, the silicon-containing layer, and the second semiconductor device are arranged in this order.

[0056] As a fourth aspect, the present technology provides an electronic device equipped with a solid-state imaging device, the solid-state imaging device being provided with:

[0057] A first semiconductor device including an imaging element that generates a pixel signal in units of pixels;

[0058] a second semiconductor device in which a first signal processing circuit required for signal processing of the pixel signal is embedded by using an embedded component;

[0059] a third semiconductor device in which a second signal processing circuit required for signal processing of the pixel signal is embedded using an embedded component; and

[0060] Silicon-containing layer,

[0061] wherein the first semiconductor device and the second semiconductor device are electrically connected to each other,

[0062] The first semiconductor device and the third semiconductor device are electrically connected to each other,

[0063] The first semiconductor device, the silicon-containing layer, and the second semiconductor device are arranged in this order, and

[0064] The first semiconductor device, the silicon-containing layer, and the third semiconductor device are arranged in this order.

[0065] Furthermore, as a fifth aspect, the present technology provides an electronic device equipped with the solid-state imaging device according to the present technology.

[0066] According to the present technology, it is possible to achieve further improvement in the quality and reliability of the solid-state imaging device. Note that the effects described here are not limitative, and may be any effect described in the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0067] Figure 1 A diagram showing a configuration example of a solid-state imaging device to which the present technology is applied.

[0068] Figure 2 It is a diagram for explaining a method of manufacturing a solid-state imaging device to which the present technique is applied.

[0069] Figure 3 It is a diagram for explaining a method of manufacturing a solid-state imaging device to which the present technique is applied.

[0070] Figure 4 A diagram showing a configuration example of a solid-state imaging device to which the present technology is applied.

[0071] Figure 5 A diagram showing a configuration example of a solid-state imaging device to which the present technology is applied.

[0072] Figure 6 It is a diagram for explaining a method of manufacturing a solid-state imaging device to which the present technique is applied.

[0073] Figure 7 It is a diagram for explaining a method of manufacturing a solid-state imaging device to which the present technique is applied.

[0074] Figure 8 is a diagram showing a structural example of a solid-state imaging device.

[0075] Fig. 9 It is a diagram showing a use example of the solid-state imaging device according to the first to third embodiments to which the present technology is applied.

[0076] Fig.10 is a functional block diagram of an example of an electronic device according to a fourth embodiment to which the present technology is applied.

[0077] Fig.11 is a diagram showing an example of a schematic configuration of an endoscopic surgery system.

[0078] Fig.12 : is a block diagram showing an example of the functional configuration of a camera head and a CCU (camera control unit).

[0079] Fig.13 is a block diagram showing an example of a schematic configuration of a vehicle control system.

[0080] Fig.14 It is an explanatory diagram showing an example of the installation positions of the vehicle exterior information detection unit and the imaging unit. DETAILED DESCRIPTION

[0081] In the following, a preferred mode for implementing the present technology is described. The embodiments described in the following show examples of representative embodiments of the present technology, and the scope of protection of the present invention is not narrowly interpreted as a result. Note that, unless otherwise specified, in the accompanying drawings, "up" refers to the upper direction or upper side in the figure, "down" refers to the lower direction or lower side in the figure, "left" refers to the left direction or left side in the figure, and "right" refers to the right direction or right side in the figure. In addition, in the accompanying drawings, the same or equivalent components or parts are given the same figure marks, and repeated descriptions are omitted.

[0082] The description is given in the following order.

[0083] 1. Overview of this technology

[0084] 2. First Embodiment (Example 1 of Solid-State Imaging Device)

[0085] 3. Second Embodiment (Example 2 of Solid-State Imaging Device)

[0086] 4. Third Embodiment (Example 3 of Solid-State Imaging Device)

[0087] 5. Fourth Embodiment (Example of Electronic Equipment)

[0088] 6. Example of using the solid-state imaging device to which this technology is applied

[0089] 7. Application examples of endoscopic surgery systems

[0090] 8. Application examples for mobile objects

[0091] <1. Overview of this technology>

[0092] First, the outline of this technology will be described.

[0093] There is a solid-state imaging device having a device structure obtained in the following manner: an image sensor and ICs (integrated circuits) such as logic (signal processing ICs (integrated circuits)) and memory are cut into small pieces, only non-defective chips are arranged, they are made into a wafer, wiring is formed, and it is attached to the image sensor (CIS: contact image sensor) for connection. Compared with the WoW (wafer on wafer) method, the yield loss and area loss can be smaller, and the connection electrode can be miniaturized compared with the bump connection.

[0094] The solid-state imaging device will refer to Figure 8 To explain. Figure 8 is a cross-sectional view of the solid-state imaging device 111 .

[0095] exist Figure 8 In the solid-state imaging device 111 shown, Figure 8 On the upper side (light incident side) of the chip, an on-chip lens 131-1, an on-chip color filter 131-2, a solid-state imaging element 120, a wiring layer 140, and an oxide film 135 are stacked in order, and below them (on the Figure 8 The storage circuit 121 is arranged on the left side ( Figure 8 ), and the logic circuit 122 is arranged on the right side ( Figure 8 Then, in Figure 8 In the solid-state imaging device 111 shown in FIG. 1 , a support substrate 132 is formed below the storage circuit 121 and the logic circuit 122 ( Figure 8 ).

[0096] That is, Figure 8 As shown, the solid-state imaging device 111 includes: a first semiconductor device 111-a including a solid-state imaging element 120, a wiring layer 140 and an oxide film 135; a second semiconductor device 111-b including a storage circuit 121, a wiring layer 141 and an oxide film 136; and a third semiconductor device 111-c including a logic circuit 122, a wiring layer 142 and an oxide film 136.

[0097] Among the terminals 120a formed in the wiring layer 140 of the solid-state imaging element 120, the terminal 120a located above the memory circuit 121 is electrically connected to the terminal 121a formed in the wiring layer 141 of the memory circuit 121 via the wiring 134 connected by Cu-Cu bonding.

[0098] In addition, among the terminals 120a formed in the wiring layer 140 of the solid-state imaging element 120, the terminal 120a located above the logic circuit 122 is electrically connected to the terminal 122a formed in the wiring layer 142 of the logic circuit 122 via the wiring 134 connected in a Cu-Cu bonding manner.

[0099] In the second semiconductor device 111-b having the storage circuit 121 and the wiring layer 141 formed therein, and the third semiconductor device 111-c having the logic circuit 122 and the wiring layer 142 formed therein, the space around the second semiconductor device 111-b and the third semiconductor device 111-c is filled with an oxide film 133. Therefore, the second semiconductor device 111-b and the third semiconductor device 111-c are in a state of being buried in the oxide film (insulating film) 133.

[0100] In addition, at the boundaries between the first semiconductor device 111 - a and the second semiconductor device 111 - b and between the first semiconductor device 111 - a and the third semiconductor device 111 - c, Figure 8 On the upper side (light incident side) in FIG. 1 , an oxide film 135 and an oxide film 136 are formed in this order.

[0101] In addition, the second semiconductor device 111-b and the third semiconductor device 111-c are both connected via the oxide film 133 and another oxide film ( Figure 8 It is not shown in the figure; it is the oxide film between the oxide film 133 and the supporting substrate 132) bonded to the supporting substrate 132.

[0102] However, in the solid-state imaging device 111, when the space between the third semiconductor device (eg, logic chip) and the second semiconductor device (eg, memory chip) is filled with an insulating film (eg, oxide film) ( Figure 8When the oxide film 133 in the chip is flattened, when heat treatment is performed during the manufacturing process, the film thickness of the silicon (Si) substrate on which the photodiode (PD) is formed, which is used to constitute the solid-state imaging element, will be different due to the difference in thermal expansion between the materials used in manufacturing the solid-state imaging device, such as the insulating material used as the embedding material and the metal material (Cu, Al) used as the wiring, and this may affect the final imaging characteristics. In addition, hot carrier luminescence (HC (hot carrier) luminescence) ( Figure 8 Light from the outside ( Figure 8 ), and the light leaking from the incident light transmitted by the image sensor ( Figure 8 The influence of light P) in the image may change with the presence or absence of the chip, thus affecting the camera characteristics.

[0103] The present technology is made in view of the above situation. As a first aspect of the present technology, a solid-state imaging device is a solid-state imaging device that is provided with a first semiconductor device, a second semiconductor device, and a silicon-containing layer; the first semiconductor device includes an imaging element that generates a pixel signal in units of pixels; in the second semiconductor device, a signal processing circuit required for signal processing of the pixel signal is buried using a buried component; here, the first semiconductor device and the second semiconductor device are electrically connected to each other; and the first semiconductor device, the silicon-containing layer, and the second semiconductor device are arranged in this order.

[0104] In addition, as a solid-state imaging device according to the second aspect of the present technology, it is a solid-state imaging device: it is provided with a first semiconductor device, a second semiconductor device, a third semiconductor device and a silicon-containing layer; the first semiconductor device includes an imaging element that generates a pixel signal in units of pixels; in the second semiconductor device, a first signal processing circuit required for signal processing of the pixel signal is buried using a buried component; in the third semiconductor device, a second signal processing circuit required for signal processing of the pixel signal is buried using a buried component; here, the first semiconductor device and the second semiconductor device are electrically connected to each other, and the first semiconductor device and the third semiconductor device are electrically connected to each other; here, the first semiconductor device, the silicon-containing layer and the second semiconductor device are arranged in this order, and the first semiconductor device, the silicon-containing layer and the third semiconductor device are arranged in this order.

[0105] Note that in the solid-state imaging device according to the present technology, the semiconductor device in which the signal processing circuit required for the signal processing of the pixel signal is buried using the buried component is not limited to the first aspect and the second aspect, and may include more than three such semiconductor devices. In addition, the silicon (Si)-containing layer may contain elements other than silicon (Si), such as germanium (Ge), etc. In addition, the silicon (Si)-containing layer may be a silicon-containing substrate.

[0106] In an example of a solid-state imaging device according to the present technology, a silicon (Si) layer is sandwiched at a Cu-Cu bonding interface between a chip (a chip for constituting a second semiconductor device, or a chip for constituting a second semiconductor device and a third semiconductor device) and a wafer (a chip for constituting a first semiconductor device), and the silicon (Si) layer is not divided within the viewing angle of the image sensor, but is formed continuously across a plurality of pixels. A through-path is formed to penetrate the silicon (Si) layer, and the through-path is bonded to the chip side by Cu-Cu bonding.

[0107] According to the present technology, it is possible to further improve the quality and reliability of the solid-state imaging device. Specifically, according to the present technology, with respect to the silicon (Si)-containing layer, by introducing the silicon (Si)-containing layer between the chip (for example, a chip for constituting the second semiconductor device, or a chip for constituting the second semiconductor device and the third semiconductor device) and the wafer (a chip for constituting the first semiconductor device), the rigidity is enhanced, and, for example, the pushing force toward the photodiode (PD) side caused by the difference in thermal expansion between the embedding material (insulating material) and the wiring (metal material) is reduced, and the influence on the imaging characteristics is reduced. In addition, the silicon (Si)-containing layer can absorb light from the outside, hot carrier luminescence (HC luminescence) from the logic substrate (logic circuit), leaked incident light, etc., thereby reducing the influence on the imaging characteristics. In addition, according to the present technology, by introducing a heavily doped silicon (Si) layer, the electromagnetic noise between the upper and lower substrates can be blocked.

[0108] Hereinafter, embodiments according to the present technology will be described in detail.

[0109] <2. First Embodiment (Example 1 of Solid-State Imaging Device)>

[0110] Reference Figures 1 to 3 A solid-state imaging device according to a first embodiment (Example 1 of the solid-state imaging device) of the present technology will be described. Figure 1 is a cross-sectional view of a solid-state imaging device 1 according to a first embodiment of the present technology, and Figure 2 and Figure 3 2 is a cross-sectional view showing a method for manufacturing the solid-state imaging device 1 according to the first embodiment of the present technology.

[0111] exist Figure 1 In the solid-state imaging device 1 shown, Figure 1 On the upper side (light incident side) of the chip, the on-chip lens 131-1, the on-chip color filter 131-2, the solid-state imaging element 120, the wiring layer 140, the oxide film 135, and the silicon (Si) layer 501 are stacked in order, and below them (on the Figure 1 The storage circuit 121 is arranged on the left side ( Figure 1 ), and the logic circuit 122 is arranged on the right side ( Figure 1 Then, in Figure 1 In the solid-state imaging device 1 shown in FIG. 1 , a support substrate 132 is formed below the memory circuit 121 and the logic circuit 122 ( Figure 1 ).

[0112] That is, Figure 1 As shown, the solid-state imaging device 1 includes: a first semiconductor device 1-a including a solid-state imaging element 120, a wiring layer 140 and an oxide film 135; a second semiconductor device 1-b including a storage circuit 121, a wiring layer 141 and an oxide film 136; and a third semiconductor device 1-c including a logic circuit 122, a wiring layer 142 and an oxide film 136, and in addition, a silicon-containing layer (silicon (Si) layer 501 in the first embodiment) is arranged (stacked) between the first semiconductor device 1-a and the second semiconductor device 1-b and between the first semiconductor device 1-a and the third semiconductor device 1-c.

[0113] The silicon (Si) layer 501 may also have a structure in which it is not divided within the viewing angle range of the solid-state imaging element 120 (image sensor), but is formed continuously across a plurality of pixels. The thickness of the silicon (Si) layer 501 may be any thickness, but is preferably 3 μm or more so as to be able to absorb visible light. In addition, the relationship between the thickness (thickness A) of the silicon (Si) layer 501 and the thickness (thickness B) of the solid-state imaging element 120 (silicon (Si) substrate) preferably satisfies the relational expression A ≥ B. Note that the silicon (Si) layer may also be a silicon (Si) substrate.

[0114] like Figure 1 As shown, the silicon (Si) layer absorbs hot carrier emission (HC emission) occurring on the chip end surface and transistors constituting the logic substrate ( Figure 1 Light from the outside ( Figure 1 ), and the light leaking from the incident light transmitted by the image sensor ( Figure 1 light P).

[0115] Among the terminals 120a of the solid-state imaging element 120 formed in the wiring layer 140, the terminal 120a located above the storage circuit 121 is electrically connected to the terminal 121a of the storage circuit 121 formed in the wiring layer 141 through the wiring 134, and the wiring 134 is connected in a Cu-Cu bonding manner and includes a through path penetrating the silicon (Si) layer 501.

[0116] In addition, among the terminals 120a of the solid-state imaging element 120 formed in the wiring layer 140, the terminal 120a located above the logic circuit 122 is electrically connected to the terminal 122a of the logic circuit 122 formed in the wiring layer 142 through the wiring 134, and the wiring 134 is connected in a Cu-Cu bonding manner and includes a through path penetrating the silicon (Si) layer 501.

[0117] In the second semiconductor device 1-b having the memory circuit 121 and the wiring layer 141 formed therein, and the third semiconductor device 1-c having the logic circuit 122 and the wiring layer 142 formed therein, the space around the second semiconductor device 1-b and the third semiconductor device 1-c is filled with an oxide film 133. Therefore, the second semiconductor device 1-b and the third semiconductor device 1-c are in a state of being buried in the oxide film (insulating film) 133.

[0118] Furthermore, in the boundary region between the first semiconductor device 1-a and the second semiconductor device 1-b and between the first semiconductor device 1-a and the third semiconductor device 1-c, Figure 1 The upper side (light incident side) of the semiconductor device 1-a is formed with an oxide film 135, a silicon (Si) layer 501, and an oxide film 136 in order. That is, the silicon (Si) layer 501 is formed at the interface of the Cu-Cu bonding between the first semiconductor device 1-a and the second semiconductor device 1-b and between the first semiconductor device 1-a and the third semiconductor device 1-c.

[0119] In addition, the second semiconductor device 1-b and the third semiconductor device 1-c are both connected via the oxide film 133 and another oxide film ( Figure 1 It is not shown in the figure; it is the oxide film between the oxide film 133 and the supporting substrate 132) bonded to the supporting substrate 132.

[0120] Next, refer to Figures 2 to 3 A method for manufacturing the solid-state imaging device 1 will be described.

[0121] like Figure 2 As shown in (a) in the BEOL process (back end of line process), a wiring layer 140 is formed on a solid-state imaging element (image sensor substrate) 120, and an oxide film 135 is formed on the wiring layer 140, thereby manufacturing a first semiconductor device (with Figure 1 is the same as the first semiconductor device 1-a in FIG.

[0122] A silicon (Si) layer (which may be a silicon (Si) substrate) 501 is attached to the first semiconductor device (oxide film 135) ( Figure 2 (b) in the figure.

[0123] Next, if Figure 2 As shown in (c) in FIG. 5 , the silicon (Si) layer (silicon (Si) substrate) 501 is thinned.

[0124] Regarding the Cu-Cu bonding, a wiring 134 including a through-via penetrating the silicon (Si) layer (silicon (Si) substrate) 501 is formed for the terminal 120a, and as shown in FIG. Figure 2 As shown in (d) in FIG. 1 , a first semiconductor device including a solid-state imaging element 120 and the like and a second semiconductor device (memory chip) cut into small pieces (with Figure 1 The second semiconductor device 1-b is the same as the second semiconductor device 1-b in FIG. 1 ) and the third semiconductor device (logic chip) (same as the Figure 1 The third semiconductor device 1-c in the same manner as in the first embodiment is bonded together by Cu-Cu bonding via wiring 134 in a CoW (chip on wafer) manner, thereby being electrically connected to each other. Note that a terminal 121a and wiring 134 connected to the terminal 121a are pre-formed in the second semiconductor device (memory chip), and a terminal 122a and wiring 134 connected to the terminal 122a are formed in the third semiconductor device (logic chip).

[0125] like Figure 2 As shown in (e) in FIG. 1 , the silicon (Si) substrate used to constitute the memory circuit 121 of the second semiconductor device (memory chip) and the silicon (Si) substrate used to constitute the logic circuit 122 of the third semiconductor device (logic chip) are thinned.

[0126] Reference Figure 3 Provide explanation.

[0127] like Figure 3 As shown in (a) in FIG. 1 , the steps in the second semiconductor device (memory chip) and the third semiconductor device (logic chip) are filled and flattened. In order to fill and flatten the chip steps, inorganic materials, organic materials, or a combination of both can be used. Figure 3 In (a), the buried component is an oxide film (insulating film) 133.

[0128] like Figure 3 As shown in (b) of the figure, the structure obtained above is reversed upside down so that Figure 3 The one shown in (a) is in the lower part ( Figure 3 The solid-state imaging element 120 located at the lower side of (a) becomes located at the upper side ( Figure 3 Then, the support substrate 132 is attached to the lower part (the upper side) of the oxide film 133 via an oxide film (insulating film; not shown). Figure 3 The lower side of (b) in FIG. 1 ) and the silicon (Si) substrate for constituting the solid-state imaging element 120 is thinned to a predetermined thickness ( Figure 3 (c) in the figure.

[0129] Finally, if Figure 3 As shown in (d) in FIG. 1 , a back light shielding structure (not shown) is formed, an on-chip color filter 131-2 is formed on the solid-state imaging element 120, and an on-chip lens 131-1 is formed on the on-chip color filter 131-2. Then, by opening a pad (not shown), the device structure of the solid-state imaging device 1 is completed, and the solid-state imaging device 1 is manufactured.

[0130] According to the solid-state imaging device 1 of the first embodiment of the present technology, it is possible to further improve the quality and reliability of the solid-state imaging device. Specifically, according to the solid-state imaging device 1 of the first embodiment of the present technology, with respect to the silicon (Si) layer 501, by introducing the silicon (Si) layer 501 between the chip (for example, a chip for constituting the second semiconductor device 1-b, or a chip for constituting the second semiconductor device 1-b and the third semiconductor device 1-c) and the wafer (a chip for constituting the first semiconductor device 1-a), the rigidity is enhanced, and, for example, the pushing force toward the photodiode (PD) side due to the difference in thermal expansion between the embedding material (insulating material) and the wiring (metal material) is reduced, and the influence on the imaging characteristics is reduced. In addition, the silicon (Si) layer 501 can absorb light from the outside, hot carrier luminescence (HC luminescence) from the logic substrate (logic circuit), leaked incident light, etc., thereby reducing the influence on the imaging characteristics.

[0131] <3. Second Embodiment (Example 2 of Solid-State Imaging Device)>

[0132] Reference Figure 4 A solid-state imaging device according to a second embodiment (Example 2 of the solid-state imaging device) of the present technology will be described. Figure 4 is a cross-sectional view of a solid-state imaging device 2 according to a second embodiment of the present technology.

[0133] exist Figure 4 In the solid-state imaging device 2 shown, Figure 4On the upper side (light incident side) of the chip, the on-chip lens 131-1, the on-chip color filter 131-2, the solid-state imaging element 120, the wiring layer 140, the oxide film 135, and the silicon (Si) layer 502 containing a high concentration of dopants are stacked in order, and below them (on the Figure 4 The storage circuit 121 and the logic circuit 122 are stacked in approximately the same layer as a signal processing circuit. The storage circuit 121 is arranged on the left side ( Figure 4 ), and the logic circuit 122 is arranged on the right side ( Figure 4 Then, in Figure 4 In the solid-state imaging device 2 shown in FIG. 1 , a support substrate 132 is formed below the storage circuit 121 and the logic circuit 122 ( Figure 4 ).

[0134] That is, Figure 4 As shown, the solid-state imaging device 2 includes: a first semiconductor device 2-a including a solid-state imaging element 120, a wiring layer 140 and an oxide film 135; a second semiconductor device 2-b including a storage circuit 121, a wiring layer 141 and an oxide film 136; and a third semiconductor device 2-c including a logic circuit 122, a wiring layer 142 and an oxide film 136. In addition, a silicon-containing layer (a silicon (Si) layer 502 containing a high concentration of dopants in the second embodiment) is arranged (stacked) between the first semiconductor device 2-a and the second semiconductor device 2-b and between the first semiconductor device 2-a and the third semiconductor device 2-c.

[0135] The silicon (Si) layer 502 containing a high concentration of dopants may also have the following structure: it is not divided within the viewing angle range of the solid-state imaging element 120 (image sensor), but is formed continuously across multiple pixels. The thickness of the silicon (Si) layer 502 may be any thickness, but is preferably greater than 3 μm so that it can absorb visible light. In addition, the relationship between the thickness (thickness A) of the silicon (Si) layer 502 containing a high concentration of dopants and the thickness (thickness B) of the solid-state imaging element 120 (silicon (Si) substrate) preferably satisfies the relationship expression A≥B. Note that the silicon (Si) layer 502 containing a high concentration of dopants may also be a silicon (Si) substrate containing a high concentration of dopants.

[0136] The silicon (Si) layer 502 containing high concentration dopants has a heavily doped structure (e.g., containing 1E18 atoms / cm 3 The silicon (Si) layer 502 containing high concentration dopants can behave like a metal, and as a result, it has the function of blocking Figure 4The function of reducing electromagnetic noise between the upper and lower substrates (the silicon (Si) substrate for constituting the first semiconductor device 2-a, the silicon (Si) substrate for constituting the second semiconductor device 2-b, and the silicon (Si) substrate for constituting the third semiconductor device) in the semiconductor device 2-1. For example, the dopant is boron (B), phosphorus (P), arsenic (As), etc.

[0137] Although not in Figure 4 However, as in the case of the solid-state imaging device 1 in the first embodiment, the silicon (Si) layer 502 containing a high concentration of dopants is capable of absorbing hot carrier luminescence (HC luminescence) occurring on the chip end faces and transistors for constituting a logic substrate, light from the outside, and light leaking from incident light transmitted through the solid-state imaging element (image sensor) 120.

[0138] Among the terminals 120a of the solid-state imaging element 120 formed in the wiring layer 140, the terminal 120a located above the storage circuit 121 is electrically connected to the terminal 121a of the storage circuit 121 formed in the wiring layer 141 through the wiring 134, and the wiring 134 is connected in a Cu-Cu bonding manner and includes a through path penetrating the silicon (Si) layer 502 containing a high concentration of dopants.

[0139] In addition, among the terminals 120a of the solid-state imaging element 120 formed in the wiring layer 140, the terminal 120a located above the logic circuit 122 is electrically connected to the terminal 122a of the logic circuit 122 formed in the wiring layer 142 through the wiring 134, and the wiring 134 is connected in a Cu-Cu bonding manner and includes a through path penetrating the silicon (Si) layer 502 containing a high concentration of dopants.

[0140] In the second semiconductor device 2-b having the storage circuit 121 and the wiring layer 141 formed therein, and the third semiconductor device 2-c having the logic circuit 122 and the wiring layer 142 formed therein, the space around the second semiconductor device 2-b and the third semiconductor device 2-c is filled with an oxide film (insulating film) 133. Therefore, the second semiconductor device 2-b and the third semiconductor device 2-c are in a state of being buried in the oxide film (insulating film) 133.

[0141] In addition, in the boundary region between the first semiconductor device 2-a and the second semiconductor device 2-b and between the first semiconductor device 2-a and the third semiconductor device 2-c, Figure 4On the upper side (light incident side) of the semiconductor device 2-a, an oxide film 135, a silicon (Si) layer 502 containing a high concentration of dopants, and an oxide film 136 are sequentially formed. That is, the silicon (Si) layer 502 containing a high concentration of dopants is formed at the interface of the Cu-Cu bonding between the first semiconductor device 2-a and the second semiconductor device 2-b and between the first semiconductor device 2-a and the third semiconductor device 2-c.

[0142] In addition, the second semiconductor device 2-b and the third semiconductor device 2-c are both connected via an oxide film (insulating film) 133 and another oxide film ( Figure 4 It is not shown in the figure; it is the oxide film between the oxide film 133 and the supporting substrate 132) bonded to the supporting substrate 132.

[0143] In the method for manufacturing the solid-state imaging device 2, the above-described method can be applied as it is. Figure 2 and Figure 3 , and replace the silicon (Si) layer 501 (which may also be a silicon (Si) substrate) with a silicon (Si) layer 502 (which may also be a silicon (Si) substrate containing a high concentration of dopants).

[0144] According to the solid-state imaging device 2 of the second embodiment of the present technology, it is possible to further improve the quality and reliability of the solid-state imaging device. Specifically, according to the solid-state imaging device 2 of the second embodiment of the present technology, regarding the silicon (Si) layer 502 containing a high concentration of dopants, by introducing the silicon (Si) layer 502 containing a high concentration of dopants between a chip (for example, a chip for constituting the second semiconductor device 2-b, or a chip for constituting the second semiconductor device 2-b and the third semiconductor device 2-c) and a wafer (a chip for constituting the first semiconductor device 2-a), the rigidity is enhanced, and, for example, the pushing force toward the photodiode (PD) side due to the difference in thermal expansion between the embedding material (insulating material) and the wiring (metal material) is reduced, and the influence on the imaging characteristics is reduced. In addition, the silicon (Si) layer 502 containing a high concentration of dopants can absorb light from the outside, hot carrier luminescence (HC luminescence) from the logic substrate (logic circuit), leaked incident light, etc., thereby reducing the influence on the imaging characteristics. Furthermore, as described above, in the solid-state imaging device 2 according to the second embodiment of the present technology, by introducing the heavily doped silicon (Si) layer 502 , electromagnetic noise between the upper and lower substrates can be blocked.

[0145] <4. Third Embodiment (Example 3 of Solid-State Imaging Device)>

[0146] Reference Figures 5 to 7 A solid-state imaging device according to a third embodiment (Example 3 of the solid-state imaging device) of the present technology will be described. Figure 5is a cross-sectional view of a solid-state imaging device 3 according to a third embodiment of the present technology, and Figure 6 and Figure 7 2 is a cross-sectional view showing a method for manufacturing the solid-state imaging device 3 according to the third embodiment of the present technology.

[0147] exist Figure 5 In the solid-state imaging device 3 shown, Figure 5 On the upper side (light incident side) of the chip, the on-chip lens 131-1, the on-chip color filter 131-2, the solid-state imaging element 120, the wiring layer 140, the oxide film 135, and the amorphous silicon (Si) layer 503 are stacked in order, and below them (on the Figure 5 The storage circuit 121 and the logic circuit 122 are stacked in approximately the same layer as a signal processing circuit. The storage circuit 121 is arranged on the left side ( Figure 5 ), and the logic circuit 122 is arranged on the right side ( Figure 5 Then, in Figure 5 In the solid-state imaging device 3 shown in FIG. 1 , a support substrate 132 is formed below the storage circuit 121 and the logic circuit 122 ( Figure 5 ).

[0148] That is, Figure 5 As shown, the solid-state imaging device 3 includes: a first semiconductor device 3-a including a solid-state imaging element 120, a wiring layer 140 and an oxide film 135; a second semiconductor device 3-b including a storage circuit 121, a wiring layer 141 and an oxide film 136; and a third semiconductor device 3-c including a logic circuit 122, a wiring layer 142 and an oxide film 136. In addition, a silicon-containing layer (an amorphous silicon (Si) layer 503 in the third embodiment) is arranged (stacked) between the first semiconductor device 3-a and the second semiconductor device 3-b and between the first semiconductor device 3-a and the third semiconductor device 3-c.

[0149] The amorphous silicon (Si) layer 503 may also have the following structure: it is not divided within the viewing angle range of the solid-state imaging element 120 (image sensor), but is formed continuously across multiple pixels. The thickness of the amorphous silicon (Si) layer 503 can be any thickness, but is preferably 3 μm or more so that it can absorb visible light. In addition, the relationship between the thickness (thickness A) of the amorphous silicon (Si) layer 503 and the thickness (thickness B) of the solid-state imaging element 120 (silicon (Si) substrate) preferably satisfies the relationship expression A ≥ B.

[0150] like Figure 5 As shown, the amorphous silicon (Si) layer absorbs hot carrier emission (HC emission) occurring on the chip end surface and the transistors constituting the logic substrate ( Figure 5Light from the outside ( Figure 5 ), and light leaking from the incident light transmitted through the solid-state imaging element (image sensor) 120 ( Figure 5 light P).

[0151] Among the terminals 120a of the solid-state imaging element 120 formed in the wiring layer 140, the terminal 120a located above the storage circuit 121 is electrically connected to the terminal 121a of the storage circuit 121 formed in the wiring layer 141 through the wiring 134, and the wiring 134 is connected in a Cu-Cu bonding manner and includes a through path penetrating the amorphous silicon (Si) layer 503.

[0152] In addition, among the terminals 120a of the solid-state imaging element 120 formed in the wiring layer 140, the terminal 120a located above the logic circuit 122 is electrically connected to the terminal 122a of the logic circuit 122 formed in the wiring layer 142 through the wiring 134, and the wiring 134 is connected in a Cu-Cu bonding manner and includes a through path penetrating the amorphous silicon (Si) layer 503.

[0153] In the second semiconductor device 3-b having the storage circuit 121 and the wiring layer 141 formed therein, and the third semiconductor device 3-c having the logic circuit 122 and the wiring layer 142 formed therein, the space around the second semiconductor device 3-b and the third semiconductor device 3-c is filled with an oxide film (insulating film) 133. Therefore, the second semiconductor device 3-b and the third semiconductor device 3-c are in a state of being buried in the oxide film (insulating film) 133.

[0154] In addition, in the boundary region between the first semiconductor device 3-a and the second semiconductor device 3-b and between the first semiconductor device 3-a and the third semiconductor device 3-c, Figure 5 An oxide film 135, an amorphous silicon (Si) layer 503, and an oxide film 136 are sequentially formed on the upper side (light incident side) in FIG. That is, the amorphous silicon (Si) layer 503 is formed at the interface of the Cu-Cu bonding between the first semiconductor device 3-a and the second semiconductor device 3-b and between the first semiconductor device 3-a and the third semiconductor device 3-c.

[0155] In addition, the second semiconductor device 3-b and the third semiconductor device 3-c are both connected via an oxide film (insulating film) 133 and another oxide film ( Figure 5 It is not shown in the figure; it is the oxide film between the oxide film 133 and the supporting substrate 132) bonded to the supporting substrate 132.

[0156] Next, refer to Figure 6 to Figure 7 A method for manufacturing the solid-state imaging device 3 will be described.

[0157] like Figure 6 As shown in (a) in the BEOL process (back end of line process), a wiring layer 140 is formed on a solid-state imaging element (image sensor substrate) 120, and an oxide film 135 is formed on the wiring layer 140 to manufacture a first semiconductor device (with Figure 5 is the same as the first semiconductor device 3-a in FIG.

[0158] An amorphous silicon (Si) layer 503 ( Figure 6 (b) in the figure). In the case where copper (Cu) wiring is formed in the wiring layer 140, it is preferred to deposit an amorphous silicon (Si) layer 503 at a temperature below 400°C by using a CVD method. As a silicon (Si)-containing layer, a polycrystalline silicon (Si) layer may be used instead of the amorphous silicon (Si) layer 503, or a single crystal silicon (Si) layer may be used, or silicon (Si) in a combination arbitrarily selected from amorphous silicon (Si), polycrystalline silicon (Si) and single crystal silicon (Si) may be used. The thickness of the amorphous silicon (Si) layer 503 may be any thickness, but is preferably 3 μm or more.

[0159] Regarding the Cu-Cu bonding, a wiring 134 including a through via penetrating the amorphous silicon (Si) layer 503 is formed for the terminal 120a, and as shown in FIG. Figure 6 As shown in (c) in FIG. 1 , a first semiconductor device including a solid-state imaging element 120 and the like and a second semiconductor device (memory chip) cut into small pieces (with Figure 5 The second semiconductor device 3-b is the same as the second semiconductor device 3-b in the embodiment) and the third semiconductor device (logic chip) (same as the Figure 5 The second semiconductor device (memory chip) and the third semiconductor device 3-c are connected to each other by Cu-Cu bonding through wiring 134 in a CoW (chip on wafer) manner, thereby being electrically connected to each other. Note that the terminal 121a and the wiring 134 connected to the terminal 121a are pre-formed in the second semiconductor device (memory chip), and the terminal 122a and the wiring 134 connected to the terminal 122a are formed in the third semiconductor device (logic chip).

[0160] like Figure 6 As shown in (d) in FIG. 1 , the silicon (Si) substrate used to constitute the memory circuit 121 of the second semiconductor device (memory chip) and the silicon (Si) substrate used to constitute the logic circuit 122 of the third semiconductor device (logic chip) are thinned.

[0161] Reference Figure 7Provide explanation.

[0162] like Figure 7 As shown in (a) in FIG. 1 , the steps in the second semiconductor device (memory chip) and the third semiconductor device (logic chip) are filled and flattened. In order to fill and flatten the chip steps, inorganic materials, organic materials, or a combination of both can be used. Figure 7 In (a), the buried component is an oxide film (insulating film) 133.

[0163] like Figure 7 As shown in (b) of the figure, the structure obtained above is reversed upside down so that Figure 7 The one shown in (a) is in the lower part ( Figure 7 The solid-state imaging element 120 located at the lower side of (a) becomes located at the upper side ( Figure 7 Then, the support substrate 132 is attached to the lower part (the upper side) of the oxide film 133 via an oxide film (insulating film; not shown). Figure 7 The lower side of (b) in FIG. 1 ) and the silicon (Si) substrate for constituting the solid-state imaging element 120 is thinned to a predetermined thickness ( Figure 7 (c) in the figure.

[0164] Finally, if Figure 7 As shown in (d) in FIG. 1 , a back light shielding structure (not shown) is formed, an on-chip color filter 131-2 is formed on the solid-state imaging element 120, and an on-chip lens 131-1 is formed on the on-chip color filter 131-2. Then, by opening a pad (not shown), the device structure of the solid-state imaging device 3 is completed, and the solid-state imaging device 3 is manufactured.

[0165] According to the solid-state imaging device 3 of the third embodiment of the present technology, the quality and reliability of the solid-state imaging device can be further improved. Specifically, according to the solid-state imaging device 3 of the third embodiment of the present technology, regarding the amorphous silicon (Si) layer 503, by introducing the amorphous silicon (Si) layer 503 between the chip (for example, a chip for constituting the second semiconductor device 3-b, or a chip for constituting the second semiconductor device 3-b and the third semiconductor device 3-c) and the wafer (a chip for constituting the first semiconductor device 3-a), the rigidity is enhanced, and, for example, the pushing force toward the photodiode (PD) side due to the difference in thermal expansion between the embedding material (insulating material) and the wiring (metal material) is reduced, and the influence on the imaging characteristics is reduced. In addition, the amorphous silicon (Si) layer 503 can absorb light from the outside, hot carrier luminescence (HC luminescence) from the logic substrate (logic circuit), leaked incident light, etc., thereby reducing the influence on the imaging characteristics.

[0166] <5. Fourth Embodiment (Example of Electronic Equipment)>

[0167] As a first aspect, an electronic device according to the fourth embodiment of the present technology is an electronic device equipped with a solid-state imaging device according to the first aspect of the present technology, and the solid-state imaging device according to the first aspect of the present technology is a solid-state imaging device as follows: it is provided with a first semiconductor device, a second semiconductor device and a silicon-containing layer; the first semiconductor device includes an imaging element that generates pixel signals in units of pixels; in the second semiconductor device, a signal processing circuit required for signal processing of pixel signals is buried using a buried component; the first semiconductor device and the second semiconductor device are electrically connected to each other, and the first semiconductor device, the silicon-containing layer and the second semiconductor device are arranged in this order.

[0168] In addition, as a second aspect, an electronic device according to a fourth embodiment of the present technology is an electronic device equipped with a solid-state imaging device according to the second aspect of the present technology, and the solid-state imaging device according to the second aspect of the present technology is a solid-state imaging device as follows: it is provided with a first semiconductor device, a second semiconductor device, a third semiconductor device and a silicon-containing layer; the first semiconductor device includes an imaging element that generates pixel signals in units of pixels; in the second semiconductor device, a first signal processing circuit required for signal processing of pixel signals is buried using a buried component; in the third semiconductor device, a second signal processing circuit required for signal processing of pixel signals is buried using a buried component; the first semiconductor device and the second semiconductor device are electrically connected to each other, and the first semiconductor device and the third semiconductor device are electrically connected to each other; and the first semiconductor device, the silicon-containing layer and the second semiconductor device are arranged in this order, and the first semiconductor device, the silicon-containing layer and the third semiconductor device are arranged in this order.

[0169] For example, an electronic device according to a fourth embodiment of the present technology is an electronic device equipped with a solid-state imaging device according to any one of the solid-state imaging devices according to the first to third embodiments of the present technology.

[0170] <6. Example of use of solid-state imaging device to which the present technology is applied>

[0171] Fig. 9 It is a diagram showing a usage example of the solid-state imaging device according to the first to third embodiments of the present technology as an image sensor.

[0172] For example, the solid-state imaging devices of the first to third embodiments described above can be used in various cases of sensing light such as visible light, infrared light, ultraviolet light, and X-rays as described below. Fig. 9As shown, for example, the solid-state imaging device of any one of the first to third embodiments can be used in equipment used in appreciation fields such as capturing images for appreciation, transportation fields, home appliance fields, medical care fields, security fields, beauty fields, sports fields, agricultural fields, etc. (for example, the electronic device of the fourth embodiment mentioned above).

[0173] Specifically, in the appreciation field, for example, the solid-state imaging device of any one of the first to third embodiments can be used in devices for capturing images for appreciation, such as digital cameras, smartphones, and portable phones with camera functions.

[0174] In the field of transportation, for example, the solid-state imaging device of any one of the first to third embodiments can be used in equipment for transportation such as the following: vehicle-mounted sensors that capture the front, rear, surroundings, interior, etc. of a car in order to achieve safe driving such as automatic stop or to identify the driver's status, etc.; monitoring sensors that monitor moving vehicles or roads; ranging sensors that measure the distance between vehicles, and the like.

[0175] In the field of home appliances, for example, the solid-state imaging device of any one of the first to third embodiments can be used in devices for home appliances such as television receivers, refrigerators and air conditioners to capture user gestures and operate the device according to the gestures.

[0176] In the medical care field, for example, the solid-state imaging device of any one of the first to third embodiments can be used in medical care equipment such as an endoscope, an equipment for performing angiography by receiving infrared light, and the like.

[0177] In the field of security, for example, the solid-state imaging device of any one of the first to third embodiments can be used in security equipment such as surveillance cameras for crime prevention purposes and cameras for personal identification purposes.

[0178] In the beauty field, for example, the solid-state imaging device of any one of the first to third embodiments can be used in beauty equipment such as a skin measurement device that photographs the skin or a microscope that photographs the scalp.

[0179] In the field of sports, for example, the solid-state imaging device of any one of the first to third embodiments can be used in sports equipment such as a camera for sports use or a wearable camera during sports.

[0180] In the agricultural field, for example, the solid-state imaging device according to any one of the first to third embodiments can be used in agricultural equipment such as a camera for monitoring the state of a farmland or crops.

[0181] Next, use examples of the solid-state imaging device according to the first to third embodiments of the present technology are specifically described. For example, the solid-state imaging device of any one of the first to third embodiments described above can be used as, for example, the solid-state imaging device 101 and can be applied to any type of electronic device having an imaging function, such as a camera system such as a digital camera or a video camera, or a portable phone having an imaging function. Fig.10 The schematic configuration of an electronic device 102 (camera) is shown as an example. For example, the electronic device 102 is a video camera capable of capturing still images or moving images, and includes: a solid-state imaging device 101; an optical system (optical lens) 310; a shutter device 311; a driving unit 313 for driving the solid-state imaging device 101 and the shutter device 311; and a signal processing unit 312.

[0182] The optical system 310 guides image light (incident light) from the subject to the pixel unit 101a of the solid-state imaging device 101. The optical system 310 may include a plurality of optical lenses. The shutter device 311 controls the illumination period and the light shielding period of the solid-state imaging device 101. The driving unit 313 controls the transmission operation of the solid-state imaging device 101 and the shutter operation of the shutter device 311. The signal processing unit 312 performs various signal processing on the signal output from the solid-state imaging device 101. The video signal Dout after the signal processing is stored in a storage medium such as a memory or is output to a monitor or the like.

[0183] <7. Application examples of endoscopic surgery systems>

[0184] The present technology is applicable to various products. For example, the technology according to the present disclosure (the present technology) can be applied to an endoscopic surgery system.

[0185] Fig.11 is a diagram showing an example of a schematic configuration of an endoscopic surgery system to which the technology according to the present disclosure (the present technology) can be applied.

[0186] Fig.11 The figure shows a state in which an operator (doctor) 11131 performs surgery on a patient 11132 on a bed 11133 by using an endoscopic surgery system 11000. As shown in the figure, the endoscopic surgery system 11000 includes an endoscope 11100, other surgical tools 11110 such as a pneumoperitoneum tube 11111 and an energy treatment tool 11112, a support arm device 11120 for supporting the endoscope 11100, and a cart 11200 loaded with various devices for endoscopic surgery.

[0187] The endoscope 11100 includes a lens barrel 11101, a region of a predetermined length from the distal end of the lens barrel 11101 being inserted into a body cavity of a patient 11132, and a camera 11102 connected to the proximal end of the lens barrel 11101. In the example shown in the figure, the endoscope 11100 is shown to be configured as a so-called rigid scope having a rigid lens barrel 11101, but the endoscope 11100 may also be configured as a so-called flexible scope having a flexible lens barrel.

[0188] An opening for mounting an objective lens is provided at the distal end of the lens barrel 11101. A light source device 11203 is connected to the endoscope 11100, and light generated by the light source device 11203 is guided to the distal end of the lens barrel through a light guide extending inside the lens barrel 11101, and irradiated to an observation object in a body cavity of a patient 11132 via the objective lens. Note that the endoscope 11100 may be a direct-view endoscope, an oblique-view endoscope, or a side-view endoscope.

[0189] The optical system and the imaging element are arranged inside the camera head 11102, and the reflected light (observation light) from the observation object is gathered by the optical system onto the imaging element. The observation light is photoelectrically converted by the imaging element, and an electrical signal corresponding to the observation light, that is, an image signal corresponding to the observation image, is generated. The image signal is sent to the camera control unit (CCU: camera control unit) 11201 as RAW data.

[0190] The CCU 11201 is composed of a central processing unit (CPU), a graphics processing unit (GPU), etc., and comprehensively controls the operations of the endoscope 11100 and the display device 11202. In addition, the CCU 11201 receives an image signal from the camera 11102, and applies various image processing such as development processing (demosaic processing) to the image signal so as to display an image based on the image signal.

[0191] The display device 11202 displays an image based on an image signal that has been image-processed by the CCU 11201 under the control of the CCU 11201 .

[0192] For example, the light source device 11203 includes a light source such as a light emitting diode (LED), and provides the endoscope 11100 with irradiation light for photographing a surgical area or the like.

[0193] The input device 11204 is an input interface for the endoscopic surgery system 11000. The user can input various information and instructions to the endoscopic surgery system 11000 via the input device 11204. For example, the user inputs instructions for changing the imaging conditions of the endoscope 11100 (type of irradiation light, magnification, focal length, etc.).

[0194] The treatment tool control device 11205 controls the driving of the energy treatment tool 11112 to burn or cut tissue, seal blood vessels, etc. The pneumoperitoneum device 11206 injects gas into the body cavity of the patient 11132 via the pneumoperitoneum tube 11111 to expand the body cavity, thereby ensuring the field of view of the endoscope 11100 and ensuring the operating space of the operator. The recorder 11207 is a device capable of recording various information about the operation. The printer 11208 is a device capable of printing various information about the operation in various formats such as text, images, or graphics.

[0195] Note that, for example, the light source device 11203 that provides the irradiation light for photographing the surgical area to the endoscope 11100 may include a white light source, which may include, for example, an LED, a laser light source, or a combination thereof. In the case where the white light source is formed by a combination of RGB laser light sources, since the output intensity and output timing of various colors (various wavelengths) can be controlled with high precision, the light source device 11203 can adjust the white balance of the captured image. In addition, in this case, by allowing the lasers from each RGB laser light source to irradiate the observed object in a time-division manner and controlling the drive of the imaging element of the camera 11102 in synchronization with the irradiation timing, images corresponding to RGB can also be captured in a time-division manner. According to this method, a color image can be obtained without providing a color filter in the imaging element.

[0196] In addition, the drive of the light source device 11203 can be controlled so that the intensity of the light to be output changes at predetermined intervals. By controlling the drive of the imaging element of the camera 11102 in synchronization with the timing of the change in light intensity, images are obtained in a time-division manner and image synthesis is performed, thereby obtaining a high dynamic range image without defects such as so-called dark shadows and highlights.

[0197] In addition, the light source device 11203 may be configured to provide light of a predetermined wavelength band corresponding to special light observation. For example, in special light observation, by utilizing the wavelength dependence of light absorption in body tissue, light having a narrower wavelength band than the irradiation light (i.e., white light) during ordinary observation is irradiated, and predetermined tissues such as blood vessels in the surface layer of the mucosa are photographed with high contrast, thereby performing so-called narrow-band imaging. Alternatively, in special light observation, fluorescence observation may be performed to obtain an image using fluorescence generated by irradiation of excitation light. In fluorescence observation, for example, fluorescence observation (autofluorescence observation) of body tissue may be performed by irradiating excitation light on body tissue, or a fluorescence image may be obtained by locally injecting an agent such as indocyanine green (ICG) into body tissue and irradiating excitation light corresponding to the fluorescence wavelength of the agent on the body tissue. The light source device 11203 may be configured to provide narrow-band light and / or excitation light corresponding to such special light observation.

[0198] Fig.12 It is shown Fig.11 A block diagram of an example of the functional configuration of the camera 11102 and the CCU 11201 shown.

[0199] The camera 11102 includes a lens unit 11401, an imaging unit 11402, a driving unit 11403, a communication unit 11404, and a camera control unit 11405. The CCU 11201 includes a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera 11102 and the CCU 11201 are connected to each other by a transmission cable 11400 for communication.

[0200] The lens unit 11401 is an optical system provided at a connection portion with the lens barrel 11101. Observation light obtained from the distal end of the lens barrel 11101 is guided to the camera 11102 and enters the lens unit 11401. The lens unit 11401 is composed of a combination of a plurality of lenses including a zoom lens and a focus lens.

[0201] The imaging unit 11402 includes an imaging element. The imaging element used to constitute the imaging unit 11402 may be one imaging element (so-called single-board type) or multiple imaging elements (so-called multi-board type). For example, in the case where the imaging unit 11402 is a multi-board type, image signals corresponding to RGB can be generated by each imaging element, and they can be synthesized to obtain a color image. Alternatively, the imaging unit 11402 may include a pair of imaging elements for acquiring an image signal for the right eye and an image signal for the left eye corresponding to a three-dimensional (3D) display. Through the 3D display, the operator 11131 can more accurately grasp the depth of the living tissue in the surgical area. Note that in the case where the imaging unit 11402 is a multi-board type, a system of multiple lens units 11401 can be set corresponding to each imaging element.

[0202] In addition, the camera unit 11402 does not have to be arranged on the camera head 11102. For example, the camera unit 11402 can be arranged to follow the objective lens inside the lens barrel 11101.

[0203] The driving unit 11403 includes an actuator, and moves the zoom lens and the focus lens of the lens unit 11401 by a predetermined distance along the optical axis under the control of the camera control unit 11405. Therefore, the magnification and focus of the image captured by the imaging unit 11402 can be appropriately adjusted.

[0204] The communication unit 11404 includes a communication device for sending and receiving various information to and from the CCU 11201. The communication unit 11404 transmits the image signal acquired from the imaging unit 11402 to the CCU 11201 via the transmission cable 11400 as RAW data.

[0205] In addition, the communication unit 11404 receives a control signal for controlling the driving of the camera 11102 from the CCU 11201, and provides it to the camera control unit 11405. For example, the control signal includes information related to the imaging conditions such as information for specifying the frame rate of the captured image, information for specifying the exposure value when capturing, and / or information for specifying the magnification and focus of the captured image.

[0206] Note that imaging conditions such as a frame rate, an exposure value, a magnification, or a focus may be appropriately specified by a user or may be automatically set based on an acquired image signal by the control unit 11413 of the CCU 11201. In the latter case, the endoscope 11100 is equipped with a so-called automatic exposure (AE) function, an automatic focus (AF) function, and an automatic white balance (AWB) function.

[0207] The camera control unit 11405 controls the driving of the camera 11102 based on a control signal received from the CCU 11201 via the communication unit 11404 .

[0208] The communication unit 11411 includes a communication device for sending and receiving various information to and from the camera 11102. The communication unit 11411 receives an image signal transmitted from the camera 11102 via the transmission cable 11400.

[0209] In addition, the communication unit 11411 transmits a control signal for controlling the driving of the camera 11102 to the camera 11102. The image signal and the control signal may be transmitted through electrical communication, optical communication, or the like.

[0210] The image processing unit 11412 performs various image processing on the image signal transmitted from the camera 11102 as RAW data.

[0211] The control unit 11413 performs various controls related to photographing of the operation area, etc. by the endoscope 11100 and display of the photographed image obtained by photographing the operation area, etc. For example, the control unit 11413 generates a control signal for controlling the driving of the camera head 11102 .

[0212] In addition, the control unit 11413 causes the display device 11202 to display the captured image reflecting the surgical area, etc., based on the image signal that has been image-processed by the image processing unit 11412. At this time, the control unit 11413 can use various image recognition technologies to recognize various objects in the captured image. For example, the control unit 11413 can recognize surgical tools such as surgical forceps, specific living parts, bleeding, mist when using the energy device 11112, etc. by detecting the shape and color of the edge of the object contained in the captured image. When the control unit 11413 causes the display device 11202 to display the captured image, it can use the recognition result to overlap various surgical support information with the image of the surgical area. When the surgical support information is overlapped and presented to the operator 11131, the burden on the operator 11131 can be reduced, and the operator 11131 can reliably perform the operation.

[0213] The transmission cable 11400 connecting the camera head 11102 and the CCU 11201 is an electrical signal cable capable of supporting electrical signal communication, an optical fiber capable of supporting optical communication, or a composite cable thereof.

[0214] Here, in the example shown, although communication is performed in a wired manner using the transmission cable 11400, communication between the camera 11102 and the CCU 11201 may be performed in a wireless manner.

[0215] An example of an endoscopic surgical system to which the technology according to the present disclosure can be applied is described above. The technology according to the present disclosure can be applied to the endoscope 11100, camera 11102 (camera unit 11402), etc. in the above-mentioned structure. Specifically, the solid-state imaging device 111 of the present technology can be applied to the camera unit 11402. By applying the technology according to the present disclosure to the endoscope 11100, camera 11102 (camera unit 11402), etc., the quality and reliability of the endoscope 11100, camera 11102 (camera unit 11402), etc. can be improved.

[0216] Here, an endoscopic surgery system is described as an example, but in addition to this, for example, the technology according to the present disclosure can also be applied to a microscope surgery system and the like.

[0217] <8. Application examples of mobile objects>

[0218] The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure can also be implemented as a device installed in any one of various mobile bodies such as automobiles, electric vehicles, hybrid vehicles, motorcycles, bicycles, personal mobile devices, airplanes, drones, ships, robots, etc.

[0219] Fig.13 : is a block diagram showing a schematic configuration example of a vehicle control system as an example of a mobile body control system to which the technology according to the present disclosure can be applied.

[0220] The vehicle control system 12000 is provided with a plurality of electronic control units connected to each other via a communication network 12001. Fig.13 In the example shown, the vehicle control system 12000 is provided with a drive system control unit 12010, a body system control unit 12020, an outside information detection unit 12030, an inside information detection unit 12040, and an integrated control unit 12050. In addition, as a functional configuration of the integrated control unit 12050, a microcomputer 12051, a sound and image output unit 12052, and an in-vehicle network interface (I / F) 12053 are shown.

[0221] The drive system control unit 12010 controls the operation of the devices related to the drive system of the vehicle according to various programs. For example, the drive system control unit 12010 functions as a control device for the following devices, such as a drive force generating device such as an internal combustion engine or a drive motor for generating the drive force of the vehicle, a drive force transmitting mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating the braking force of the vehicle.

[0222] The body system control unit 12020 controls the operation of various devices installed on the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for devices such as a keyless entry system, a smart key system, a power window device, or various lights such as a headlight, a rear light, a brake light, a turn signal light, and a fog light. In this case, a radio wave transmitted from a portable device that replaces a key or a signal from various switches may be input into the body system control unit 12020. The body system control unit 12020 receives these input radio waves or signals and controls the door lock device, the power window device, the lights, and the like of the vehicle.

[0223] The vehicle exterior information detection unit 12030 detects external information of the vehicle equipped with the vehicle control system 12000. For example, the camera unit 12031 is connected to the vehicle exterior information detection unit 12030. The vehicle exterior information detection unit 12030 causes the camera unit 12031 to capture an image of the exterior of the vehicle and receive the captured image. Based on the received image, the vehicle exterior information detection unit 12030 can perform object detection processing or distance detection processing on pedestrians, vehicles, obstacles, signs, or text on the road surface.

[0224] The imaging unit 12031 is an optical sensor that can receive light and output an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image, or output the electrical signal as distance measurement information. In addition, the light received by the imaging unit 12031 can be visible light, or can be non-visible light such as infrared rays.

[0225] The in-vehicle information detection unit 12040 detects information about the interior of the vehicle. For example, the in-vehicle information detection unit 12040 is connected to a driver state detection unit 12041 for detecting the state of the driver. For example, the driver state detection unit 12041 includes a camera for photographing the driver. Based on the detection information input from the driver state detection unit 12041, the in-vehicle information detection unit 12040 can calculate the driver's fatigue level or the driver's concentration level, or can determine whether the driver is dozing off.

[0226] The microcomputer 12051 can calculate the control target value of the driving force generating device, the steering mechanism or the braking device based on the information inside and outside the vehicle obtained by the vehicle exterior information detection unit 12030 or the vehicle interior information detection unit 12040, and output the control command to the driving system control unit 12010. For example, the microcomputer 12051 can perform coordinated control for realizing the functions of the advanced driver assistance system (ADAS), which includes: collision avoidance or impact reduction of the vehicle, following driving based on vehicle spacing, speed maintenance driving, collision warning of the vehicle, and lane departure warning of the vehicle.

[0227] In addition, the microcomputer 12051 can also perform collaborative control for the purpose of achieving automatic driving without relying on the driver's operational control by controlling the driving force generating device, steering mechanism, and braking device based on the information outside or inside the vehicle obtained by the external information detection unit 12030 or the internal information detection unit 12040.

[0228] In addition, the microcomputer 12051 can output a control instruction to the body system control unit 12020 based on the information outside the vehicle acquired by the vehicle exterior information detection unit 12030. For example, the microcomputer 12051 can perform cooperative control for anti-glare by controlling the headlights to switch from high beam to low beam according to the position of the preceding vehicle or the oncoming vehicle detected by the vehicle exterior information detection unit 12030.

[0229] The audio and video output unit 12052 sends an output signal of at least one of audio and video to an output device that can visually or auditorily notify passengers on the vehicle or notify the outside of the vehicle of the information. Fig.13 In the example of FIG. 1 , as output devices, an audio speaker 12061, a display portion 12062, and an instrument panel 12063 are shown. For example, the display portion 12062 may include at least one of an onboard display and a head-up display.

[0230] Fig.14 The figure shows an example of the installation position of the camera unit 12031.

[0231] exist Fig.14 In the figure, the vehicle 12100 includes camera units 12101, 12102, 12103, 12104 and 12105 as the camera unit 12031.

[0232] For example, the camera units 12101, 12102, 12103, 12104, and 12105 are arranged at positions including the front nose, side mirrors, rear bumper, trunk door, and upper portion of the windshield in the vehicle compartment of the vehicle 12100. The camera unit 12101 arranged at the front nose and the camera unit 12105 arranged at the upper portion of the windshield in the vehicle compartment mainly acquire the front image of the vehicle 12100. The camera units 12102 and 12103 arranged at the side mirrors mainly acquire the side image of the vehicle 12100. The camera unit 12104 arranged at the rear bumper or trunk door mainly acquires the rear image of the vehicle 12100. The front images acquired by the camera unit 12101 and the camera unit 12105 are mainly used to detect the preceding vehicle or pedestrian, obstacles, traffic lights, traffic signs, lanes, and the like.

[0233] Note that Fig.14 , an example of the imaging ranges of the imaging units 12101 to 12104 is shown. The imaging range 12111 indicates the imaging range of the imaging unit 12101 provided at the front nose, the imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided at the side mirrors, and the imaging range 12114 indicates the imaging range of the imaging unit 12104 provided at the rear bumper or the trunk door. For example, the image data captured by the imaging units 12101 to 12104 are superimposed, thereby obtaining a bird's-eye view image of the vehicle 12100 observed from above.

[0234] At least one of the imaging units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera including a plurality of imaging elements, or may be an imaging element including pixels for phase difference detection.

[0235] For example, based on the distance information obtained by the camera units 12101 to 12104, the microcomputer 12051 can obtain the distance to each solid object within the camera range 12111 to 12114 and the change of the distance over time (relative speed relative to the vehicle 12100), and extract the solid object that is closest to the vehicle 12100 on the road of travel and travels at a predetermined speed (for example, greater than or equal to 0 km / h) in the same direction as the vehicle 12100 as the leading vehicle. In addition, the microcomputer 12051 can set a pre-secured following distance from the leading vehicle, and can perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), etc. In this way, cooperative control for the purpose of realizing automatic driving that can travel independently without relying on the driver's operation can be performed.

[0236] For example, based on the distance information obtained from the camera units 12101 to 12104, the microcomputer 12051 can classify the three-dimensional object data related to the three-dimensional object into three-dimensional object data such as two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, and electric poles, and other three-dimensional object data, extract the classified three-dimensional object data, and use the extracted three-dimensional object data to achieve automatic obstacle avoidance. For example, the microcomputer 12051 divides the obstacles around the vehicle 12100 into obstacles that the driver of the vehicle 12100 can visually recognize and obstacles that the driver cannot visually recognize. Then, the microcomputer 12051 determines the collision risk used to represent the degree of danger of collision with each obstacle, and when the collision risk is equal to or greater than the set value and there is a possibility of collision, a warning can be output to the driver through the audio speaker 12061 or the display unit 12062, or forced deceleration or avoidance steering can be performed via the drive system control unit 12010. Thus, the microcomputer 12051 can achieve assisted driving for avoiding collisions.

[0237] At least one of the camera units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 may identify a pedestrian by determining whether there is a pedestrian in the image captured by the camera units 12101 to 12104. For example, such identification of a pedestrian is performed by performing the following steps: a step of extracting feature points in the image captured by the camera units 12101 to 12104 as infrared cameras; and a step of determining whether it is a pedestrian by performing pattern matching processing on a series of feature points for representing the outline of an object. When the microcomputer 12051 determines that there is a pedestrian in the image captured by the camera units 12101 to 12104 and thus identifies the pedestrian, the sound image output unit 12052 controls the display unit 12062 to display a rectangular contour line for emphasis superimposed on the recognized pedestrian. In addition, the sound image output unit 12052 may control the display unit 12062 to display an icon or the like for indicating a pedestrian at a desired position.

[0238] An example of a vehicle control system to which the technology of the present disclosure (the present technology) can be applied is described above. For example, the technology of the present disclosure can be applied to the camera unit 12031 and the like in the above-mentioned structure. Specifically, the solid-state imaging device 111 of the present disclosure can be applied to the camera unit 12031. By applying the technology of the present disclosure to the camera unit 12031, the quality and reliability of the camera unit 12031 can be improved.

[0239] Note that the present technology is not limited to the above-described embodiments and application examples, and various modifications can be made without departing from the gist of the present technology.

[0240] Furthermore, the effects described in this specification are merely exemplary; the effects are not limited thereto, and other effects may also be present.

[0241] In addition, the present technology may also have the following technical solutions.

[0242] [1] A solid-state imaging device comprising:

[0243] A first semiconductor device including an imaging element that generates a pixel signal in units of pixels;

[0244] a second semiconductor device in which a signal processing circuit required for signal processing of the pixel signal is embedded using an embedded component; and

[0245] Silicon-containing layer,

[0246] wherein the first semiconductor device and the second semiconductor device are electrically connected to each other, and

[0247] The first semiconductor device, the silicon-containing layer, and the second semiconductor device are arranged in this order.

[0248] [2] The solid-state imaging device according to [1],

[0249] A through via is formed penetrating the silicon-containing layer, and the first semiconductor device and the second semiconductor device are electrically connected to each other via the through via.

[0250] [3] The solid-state imaging device according to [1] or [2],

[0251] The first semiconductor device and the second semiconductor device are electrically connected to each other through Cu-Cu bonding.

[0252] [4] The solid-state imaging device according to [1] or [2],

[0253] wherein the first semiconductor device and the second semiconductor device are electrically connected to each other by Cu-Cu bonding, and

[0254] The silicon-containing layer is formed at an interface of the Cu-Cu junction between the first semiconductor device and the second semiconductor device.

[0255] [5] The solid-state imaging device according to any one of [1] to [4],

[0256] A through via is formed penetrating the silicon-containing layer, and the first semiconductor device and the second semiconductor device are electrically connected to each other through the Cu-Cu bonding via the through via.

[0257] [6] The solid-state imaging device according to any one of [1] to [5],

[0258] The silicon-containing layer is formed continuously across a plurality of pixels.

[0259] [7] The solid-state imaging device according to any one of [1] to [6],

[0260] The silicon-containing layer contains at least one type of silicon selected from the group consisting of single crystal silicon, amorphous silicon and polycrystalline silicon.

[0261] [8] The solid-state imaging device according to any one of [1] to [7],

[0262] Wherein, the silicon-containing layer contains dopants.

[0263] [9] The solid-state imaging device according to [8],

[0264] The content of the dopant in the silicon-containing layer is 1E18 atoms / cm 3 above.

[0265]

[10] A solid-state imaging device comprising:

[0266] A first semiconductor device including an imaging element that generates a pixel signal in units of pixels;

[0267] a second semiconductor device in which a first signal processing circuit required for signal processing of the pixel signal is embedded by using an embedded component;

[0268] a third semiconductor device in which a second signal processing circuit required for signal processing of the pixel signal is embedded using an embedded component; and

[0269] Silicon-containing layer,

[0270] wherein the first semiconductor device and the second semiconductor device are electrically connected to each other,

[0271] The first semiconductor device and the third semiconductor device are electrically connected to each other,

[0272] The first semiconductor device, the silicon-containing layer, and the second semiconductor device are arranged in this order, and

[0273] The first semiconductor device, the silicon-containing layer, and the third semiconductor device are arranged in this order.

[0274]

[11] The solid-state imaging device according to

[10] ,

[0275] The second semiconductor device and the third semiconductor device are formed in substantially the same layer.

[0276]

[12] The solid-state imaging device according to

[10] or

[11] ,

[0277] wherein a first through-via and a second through-via are formed penetrating the silicon-containing layer,

[0278] The first semiconductor device and the second semiconductor device are electrically connected to each other via the first through via, and

[0279] The first semiconductor device and the third semiconductor device are electrically connected to each other via the second through via.

[0280]

[13] The solid-state imaging device according to any one of

[10] to

[12] ,

[0281] wherein the first semiconductor device and the second semiconductor device are electrically connected to each other by Cu-Cu bonding, and

[0282] The first semiconductor device and the third semiconductor device are electrically connected to each other by Cu-Cu bonding.

[0283]

[14] The solid-state imaging device according to any one of

[10] to

[13] ,

[0284] wherein the first semiconductor device and the second semiconductor device are electrically connected to each other by Cu-Cu bonding,

[0285] The first semiconductor device and the third semiconductor device are electrically connected to each other by Cu-Cu bonding, and

[0286] The silicon-containing layer is formed at the interface of the Cu-Cu junction between the first semiconductor device and the second semiconductor device and between the first semiconductor device and the third semiconductor device.

[0287]

[15] The solid-state imaging device according to any one of

[10] to

[14] ,

[0288] wherein a first through-via and a second through-via are formed penetrating the silicon-containing layer,

[0289] The first semiconductor device and the second semiconductor device are electrically connected to each other by Cu-Cu bonding via the first through via, and

[0290] The first semiconductor device and the third semiconductor device are electrically connected to each other through the second through via by Cu-Cu bonding.

[0291]

[16] The solid-state imaging device according to any one of

[10] to

[15] ,

[0292] The silicon-containing layer is formed continuously across a plurality of pixels.

[0293]

[17] The solid-state imaging device according to any one of

[10] to

[16] ,

[0294] The silicon-containing layer contains at least one type of silicon selected from the group consisting of single crystal silicon, amorphous silicon and polycrystalline silicon.

[0295]

[18] The solid-state imaging device according to any one of

[10] to

[17] ,

[0296] Wherein, the silicon-containing layer contains dopants.

[0297]

[19] The solid-state imaging device according to

[18] ,

[0298] The content of the dopant in the silicon-containing layer is 1E18 atoms / cm 3 above.

[0299]

[20] An electronic device including a solid-state imaging device,

[0300] The solid-state imaging device is provided with:

[0301] A first semiconductor device including an imaging element that generates a pixel signal in units of pixels;

[0302] a second semiconductor device in which a signal processing circuit required for signal processing of the pixel signal is embedded using an embedded component; and

[0303] Silicon-containing layer,

[0304] wherein the first semiconductor device and the second semiconductor device are electrically connected to each other, and

[0305] The first semiconductor device, the silicon-containing layer, and the second semiconductor device are arranged in this order.

[0306]

[21] An electronic device including a solid-state imaging device,

[0307] The solid-state imaging device is provided with:

[0308] A first semiconductor device including an imaging element that generates a pixel signal in units of pixels;

[0309] a second semiconductor device in which a first signal processing circuit required for signal processing of the pixel signal is embedded by using an embedded component;

[0310] a third semiconductor device in which a second signal processing circuit required for signal processing of the pixel signal is embedded using an embedded component; and

[0311] Silicon-containing layer,

[0312] wherein the first semiconductor device and the second semiconductor device are electrically connected to each other,

[0313] The first semiconductor device and the third semiconductor device are electrically connected to each other,

[0314] The first semiconductor device, the silicon-containing layer, and the second semiconductor device are arranged in this order, and

[0315] The first semiconductor device, the silicon-containing layer, and the third semiconductor device are arranged in this order.

[0316]

[22] An electronic device including the solid-state imaging device according to any one of [1] to

[19] .

[0317] Description of Reference Numerals

[0318] 1, 2, 3, 111: Solid-state imaging device

[0319] 1-a, 2-a, 3-a: first semiconductor device

[0320] 1-b, 2-b, 3-b: Second semiconductor device

[0321] 1-c, 2-c, 3-c: The third semiconductor device

[0322] 501: Silicon (Si) layer

[0323] 502: Silicon (Si) layer containing high concentration of dopants

[0324] 503: Amorphous silicon (Si) layer

Claims

1. A solid-state imaging device, comprising: A first semiconductor device including an imaging element that generates a pixel signal in units of pixels; a second semiconductor device in which a signal processing circuit required for signal processing of the pixel signal is embedded using an embedded component; and Silicon-containing layer, wherein the first semiconductor device and the second semiconductor device are electrically connected to each other by Cu-Cu bonding, The first semiconductor device, the silicon-containing layer, and the second semiconductor device are arranged in this order, and The silicon-containing layer is formed at an interface of the Cu-Cu junction between the first semiconductor device and the second semiconductor device.

2. The solid-state imaging device according to claim 1, in, A through via is formed penetrating the silicon-containing layer, and the first semiconductor device and the second semiconductor device are electrically connected to each other via the through via.

3. The solid-state imaging device according to claim 1, in, A through via is formed penetrating the silicon-containing layer, and the first semiconductor device and the second semiconductor device are electrically connected to each other through the Cu-Cu bonding via the through via.

4. The solid-state imaging device according to claim 1, in, The silicon-containing layer is formed continuously across a plurality of pixels.

5. The solid-state imaging device according to claim 1, in, The silicon-containing layer includes at least one silicon selected from the group consisting of single crystal silicon, amorphous silicon, and polycrystalline silicon.

6. The solid-state imaging device according to any one of claims 1 to 5, in, The silicon-containing layer includes a dopant.

7. The solid-state imaging device according to claim 6, in, The content of the dopant in the silicon-containing layer is 1E18 atoms / cm 3 above.

8. A solid-state imaging device, comprising: A first semiconductor device including an imaging element that generates a pixel signal in units of pixels; a second semiconductor device in which a first signal processing circuit required for signal processing of the pixel signal is embedded by using an embedded component; a third semiconductor device in which a second signal processing circuit required for signal processing of the pixel signal is embedded using an embedded component; and Silicon-containing layer, wherein the first semiconductor device and the second semiconductor device are electrically connected to each other by Cu-Cu bonding, The first semiconductor device and the third semiconductor device are electrically connected to each other by Cu-Cu bonding, The first semiconductor device, the silicon-containing layer and the second semiconductor device are arranged in this order, The first semiconductor device, the silicon-containing layer, and the third semiconductor device are arranged in this order, and The silicon-containing layer is formed at the interface of the Cu-Cu junction between the first semiconductor device and the second semiconductor device and between the first semiconductor device and the third semiconductor device.

9. The solid-state imaging device according to claim 8, in, The second semiconductor device and the third semiconductor device are formed in substantially the same layer.

10. The solid-state imaging device according to claim 8, in, A first through via and a second through via are formed that penetrate the silicon-containing layer, The first semiconductor device and the second semiconductor device are electrically connected to each other via the first through via, and The first semiconductor device and the third semiconductor device are electrically connected to each other via the second through via.

11. The solid-state imaging device according to claim 8, in, A first through via and a second through via are formed that penetrate the silicon-containing layer, The first semiconductor device and the second semiconductor device are electrically connected to each other through the first through via by the Cu-Cu bonding, and The first semiconductor device and the third semiconductor device are electrically connected to each other through the second through via by the Cu-Cu junction.

12. The solid-state imaging device according to claim 8, in, The silicon-containing layer is formed continuously across a plurality of pixels.

13. The solid-state imaging device according to claim 8, in, The silicon-containing layer includes at least one silicon selected from the group consisting of single crystal silicon, amorphous silicon, and polycrystalline silicon.

14. The solid-state imaging device according to any one of claims 8 to 13, in, The silicon-containing layer includes a dopant.

15. The solid-state imaging device according to claim 14, in, The content of the dopant in the silicon-containing layer is 1E18 atoms / cm 3 above. 16 . An electronic device comprising the solid-state imaging device according to claim 1 .

Images