Display panel and manufacturing method thereof
By using single-crystal wafers instead of amorphous silicon or polycrystalline silicon layers and forming a conductive interconnection layer on the thinned surface after bonding or lamination, the problem of device structural defects in the display panel is solved, and the imaging quality and yield rate are improved.
Patent Information
- Application Number
- CN201910977266.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2019-10-15
- Publication Date
- 2025-09-12
- Estimated Expiration
- 2039-10-15
AI Technical Summary
In existing display panel manufacturing methods, defects are easily present in the amorphous silicon or polycrystalline silicon layer of the device structure, affecting imaging quality and yield.
A single crystal wafer is used to replace the amorphous silicon or polycrystalline silicon layer. The first side of the single crystal wafer is bonded or laminated to the substrate, and a conductive interconnection layer is formed on the thinned second side to reduce device structural defects.
The imaging quality of the display panel is improved, the yield rate is increased, and the demand for high-performance display panels is met.
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Figure CN112736023B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a display panel and a manufacturing method thereof. Background Art
[0002] Display panels are used in a variety of applications, including televisions, various audio / video systems, computer monitors, navigation devices, and portable devices. Various types of display panels can output images using different types of display units. For example, display units can include liquid crystal displays (LCDs), light-emitting diodes (LEDs), organic light-emitting diodes (OLEDs), and active-matrix OLEDs (AMOLEDs).
[0003] With the rapid development of display technology, market requirements for display panels are also gradually increasing, especially for miniaturization, low power consumption, low cost, and high image quality. Conventional display panel manufacturing methods typically begin by forming an amorphous silicon or polycrystalline silicon layer on a substrate. An active region is then etched from the excimer laser crystallization (ELA)-treated amorphous silicon or polycrystalline silicon layer. Device structures such as the source, drain, and gate channel regions are then formed within the active region. At least one conductive interconnect layer and other structures are then formed over the device structures to form a complete display panel. Because the device structures are formed within the potentially defective amorphous silicon or polycrystalline silicon layer, they can easily affect the image quality and yield of the display panel. Summary of the Invention
[0004] The object of the present invention is to provide a display panel and a manufacturing method thereof, so as to improve the imaging quality of the display panel, increase the yield rate of the display panel, and meet the demand for high performance of the display panel.
[0005] Based on the above considerations, one aspect of the present invention provides a method for manufacturing a display panel, comprising: providing a single crystal wafer; providing a substrate; bonding or laminating the first surface of the single crystal wafer to the substrate, thinning the single crystal wafer from the second surface, and forming at least one conductive interconnect layer on the second surface of the thinned single crystal wafer.
[0006] Preferably, the single crystal wafer is first cut into a plurality of single crystal units, and then the first surfaces of the plurality of single crystal units are bonded or attached to a substrate.
[0007] Preferably, the single crystal wafer includes a wafer substrate and an epitaxial layer arranged on a first surface, a partial device structure is first formed in the epitaxial layer, and then the first surface of the single crystal wafer is bonded or laminated to a substrate.
[0008] Preferably, the single crystal wafer includes a wafer substrate and an epitaxial layer arranged on the first surface. The first surface of the single crystal wafer is first bonded or laminated to the substrate, and then a partial device structure is formed in the epitaxial layer from the thinned second surface.
[0009] Preferably, the partial device structure includes a source, a drain, a gate channel region and a device isolation region.
[0010] Preferably, the thickness of the epitaxial layer is 3-5 μm.
[0011] Preferably, a panel substrate is first formed on the substrate, and then the first surface of the single crystal wafer is bonded or laminated to the substrate.
[0012] Preferably, after at least one conductive interconnect layer is formed on the second surface of the thinned single crystal wafer, the substrate is removed.
[0013] Preferably, the panel substrate is made of polyimide or fluorinated polyimide.
[0014] Preferably, the panel substrate has a thickness of 50-100 μm.
[0015] Preferably, an oxide layer is first formed on the first surface of the single crystal wafer and the substrate respectively, and then the first surface of the single crystal wafer is bonded to the substrate.
[0016] Preferably, the material of the oxide layer is silicon dioxide.
[0017] Preferably, the thickness of the oxide layer is 0.5-2 μm.
[0018] Preferably, the oxide layer is formed by a plasma enhanced chemical vapor deposition process.
[0019] Preferably, the conductive interconnect layer is made of metal or a conductive metal compound.
[0020] Preferably, the thickness of the conductive interconnect layer is 1-2 μm.
[0021] Preferably, the substrate is made of glass.
[0022] Another aspect of the present invention provides a display panel, comprising: a substrate and / or panel substrate; a single crystal wafer, wherein the first surface of the single crystal wafer is bonded or adhered to the substrate and / or panel substrate, and at least one conductive interconnect layer is provided on the second surface of the single crystal wafer.
[0023] Preferably, an epitaxial layer is provided on the first surface of the single crystal wafer, and a part of the device structure is provided in the epitaxial layer.
[0024] Preferably, the partial device structure includes a source, a drain, a gate channel region and a device isolation region.
[0025] Preferably, the thickness of the epitaxial layer is 3-5 μm.
[0026] Preferably, the panel substrate is made of polyimide or fluorinated polyimide.
[0027] Preferably, the panel substrate has a thickness of 50-100 μm.
[0028] Preferably, an oxide layer for bonding is respectively provided on the first surface of the single crystal wafer and the base plate and / or panel substrate.
[0029] Preferably, the material of the oxide layer is silicon dioxide.
[0030] Preferably, the thickness of the oxide layer is 0.5-2 μm.
[0031] Preferably, the conductive interconnect layer is made of metal or a conductive metal compound.
[0032] Preferably, the thickness of the conductive interconnect layer is 1-2 μm.
[0033] Preferably, the substrate is made of glass.
[0034] Compared with the prior art, the display panel and its manufacturing method of the present invention use single-crystal wafers to replace the amorphous silicon or polycrystalline silicon layer in the prior art, reducing device structural defects, improving the imaging quality of the display panel, increasing the yield rate of the display panel, and meeting the demand for high performance of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS
[0035] Other features, objects and advantages of the present invention will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings.
[0036] Figures 1-8 A schematic diagram of a method for manufacturing a display panel according to an embodiment of the present invention;
[0037] Figures 9-16 is a schematic diagram of a process of a display panel manufacturing method according to another embodiment of the present invention;
[0038] Figure 17 FIG. 1 is a flow chart of a method for manufacturing a display panel according to the present invention.
[0039] In the drawings, the same or similar reference numerals denote the same or similar devices (modules) or steps throughout different drawings. DETAILED DESCRIPTION
[0040] To address the aforementioned problems in the prior art, the present invention provides a display panel and a method for manufacturing the same. The method comprises: providing a single-crystal wafer; providing a substrate; bonding or laminating a first surface of the single-crystal wafer to the substrate, thinning the single-crystal wafer from a second surface, and forming at least one conductive interconnect layer on the thinned second surface of the single-crystal wafer. The display panel and its manufacturing method of the present invention utilize a single-crystal wafer in place of the amorphous silicon or polycrystalline silicon layer used in the prior art, thereby reducing device structural defects, improving the imaging quality of the display panel, and increasing the yield rate of the display panel, thereby meeting the demand for high-performance display panels.
[0041] In the following detailed description of preferred embodiments, reference will be made to the accompanying drawings, which form a part of the present invention. The accompanying drawings illustrate, by way of example, specific embodiments that can implement the present invention. The illustrative embodiments are not intended to be exhaustive of all embodiments according to the present invention. It will be understood that other embodiments may be utilized, and structural or logical modifications may be made, without departing from the scope of the present invention. Therefore, the following detailed description is not restrictive, and the scope of the present invention is defined by the appended claims.
[0042] like Figure 17 As shown, the present invention provides a display panel and a manufacturing method thereof, the method comprising: providing a single crystal wafer; providing a substrate; bonding or laminating the first surface of the single crystal wafer to the substrate, thinning the single crystal wafer from the second surface, and forming at least one conductive interconnect layer on the second surface of the thinned single crystal wafer.
[0043] The display panel manufacturing method of the present invention is described in detail below with reference to specific embodiments.
[0044] Example 1
[0045] Figures 1-8 FIG. 1 is a schematic diagram of a method for manufacturing a display panel according to an embodiment of the present invention.
[0046] See also Figure 1 A single crystal wafer is provided. Preferably, the single crystal wafer includes a wafer substrate 100 and an epitaxial layer 101 disposed on a first surface. The thickness of the epitaxial layer 101 may be 3-5 μm. A partial device structure 102 is formed in the epitaxial layer 101. The partial device structure 102 may include, for example, a source, a drain, a gate channel region, and a device isolation region.
[0047] See also Figure 2 In the case where bonding with the substrate 104 is required in subsequent steps, it is preferred to form an oxide layer 103 on the first surface of the single crystal wafer. Specifically, the oxide layer 103 is formed on the surface of the epitaxial layer 101.
[0048] See also Figure 3A substrate 104 is provided. The substrate 104 is made of, for example, glass. For flexible display panels, a panel substrate 105 made of a flexible material, such as polyimide or fluorinated polyimide, can be formed on the substrate 104. The thickness of the panel substrate 105 can be 50-100 μm.
[0049] In the case where bonding with a single crystal wafer is required in subsequent steps, it is preferred to form an oxide layer 106 on the substrate 104. In this embodiment, when the panel substrate 105 is present on the substrate 104, the oxide layer 106 is formed on the surface of the panel substrate 105. In other embodiments not shown, when the panel substrate 105 is not present on the substrate 104, the oxide layer 106 is formed directly on the surface of the substrate 104.
[0050] See also Figure 4 , bonding or laminating the first surface of the single crystal wafer to the substrate 104. In the case of bonding, the oxide layer 103 on the single crystal wafer and the oxide layer 106 on the substrate 104 provide good bonding strength. Preferably, the oxide layers 103 and 106 are made of silicon dioxide, with a thickness of 0.5-2 μm, respectively, and can be formed by a plasma enhanced chemical vapor deposition process. In the case of laminating, there is no need to form the oxide layers 103 and 106, and the single crystal wafer and the substrate 104 can provide good bonding strength through a viscous material such as an adhesive.
[0051] In order to solve the problems of warping and deformation of the single crystal wafer and shape and size matching, it is preferred that the single crystal wafer is first cut into multiple single crystal units, the shape and size of each single crystal unit is consistent with the shape and size of the final required display panel, and then the first surfaces of the multiple single crystal units are bonded or laminated to the substrate 104 to form a display panel as shown in FIG. Figure 4 The structure shown.
[0052] See also Figure 5 , Figure 6 The single crystal wafer is thinned from the second surface, preferably stopping on the epitaxial layer 101, and at least one conductive interconnect layer 107 is formed on the thinned second surface. The conductive interconnect layer 107 is preferably made of metal or a conductive metal compound and has a thickness of 1-2 μm. Part of the device structure 102 in the epitaxial layer 101 is connected to the conductive interconnect layer 107 through silicon vias 108.
[0053] See also Figure 7 For the case where only the flexible panel substrate 105 is required and the base plate 104 is not required, the base plate 104 can be thinned and removed after forming the conductive interconnection layer 107, and then cut along the cutting line (the dotted line in the figure) to form the following Figure 8 The single display panel structure shown.
[0054] like Figure 8As shown, another aspect of the present invention provides a display panel, which includes: a panel substrate 105 (in Figure 8 In the illustrated embodiment, only the panel substrate 105 is included; in other embodiments not shown, only the base plate 104 may be included, or both the panel substrate 105 and the base plate 104 may be included. Preferably, the panel substrate 105 is made of polyimide or fluorinated polyimide with a thickness of 50-100 μm, and the base plate 104 is made of glass.
[0055] The display panel of the present invention further comprises a single crystal wafer, the first surface of which is bonded or laminated to the substrate 104 and / or the panel substrate 105, and the second surface of which is provided with at least one conductive interconnect layer 107. Preferably, the conductive interconnect layer 107 is made of metal or a conductive metal compound and has a thickness of 1-2 μm.
[0056] An epitaxial layer 101 is disposed on the first surface of the single crystal wafer. The thickness of epitaxial layer 101 is preferably 3-5 μm. A portion of device structure 102 is disposed within epitaxial layer 101. The portion of device structure 102 includes a source, a drain, a gate channel region, and a device isolation region. The portion of device structure 102 within epitaxial layer 101 is connected to a conductive interconnect layer 107 via through-silicon vias 108.
[0057] For bonding, the first surface of the single crystal wafer and the substrate and / or panel substrate are respectively provided with bonding oxide layers 103 and 106 to provide better bonding strength. The oxide layers 103 and 106 are made of silicon dioxide and have a thickness of 0.5-2 μm.
[0058] Example 2
[0059] Figures 9-16 FIG. 4 is a schematic diagram of a method for manufacturing a display panel according to another embodiment of the present invention.
[0060] See also Figure 9 , providing a single crystal wafer, preferably, the single crystal wafer includes a wafer substrate 200 and an epitaxial layer 201 arranged on a first surface, and the thickness of the epitaxial layer 201 can be 3-5 μm.
[0061] See also Figure 10 In the case where bonding with the substrate 204 is required in subsequent steps, it is preferred to form an oxide layer 203 on the first surface of the single crystal wafer. Specifically, the oxide layer 203 is formed on the surface of the epitaxial layer 201.
[0062] See also Figure 11A substrate 204 is provided. The substrate 204 is made of, for example, glass. For flexible display panels, a panel substrate 205 made of a flexible material, such as polyimide or fluorinated polyimide, can be formed on the substrate 204. The thickness of the panel substrate 205 can be 50-100 μm.
[0063] In the case where bonding with a single crystal wafer is required in subsequent steps, it is preferred to form an oxide layer 206 on the substrate 204. In this embodiment, when the panel substrate 205 is present on the substrate 204, the oxide layer 206 is formed on the surface of the panel substrate 205. In other embodiments not shown, when the panel substrate 205 is not present on the substrate 204, the oxide layer 206 is formed directly on the surface of the substrate 204.
[0064] See also Figure 12 , bonding or laminating the first surface of the single crystal wafer to the substrate 204. In the case of bonding, the oxide layer 203 on the single crystal wafer and the oxide layer 206 on the substrate 204 provide good bonding strength. Preferably, the oxide layers 203 and 206 are made of silicon dioxide, with a thickness of 0.5-2 μm, respectively, and can be formed by a plasma-enhanced chemical vapor deposition process. In the case of laminating, it is not necessary to form the oxide layers 203 and 206, and the single crystal wafer and the substrate 204 can provide good bonding strength through a viscous material such as an adhesive.
[0065] In order to solve the problems of warping and deformation of the single crystal wafer and shape and size matching, it is preferred that the single crystal wafer is first cut into multiple single crystal units, the shape and size of each single crystal unit is consistent with the shape and size of the final required display panel, and then the first surfaces of the multiple single crystal units are bonded or laminated to the substrate 204 to form a display panel as shown in FIG. Figure 12 The structure shown.
[0066] See also Figure 13 , thinning the single crystal wafer from the second side, preferably stopping on the epitaxial layer 201, and forming a partial device structure 202 in the epitaxial layer 201, wherein the partial device structure 202 includes, for example, a source, a drain, a gate channel region and a device isolation region.
[0067] See also Figure 14 At least one conductive interconnect layer 207 is formed on the thinned second surface. The conductive interconnect layer 207 is preferably made of metal or a conductive metal compound with a thickness of 1-2 μm. Part of the device structure 202 in the epitaxial layer 201 is connected to the conductive interconnect layer 207 through the contact hole 208.
[0068] See also Figure 15For the case where only the flexible panel substrate 205 is required and the base plate 204 is not required, the base plate 204 can be thinned and removed after forming the conductive interconnection layer 207, and then cut along the cutting line (the dotted line in the figure) to form the following Figure 16 The single display panel structure shown.
[0069] like Figure 16 As shown, another aspect of the present invention provides a display panel, which includes: a panel substrate 205 (in Figure 16 In the illustrated embodiment, only the panel substrate 205 is included; in other embodiments not shown, only the base plate 204 may be included, or both the panel substrate 205 and the base plate 204 may be included. Preferably, the panel substrate 205 is made of polyimide or fluorinated polyimide with a thickness of 50-100 μm, and the base plate 204 is made of glass.
[0070] The display panel of the present invention further comprises a single crystal wafer, the first surface of which is bonded or laminated to the substrate 204 and / or the panel substrate 205, and the second surface of which is provided with at least one conductive interconnect layer 207. Preferably, the conductive interconnect layer 207 is made of metal or a conductive metal compound and has a thickness of 1-2 μm.
[0071] An epitaxial layer 201 is disposed on the first surface of the single crystal wafer. The thickness of the epitaxial layer 201 is preferably 3-5 μm. A portion of the device structure 202 is disposed within the epitaxial layer 201. The portion of the device structure 202 includes a source, a drain, a gate channel region, and a device isolation region. The portion of the device structure 202 within the epitaxial layer 101 is connected to the conductive interconnect layer 207 via contact holes 208.
[0072] For bonding, the first surface of the single crystal wafer and the base plate and / or panel substrate are provided with bonding oxide layers 203 and 206 respectively to provide better bonding strength. The oxide layers 203 and 206 are made of silicon dioxide and have a thickness of 0.5-2 μm.
[0073] In summary, the present invention provides a display panel and a method for manufacturing the same. The method comprises: providing a single-crystal wafer; providing a substrate; bonding or laminating a first surface of the single-crystal wafer to the substrate, thinning the single-crystal wafer from a second surface, and forming at least one conductive interconnect layer on the thinned second surface of the single-crystal wafer. The display panel and method for manufacturing the same employ a single-crystal wafer in place of the amorphous silicon or polycrystalline silicon layer used in prior art, thereby reducing device structural defects, improving the imaging quality of the display panel, and increasing the yield rate of the display panel, thereby meeting the demand for high-performance display panels.
[0074] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above and that the invention can be implemented in other specific forms without departing from the spirit or essential features of the invention. Therefore, the embodiments should be considered exemplary and non-restrictive in any manner. Furthermore, it is clear that the word "comprising" does not exclude other elements and steps, and the word "a" does not exclude pluralities. Multiple elements stated in a device claim may also be implemented by a single element. Terms such as first and second are used to indicate names and do not imply any particular order.
Claims
1. A method for manufacturing a display panel, characterized in that: include: Provide single crystal wafers; providing a substrate; An oxide layer for bonding is respectively provided on the first surface of the single crystal wafer and the base plate and / or panel substrate; To prevent the single crystal wafer from warping and deforming, the single crystal wafer is cut into multiple single crystal units before bonding or laminating the first surface thereof to a substrate, thinning the single crystal wafer from the second surface, and forming at least one conductive interconnect layer on the second surface of the thinned single crystal wafer; Among them, the single crystal wafer includes a wafer substrate and an epitaxial layer arranged on the first surface. The device structure of the display panel is formed in the epitaxial layer to improve the display quality and yield. The conductive interconnection layer is formed on the single crystal wafer surface to improve the display quality and yield.
2. The method for manufacturing a display panel according to claim 1, wherein: First, the single crystal wafer is cut into a plurality of single crystal units, and then the first surfaces of the plurality of single crystal units are bonded or attached to a substrate.
3. The method for manufacturing a display panel according to claim 1, wherein: First, a partial device structure is formed in the epitaxial layer, and then the first surface of the single crystal wafer is bonded or laminated to a substrate.
4. The method for manufacturing a display panel according to claim 1, wherein: The first surface of the single crystal wafer is bonded or laminated to a substrate, and then a partial device structure is formed in the epitaxial layer from the thinned second surface.
5. The method for manufacturing a display panel according to claim 3 or 4, wherein: The partial device structure includes a source, a drain, a gate channel region and a device isolation region.
6. The method for manufacturing a display panel according to claim 3 or 4, wherein: The thickness of the epitaxial layer is 3-5 μm.
7. The method for manufacturing a display panel according to claim 1, wherein: First, a panel substrate is formed on the substrate, and then the first surface of the single crystal wafer is bonded or laminated to the substrate.
8. The method for manufacturing a display panel according to claim 7, wherein: After forming at least one conductive interconnect layer on the second surface of the thinned single crystal wafer, the substrate is removed.
9. The method for manufacturing a display panel according to claim 7, wherein: The panel substrate is made of polyimide or fluorinated polyimide.
10. The method for manufacturing a display panel according to claim 7, wherein: The panel substrate has a thickness of 50-100 μm.
11. The method for manufacturing a display panel according to claim 1, wherein: First, an oxide layer is formed on the first surface of the single crystal wafer and the substrate respectively, and then the first surface of the single crystal wafer is bonded to the substrate.
12. The method for manufacturing a display panel according to claim 11, wherein: The material of the oxide layer is silicon dioxide.
13. The method for manufacturing a display panel according to claim 11, wherein: The thickness of the oxide layer is 0.5-2 μm.
14. The method for manufacturing a display panel according to claim 11, wherein: The oxide layer is formed by a plasma enhanced chemical vapor deposition process.
15. The method for manufacturing a display panel according to claim 1, wherein: The conductive interconnection layer is made of metal or a conductive metal compound.
16. The method for manufacturing a display panel according to claim 1, wherein: The thickness of the conductive interconnection layer is 1-2 μm.
17. The method for manufacturing a display panel according to claim 1, wherein: The substrate is made of glass.
18. A display panel, characterized in that: include: Baseboard and / or panel substrate; A single crystal wafer, wherein an oxide layer for bonding is respectively provided on the first surface of the single crystal wafer and the base plate and / or panel substrate; In order to prevent the single crystal wafer from warping and deforming, the single crystal wafer is cut into multiple single crystal units and then bonded or attached to the base plate and / or panel substrate, and at least one conductive interconnect layer is provided on the second surface of the single crystal wafer; Among them, the single crystal wafer includes a wafer substrate and an epitaxial layer arranged on the first surface. The device structure of the display panel is formed in the epitaxial layer to improve the display quality and yield. The conductive interconnection layer is formed on the single crystal wafer surface to improve the display quality and yield.
19. The display panel according to claim 18, wherein: Part of the device structure is arranged in the epitaxial layer.
20. The display panel according to claim 19, wherein The partial device structure includes a source, a drain, a gate channel region and a device isolation region.
21. The display panel according to claim 19, wherein The thickness of the epitaxial layer is 3-5 μm.
22. The display panel according to claim 18, wherein The panel substrate is made of polyimide or fluorinated polyimide.
23. The display panel according to claim 18, wherein The panel substrate has a thickness of 50-100 μm.
24. The display panel according to claim 18, wherein An oxide layer for bonding is respectively provided on the first surface of the single crystal wafer and the base plate and / or panel substrate.
25. The display panel according to claim 24, wherein: The material of the oxide layer is silicon dioxide.
26. The display panel according to claim 24, wherein: The thickness of the oxide layer is 0.5-2 μm.
27. The display panel according to claim 18, wherein The conductive interconnection layer is made of metal or a conductive metal compound.
28. The display panel according to claim 18, wherein: The thickness of the conductive interconnection layer is 1-2 μm.
29. The display panel according to claim 18, wherein The substrate is made of glass.
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