Semiconductor device including an insulated gate bipolar transistor

By introducing specific structural designs into IGBT devices and optimizing the anode and contact regions, the balance between on-state resistance and blocking voltage capability is solved, thereby improving the overall performance and durability of IGBT devices.

CN112909084BActive Publication Date: 2025-11-21INFINEON TECH AUSTRIA AG
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Patent Information

Application Number
CN202011402792.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2019-12-04
Filing Date
2020-12-04
Publication Date
2025-11-21
Estimated Expiration
2040-12-04

AI Technical Summary

Technical Problem

Improving the on-state resistance of existing IGBT devices may lead to a deterioration in their blocking voltage capability, and improvements to the reverse-conducting RC diode may affect contact resistance and commutation durability, making it difficult to achieve a balance among multiple device characteristics.

Method used

Specific structural designs, including diode trenches and contact grooves, are introduced into the IGBT and diode sections to optimize device parameters by forming anode, cathode, and contact regions of different conductivity types, thereby balancing on-state resistance and blocking voltage capability.

Benefits of technology

This approach achieves the improvement of on-state resistance while maintaining or increasing blocking voltage capability and contact resistance, thereby enhancing the overall performance and durability of the device.

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Abstract

A semiconductor device including an insulated gate bipolar transistor is disclosed. A semiconductor device (100) is presented. The semiconductor device includes an IGBT (102) in an IGBT portion (104) of a semiconductor body (106). The semiconductor device (100) further includes a diode (108) in a diode portion (110) of the semiconductor body. The diode includes an anode region (132) of a first conductivity type. The anode region (132) is bounded by diode trenches (134) along a first lateral direction (x1). Each diode trench (134) includes a diode trench electrode (136) and a diode trench dielectric (138). A first contact recess (140) extends from a first surface (122) of the semiconductor body (106) into the anode region (132) along a vertical direction (y). An anode contact region (148) of the first conductivity type abuts a bottom side of the first contact recess (140). A cathode contact region (128) of a second conductivity type abuts a second surface (126) of the semiconductor body (106) opposite the first surface (122).
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Description

Technical Field

[0001] This disclosure relates to semiconductor devices, and more particularly to semiconductor devices including insulated gate bipolar transistors (IGBTs) and methods for manufacturing the same. Background Technology

[0002] For example, the technological development of semiconductor devices such as IGBTs or Insulated Gate Field-Effect Transistors (IGFETs) aims to improve device characteristics. While one semiconductor device characteristic can be improved by varying specific device parameters, this may lead to the degradation of another device characteristic. As an example, the on-state resistance R of a specific region can be improved, for instance, by increasing the doping concentration in the drift band. DS(on) However, this may reduce the blocking voltage capability V between the source and drain. DS The degradation of the RC diode in an RC-IGBT can be a significant factor. As another example, improving the reverse-conducting RC diode in an RC-IGBT can negatively impact, for example, contact resistance and commutation durability. Therefore, device parameters are designed during technology development based on numerous trade-offs that must be met given the target device specifications.

[0003] There is a need to improve semiconductor devices, including IGBTs. Summary of the Invention

[0004] Examples of this disclosure relate to a semiconductor device. The semiconductor device includes an IGBT in an IGBT portion of a semiconductor body. The semiconductor device further includes a diode in a diode portion of the semiconductor body. The diode includes an anode region of a first conductivity type. The anode region is defined by diode trenches along a first lateral direction. Each diode trench includes a diode trench electrode and a diode trench dielectric. The diode further includes a first contact groove extending vertically from a first surface of the semiconductor body into the anode region. The diode further includes an anode contact region of a first conductivity type adjacent to the bottom side of the first contact groove. The diode further includes a cathode contact region of a second conductivity type adjacent to a second surface of the semiconductor body opposite the first surface.

[0005] Another example of this disclosure relates to a method of manufacturing a semiconductor device. The method includes forming an IGBT in an IGBT portion of a semiconductor body. The method further includes forming a diode in a diode portion of the semiconductor body. Forming the diode includes forming an anode region of a first conductivity type, wherein the anode region is defined by diode trenches along a first lateral direction. Each diode trench includes a diode trench electrode and a diode trench dielectric. Forming the diode further includes forming a first contact groove extending vertically from a first surface of the semiconductor body into the anode region. Forming the diode further includes forming an anode contact region of the first conductivity type adjacent to the bottom side of the first contact groove. Forming the diode further includes forming a cathode contact region of a second conductivity type adjacent to a second surface of the semiconductor body opposite the first surface.

[0006] Those skilled in the art will recognize the additional features and advantages upon reading the following detailed description and reviewing the accompanying drawings. Attached Figure Description

[0007] The accompanying drawings are included to provide a further understanding of the embodiments and are incorporated in and constitute a part of this specification. The drawings illustrate examples of semiconductor devices and methods of manufacturing semiconductor devices, and, together with the description, serve to explain the principles of the examples. Further examples are described in the following detailed description and claims.

[0008] Figure 1 This is a schematic cross-sectional view used to illustrate a semiconductor device including IGBTs and diodes.

[0009] Figure 2A and Figure 2B It is used for illustration. Figure 1 A schematic top view of an exemplary arrangement of IGBTs and diodes in a semiconductor device.

[0010] Figure 3A and Figure 3B It is used for illustration when manufacturing Figure 1 A schematic cross-sectional view of the processing characteristics of a semiconductor device.

[0011] Figure 4A and Figure 4B It is used for illustration in Figure 1 A schematic cross-sectional view of an example of a contact groove in a diode and an IGBT. Detailed Implementation

[0012] In the following detailed description, reference is made to the accompanying drawings, which form part of this document and illustrate, by way of illustration, specific examples in which semiconductor devices and methods of manufacturing semiconductor devices can be practiced. It is to be understood that other examples may be utilized and structural or logical changes may be made without departing from the scope of this disclosure. For example, a feature illustrated or described for one example may be used on or in combination with other examples to produce yet another further example. It is intended that this disclosure include such modifications and variations. Examples are described using specific language, which should not be construed as limiting the scope of the appended claims. The drawings are not to scale and are for illustrative purposes only. Unless otherwise stated, corresponding elements are indicated by the same reference numerals in different drawings.

[0013] The terms “having,” “containing,” “including,” and “including” are open-ended and indicate the presence of the stated structure, element, or feature but do not exclude the presence of additional elements or features. The quantifiers “a,” “one,” and the pronoun “the” are intended to include both plural and singular forms unless the context clearly indicates otherwise.

[0014] The term "electrical connection" describes a permanent, low-resistance connection between electrically connected elements, such as a direct contact between related elements or a low-resistance connection via a metal and / or heavily doped semiconductor material. The term "electrical coupling" includes one or more intermediate elements adapted for signal and / or power transmission that can be connected between electrically coupled elements, such as electrically decoupled elements that can be controlled to temporarily provide a low-resistance connection in a first state and temporarily provide a high-resistance connection in a second state.

[0015] An ohmic contact is a nonrectified electrical junction with linear or nearly linear current-voltage characteristics. If two components (e.g., two regions) form an ohmic contact or a Schottky contact respectively, this can mean that an ohmic contact or a Schottky contact exists between the two components. In both cases, it is possible for the two regions to be directly adjacent to each other. However, it is also possible for a further component to be located between the two components.

[0016] The range given for physical dimensions includes boundary values. For example, the range from a to b for parameter y is read as a≤y≤b. This also applies to ranges with a boundary value such as “at most” and “at least”.

[0017] The term “on” is not interpreted as simply “directly on”. Rather, if an element is “on” another element (e.g., a layer is “on” another layer or on a substrate), then a further component (e.g., a further layer) may be located between the two elements (e.g., if a layer is “on” a substrate, then a further layer may be located between that layer and the substrate).

[0018] Examples of semiconductors may include IGBTs in the IGBT portion of a semiconductor body. A semiconductor device may further include diodes in the diode portion of a semiconductor body.

[0019] The diode may include an anode region of a first conductivity type. The anode region may be defined by diode trenches along a first lateral direction. Each diode trench may include a diode trench electrode and a diode trench dielectric. The diode may further include a first contact groove extending vertically from a first surface of the semiconductor body into the anode region. The diode may further include an anode contact region of a first conductivity type adjacent to the bottom side of the first contact groove. The diode may further include a cathode contact region of a second conductivity type adjacent to a second surface of the semiconductor body opposite the first surface.

[0020] For example, an IGBT may include a collector region of a first conductivity type adjacent to the second surface. The semiconductor device may further include a collector electrode that is directly electrically connected via the second surface to a cathode contact region in a diode region and to a collector region in an IGBT portion.

[0021] For example, an IGBT may further include a gate trench, which includes a gate electrode and a gate dielectric. The IGBT may further include a source region of a second conductivity type adjacent to the gate trench. The IGBT may further include a body region of a first conductivity type adjacent to the gate trench. The IGBT may further include an emitter electrode electrically connected to the body region and the source region via a first surface of the semiconductor body. The IGBT may further include a drift region of a second conductivity type between the body region and a second surface of the semiconductor body.

[0022] For example, an IGBT can be a vertical power semiconductor device. A vertical power semiconductor device can be configured to conduct currents greater than 1A, 10A, or even 30A, and can be further configured to block voltages between load terminals, such as the voltage between the emitter and collector electrodes of the IGBT, in the range of several hundred volts to several thousand volts (e.g., 400V, 650V, 1.2kV, 1.7kV, 3.3kV, 4.5kV, 5.5kV, 6kV, 6.5kV). For example, the blocking voltage can correspond to the voltage level specified in the power semiconductor device's datasheet.

[0023] The semiconductor body may include or be composed of semiconductor materials derived from group IV element semiconductors, group IV-IV composite semiconductor materials, group III-V composite semiconductor materials, or group II-VI composite semiconductor materials. Examples of semiconductor materials derived from group IV element semiconductors include, among others, silicon (Si) and germanium (Ge). Examples of group IV-IV composite semiconductor materials include, among others, silicon carbide (SiC) and silicon germanium (SiGe). Examples of group III-V composite semiconductor materials include, among others, gallium arsenide (GaAs), gallium nitride (GaN), gallium phosphide (GaP), indium phosphide (InP), indium gallium nitride (InGaN), and indium gallium arsenide (InGaAs). Examples of group II-VI composite semiconductor materials include, among others, cadmium telluride (CdTe), mercury cadmium telluride (CdHgTe), and magnesium cadmium telluride (CdMgTe).

[0024] The gate electrode may comprise, or be composed of, a heavily doped polysilicon layer and / or a metal-containing layer. The gate electrode may be electrically connected to the gate metallization. The gate metallization may form a gate terminal or may be electrically connected or coupled to the gate terminal. A gate dielectric may be formed between the gate electrode and the semiconductor body. The gate dielectric may comprise or be composed of thermally grown or deposited silicon oxide, silicon nitride, silicon oxynitride, additional deposited dielectric materials, or any combination thereof. For example, the thickness of the gate dielectric can be selected to obtain a transistor cell having a threshold voltage in the range of 1.0V to 8V. The gate trench may exclusively comprise the gate electrode and the gate dielectric, or may include further conductive and / or dielectric structures in addition to the gate electrode and the gate dielectric. The gate electrode and any optional additional auxiliary electrodes may comprise, for example, electrode materials or combinations of electrode materials, such as doped semiconductor materials (e.g., degenerate doped semiconductor materials) (e.g., doped polysilicon), metals, or metal composites.

[0025] The emitter electrode may be part of a wiring region above the first main surface. The wiring region may include one, two, three, or even more wiring levels, which may include patterned metal layers and interlayer dielectrics disposed between the patterned metal layers. For example, vias may electrically interconnect different wiring levels. For example, the emitter electrode may be formed as part of the first wiring level and may be electrically connected to the source region and the body region via contact plugs, for example, extending through the interlayer dielectric disposed between the semiconductor body and the first wiring level.

[0026] For example, the transistor cells of an IGBT can be formed as strips extending parallel to a second lateral direction. For example, the second lateral direction can be a lateral direction perpendicular to the first lateral direction. For example, the source region and the body region can be formed in a mesa region. The mesa region can extend as a strip along the second lateral direction. Along the first lateral direction, each mesa region can be defined by a trench. For example, the source regions can be arranged as multiple source sub-regions along the second lateral direction, wherein the multiple source sub-regions are spaced apart from each other at a certain lateral distance.

[0027] For example, in at least one of the mesa regions of the transistor cell region of an IGBT, the source region may be adjacent only to one of the opposing trenches defining the respective mesa region. In this case, for example, the source region may be adjacent to one of the gate trenches on a first side, while the mesa region may be adjacent to another type of trench on an opposing second side. The other type of trench may also include trench electrodes and trench dielectrics. For example, the materials and dimensions of the trench electrodes and trench dielectrics of the other trench and the gate trench may be equal. However, the trench electrodes in the other type of trench may be electrically connected to electrodes different from those of the gate terminals. For example, the trench electrodes in the other type of trench may be electrically connected to the emitter electrode. In this case, the other type of trench may also be referred to as a source trench. For example, along the sidewalls of the source trench, the flow of load current may be suppressed due to the omitted gate electrode in the source trench and due to the missing source region. For example, some mesa regions of the transistor cell region of an IGBT may be defined, for example, by opposing source trenches. Some other mesa regions in the transistor cell region of an IGBT can be defined by opposing gate trenches. For example, other other mesa regions in the transistor cell region of an IGBT can be defined, for example, by a source trench at one of opposing first and second sides and a gate trench at the other of opposing first and second sides. For example, adjusting, for example, the number and size of the source trenches and gate trenches, as well as the source region, can allow adjustment of the electrical parameters of the IGBT.

[0028] The vertical extension of the drift region and the doping concentration can be, for example, parameters used to adjust the target electrical breakdown voltage between the emitter and collector electrodes.

[0029] The collector electrode may include a heavily doped polysilicon layer and / or a metal-containing layer, or may be composed of a heavily doped polysilicon layer and / or a metal-containing layer.

[0030] For example, in the mesa region of the diode adjacent to the IGBT, the source region electrically connected to the emitter electrode can be omitted. For example, the opposing sidewalls of the anode region can directly abut the sidewalls of the trench dielectric: this includes, for example, a portion of the sidewall adjacent to the first surface. For example, the materials and dimensions of the electrodes and dielectrics in the gate trench and diode trench can be, for example, the same.

[0031] For example, the diode trench electrode can be electrically connected to a terminal different from the gate terminal. For example, the diode trench electrode can be electrically connected to the emitter electrode. For example, the number of diode trenches arranged successively along a lateral direction (e.g., a first lateral direction) can be greater than 30, greater than 100, or even greater than 300. For example, the extension of the diode trenches arranged successively along the lateral direction (e.g., the first lateral direction) can be greater than 3 μm, greater than 50 μm, greater than 200 μm, or even greater than 900 μm along that lateral direction.

[0032] For example, the size of one or more mesa regions of a diode may be larger than the size of some or all of the mesa regions of an IGBT.

[0033] For example, one or more mesa regions of a diode may include at least two first contact grooves separated from each other along a first lateral direction, for example, between opposing diode trenches. For example, the width or lateral extension along the first lateral direction of one, some, or all of the first contact grooves of the diode may differ from the width or lateral extension of the second contact groove in the IGBT transistor cell region. For example, the width or lateral extension of at least one of the first contact grooves may be, for example, greater than the width or lateral extension of the mesa region in the IGBT transistor cell region.

[0034] For example, IGBTs and diodes can be at least partially surrounded laterally by edge-termination regions. Edge-termination elements can be formed in the edge-termination regions, which are areas of the semiconductor body that partially or completely surround the active device region. Because the pn junctions within the semiconductor body (e.g., the pn junction between the body and drift regions of an IGBT, or the pn junction between the cathode and anode regions of a diode) are not infinite but terminate at the edge bands of the semiconductor body, this edge effect limits the device breakdown voltage below the ideal value set by an infinite parallel planar junction. Care must be taken to ensure proper and efficient termination of the pn junction at the edge of the semiconductor body. Edge-termination regions are measures used to ensure proper and efficient termination of the pn junction. Edge-termination structures can be formed in the edge-termination regions to reduce the electric field at the edge of the semiconductor body. The lateral dimensions of the edge-termination regions can vary depending on the voltage rating of the semiconductor device. Semiconductor devices with higher voltage ratings typically require a larger lateral extension of their edge-termination regions to ensure proper termination of the pn junction. Examples of edge-termination structures in the edge-termination region include, for example, field plates, junction-termination extension (JTE) structures, and lateral doping variation (VLD) structures. For instance, a transition region may exist between the active device region and the edge-termination region for electrically connecting the edge-termination structure.

[0035] For example, the anode contact region may have a higher doping concentration at a reference depth (e.g., a reference distance to the first surface of the semiconductor body) than the anode region. For example, the anode contact region may support a low-ohmic connection between the anode region and the first contact trench. The anode contact region may be formed by at least one ion implantation process on the bottom side of the first contact trench. For example, by shielding (e.g., through spacers or pads) the sidewalls of the first contact trench during at least one ion implantation process, the doping of the semiconductor body at the sidewalls of the first contact trench can be reduced or suppressed. The doping at the sidewalls may be caused by, for example, backscattered dopant ions from the bottom of the trench. Since the anode efficiency of the diode may depend on the sidewall doping, processing variations such as trench taper, implantation angle, or trench size may cause undesirable variations in anode efficiency. Sidewall spacers may allow for reduced sidewall doping during ion implantation, thereby enabling more precise setting of the diode's anode efficiency. For example, the maximum doping concentration in the sidewall doped region may be at most 1 / 10000, 1 / 1000, or 1 / 100 of the maximum doping concentration in the anode contact region.

[0036] For example, the anode contact region may have a first doping concentration at a first location below the center or middle of the bottom side of the first contact groove. The doping concentration of the anode contact region may be reduced to at least one-tenth over a lateral distance l1 from the first location along the first lateral direction to the second location. The lateral distance l1 may be less than half the width of the first contact groove along the first lateral direction at the first surface. The lateral distance l1 above the first doping concentration is less than the lateral distance l1' of the anode contact region implanted through the bottom side of the first contact groove without any spacers on the sidewalls of the groove. Forming the anode contact region by ion implantation using sidewall spacers not only allows for the reduction of undesirable sidewall doping but also allows for a reduction in the lateral extension of the anode contact region. Therefore, the lateral protrusion of the anode contact region from the bottom side of the first contact groove can be controlled. For example, the doping concentration of the anode contact region may also be reduced to at least 1 / 500, at least 1 / 100, or at least 1 / 50 over the lateral distance l1.

[0037] For example, the doping concentration profile of the anode contact region can be the diffusion broadening profile of the dopant introduced into the semiconductor body via the bottom side of the first contact groove through ion implantation, wherein sidewall spacers are arranged at the sidewalls of the first contact groove at the time of ion implantation. For example, the thickness of the sidewall spacers can be in the range of 5 nm to 100 nm or from 10 nm to 50 nm. Compared with implantation without any sidewall spacers, using sidewall spacers to form the body contact region will result in a smaller overall lateral extension of the diffusion broadening profile of the implanted dopant. For example, the vertical and lateral diffusion broadening profiles of the dopant introduced into the semiconductor body via the bottom side of the first contact groove through ion implantation can be determined by appropriate characterization techniques, such as secondary ion mass spectrometry (SIMS), spread resistance analysis (SRA), stripped Hall (SH) or electrochemical capacitance voltage (ECV) measurements. Since the vertical and horizontal profiles are interrelated, semiconductor processing simulations (e.g., technical computer-aided design (TCAD) tools) allow experimental data to determine the spacer thickness by fitting the diffusion profile to both the horizontal and vertical profiles, depending on the spacer thickness used to form the anode contact region. In this way, empirical evidence can be provided for using sidewall spacers to form the anode contact region. As an alternative to or in addition to spacers, pads can be used, where the pads line the sidewalls and bottom of the first contact groove, and, for example, dopant is implanted through the pads into the semiconductor body.

[0038] For example, the semiconductor device may further include a second contact groove extending vertically from the first surface into the body region. For example, a first contact groove in a diode and a second contact groove in an IGBT may be formed simultaneously. For example, the filling material(s) of the first and second contact grooves may be the same.

[0039] For example, the semiconductor device may further include a body contact region of a first conductivity type adjacent to the bottom side of the second contact groove. The doping concentration profile of the anode contact region at the center of the first contact groove along the vertical direction may be equal to the doping concentration profile of the body contact region at the center of the second contact groove along the vertical direction. For example, the doping concentration profiles of the body contact region and the anode contact region may be formed simultaneously.

[0040] For example, the width of the second contact groove at the first surface can be equal to the width of the first contact groove at the first surface, and the depth of the second contact groove can be equal to the depth of the first contact groove.

[0041] For example, an IGBT may comprise an array of IGBT transistor cells. Diodes may be arranged outside the array of IGBT transistor cells. For example, the IGBT transistor cells may be in a strip form. The diodes may also be formed in a strip form. For example, the mesa region of the IGBT transistor cell on a first surface portion of the body may be transformed, for example, into the mesa region of the diode on a second surface portion of the semiconductor body. Furthermore, or alternatively, the mesa region of the diode may also be arranged in a third surface portion of the semiconductor body, wherein the mesa regions of the diode and the IGBT extend, for example, parallel to each other.

[0042] For example, the lateral extension of a diode can be greater than the thickness of the semiconductor body. For example, the lateral extension of a diode greater than the thickness of the semiconductor body can be a first lateral extension along a lateral reference direction, which is smaller than a second lateral extension along a lateral direction perpendicular to the lateral reference direction. For example, the lateral extension can be, for example, the minimum lateral extension of the diode.

[0043] For example, the diode trench electrode can be electrically connected to the emitter electrode.

[0044] Details regarding the structural elements of semiconductor devices, such as the manufacturing processes, dimensions, or functions of the structural elements of IGBTs or diodes described in the examples above, are correspondingly applicable to the features described in the reference methods and figures below.

[0045] A method of manufacturing a semiconductor device may include forming an IGBT in an IGBT portion of a semiconductor body. The method may further include forming a diode in a diode portion of the semiconductor body. Forming the diode may include forming an anode region of a first conductivity type, wherein the anode region is defined by diode trenches along a first lateral direction. Each diode trench may include a diode trench electrode and a diode trench dielectric. Forming the diode may further include forming a first contact groove extending vertically from a first surface of the semiconductor body into the anode region. Forming the diode may further include forming an anode contact region of a first conductivity type adjacent to the bottom side of the first contact groove. Forming the diode may further include forming a cathode contact region of a second conductivity type adjacent to a second surface of the semiconductor body opposite the first surface.

[0046] The first contact groove can be formed by etching a groove into the semiconductor body. For example, the first contact groove can be transformed into a first contact hole in the interlayer dielectric on the semiconductor body. The first contact hole and the first contact groove can be filled with at least one conductive material, such as a highly doped semiconductor material, a metal, a metal alloy, or any combination thereof. One or more padding materials can pad the first contact groove, for example, to achieve improved adhesion and / or diffusion barrier properties.

[0047] For example, forming an IGBT may further include forming a collector region of a first conductivity type adjacent to the second surface. The method may further include forming a collector electrode that is directly electrically connected via the second surface to a cathode contact region in the diode region and a collector region in the IGBT region.

[0048] For example, the method may further include forming a spacer in the first contact groove. Thereafter, for example, as described in the example above, an anode contact region can be formed by introducing a dopant into the semiconductor body through the bottom of the first contact groove.

[0049] For example, the method may further include forming pad portions on the sidewalls and bottom of the first contact groove. Thereafter, for example, as described in the example above, an anode contact region can be formed by introducing a dopant into the semiconductor body via the pad portion at the bottom of the first contact groove.

[0050] For example, forming an IGBT in the IGBT section may include forming an array of IGBT transistor cells, wherein diodes in the diode section are formed outside the array of IGBT transistor cells.

[0051] For example, the method may further include forming a second contact groove extending vertically from the first surface into the body region.

[0052] For example, forming an IGBT may further include forming a gate trench including a gate electrode and a gate dielectric. Forming an IGBT may further include forming a source region of a second conductivity type adjacent to the gate trench. Forming an IGBT may further include forming a body region of a first conductivity type adjacent to the gate trench. Forming an IGBT may further include forming an emitter electrode electrically connected to the body region and the source region via a first surface of the semiconductor body. Forming an IGBT may further include forming a drift region of a second conductivity type between the body region and a second surface of the semiconductor body.

[0053] For example, the method may further include forming a body contact region of a first conductivity type adjacent to the bottom side of the second contact groove. The body contact region and the anode contact region can be formed simultaneously.

[0054] For example, the body region and the anode region can be formed simultaneously.

[0055] The examples and features described above and below can be combined.

[0056] Further details and aspects are mentioned in relation to the examples described above or below. Processing the semiconductor body may include one or more optional additional features corresponding to one or more aspects mentioned in relation to the proposed concept or one or more examples described above or below.

[0057] The details of the functions and structures described in the examples above should also apply to the exemplary examples illustrated in the figures and further described below.

[0058] Reference Figure 1 The schematic cross-sectional view illustrates an example of semiconductor device 100.

[0059] Semiconductor device 100 includes an IGBT 102 in an IGBT portion 104 of semiconductor body 106. A gate trench 112 extends from a first surface 122 into the semiconductor body in a vertical direction y. The gate trench 112 includes a gate electrode 114 and a gate dielectric 116.

[0060] n + The doped source region 118 is adjacent to the gate trench 112. The p-doped body region 120 is also adjacent to the gate trench 112.

[0061] The emitter electrode E is electrically connected to the body region 120 and the source region 118 via the first surface 122 of the semiconductor body 106. - A doped drift region 124 is disposed between the body region 120 and the second surface 126 of the semiconductor body 106. +A doped collector region 130 (e.g., a back-side emitter region) is disposed between the drift region 124 and the second surface 126. The collector electrode C is electrically connected to the collector region 130 via the second surface 126.

[0062] The semiconductor device further includes a diode 108 in diode portion 110, adjacent to IGBT 102 in IGBT portion 104. Diode 108 includes a p-doped anode region 132. Anode region 132 is defined by diode trenches 134 along a first lateral direction x1. Each diode trench 134 includes a diode trench electrode 136 and a diode trench dielectric 138. A first contact groove 140 extends from a first surface 122 of semiconductor body 106 along a vertical direction y into anode region 132. + A doped cathode contact region 128 is disposed between the anode region 132 and the second surface 126. The collector electrode C is electrically connected to the cathode contact region 128 via the second surface 126.

[0063] The details described in the examples above (e.g., details about dimensions, processing, or function) correspond to those in the various figures (e.g.) Figure 1 The components shown in the diagram (in Chinese).

[0064] Figure 2A and Figure 2B This is a schematic top view for illustrating an exemplary arrangement of diode 108 and IGBT 102.

[0065] exist Figure 2A In the example illustrated in the top view, diode 108 is laterally adjacent to IGBT 102 by being surrounded by IGBT 102. Edge termination region 142 surrounds IGBT 102 and diode 108.

[0066] exist Figure 2B In the example illustrated, diode 108 is arranged between separated portions of IGBT 102. Besides the exemplary arrangement of diode 108 laterally adjacent to IGBT 102, a wide variety of other arrangements can be used.

[0067] Reference Figure 3A A schematic cross-sectional view, schematically illustrating the formation Figures 1 to 2B Example of processing features of semiconductor device 100. A spacer 144 is formed in the first contact groove 140. The spacer 144 also extends along the sidewall of an opening in the interlayer dielectric 146 on the first surface 122 of the semiconductor body 106. For example, the spacer 144 may include one or more dielectric materials, such as oxides and / or nitrides.

[0068] An anode contact region 148 is formed in the semiconductor body 106 by ion implantation of dopant through the bottom of the first contact groove 140. Details regarding the anode contact region 148 (e.g., the dimensions and benefits of the spacer treatment described in the example above) apply accordingly. For example, the anode contact region 148 may have a first doping concentration at a first location below the center or middle of the bottom side of the first contact groove 140—which has a first width w1 at the first surface 122. The doping concentration of the anode contact region 148 may be reduced to at least one-tenth over a lateral distance l1 from the first location along the first lateral direction to the second location. The lateral distance l1 above the first doping concentration is smaller than the anode contact region implanted through the bottom side of the first contact groove without any spacers at the sidewalls of the groove (in...). Figure 3A The corresponding horizontal distance l1' (indicated by the dashed line in the middle).

[0069] Reference Figure 3B A schematic cross-sectional view, schematically illustrating the formation Figures 1 to 2B Another example of the processing features of the semiconductor device 100. A pad portion 150 is formed in the first contact groove 140. The pad portion 150 also extends along the sidewall of an opening in the interlayer dielectric 146 on the first surface 122 of the semiconductor body 106. For example, the pad portion 150 may include one or more dielectric materials, such as oxides and / or nitrides.

[0070] An anode contact region 148 is formed in the semiconductor body 106 by ion implantation of a dopant through a pad portion 150 at the bottom of the first contact groove 140. Details regarding the anode contact region 148 (such as the dimensions and benefits of the spacer treatment described in the example above) apply accordingly.

[0071] Reference Figure 4A In a schematic cross-sectional view of diode 108, at least two first contact grooves 140 may be arranged along a first lateral direction x1 between opposing diode trenches 134 and the at least two first contact grooves 140 are separated from each other. For example, the first width w1 of one, some, or all of the first contact grooves 140 of diode 108 along the first lateral direction x1 may differ from the second width or lateral extension of the second contact groove in IGBT 102. For example, the second contact groove in IGBT 102 may be electrically connected to the source region and the body region.

[0072] Reference Figure 4BIn a schematic cross-sectional view of the diode 108, in one or more mesa regions 152, the first width w1 of one, some, or all of the first contact recesses 140 of the diode 108 along the first lateral direction x1 is greater than the width wm2 of the mesa region in the IGBT 102, and further greater than the second width w2 of the second contact recesses 154 of the IGBT 102. A body contact region 156 is adjacent to the bottom of the second contact recess 154. In other regions of the IGBT 102 and / or the diode 108, for example, the first width w1 of the first contact recesses 140 may be equal to the second width w2 of the second contact recesses 154.

[0073] The aspects and features mentioned and described together with the previously described examples and one or more of the figures may also be combined with one or more of the other examples in order to replace similar features of the other examples or to additionally introduce features to the other examples.

[0074] The description and accompanying drawings illustrate only the principles of this disclosure. Furthermore, all examples described herein are primarily and explicitly intended for illustrative purposes only to aid the reader in understanding the principles of this disclosure and the concepts contributed by the inventors(s) to extend the art. All descriptions of the principles, aspects, and examples of this disclosure, as well as the specific examples thereof, are intended to cover their equivalents. The second conductivity type may be n-type and the first conductivity type may be p-type. Alternatively, the second conductivity type may be p-type and the first conductivity type may be n-type.

[0075] While specific embodiments have been illustrated and described herein, those skilled in the art will appreciate that various substitutions and / or equivalent implementations may be made in place of the specific embodiments shown and described without departing from the scope of the invention. This application is intended to cover any adaptations or variations of the specific embodiments discussed herein. Therefore, it is intended that the invention be limited only by the claims and their equivalents.

Claims

1. A semiconductor device (100), comprising: IGBT (102) in the IGBT portion (104) of the semiconductor body (106); In the diode portion (110) of the semiconductor body (106), there is a diode (108), wherein, Diode (108) includes: A first conductivity type of anode region (132), wherein the anode region (132) is defined by diode trenches (134) along a first transverse direction (x1), each diode trench (134) including a diode trench electrode (136) and a diode trench dielectric (138); A first contact groove (140) extends from the first surface (122) of the semiconductor body (106) along the vertical direction (y) into the anode region (132); A first conductivity type anode contact area (148) is adjacent to the bottom side of the first contact groove (140); and A cathode contact region (128) of the second conductivity type is adjacent to the second surface (126) of the semiconductor body (106) opposite to the first surface (122). The anode contact area (148) has a first doping concentration at a first position below the center of the bottom side of the first contact groove (140), and the doping concentration of the anode contact area (148) is reduced to at least one-tenth over a lateral distance l1 from the first position along the first lateral direction to the second position.

2. The semiconductor device according to claim 1, wherein, The IGBT (102) includes a collector region (130) of a first conductivity type, the collector region (130) of the first conductivity type being adjacent to a second surface (126), and wherein the semiconductor device further includes: The collector electrode (C) is directly electrically connected via a second surface (126) to the cathode contact region (128) in the diode portion (110) and to the collector region (130) in the IGBT portion (104).

3. The semiconductor device (100) according to any one of the preceding two claims 1-2, wherein, The lateral distance l1 is less than half the width (w1) of the first contact groove (140) along the first lateral direction (x1) at the first surface (122).

4. The semiconductor device (100) according to claim 1, wherein, The doping concentration of the anode contact region (148) is reduced to at least 1 / 100 over the lateral distance l1.

5. The semiconductor device (100) according to any one of claims 1-2, wherein, The doping concentration profile of the anode contact region (148) is the diffusion broadening profile of the dopant introduced into the semiconductor body (106) through the bottom side of the first contact groove (140) by ion implantation, wherein a sidewall spacer (144) or a pad (150) is arranged at the sidewall of the first contact groove (140) at the time of ion implantation.

6. The semiconductor device (100) according to any one of claims 1-2, wherein, IGBT(102) further includes: A gate trench (112) includes a gate electrode (114) and a gate dielectric (116); The source region (118) of the second conductivity type is adjacent to the gate trench (112); A body region (120) of the first conductivity type, which is adjacent to a gate trench (112); The emitter electrode (E) is electrically connected to the body region (120) and the source region (118) via the first surface (122) of the semiconductor body (106); A drift region (124) of the second conductivity type is located between the body region (120) and the second surface (126) of the semiconductor body (106).

7. The semiconductor device (100) according to claim 6, further comprising a second contact groove (154) extending from the first surface (122) in a vertical direction (y) into the body region (120).

8. The semiconductor device (100) according to claim 7, further comprising a body contact region (156) of a first conductivity type, the body contact region (156) being adjacent to the bottom side of the second contact groove (154), wherein, The doping concentration profile of the anode contact region (148) at the center of the first contact groove (140) along the vertical direction (y) is equal to the doping concentration profile of the body contact region (156) at the center of the second contact groove (154) along the vertical direction (y).

9. The semiconductor device (100) according to claim 7, wherein, The width (w2) of the second contact groove (154) at the first surface (122) is equal to the width (w1) of the first contact groove (140) at the first surface (122), and the depth of the second contact groove is equal to the depth of the first contact groove.

10. The semiconductor device (100) according to any one of claims 1-2, wherein, The IGBT (102) includes an array of IGBT transistor cells, and diodes (108) are arranged outside the array of IGBT transistor cells.

11. The semiconductor device (100) according to any one of claims 1-2, wherein, The lateral extension of the diode is greater than the thickness of the semiconductor body (106).

12. The semiconductor device according to any one of claims 1-2, wherein, The diode trench electrode (136) is electrically connected to the emitter electrode (E).

13. A method for manufacturing a semiconductor device (100), comprising: An IGBT (102) is formed in the IGBT portion (104) of the semiconductor body (106); A diode (108) is formed in the diode portion (110) of the semiconductor body (106), wherein, The diode (108) includes: An anode region (132) of a first conductivity type is formed, wherein the anode region (132) is defined by diode trenches (134) along a first lateral direction (x1), each diode trench (134) including a diode trench electrode (136) and a diode trench dielectric (138); and A first contact groove (140) is formed extending from the first surface (122) of the semiconductor body (106) along the vertical direction (y) into the anode region (132); A first conductivity type anode contact area (148) is formed, the first conductivity type anode contact area (148) being adjacent to the bottom side of the first contact groove (140); and A cathode contact region (128) of a second conductivity type is formed, which is adjacent to the second surface (126) of the semiconductor body (106) opposite to the first surface. The anode contact area (148) has a first doping concentration at a first position below the center of the bottom side of the first contact groove (140), and the doping concentration of the anode contact area (148) is reduced to at least one-tenth over a lateral distance l1 from the first position along the first lateral direction to the second position.

14. The method according to claim 13, wherein, Forming an IGBT (102) further includes forming a collector region (130) of a first conductivity type, the collector region (130) of the first conductivity type being adjacent to a second surface (126), and wherein the method further includes: A collector electrode (C) is formed, which is directly electrically connected via a second surface (126) to the cathode contact region (128) in the diode portion (110) and the collector region (130) in the IGBT portion (104).

15. The method according to any one of claims 13-14, further comprising forming a spacer (144) in the first contact groove (140); and thereafter An anode contact region (148) is formed by introducing a dopant into the semiconductor body (106) through the bottom of the first contact groove (140).

16. The method according to any one of claims 13 to 14, further comprising: A padding portion (150) is formed, which pads the sidewalls and bottom of the first contact groove (140); And thereafter an anode contact region (148) is formed by introducing a dopant into the semiconductor body (106) via a pad portion (150) at the bottom of the first contact groove (140).

17. The method according to any one of claims 13-14, wherein, Forming an IGBT (102) includes forming an array of IGBT transistor cells, wherein a diode (108) is formed outside the array of IGBT transistor cells.

18. The method according to any one of claims 13-14, further comprising forming a second contact groove (154) extending from the first surface (122) in a vertical direction (y) into the body region (120).

19. The method according to any one of claims 13-14, wherein, Forming an IGBT (102) further includes: A gate trench (112) is formed, comprising a gate electrode (114) and a gate dielectric (116); A source region (118) of the second conductivity type is formed adjacent to the gate trench (112); A body region (120) of the first conductivity type is formed adjacent to the gate trench (112); An emitter electrode (E) is formed, and the emitter electrode (E) is electrically connected to the body region (120) and the source region (118) via the first surface (122) of the semiconductor body (106); A drift region (124) of a second conductivity type is formed between the body region (120) and the second surface (126) of the semiconductor body (106).

20. The method according to any one of claims 13-14, further comprising forming a body contact region (156) of a first conductive type, the body contact region (156) of the first conductive type adjacent to the bottom side of the second contact groove (154), and wherein, The body contact area (156) and the anode contact area (148) are formed simultaneously.

21. The method according to any one of claims 13-14, wherein the body region (120) and the anode region (132) are formed simultaneously.

Citation Information

Patent Citations

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