Control strategy for bridgeless multilevel rectifier with common DC bus

Abstract

The present invention has a bridgeless multi-level rectifier and control strategy with a common DC bus, belonging to AC / DC conversion technology and control technology thereof. The converter provides a variety of main power circuits, each of which is composed of expandable module units, which are used to form a pair of common high-voltage DC buses, overcoming the disadvantage of not being able to generate a high DC bus voltage due to the voltage stress limitation of the power switch tube. The rectifier and control strategy provided by the present invention greatly reduce the number of active power switch tubes required, greatly reduce the cost of such converters and the complexity of control, and can conveniently achieve balanced control of the flying capacitor voltage on the basis of obtaining multi-level voltage output, and can flexibly achieve expansion of any number of levels. It has important application value in the fields of medium and high voltage DC transmission, high-power medium and high voltage variable frequency speed regulation, etc.

Description

Technical Field

[0001] The present invention belongs to the technical field of medium and high voltage variable frequency speed regulation, and in particular relates to a system implementation scheme of a control strategy for a bridgeless multi-level rectifier with a common DC bus. Background Art

[0002] In recent years, multilevel power converters have been more and more successfully applied in the fields of high voltage and high power frequency conversion, active power filtering, high voltage direct current (HVDC) transmission and reactive power compensation of power system. The basic circuit topology of traditional medium and high voltage multilevel converters can be roughly divided into two categories: clamped type and unit cascade type. The diode clamped three-level medium and high voltage converters produced by Siemens or ABB, which are widely used in industry, and the cascaded H-bridge medium and high voltage converters produced by Robincon or Leader Harvest are typical representatives of these two types of products. In both types of medium and high voltage converters, in order to use low withstand voltage power electronic devices to complete high voltage power conversion, it is necessary to use a bulky, complex wiring and expensive power frequency phase shifting transformer on the rectifier input side to achieve electrical isolation. This limits its application in many industrial occasions.

[0003] In recent years, the cascaded multilevel converter without power frequency transformer has received extensive attention in the field of power electronics technology. It is considered to be an ideal implementation solution for smart grid interfaces or new generation medium and high voltage inverters suitable for access to new energy power generation systems and meeting the needs of distributed power generation. This type of converter uses a high-frequency transformer to replace the power frequency phase-shifting transformer in the traditional cascade converter to achieve electrical isolation. When used for bidirectional power transmission, the rectifier side adopts a cascaded fully controlled H-bridge multilevel power converter structure. When used for unidirectional power transmission, the rectifier side adopts a unidirectional cascaded multilevel power converter structure (including: cascaded diode + Boost rectifier circuit, cascaded bridgeless rectifier circuit, cascaded VIENNA rectifier circuit, etc.). Compared with the rectifier stage of traditional medium and high voltage inverters, the implementation solution of the rectifier stage of this type of converter eliminates the bulky, complex wiring, and expensive power frequency phase-shifting transformer, thereby effectively reducing the system volume, weight and manufacturing cost. However, this type of converter also has obvious disadvantages, mainly manifested in: N cascaded rectifier modules in each phase will produce N groups of DC output terminals, and because the input terminals are not isolated, these N groups of DC output terminals of rectifier modules cannot be directly connected in series to form a pair of common high-voltage DC output busbars, so they cannot be directly used for high-voltage DC power transmission, nor can they be directly connected to multi-level inverter circuits for medium and high voltage variable frequency speed regulation. In order to realize a common high-voltage DC output busbar or to realize flexible control of the DC voltage of N groups of rectifier outputs, N groups of cascaded rectifier modules must be connected to N high-frequency isolated DC-DC conversion modules, which increases the complexity of the entire system topology and control method and reduces work efficiency. Summary of the invention

[0004] The purpose of the present invention is to overcome the above-mentioned defects and provide a bridgeless multi-level rectifier implementation scheme with a common DC bus. Compared with the rectifier stage of the traditional medium and high voltage inverter, on the one hand, considering that in quite a few actual industrial applications, energy does not need to be transmitted in two directions, the bridgeless multi-level rectifier provided by the present invention can realize unidirectional energy transmission. Through the bridgeless multi-level scalable topological structure, the number of active power switch tubes is reduced by nearly half, thereby greatly reducing the cost and control complexity of the cascade multi-level converter without industrial frequency transformer; on the other hand, there is no need to use a bulky industrial frequency phase-shifting transformer at the input end, and a low-voltage power switch is used. The bridgeless multilevel rectifier provided by the present invention can complete the high-power unity power factor rectification and conversion under high voltage. Compared with the multilevel converter without industrial frequency transformer, the bridgeless multilevel rectifier provided by the present invention can form a pair of common high-voltage DC bus bars on the DC side, and can flexibly realize the balanced control of the output side capacitor voltage. The bridgeless multilevel rectifier provided by the present invention can select an expandable topological structure according to different application occasions and power levels. The main power circuit topological structure is flexible, small in size, light in weight, low in cost, simple in control, and high in overall working efficiency of the system. It has important application value in the fields of medium and high voltage direct current transmission (HVDC), high-power power electronic transformers, and high-power medium and high voltage AC-DC-AC inverters.

[0005] To achieve the above-mentioned object, the present invention provides a bridgeless multi-level rectifier with a common DC bus, comprising a main power circuit, wherein the main power circuit comprises a high-frequency filter, an m-level first module unit (M) (m=2n-1, n is a positive integer greater than 1), an output DC capacitor C and a load resistor R, characterized in that: the first module unit (M) comprises two first bridge arms P and a second bridge arm Q with completely identical structures, and the first bridge arm P comprises m-1 switch devices S P1 , S P2 ······S Pm-2 , S Pm-1 , m-1 fast recovery diodes D P1 , D P2 ······D Pm-2 , D Pm-1 , i flying capacitor branches (where i=1, 2...m-2), the number of DC capacitors of the i-th flying capacitor branch of the first bridge arm P is i, and the fast recovery diode D of the first bridge arm P P1 The second connection terminal (b) of the first bridge arm P is connected to the fast recovery diode D P2 The first bridge arm P is connected to the first terminal (a), and the fast recovery diode D P2 The second connection terminal (b) of the first bridge arm P is connected to the fast recovery diode D P3The first connection terminal (a) of the first bridge arm P is connected to the first connection terminal (a), and so on. Pm-2 The second connection terminal (b) is connected in turn to the fast recovery diode D of the first bridge arm P Pm-1 The first connection terminal (a) of the first bridge arm P is connected to the switch device S P1 The second connection terminal (f) of the first bridge arm P is connected to the switch device S P2 The first connection terminal (e) of the first bridge arm P is connected to the switch device S P2 The second connection terminal (f) of the first bridge arm P is connected to the switch device S P3 The first connection terminal (e) of the first bridge arm P is connected to the first connection terminal (e), and so on. Pm-2 The second connection terminal (f) is connected in turn to the switch device S of the first bridge arm P Pm-1 The first bridge arm P is connected to the first terminal (e), and the fast recovery diode D P1 The first connection terminal (a) and the switching device S of the first bridge arm P P1 The first flying capacitor branch of the first bridge arm P includes a DC capacitor C P1 , the fast recovery diode D of the first bridge arm P P1 The second connection terminal (b) of the first bridge arm P is connected to the switch device S P1 The second connection terminal (f) is respectively connected to the two ends of the first flying capacitor branch. Similarly, the i-th flying capacitor branch of the first bridge arm P includes i DC capacitors C P(m-1)(m-2) / 2 , C P(m-1)(m-2) / 2-1 ······C P(m-1)(m-2) / 2-i+1 The fast recovery diode D of the first bridge arm P is connected in series. Pm-2 The second connection terminal (b) of the first bridge arm P is connected to the switch device S Pm-2 The second connection terminal (f) is respectively connected to the two ends of the i-th flying capacitor branch, and the second bridge arm Q includes m-1 switching devices S Q1 , S Q2 ······S Qm-2 , S Qm-1 , m-1 fast recovery diodes D Q1 , D Q2 ······D Qm-2 , D Qm-1 , i flying capacitor branches (where i=1, 2...m-2), the number of DC capacitors of the i-th flying capacitor branch of the second bridge arm Q is i, the second bridge arm Q has the same connection structure as the first bridge arm P, and the fast recovery diode D of the first bridge arm PPm-1 The second connection terminal (b) of the second bridge arm Q and the fast recovery diode D Qm-1 The first bridge arm P is connected to the second wiring terminal (b) to form the DC output bus positive terminal, and is connected to the output DC capacitor C and one end of the load resistor R connected in parallel. The switch device S of the first bridge arm P Pm-1 The second connection terminal (f) of the second bridge arm Q is connected to the switch device S Qm-1 The first bridge arm P is connected to the second terminal (f) of the first bridge arm, forming the negative terminal of the DC output bus, and is connected to the output DC capacitor C and the other end of the load resistor R connected in parallel. P1 The first connection terminal (e) is connected in series with the high-frequency filter to the AC power grid, and the other end of the AC power grid is connected to the switch device S Q1 is connected to the first terminal (e).

[0006] To achieve the above-mentioned object, the present invention provides a three-phase parallel rectifier composed of a bridgeless multi-level rectifier with a common DC bus, including a three-phase main power circuit, characterized in that: the three-phase main power circuit includes three high-frequency filters and three second module units (N), the second module unit (N) includes an m-level first module unit (M) (m=2n-1, where n is a positive integer greater than 1), an output DC capacitor C and a load resistor R, the first module unit (M) includes two first bridge arms P and a second bridge arm Q with exactly the same structure, and the first bridge arm P includes m-1 switch devices S P1 , S P2 ······S Pm-2 , S Pm-1 , m-1 fast recovery diodes D P1 , D P2 ······D Pm-2 , D Pm-1 , i flying capacitor branches (where i=1, 2...m-2), the number of DC capacitors of the i-th flying capacitor branch of the first bridge arm P is i, and the fast recovery diode D of the first bridge arm P P1 The second connection terminal (b) of the first bridge arm P is connected to the fast recovery diode D P2 The first bridge arm P is connected to the first terminal (a), and the fast recovery diode D P2 The second connection terminal (b) of the first bridge arm P is connected to the fast recovery diode D P3 The first connection terminal (a) of the first bridge arm P is connected to the first connection terminal (a), and so on. Pm-2 The second connection terminal (b) is connected in turn to the fast recovery diode D of the first bridge arm P Pm-1The first connection terminal (a) of the first bridge arm P is connected to the switching device S P1 The second connection terminal (f) of the first bridge arm P is connected to the switch device S P2 The first connection terminal (e) of the first bridge arm P is connected to the switch device S P2 The second connection terminal (f) of the first bridge arm P is connected to the switch device S P3 The first connection terminal (e) of the first bridge arm P is connected to the first connection terminal (e), and so on. Pm-2 The second connection terminal (f) is connected in turn to the switch device S of the first bridge arm P Pm-1 The first bridge arm P is connected to the first terminal (e), and the fast recovery diode D P1 The first connection terminal (a) and the switching device S of the first bridge arm P P1 The first flying capacitor branch of the first bridge arm P includes a DC capacitor C P1 , the fast recovery diode D of the first bridge arm P P1 The second connection terminal (b) of the first bridge arm P is connected to the switch device S P1 The second connection terminal (f) is respectively connected to the two ends of the first flying capacitor branch. Similarly, the i-th flying capacitor branch of the first bridge arm P includes i DC capacitors C P(m-1)(m-2) / 2 , C P(m-1)(m-2) / 2-1 ······C P(m-1)(m-2) / 2-i+1 The fast recovery diode D of the first bridge arm P is connected in series. Pm-2 The second connection terminal (b) of the first bridge arm P is connected to the switch device S Pm-2 The second connection terminal (f) is respectively connected to the two ends of the i-th flying capacitor branch, and the second bridge arm Q includes m-1 switching devices S Q1 , S Q2 ······S Qm-2 , S Qm-1 , m-1 fast recovery diodes D Q1 , D Q2 ······D Qm-2 , D Qm-1 , i flying capacitor branches (where i=1, 2...m-2), the number of DC capacitors of the i-th flying capacitor branch of the second bridge arm Q is i, the second bridge arm Q has the same connection structure as the first bridge arm P, and the fast recovery diode D of the first bridge arm P Pm-1 The second connection terminal (b) of the second bridge arm Q and the fast recovery diode D Qm-1The first bridge arm P is connected to the second wiring terminal (b) to form the DC output bus positive terminal, and is connected to the output DC capacitor C and one end of the load resistor R connected in parallel. The switch device S of the first bridge arm P Pm-1 The second connection terminal (f) of the second bridge arm Q is connected to the switch device S Qm-1 The second terminal (f) of the three-phase second module unit (N) is connected to form a negative terminal of the DC output bus, and is connected to the other end of the output DC capacitor C and the load resistor R connected in parallel, the DC output positive terminal (g) of the second module unit (N) of each phase is connected, and the DC output negative terminal (h) of the second module unit (N) of each phase is connected, and the second module unit (N) of each phase has two remaining AC input terminals, the first AC input terminals of the three-phase second module unit (N) constitute a group of terminals, and the second AC input terminals of the three-phase second module unit (N) constitute another group of terminals, one group of terminals is connected to a common neutral point, and the other group of terminals is respectively connected in series with the three high-frequency filters and connected to the three-phase power grid to form a three-phase parallel connection.

[0007] To achieve the above-mentioned object, the present invention provides a three-phase star-connected rectifier composed of a bridgeless multi-level rectifier with a common DC bus, comprising a three-phase main power circuit, characterized in that: the main power circuit comprises three high-frequency filters and three second module units (N), the second module unit (N) comprises an m-level first module unit (M) (m=2n-1, wherein n is a positive integer greater than 1), an output DC capacitor C and a load resistor R, the first module unit (M) comprises two first bridge arms P and a second bridge arm Q with exactly the same structure, the first bridge arm P comprises m-1 switch devices S P1 , S P2 ······S Pm-2 , S Pm-1 , m-1 fast recovery diodes D P1 , D P2 ······D Pm-2 , D Pm-1 , i flying capacitor branches (where i=1, 2...m-2), the number of DC capacitors of the i-th flying capacitor branch of the first bridge arm P is i, and the fast recovery diode D of the first bridge arm P P1 The second connection terminal (b) of the first bridge arm P is connected to the fast recovery diode D P2 The first bridge arm P is connected to the first terminal (a), and the fast recovery diode D P2 The second connection terminal (b) of the first bridge arm P is connected to the fast recovery diode D P3 The first connection terminal (a) of the first bridge arm P is connected to the first connection terminal (a), and so on. Pm-2The second connection terminal (b) is connected in turn to the fast recovery diode D of the first bridge arm P Pm-1 The first connection terminal (a) of the first bridge arm P is connected to the switching device S P1 The second connection terminal (f) of the first bridge arm P is connected to the switch device S P2 The first connection terminal (e) of the first bridge arm P is connected to the switch device S P2 The second connection terminal (f) of the first bridge arm P is connected to the switch device S P3 The first connection terminal (e) of the first bridge arm P is connected to the first connection terminal (e), and so on. Pm-2 The second connection terminal (f) is connected in turn to the switch device S of the first bridge arm P Pm-1 The first bridge arm P is connected to the first terminal (e), and the fast recovery diode D P1 The first connection terminal (a) and the switching device S of the first bridge arm P P1 The first flying capacitor branch of the first bridge arm P includes a DC capacitor C P1 , the fast recovery diode D of the first bridge arm P P1 The second connection terminal (b) of the first bridge arm P is connected to the switch device S P1 The second connection terminal (f) is respectively connected to the two ends of the first flying capacitor branch. Similarly, the i-th flying capacitor branch of the first bridge arm P includes i DC capacitors C P(m-1)(m-2) / 2 , C P(m-1)(m-2) / 2-1 ······C P(m-1)(m-2) / 2-i+1 The fast recovery diode D of the first bridge arm P is connected in series. Pm-2 The second connection terminal (b) of the first bridge arm P is connected to the switch device S Pm-2 The second connection terminal (f) is respectively connected to the two ends of the i-th flying capacitor branch, and the second bridge arm Q includes m-1 switching devices S Q1 , S Q2 ······S Qm-2 , S Qm-1 , m-1 fast recovery diodes D Q1 , D Q2 ······D Qm-2 , D Qm-1 , i flying capacitor branches (where i=1, 2...m-2), the number of DC capacitors of the i-th flying capacitor branch of the second bridge arm Q is i, the second bridge arm Q has the same connection structure as the first bridge arm P, and the fast recovery diode D of the first bridge arm P Pm-1 The second connection terminal (b) of the second bridge arm Q and the fast recovery diode D Qm-1The first bridge arm P is connected to the second wiring terminal (b) to form the DC output bus positive terminal, and is connected to the output DC capacitor C and one end of the load resistor R connected in parallel. The switch device S of the first bridge arm P Pm-1 The second connection terminal (f) of the second bridge arm Q is connected to the switch device S Qm-1 The second terminal (f) of the three-phase second module unit (N) is connected to form a negative terminal of the DC output bus, and is connected to the output DC capacitor C and the other end of the load resistor R connected in parallel. Each phase of the second module unit (N) has two remaining AC input terminals. The first AC input terminals of the three-phase second module unit (N) constitute a group of terminals, and the second AC input terminals of the three-phase second module unit (N) constitute another group of terminals, one group of terminals is connected to a common neutral point, and the other group of terminals is respectively connected in series with the three high-frequency filters and connected to the three-phase power grid to form a star connection.

[0008] To achieve the above-mentioned object, the present invention provides a three-phase delta-connected rectifier composed of a bridgeless multi-level rectifier with a common DC bus, comprising a three-phase main power circuit, characterized in that: the main power circuit comprises three high-frequency filters and three second module units (N), the second module unit (N) comprises an m-level first module unit (M) (m=2n-1, wherein n is a positive integer greater than 1), an output DC capacitor C and a load resistor R, the first module unit (M) comprises two first bridge arms P and a second bridge arm Q with exactly the same structure, the first bridge arm P comprises m-1 switch devices S P1 , S P2 ······S Pm-2 , S Pm-1 , m-1 fast recovery diodes D P1 , D P2 ······D Pm-2 , D Pm-1 , i flying capacitor branches (where i=1, 2...m-2), the number of DC capacitors of the i-th flying capacitor branch of the first bridge arm P is i, and the fast recovery diode D of the first bridge arm P P1 The second connection terminal (b) of the first bridge arm P is connected to the fast recovery diode D P2 The first bridge arm P is connected to the first terminal (a), and the fast recovery diode D P2 The second connection terminal (b) of the first bridge arm P is connected to the fast recovery diode D P3 The first connection terminal (a) of the first bridge arm P is connected to the first connection terminal (a), and so on. Pm-2 The second connection terminal (b) is connected in turn to the fast recovery diode D of the first bridge arm P Pm-1The first connection terminal (a) of the first bridge arm P is connected to the switching device S P1 The second connection terminal (f) of the first bridge arm P is connected to the switch device S P2 The first connection terminal (e) of the first bridge arm P is connected to the switch device S P2 The second connection terminal (f) of the first bridge arm P is connected to the switch device S P3 The first connection terminal (e) of the first bridge arm P is connected to the first connection terminal (e), and so on. Pm-2 The second connection terminal (f) is connected in turn to the switch device S of the first bridge arm P Pm-1 The first bridge arm P is connected to the first terminal (e), and the fast recovery diode D P1 The first connection terminal (a) and the switching device S of the first bridge arm P P1 The first flying capacitor branch of the first bridge arm P includes a DC capacitor C P1 , the fast recovery diode D of the first bridge arm P P1 The second connection terminal (b) of the first bridge arm P is connected to the switch device S P1 The second connection terminal (f) is respectively connected to the two ends of the first flying capacitor branch. Similarly, the i-th flying capacitor branch of the first bridge arm P includes i DC capacitors C P(m-1)(m-2) / 2 , C P(m-1)(m-2) / 2-1 ······C P(m-1)(m-2) / 2-i+1 The fast recovery diode D of the first bridge arm P is connected in series. Pm-2 The second connection terminal (b) of the first bridge arm P is connected to the switch device S Pm-2 The second connection terminal (f) is respectively connected to the two ends of the i-th flying capacitor branch, and the second bridge arm Q includes m-1 switching devices S Q1 , S Q2 ······S Qm-2 , S Qm-1 , m-1 fast recovery diodes D Q1 , D Q2 ······D Qm-2 , D Qm-1 , i flying capacitor branches (where i=1, 2...m-2), the number of DC capacitors of the i-th flying capacitor branch of the second bridge arm Q is i, the second bridge arm Q has the same connection structure as the first bridge arm P, and the fast recovery diode D of the first bridge arm P Pm-1 The second connection terminal (b) of the second bridge arm Q and the fast recovery diode D Qm-1The first bridge arm P is connected to the second wiring terminal (b) to form the DC output bus positive terminal, and is connected to the output DC capacitor C and one end of the load resistor R connected in parallel. The switch device S of the first bridge arm P Pm-1 The second connection terminal (f) of the second bridge arm Q is connected to the switch device S Qm-1 The second terminal (f) of the three-phase second module unit (N) is connected to form a negative terminal of the DC output bus, and is connected to the output DC capacitor C and the other end of the load resistor R connected in parallel. Each phase of the second module unit (N) has two remaining AC input terminals. The first AC input terminals of the three-phase second module unit (N) constitute a group of terminals, and the second AC input terminals of the three-phase second module unit (N) constitute another group of terminals. One group of terminals is connected to the input terminal of the three-phase power grid through the three high-frequency filters, and the other group of terminals is connected to the input terminal of the next phase in the three-phase power grid in sequence to form a delta connection.

[0009] To achieve the above-mentioned object, the present invention provides a three-phase double star-connected rectifier composed of a bridgeless multi-level rectifier with a common DC bus, comprising a three-phase main power circuit, characterized in that: the three-phase main power circuit comprises three high-frequency filters, six bridge arm inductors and six second module units (N), the six second module units (N) constitute two groups of docking star connections, each group comprises three second module units (N), the second module unit (N) comprises an m-level first module unit (M) (m=2n-1, wherein n is a positive integer greater than 1), an output DC capacitor C and a load resistor R, the first module unit (M) comprises two first bridge arms P and a second bridge arm Q with exactly the same structure, the first bridge arm P comprises m-1 switch devices S P1 , S P2 ······S Pm-2 , S Pm-1 , m-1 fast recovery diodes D P1 , D P2 ······D Pm-2 , D Pm-1 , i flying capacitor branches (where i=1, 2...m-2), the number of DC capacitors of the i-th flying capacitor branch of the first bridge arm P is i, and the fast recovery diode D of the first bridge arm P P1 The second connection terminal (b) of the first bridge arm P is connected to the fast recovery diode D P2 The first bridge arm P is connected to the first terminal (a), and the fast recovery diode D P2 The second connection terminal (b) of the first bridge arm P is connected to the fast recovery diode D P3 The first connection terminal (a) of the first bridge arm P is connected to the first connection terminal (a), and so on. Pm-2The second connection terminal (b) is connected in turn to the fast recovery diode D of the first bridge arm P Pm-1 The first connection terminal (a) of the first bridge arm P is connected to the switching device S P1 The second connection terminal (f) of the first bridge arm P is connected to the switch device S P2 The first connection terminal (e) of the first bridge arm P is connected to the switch device S P2 The second connection terminal (f) of the first bridge arm P is connected to the switch device S P3 The first connection terminal (e) of the first bridge arm P is connected to the first connection terminal (e), and so on. Pm-2 The second connection terminal (f) is connected in turn to the switch device S of the first bridge arm P Pm-1 The first bridge arm P is connected to the first terminal (e), and the fast recovery diode D P1 The first connection terminal (a) and the switching device S of the first bridge arm P P1 The first flying capacitor branch of the first bridge arm P includes a DC capacitor C P1 , the fast recovery diode D of the first bridge arm P P1 The second connection terminal (b) of the first bridge arm P is connected to the switch device S P1 The second connection terminal (f) is respectively connected to the two ends of the first flying capacitor branch. Similarly, the i-th flying capacitor branch of the first bridge arm P includes i DC capacitors C P(m-1)(m-2) / 2 , C P(m-1)(m-2) / 2-1 ······C P(m-1)(m-2) / 2-i+1 The fast recovery diode D of the first bridge arm P is connected in series. Pm-2 The second connection terminal (b) of the first bridge arm P is connected to the switch device S Pm-2 The second connection terminal (f) is respectively connected to the two ends of the i-th flying capacitor branch, and the second bridge arm Q includes m-1 switching devices S Q1 , S Q2 ······S Qm-2 , S Qm-1 , m-1 fast recovery diodes D Q1 , D Q2 ······D Qm-2 , D Qm-1 , i flying capacitor branches (where i=1, 2...m-2), the number of DC capacitors of the i-th flying capacitor branch of the second bridge arm Q is i, the second bridge arm Q has the same connection structure as the first bridge arm P, and the fast recovery diode D of the first bridge arm P Pm-1 The second connection terminal (b) of the second bridge arm Q and the fast recovery diode D Qm-1The first bridge arm P is connected to the second wiring terminal (b) to form the DC output bus positive terminal, and is connected to the output DC capacitor C and one end of the load resistor R connected in parallel. The switch device S of the first bridge arm P Pm-1 The second connection terminal (f) of the second bridge arm Q is connected to the switch device S Qm-1 The second terminal (f) is connected to form the negative end of the DC output bus, and is connected to the other end of the output DC capacitor C and the load resistor R connected in parallel. Each of the second module units (N) has two remaining AC input terminals. The first AC input terminals of the three star-connected second module units (N) in each group of three phases constitute a group of terminals, and the second AC input terminals of the three star-connected second module units (N) in each group of three phases constitute another group of terminals, one of which is connected to a common neutral point, and the other group of terminals is respectively connected to one end of the three bridge arm inductors, and the other ends of the two bridge arm inductors on each phase bridge arm are respectively connected, and are respectively connected to the three-phase grid input terminal through one of the three high-frequency filters. At the same time, the common neutral point in the first group of star connections and the common neutral point in the second group of star connections are respectively connected to the two ends of the DC capacitor to form a double star connection.

[0010] To achieve the above object, the present invention provides a control strategy for a bridgeless multi-level rectifier with a common DC bus, characterized in that the control strategy steps for the bridgeless multi-level rectifier with a common DC bus are as follows:

[0011] (1) Sampling the output side DC voltage of the bridgeless multi-level rectifier with a common DC bus to obtain the A-phase output side DC voltage signal U Ao , B phase output side DC voltage signal U Bo , C phase output side DC voltage signal U Co ;

[0012] (2) Sampling the flying capacitor branch voltages of the two bridge arms of the bridgeless multilevel rectifier with a common DC bus to obtain the flying capacitor branch voltage U of the first bridge arm P of phase A A11 , U A12 、······、U A1i , the flying capacitor branch voltage U of the second bridge arm Q of phase A A21 , U A22 、······、U A2i , the flying capacitor branch voltage U of the first bridge arm P of phase B B11 , U B12 、······、U B1i , the flying capacitor branch voltage U of the second bridge arm Q of phase B B21 , U B22 、······、U A2i, the flying capacitor branch voltage U of the first bridge arm P of phase C C11 , U C12 、······、U C1i , the flying capacitor branch voltage U of the second bridge arm Q of phase C C21 , U C22 、······、U C2i ;

[0013] (3) Replace U in step (1) Ao , U Bo , U Co Respectively with the DC voltage given signal U o * After comparison, it is sent to the PI voltage regulator to obtain the output DC current signal amplitude I of the PI voltage regulator Ad ,I Bd ,I Cd ;

[0014] (4) For the m-level rectifier, the DC voltage given signal of the i-th flying capacitor branch is U i * =U o *i / (m-1) (where i=1, 2...m-2), the flying capacitor branch DC voltage U of the first bridge arm P of phase A in step (2) A11 , U A12 、······、U A1i Respectively with U1 * 、U2 * 、······、U i * After comparison, it is sent to the PI voltage regulator to obtain the output DC current signal amplitude I Ad11 ,I Ad12 、······、I Ad1i , the flying capacitor branch DC voltage U of the second bridge arm Q of phase A in step (2) A21 , U A22 、······、U A2i Respectively with U1 * 、U2 * 、······、U i * After comparison, it is sent to the PI voltage regulator to obtain the output DC current signal amplitude I Ad21 ,I Ad22 、······、I Ad2i , the flying capacitor branch DC voltage U of the first bridge arm P of phase B in step (2) B11 , U B12 、······、U B1i Respectively with U1 *、U2 * 、······、U i * After comparison, it is sent to the PI voltage regulator to obtain the output DC current signal amplitude I Bd11 ,I Bd12 、······、I Bd1i , the flying capacitor branch DC voltage U of the second bridge arm Q of phase B in step (2) B21 , U B22 、······、U B2i Respectively with U1 * 、U2 * 、······、U i * After comparison, it is sent to the PI voltage regulator to obtain the output DC current signal amplitude I Bd21 ,I Bd22 、······、I Bd2i , the flying capacitor branch DC voltage U of the first bridge arm P of phase C in step (2) C11 , U C12 、······、U C1i Respectively with U1 * 、U2 * 、······、U i * After comparison, it is sent to the PI voltage regulator to obtain the output DC current signal amplitude I Cd11 ,I Cd12 、······、I Cd1i , the flying capacitor branch DC voltage U of the second bridge arm P of phase C in step (2) C21 , U C22 、······、U C2i Respectively with U1 * 、U2 * 、······、U i * After comparison, it is sent to the PI voltage regulator to obtain the output DC current signal amplitude I Cd21 ,I Cd22 、······、I Cd2i ;

[0015] (5) Sample the three-phase grid voltage to obtain the input side AC voltage signal u A 、u B 、u C , and take its absolute value to get |U A |、|U B |、|U C |;

[0016] (6) Sample the three-phase grid current to obtain the input side AC current signal i A 、i B 、i C , and take its absolute value to get |I A |、|I B |、|I C |;

[0017] (7) The DC current signal amplitude I of the flying capacitor branch of the first bridge arm P of phase A in step (4) is Ad11 ,I Ad12 、······、I Ad1i The result is the same as the DC current signal amplitude I in step (3). Ad The result is the same as the absolute value of the AC voltage |U in step (5) A | multiplied by the absolute value of the alternating current |I in step (6) A | subtract, and the result is sent to the PI regulator to obtain the modulated wave signal G A1 , the DC current signal amplitude I of the flying capacitor branch of the second bridge arm Q of phase A in step (4) Ad21 ,I Ad22 、······、I Ad2i The result is the same as the DC current signal amplitude I in step (3). Ad The result is the same as the absolute value of the AC voltage |U in step (5) A | multiplied by the absolute value of the alternating current |I in step (6) A | subtract, and the result is sent to the PI regulator to obtain the modulated wave signal G A2 ;

[0018] (8) The DC current signal amplitude I of the flying capacitor branch of the first bridge arm P of phase B in step (4) is Bd11 ,I Bd12 、······、I Bd1i The result is the same as the DC current signal amplitude I in step (3). Bd The result is the same as the absolute value of the AC voltage |U in step (5) B | multiplied by the absolute value of the alternating current |I in step (6) B | subtract, and the result is sent to the PI regulator to obtain the modulated wave signal G B1 , the DC current signal amplitude I of the flying capacitor branch of the second bridge arm Q of phase B in step (4) Bd21 ,I Bd22 、······、I Bd2i The result is the same as the DC current signal amplitude I in step (3). BdThe result is the same as the absolute value of the AC voltage |U in step (5) B | multiplied by the absolute value of the alternating current |I in step (6) B | subtract, and the result is sent to the PI regulator to obtain the modulated wave signal G B2 ;

[0019] (9) The DC current signal amplitude I of the flying capacitor branch of the first bridge arm P of phase C in step (4) is Cd11 ,I Cd12 、······、I Cd1i The result is the same as the DC current signal amplitude I in step (3). Cd The result is the same as the absolute value of the AC voltage |U in step (5) C | multiplied by the absolute value of the alternating current |I in step (6) C | subtract, and the result is sent to the PI regulator to obtain the modulated wave signal G C1 , the DC current signal amplitude I of the flying capacitor branch of the second bridge arm Q of phase C in step (4) Cd21 ,I Cd22 、······、I Cd2i The result is the same as the DC current signal amplitude I in step (3). Bd The result is the same as the absolute value of the AC voltage |U in step (5) C | multiplied by the absolute value of the alternating current |I in step (6) C | subtract, and the result is sent to the PI regulator to obtain the modulated wave signal G C2 ;

[0020] (10) The triangular carrier signal is combined with the signal G in step (7) A1 The A-phase switch device S is sent to the comparator for comparison. P1 PWM signal PWM A11 , lag the triangular carrier signal by 360° / (m-1) and compare it with the signal G in step (7) A1 The A-phase switch device S is sent to the comparator for comparison. P2 PWM signal PWM A12 , lag the triangular carrier signal by 360°*2 / (m-1) and add it to the signal G in step (7) A1 The A-phase switch device S is sent to the comparator for comparison. P3 PWM signal PWM A13 , and so on, the triangular carrier signal is delayed by 360°*i / (m-1) (where i=1, 2...m-2) and compared with the signal G in step (7) A1The A-phase switch device S is sent to the comparator for comparison. Pi PWM signal PWM A1i ;

[0021] (11) The triangular carrier signal is combined with the signal G in step (7) A2 The A-phase switch device S is sent to the comparator for comparison. Q1 PWM signal PWM A21 , lag the triangular carrier signal by 360° / (m-1) and compare it with the signal G in step (7) A2 The A-phase switch device S is sent to the comparator for comparison. Q2 PWM signal PWM A22 , lag the triangular carrier signal by 360°*2 / (m-1) and add it to the signal G in step (7) A2 The A-phase switch device S is sent to the comparator for comparison. Q3 PWM signal PWM A23 , and so on, the triangular carrier signal is lagged by 360°*i / (m-1) (where i=1, 2...m-2) and the signal G in step (7) is A2 The A-phase switch device S is sent to the comparator for comparison. Qi PWM signal PWM A2i ;

[0022] (12) The triangular carrier signal is combined with the signal G in step (8) B1 The comparator is used for comparison to obtain the B-phase switch device S P1 PWM signal PWM B11 , lag the triangular carrier signal by 360° / (m-1) and compare it with the signal G in step (8) B1 The comparator is used for comparison to obtain the B-phase switch device S P2 PWM signal PWM B12 , lag the triangular carrier signal by 360°*2 / (m-1) and add it to the signal G in step (8) B1 The comparator is used for comparison to obtain the B-phase switch device S P3 PWM signal PWM B13 , and so on, the triangular carrier signal is delayed by 360°*i / (m-1) (where i=1, 2...m-2) and compared with the signal G in step (8) B1 The comparator is used for comparison to obtain the B-phase switch device S Pi PWM signal PWM B1i ;

[0023] (13) The triangular carrier signal is combined with the signal G in step (8) B2The comparator is used for comparison to obtain the B-phase switch device S Q1 PWM signal PWM B21 , lag the triangular carrier signal by 360° / (m-1) and compare it with the signal G in step (8) B2 The comparator is used for comparison to obtain the B-phase switch device S Q2 PWM signal PWM B22 , lag the triangular carrier signal by 360°*2 / (m-1) and add it to the signal G in step (8) B2 The comparator is used for comparison to obtain the B-phase switch device S Q3 PWM signal PWM B23 , and so on, the triangular carrier signal is delayed by 360°*i / (m-1) (where i=1, 2...m-2) and compared with the signal G in step (8) B2 The comparator is used for comparison to obtain the B-phase switch device S Qi PWM signal PWM B2i ;

[0024] (14) The triangular carrier signal is combined with the signal G in step (9) C1 The C-phase switch device S is sent to the comparator for comparison. P1 PWM signal PWM C11 , lag the triangular carrier signal by 360° / (m-1) and compare it with the signal G in step (9) C1 The C-phase switch device S is sent to the comparator for comparison. P2 PWM signal PWM C12 , lag the triangular carrier signal by 360°*2 / (m-1) and add it to the signal G in step (9) C1 The C-phase switch device S is sent to the comparator for comparison. P3 PWM signal PWM C13 , and so on, the triangular carrier signal is lagged by 360°*i / (m-1) (where i=1, 2...m-2) and compared with the signal G in step (9) C1 The C-phase switch device S is sent to the comparator for comparison. Pi PWM signal PWM C1i ;

[0025] (15) The triangular carrier signal is combined with the signal G in step (9) C2 The C-phase switch device S is sent to the comparator for comparison. Q1 PWM signal PWM C21 , lag the triangular carrier signal by 360° / (m-1) and compare it with the signal G in step (9) C2 The C-phase switch device S is sent to the comparator for comparison.Q2 PWM signal PWM C22 , lag the triangular carrier signal by 360°*2 / (m-1) and add it to the signal G in step (9) C2 The C-phase switch device S is sent to the comparator for comparison. Q3 PWM signal PWM C23 , and so on, the triangular carrier signal is lagged by 360°*i / (m-1) (where i=1, 2...m-2) and compared with the signal G in step (9) C2 The C-phase switch device S is sent to the comparator for comparison. Qi PWM signal PWM C2i ;

[0026] (16) The driving signals of phase A, phase B, and phase C are sent to the corresponding switching devices, realizing active power factor correction of the three-phase rectifier. When the power supply voltage conversion range is large, the input current can also be sinusoided, and balanced control of the output DC capacitor voltage can be achieved at the same time.

[0027] The advantages and positive effects of the control strategy of the bridgeless multi-level rectifier with a common DC bus of the present invention are: compared with the rectifier stage of the traditional medium and high voltage inverter, on the one hand, considering that in quite a few actual industrial applications, energy does not need to be transmitted in two directions, the bridgeless multi-level rectifier provided by the present invention can realize unidirectional energy transmission, and through the scalable topological structure of the bridgeless multi-level, the number of active power switch tubes is reduced by nearly half, thereby greatly reducing the cost and control complexity of the cascade multi-level converter without industrial frequency transformer; on the other hand, there is no need to use a bulky industrial frequency phase-shifting transformer at the input end, and a low-voltage power switch tube is used to complete the High-power unity power factor rectification and conversion under high voltage. Compared with the multi-level converter without industrial frequency transformer, the bridgeless multi-level rectifier provided by the present invention can form a pair of common high-voltage DC bus bars on the DC side, and can flexibly realize the balanced control of the output side capacitor voltage. The bridgeless multi-level rectifier provided by the present invention can select an expandable topology structure according to different application scenarios and power levels. The main power circuit topology structure is flexible, small in size, light in weight, low in cost, simple in control, and the overall working efficiency of the system is high. It has important application value in the fields of medium and high voltage direct current transmission (HVDC), high-power power electronic transformers, and high-power medium and high voltage AC-DC-AC inverters.

[0028] The present invention is further described below in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 A circuit diagram of a first module unit (M) in a control strategy for a bridgeless multi-level rectifier with a common DC bus according to the present invention;

[0030] Figure 2 A circuit diagram of a second module unit (N) in a control strategy for a bridgeless multi-level rectifier with a common DC bus according to the present invention;

[0031] Figure 3 A circuit diagram of a three-phase parallel rectifier with a bridgeless multi-level rectifier control strategy having a common DC bus according to the present invention;

[0032] Figure 4 A circuit diagram of a three-phase star-connected rectifier with a bridgeless multi-level rectifier control strategy having a common DC bus in the present invention;

[0033] Figure 5 A circuit diagram of a three-phase delta-connected rectifier with a bridgeless multi-level rectifier control strategy having a common DC bus in the present invention;

[0034] Figure 6 A circuit diagram of a three-phase double star-connected rectifier with a bridgeless multi-level rectifier control strategy having a common DC bus in the present invention;

[0035] Figure 7 A phase control strategy diagram of the bridgeless multi-level rectifier control strategy with a common DC bus of the present invention;

[0036] Figure 8 The B-phase control strategy diagram of the bridgeless multi-level rectifier control strategy with a common DC bus of the present invention;

[0037] Fig. 9 A C-phase control strategy diagram of a bridgeless multi-level rectifier control strategy with a common DC bus according to the present invention;

[0038] Fig.10 A three-phase input current waveform of a three-phase parallel rectifier composed of a bridgeless multi-level rectifier with a common DC bus in the present invention;

[0039] Fig.11 A three-phase output DC voltage waveform of a three-phase parallel rectifier composed of a bridgeless multi-level rectifier with a common DC bus in the present invention;

[0040] Fig.12 The five-level voltage waveform at the input side of the three-phase parallel rectifier composed of the bridgeless multi-level rectifier with a common DC bus of the present invention. DETAILED DESCRIPTION

[0041] The following is a further description of the embodiments and working principles of the present invention in conjunction with the accompanying drawings:

[0042] Reference Figure 1 and Figure 2A bridgeless multi-level rectifier with a common DC bus comprises a main power circuit, the main power circuit comprises a high-frequency filter, an m-level first module unit (M) (m=2n-1, wherein n is a positive integer greater than 1), an output DC capacitor C and a load resistor R, the first module unit (M) comprises two first bridge arms P and a second bridge arm Q with identical structures, the first bridge arm P comprises m-1 switch devices S P1 , S P2 ······S Pm-2 , S Pm-1 , m-1 fast recovery diodes D P1 , D P2 ······D Pm-2 , D Pm-1 , i flying capacitor branches (where i=1, 2...m-2), the number of DC capacitors of the i-th flying capacitor branch of the first bridge arm P is i, and the fast recovery diode D of the first bridge arm P P1 The second connection terminal (b) of the first bridge arm P is connected to the fast recovery diode D P2 The first terminal (a) of the first bridge arm P is connected to the fast recovery diode D P2 The second connection terminal (b) of the first bridge arm P is connected to the fast recovery diode D P3 The first terminal (a) of the first bridge arm P is connected to the fast recovery diode D Pm-2 The second terminal (b) of the first bridge arm P is connected in turn to the fast recovery diode D Pm-1 The first connection terminal (a) of the first bridge arm P is connected to the switch device S P1 The second connection terminal (f) of the first bridge arm P is connected to the switch device S P2 The first connection terminal (e) of the first bridge arm P is connected to the switch device S P2 The second connection terminal (f) of the first bridge arm P is connected to the switch device S P3 The first connection terminal (e) of the first bridge arm P is connected to the first connection terminal (e), and so on. Pm-2 The second connection terminal (f) is connected in turn to the switch device S of the first bridge arm P. Pm-1 The first terminal (e) of the first bridge arm P is connected to the fast recovery diode D P1 The first connection terminal (a) and the switch device S of the first bridge arm P P1 The first flying capacitor branch of the first bridge arm P includes a DC capacitor C P1 , the fast recovery diode D of the first bridge arm P P1 The second connection terminal (b) of the first bridge arm P is connected to the switch device S P1The second connection terminal (f) of is respectively connected to the two ends of the first flying capacitor branch. Similarly, the i-th flying capacitor branch of the first bridge arm P includes i DC capacitors C P(m-1)(m-2) / 2 , C P(m-1)(m-2) / 2-1 ······C P(m-1)(m-2) / 2-i+1 Connected in series, the fast recovery diode D of the first bridge arm P Pm-2 The second connection terminal (b) of the first bridge arm P is connected to the switch device S Pm-2 The second connection terminal (f) is connected to the two ends of the i-th flying capacitor branch, and the second bridge arm Q includes m-1 switching devices S Q1 , S Q2 ······S Qm-2 , S Qm-1 , m-1 fast recovery diodes D Q1 , D Q2 ······D Qm-2 , D Qm-1 , i flying capacitor branches (where i=1, 2...m-2), the number of DC capacitors of the i-th flying capacitor branch of the second bridge arm Q is i, the second bridge arm Q has the same connection structure as the first bridge arm P, and the fast recovery diode D of the first bridge arm P Pm-1 The second connection terminal (b) and the fast recovery diode D of the second bridge arm Q Qm-1 The second terminal (b) of the first bridge arm P is connected to form the positive terminal of the DC output bus, and is connected to the output DC capacitor C and one end of the load resistor R connected in parallel. The switch device S of the first bridge arm P Pm-1 The second connection terminal (f) of the second bridge arm Q is connected to the switch device S Qm-1 The second terminal (f) of the first bridge arm P is connected to form the negative terminal of the DC output bus, and is connected to the other end of the output DC capacitor C and the load resistor R connected in parallel. The switch device S of the first bridge arm P P1 The first terminal (e) of the high-frequency filter is connected in series to the AC grid, and the other end of the AC grid is connected to the switch device S Q1 is connected to the first terminal (e).

[0043] Reference Figure 1 , Figure 2 and Figure 3 A three-phase parallel rectifier composed of a bridgeless multi-level rectifier with a common DC bus, comprising a three-phase main power circuit, the three-phase main power circuit comprising three high-frequency filters and three second module units (N), the second module unit (N) comprising an m-level first module unit (M) (m=2n-1, wherein n is a positive integer greater than 1), an output DC capacitor C and a load resistor R, the first module unit (M) comprising two first bridge arms P and a second bridge arm Q having identical structures, the first bridge arm P comprising m-1 switch devices S P1 , S P2······S Pm-2 , S Pm-1 , m-1 fast recovery diodes D P1 , D P2 ······D Pm-2 , D Pm-1 , i flying capacitor branches (where i=1, 2...m-2), the number of DC capacitors of the i-th flying capacitor branch of the first bridge arm P is i, and the fast recovery diode D of the first bridge arm P P1 The second connection terminal (b) of the first bridge arm P is connected to the fast recovery diode D P2 The first terminal (a) of the first bridge arm P is connected to the fast recovery diode D P2 The second connection terminal (b) of the first bridge arm P is connected to the fast recovery diode D P3 The first terminal (a) of the first bridge arm P is connected to the fast recovery diode D Pm-2 The second terminal (b) of the first bridge arm P is connected in turn to the fast recovery diode D Pm-1 The first connection terminal (a) of the first bridge arm P is connected to the switch device S P1 The second connection terminal (f) of the first bridge arm P is connected to the switch device S P2 The first connection terminal (e) of the first bridge arm P is connected to the switch device S P2 The second connection terminal (f) of the first bridge arm P is connected to the switch device S P3 The first connection terminal (e) of the first bridge arm P is connected to the first connection terminal (e), and so on. Pm-2 The second connection terminal (f) is connected in turn to the switch device S of the first bridge arm P. Pm-1 The first terminal (e) of the first bridge arm P is connected to the fast recovery diode D P1 The first connection terminal (a) and the switch device S of the first bridge arm P P1 The first flying capacitor branch of the first bridge arm P includes a DC capacitor C P1 , the fast recovery diode D of the first bridge arm P P1 The second connection terminal (b) of the first bridge arm P is connected to the switch device S P1 The second connection terminal (f) of is respectively connected to the two ends of the first flying capacitor branch. Similarly, the i-th flying capacitor branch of the first bridge arm P includes i DC capacitors C P(m-1)(m-2) / 2 , C P(m-1)(m-2) / 2-1 ······C P(m-1)(m-2) / 2-i+1 Connected in series, the fast recovery diode D of the first bridge arm P Pm-2 The second connection terminal (b) of the first bridge arm P is connected to the switch device S Pm-2 The second connection terminal (f) is connected to the two ends of the i-th flying capacitor branch, and the second bridge arm Q includes m-1 switching devices S Q1, S Q2 ······S Qm-2 , S Qm-1 , m-1 fast recovery diodes D Q1 , D Q2 ······D Qm-2 , D Qm-1 , i flying capacitor branches (where i=1, 2...m-2), the number of DC capacitors of the i-th flying capacitor branch of the second bridge arm Q is i, the second bridge arm Q has the same connection structure as the first bridge arm P, and the fast recovery diode D of the first bridge arm P Pm-1 The second connection terminal (b) and the fast recovery diode D of the second bridge arm Q Qm-1 The second terminal (b) of the first bridge arm P is connected to form the positive terminal of the DC output bus, and is connected to the output DC capacitor C and one end of the load resistor R connected in parallel. The switch device S of the first bridge arm P Pm-1 The second connection terminal (f) of the second bridge arm Q is connected to the switch device S Qm-1 The second terminal (f) of the three-phase second module unit (N) is connected to form a negative terminal of the DC output bus, and is connected to the other end of the output DC capacitor C and the load resistor R connected in parallel, the DC output positive terminal (g) of each phase second module unit (N) is connected, and the DC output negative terminal (h) of each phase second module unit (N) is connected. Each phase second module unit (N) has two remaining AC input terminals, and the first AC input terminals of the three-phase second module unit (N) constitute a group of terminals, and the second AC input terminals of the three-phase second module unit (N) constitute another group of terminals, one group of terminals is connected to a common neutral point, and the other group of terminals are respectively connected in series with three high-frequency filters and connected to the three-phase power grid to form a three-phase parallel connection.

[0044] Reference Figure 1 , Figure 2 and Figure 4 A three-phase star-connected rectifier composed of a bridgeless multi-level rectifier with a common DC bus, comprising a three-phase main power circuit, the main power circuit comprising three high-frequency filters and three second module units (N), the second module unit (N) comprising an m-level first module unit (M) (m=2n-1, wherein n is a positive integer greater than 1), an output DC capacitor C and a load resistor R, the first module unit (M) comprising two first bridge arms P and a second bridge arm Q having identical structures, the first bridge arm P comprising m-1 switch devices S P1 , S P2 ······S Pm-2 , S Pm-1 , m-1 fast recovery diodes D P1 , D P2 ······D Pm-2 , D Pm-1, i flying capacitor branches (where i=1, 2...m-2), the number of DC capacitors of the i-th flying capacitor branch of the first bridge arm P is i, and the fast recovery diode D of the first bridge arm P P1 The second connection terminal (b) of the first bridge arm P is connected to the fast recovery diode D P2 The first terminal (a) of the first bridge arm P is connected to the fast recovery diode D P2 The second connection terminal (b) of the first bridge arm P is connected to the fast recovery diode D P3 The first terminal (a) of the first bridge arm P is connected to the fast recovery diode D Pm-2 The second terminal (b) of the first bridge arm P is connected in turn to the fast recovery diode D Pm-1 The first connection terminal (a) of the first bridge arm P is connected to the switch device S P1 The second connection terminal (f) of the first bridge arm P is connected to the switch device S P2 The first connection terminal (e) of the first bridge arm P is connected to the switch device S P2 The second connection terminal (f) of the first bridge arm P is connected to the switch device S P3 The first connection terminal (e) of the first bridge arm P is connected to the first connection terminal (e), and so on. Pm-2 The second connection terminal (f) is connected in turn to the switch device S of the first bridge arm P. Pm-1 The first terminal (e) of the first bridge arm P is connected to the fast recovery diode D P1 The first connection terminal (a) and the switch device S of the first bridge arm P P1 The first flying capacitor branch of the first bridge arm P includes a DC capacitor C P1 , the fast recovery diode D of the first bridge arm P P1 The second connection terminal (b) of the first bridge arm P is connected to the switch device S P1 The second connection terminal (f) of is respectively connected to the two ends of the first flying capacitor branch. Similarly, the i-th flying capacitor branch of the first bridge arm P includes i DC capacitors C P(m-1)(m-2) / 2 , C P(m-1)(m-2) / 2-1 ······C P(m-1)(m-2) / 2-i+1 Connected in series, the fast recovery diode D of the first bridge arm P Pm-2 The second connection terminal (b) of the first bridge arm P is connected to the switch device S Pm-2 The second connection terminal (f) is connected to the two ends of the i-th flying capacitor branch, and the second bridge arm Q includes m-1 switching devices S Q1 , S Q2 ······S Qm-2 , S Qm-1 , m-1 fast recovery diodes D Q1 , D Q2 ······D Qm-2, D Qm-1 , i flying capacitor branches (where i=1, 2...m-2), the number of DC capacitors of the i-th flying capacitor branch of the second bridge arm Q is i, the second bridge arm Q has the same connection structure as the first bridge arm P, and the fast recovery diode D of the first bridge arm P Pm-1 The second connection terminal (b) and the fast recovery diode D of the second bridge arm Q Qm-1 The second terminal (b) of the first bridge arm P is connected to form the positive terminal of the DC output bus, and is connected to the output DC capacitor C and one end of the load resistor R connected in parallel. The switch device S of the first bridge arm P Pm-1 The second connection terminal (f) of the second bridge arm Q is connected to the switch device S Qm-1 The second terminal (f) of the three-phase second module unit (N) is connected to form the negative terminal of the DC output bus, and is connected to the other end of the output DC capacitor C and the load resistor R connected in parallel. Each phase of the second module unit (N) has two remaining AC input terminals. The first AC input terminals of the three-phase second module unit (N) constitute a group of terminals, and the second AC input terminals of the three-phase second module unit (N) constitute another group of terminals, one group of terminals is connected to a common neutral point, and the other group of terminals is respectively connected in series with three high-frequency filters and connected to the three-phase power grid to form a star connection.

[0045] Reference Figure 1 , Figure 2 and Figure 5 A three-phase delta-connected rectifier composed of a bridgeless multi-level rectifier with a common DC bus, comprising a three-phase main power circuit, the main power circuit comprising three high-frequency filters and three second module units (N), the second module unit (N) comprising an m-level first module unit (M) (m=2n-1, wherein n is a positive integer greater than 1), an output DC capacitor C and a load resistor R, the first module unit (M) comprising two first bridge arms P and a second bridge arm Q having identical structures, the first bridge arm P comprising m-1 switch devices S P1 , S P2 ······S Pm-2 , S Pm-1 , m-1 fast recovery diodes D P1 , D P2 ······D Pm-2 , D Pm-1 , i flying capacitor branches (where i=1, 2...m-2), the number of DC capacitors of the i-th flying capacitor branch of the first bridge arm P is i, and the fast recovery diode D of the first bridge arm P P1 The second connection terminal (b) of the first bridge arm P is connected to the fast recovery diode D P2 The first terminal (a) of the first bridge arm P is connected to the fast recovery diode D P2 The second connection terminal (b) of the first bridge arm P is connected to the fast recovery diode DP3 The first terminal (a) of the first bridge arm P is connected to the fast recovery diode D Pm-2 The second terminal (b) of the first bridge arm P is connected in turn to the fast recovery diode D Pm-1 The first connection terminal (a) of the first bridge arm P is connected to the switch device S P1 The second connection terminal (f) of the first bridge arm P is connected to the switch device S P2 The first connection terminal (e) of the first bridge arm P is connected to the switch device S P2 The second connection terminal (f) of the first bridge arm P is connected to the switch device S P3 The first connection terminal (e) of the first bridge arm P is connected to the first connection terminal (e), and so on. Pm-2 The second connection terminal (f) is connected in turn to the switch device S of the first bridge arm P. Pm-1 The first terminal (e) of the first bridge arm P is connected to the fast recovery diode D P1 The first connection terminal (a) and the switch device S of the first bridge arm P P1 The first flying capacitor branch of the first bridge arm P includes a DC capacitor C P1 , the fast recovery diode D of the first bridge arm P P1 The second connection terminal (b) of the first bridge arm P is connected to the switch device S P1 The second connection terminal (f) of is respectively connected to the two ends of the first flying capacitor branch. Similarly, the i-th flying capacitor branch of the first bridge arm P includes i DC capacitors C P(m-1)(m-2) / 2 , C P(m-1)(m-2) / 2-1 ······C P(m-1)(m-2) / 2-i+1 Connected in series, the fast recovery diode D of the first bridge arm P Pm-2 The second connection terminal (b) of the first bridge arm P is connected to the switch device S Pm-2 The second connection terminal (f) is connected to the two ends of the i-th flying capacitor branch, and the second bridge arm Q includes m-1 switching devices S Q1 , S Q2 ······S Qm-2 , S Qm-1 , m-1 fast recovery diodes D Q1 , D Q2 ······D Qm-2 , D Qm-1 , i flying capacitor branches (where i=1, 2...m-2), the number of DC capacitors of the i-th flying capacitor branch of the second bridge arm Q is i, the second bridge arm Q has the same connection structure as the first bridge arm P, and the fast recovery diode D of the first bridge arm P Pm-1 The second terminal (b) of the second bridge arm Q is connected to the fast recovery diode D Qm-1The second terminal (b) of the first bridge arm P is connected to form the positive terminal of the DC output bus, and is connected to the output DC capacitor C and one end of the load resistor R connected in parallel. The switch device S of the first bridge arm P Pm-1 The second connection terminal (f) of the second bridge arm Q is connected to the switch device S Qm-1 The second terminal (f) is connected to form the negative terminal of the DC output bus, and is connected to the other end of the output DC capacitor C and the load resistor R connected in parallel. Each phase of the second module unit (N) has two remaining AC input terminals. The first AC input terminals of the three-phase second module unit (N) constitute a group of terminals, and the second AC input terminals of the three-phase second module unit (N) constitute another group of terminals. One group of terminals is connected to the input terminal of the three-phase power grid through three high-frequency filters, and the other group of terminals is connected to the input terminal of the next phase in the three-phase power grid in sequence to form a delta connection.

[0046] Reference Figure 1 , Figure 2 and Figure 6 A three-phase double star-connected rectifier composed of a bridgeless multi-level rectifier with a common DC bus, comprising a three-phase main power circuit, the three-phase main power circuit comprising three high-frequency filters, six bridge arm inductors and six second module units (N), the six second module units (N) forming two groups of star connections, each group comprising three second module units (N), the second module unit (N) comprising an m-level first module unit (M) (m=2n-1, wherein n is a positive integer greater than 1), an output DC capacitor C and a load resistor R, the first module unit (M) comprising two first bridge arms P and a second bridge arm Q having completely identical structures, the first bridge arm P comprising m-1 switch devices S P1 , S P2 ······S Pm-2 , S Pm-1 , m-1 fast recovery diodes D P1 , D P2 ······D Pm-2 , D Pm-1 , i flying capacitor branches (where i=1, 2...m-2), the number of DC capacitors of the i-th flying capacitor branch of the first bridge arm P is i, and the fast recovery diode D of the first bridge arm P P1 The second connection terminal (b) of the first bridge arm P is connected to the fast recovery diode D P2 The first terminal (a) of the first bridge arm P is connected to the fast recovery diode D P2 The second connection terminal (b) of the first bridge arm P is connected to the fast recovery diode D P3 The first terminal (a) of the first bridge arm P is connected to the fast recovery diode D Pm-2 The second terminal (b) of the first bridge arm P is connected in turn to the fast recovery diode D Pm-1The first connection terminal (a) of the first bridge arm P is connected to the switch device S P1 The second connection terminal (f) of the first bridge arm P is connected to the switch device S P2 The first connection terminal (e) of the first bridge arm P is connected to the switch device S P2 The second connection terminal (f) of the first bridge arm P is connected to the switch device S P3 The first connection terminal (e) of the first bridge arm P is connected to the first connection terminal (e), and so on. Pm-2 The second connection terminal (f) is connected in turn to the switch device S of the first bridge arm P. Pm-1 The first terminal (e) of the first bridge arm P is connected to the fast recovery diode D P1 The first connection terminal (a) and the switch device S of the first bridge arm P P1 The first flying capacitor branch of the first bridge arm P includes a DC capacitor C P1 , the fast recovery diode D of the first bridge arm P P1 The second connection terminal (b) of the first bridge arm P is connected to the switch device S P1 The second connection terminal (f) of is respectively connected to the two ends of the first flying capacitor branch. Similarly, the i-th flying capacitor branch of the first bridge arm P includes i DC capacitors C P(m-1)(m-2) / 2 , C P(m-1)(m-2) / 2-1 ······C P(m-1)(m-2) / 2-i+1 Connected in series, the fast recovery diode D of the first bridge arm P Pm-2 The second connection terminal (b) of the first bridge arm P is connected to the switch device S Pm-2 The second connection terminal (f) is connected to the two ends of the i-th flying capacitor branch, and the second bridge arm Q includes m-1 switching devices S Q1 , S Q2 ······S Qm-2 , S Qm-1 , m-1 fast recovery diodes D Q1 , D Q2 ······D Qm-2 , D Qm-1 , i flying capacitor branches (where i=1, 2...m-2), the number of DC capacitors of the i-th flying capacitor branch of the second bridge arm Q is i, the second bridge arm Q has the same connection structure as the first bridge arm P, and the fast recovery diode D of the first bridge arm P Pm-1 The second connection terminal (b) and the fast recovery diode D of the second bridge arm Q Qm-1 The second terminal (b) of the first bridge arm P is connected to form the positive terminal of the DC output bus, and is connected to the output DC capacitor C and one end of the load resistor R connected in parallel. The switch device S of the first bridge arm P Pm-1 The second connection terminal (f) of the second bridge arm Q is connected to the switch device S Qm-1The second terminal (f) is connected to form the negative terminal of the DC output bus, and is connected to the other end of the output DC capacitor C and the load resistor R connected in parallel. Each second module unit (N) has two remaining AC input terminals. The first AC input terminals of each group of three star-connected second module units (N) of the three-phase form a group of terminals, and the second AC input terminals of each group of three star-connected second module units (N) of the three-phase form another group of terminals, one of which is connected to a common neutral point, and the other group of terminals is respectively connected to one end of the three bridge arm inductors, and the other ends of the two bridge arm inductors on each phase bridge arm are respectively connected, and are respectively connected to the three-phase grid input terminal through one of the three high-frequency filters. At the same time, the common neutral point in the first group of star connections and the common neutral point in the second group of star connections are respectively connected to the two ends of the DC capacitor to form a double star connection.

[0047] Reference Figure 1 , Figure 2 , Figure 3 , Figure 4 , Figure 5 , Figure 6 , Figure 7 , Figure 8 and Fig. 9 , the control strategy of the bridgeless multilevel rectifier with a common DC bus, the control steps are as follows:

[0048] (1) Sampling the output side DC voltage of the bridgeless multi-level rectifier with a common DC bus to obtain the A-phase output side DC voltage signal U Ao , B phase output side DC voltage signal U Bo , C phase output side DC voltage signal U Co ;

[0049] (2) Sampling the flying capacitor branch voltages of the two bridge arms of the bridgeless multilevel rectifier with a common DC bus to obtain the flying capacitor branch voltage U of the first bridge arm P of phase A A11 , U A12 、······、U A1i , the flying capacitor branch voltage U of the second bridge arm Q of phase A A21 , U A22 、······、U A2i , the flying capacitor branch voltage U of the first bridge arm P of phase B B11 , U B12 、······、U B1i , the flying capacitor branch voltage U of the second bridge arm Q of phase B B21 , U B22 、······、U A2i , the flying capacitor branch voltage U of the first bridge arm P of phase C C11 , U C12 、······、UC1i , the flying capacitor branch voltage U of the second bridge arm Q of phase C C21 , U C22 、······、U C2i ;

[0050] (3) Replace U in step (1) Ao , U Bo , U Co Respectively with the DC voltage given signal U o * After comparison, it is sent to the PI voltage regulator to obtain the output DC current signal amplitude I of the PI voltage regulator Ad ,I Bd ,I Cd ;

[0051] (4) For the m-level rectifier, the DC voltage given signal of the i-th flying capacitor branch is U i * =U o *i / (m-1) (where i=1, 2...m-2), the flying capacitor branch DC voltage U of the first bridge arm P of phase A in step (2) A11 , U A12 、······、U A1i Respectively with U1 * 、U2 * 、······、U i * After comparison, it is sent to the PI voltage regulator to obtain the output DC current signal amplitude I Ad11 ,I Ad12 、······、I Ad1i , the flying capacitor branch DC voltage U of the second bridge arm Q of phase A in step (2) A21 , U A22 、······、U A2i Respectively with U1 * 、U2 * 、······、U i * After comparison, it is sent to the PI voltage regulator to obtain the output DC current signal amplitude I Ad21 ,I Ad22 、······、I Ad2i , the flying capacitor branch DC voltage U of the first bridge arm P of phase B in step (2) B11 , U B12 、······、U B1i Respectively with U1 * 、U2 * 、······、U i *After comparison, it is sent to the PI voltage regulator to obtain the output DC current signal amplitude I Bd11 ,I Bd12 、······、I Bd1i , the flying capacitor branch DC voltage U of the second bridge arm Q of phase B in step (2) B21 , U B22 、······、U B2i Respectively with U1 * 、U2 * 、······、U i * After comparison, it is sent to the PI voltage regulator to obtain the output DC current signal amplitude I Bd21 ,I Bd22 、······、I Bd2i , the flying capacitor branch DC voltage U of the first bridge arm P of phase C in step (2) C11 , U C12 、······、U C1i Respectively with U1 * 、U2 * 、······、U i * After comparison, it is sent to the PI voltage regulator to obtain the output DC current signal amplitude I Cd11 ,I Cd12 、······、I Cd1i , the flying capacitor branch DC voltage U of the second bridge arm P of phase C in step (2) C21 , U C22 、······、U C2i Respectively with U1 * 、U2 * 、······、U i * After comparison, it is sent to the PI voltage regulator to obtain the output DC current signal amplitude I Cd21 ,I Cd22 、······、I Cd2i ;

[0052] (5) Sample the three-phase grid voltage to obtain the input side AC voltage signal u A 、u B 、u C , and take its absolute value to get |U A |、|U B |、|U C |;

[0053] (6) Sample the three-phase grid current to obtain the input side AC current signal i A 、i B 、i C, and take its absolute value to get |I A |、|I B |、|I C |;

[0054] (7) The DC current signal amplitude I of the flying capacitor branch of the first bridge arm P of phase A in step (4) is Ad11 ,I Ad12 、······、I Ad1i The result is the same as the DC current signal amplitude I in step (3). Ad The result is the same as the absolute value of the AC voltage |U in step (5) A | multiplied by the absolute value of the alternating current |I in step (6) A | subtract, and the result is sent to the PI regulator to obtain the modulated wave signal G A1 , the DC current signal amplitude I of the flying capacitor branch of the second bridge arm Q of phase A in step (4) Ad21 ,I Ad22 、······、I Ad2i The result is the same as the DC current signal amplitude I in step (3). Ad The result is the same as the absolute value of the AC voltage |U in step (5) A | multiplied by the absolute value of the alternating current |I in step (6) A | subtract, and the result is sent to the PI regulator to obtain the modulated wave signal G A2 ;

[0055] (8) The DC current signal amplitude I of the flying capacitor branch of the first bridge arm P of phase B in step (4) is Bd11 ,I Bd12 、······、I Bd1i The result is the same as the DC current signal amplitude I in step (3). Bd The result is the same as the absolute value of the AC voltage |U in step (5) B | multiplied by the absolute value of the alternating current |I in step (6) B | subtract, and the result is sent to the PI regulator to obtain the modulated wave signal G B1 , the DC current signal amplitude I of the flying capacitor branch of the second bridge arm Q of phase B in step (4) Bd21 ,I Bd22 、······、I Bd2i The result is the same as the DC current signal amplitude I in step (3). Bd The result is the same as the absolute value of the AC voltage |U in step (5) B | multiplied by the absolute value of the alternating current |I in step (6)B | subtract, and the result is sent to the PI regulator to obtain the modulated wave signal G B2 ;

[0056] (9) The DC current signal amplitude I of the flying capacitor branch of the first bridge arm P of phase C in step (4) is Cd11 ,I Cd12 、······、I Cd1i The result is the same as the DC current signal amplitude I in step (3). Cd The result is the same as the absolute value of the AC voltage |U in step (5) C | multiplied by the absolute value of the alternating current |I in step (6) C | subtract, and the result is sent to the PI regulator to obtain the modulated wave signal G C1 , the DC current signal amplitude I of the flying capacitor branch of the second bridge arm Q of phase C in step (4) Cd21 ,I Cd22 、······、I Cd2i The result is the same as the DC current signal amplitude I in step (3). Bd The result is the same as the absolute value of the AC voltage |U in step (5) C | multiplied by the absolute value of the alternating current |I in step (6) C | subtract, and the result is sent to the PI regulator to obtain the modulated wave signal G C2 ;

[0057] (10) The triangular carrier signal is combined with the signal G in step (7) A1 The A-phase switch device S is sent to the comparator for comparison. P1 PWM signal PWM A11 , lag the triangular carrier signal by 360° / (m-1) and compare it with the signal G in step (7) A1 The A-phase switch device S is sent to the comparator for comparison. P2 PWM signal PWM A12 , lag the triangular carrier signal by 360°*2 / (m-1) and add it to the signal G in step (7) A1 The A-phase switch device S is sent to the comparator for comparison. P3 PWM signal PWM A13 , and so on, the triangular carrier signal is delayed by 360°*i / (m-1) (where i=1, 2...m-2) and compared with the signal G in step (7) A1 The A-phase switch device S is sent to the comparator for comparison. Pi PWM signal PWM A1i ;

[0058] (11) The triangular carrier signal is combined with the signal G in step (7) A2 The A-phase switch device S is sent to the comparator for comparison. Q1 PWM signal PWM A21 , lag the triangular carrier signal by 360° / (m-1) and compare it with the signal G in step (7) A2 The A-phase switch device S is sent to the comparator for comparison. Q2 PWM signal PWM A22 , lag the triangular carrier signal by 360°*2 / (m-1) and add it to the signal G in step (7) A2 The A-phase switch device S is sent to the comparator for comparison. Q3 PWM signal PWM A23 , and so on, the triangular carrier signal is lagged by 360°*i / (m-1) (where i=1, 2...m-2) and the signal G in step (7) is A2 The A-phase switch device S is sent to the comparator for comparison. Qi PWM signal PWM A2i ;

[0059] (12) The triangular carrier signal is combined with the signal G in step (8) B1 The comparator is used for comparison to obtain the B-phase switch device S P1 PWM signal PWM B11 , lag the triangular carrier signal by 360° / (m-1) and compare it with the signal G in step (8) B1 The comparator is used for comparison to obtain the B-phase switch device S P2 PWM signal PWM B12 , lag the triangular carrier signal by 360°*2 / (m-1) and add it to the signal G in step (8) B1 The comparator is used for comparison to obtain the B-phase switch device S P3 PWM signal PWM B13 , and so on, the triangular carrier signal is delayed by 360°*i / (m-1) (where i=1, 2...m-2) and compared with the signal G in step (8) B1 The comparator is used for comparison to obtain the B-phase switch device S Pi PWM signal PWM B1i ;

[0060] (13) The triangular carrier signal is combined with the signal G in step (8) B2 The comparator is used for comparison to obtain the B-phase switch device S Q1 PWM signal PWM B21, lag the triangular carrier signal by 360° / (m-1) and compare it with the signal G in step (8) B2 The comparator is used for comparison to obtain the B-phase switch device S Q2 PWM signal PWM B22 , lag the triangular carrier signal by 360°*2 / (m-1) and add it to the signal G in step (8) B2 The comparator is used for comparison to obtain the B-phase switch device S Q3 PWM signal PWM B23 , and so on, the triangular carrier signal is delayed by 360°*i / (m-1) (where i=1, 2...m-2) and compared with the signal G in step (8) B2 The comparator is used for comparison to obtain the B-phase switch device S Qi PWM signal PWM B2i ;

[0061] (14) The triangular carrier signal is combined with the signal G in step (9) C1 The C-phase switch device S is sent to the comparator for comparison. P1 PWM signal PWM C11 , lag the triangular carrier signal by 360° / (m-1) and compare it with the signal G in step (9) C1 The C-phase switch device S is sent to the comparator for comparison. P2 PWM signal PWM C12 , lag the triangular carrier signal by 360°*2 / (m-1) and add it to the signal G in step (9) C1 The C-phase switch device S is sent to the comparator for comparison. P3 PWM signal PWM C13 , and so on, the triangular carrier signal is lagged by 360°*i / (m-1) (where i=1, 2...m-2) and compared with the signal G in step (9) C1 The C-phase switch device S is sent to the comparator for comparison. Pi PWM signal PWM C1i ;

[0062] (15) The triangular carrier signal is combined with the signal G in step (9) C2 The C-phase switch device S is sent to the comparator for comparison. Q1 PWM signal PWM C21 , lag the triangular carrier signal by 360° / (m-1) and compare it with the signal G in step (9) C2 The C-phase switch device S is sent to the comparator for comparison. Q2 PWM signal PWM C22, lag the triangular carrier signal by 360°*2 / (m-1) and add it to the signal G in step (9) C2 The C-phase switch device S is sent to the comparator for comparison. Q3 PWM signal PWM C23 , and so on, the triangular carrier signal is lagged by 360°*i / (m-1) (where i=1, 2...m-2) and compared with the signal G in step (9) C2 The C-phase switch device S is sent to the comparator for comparison. Qi PWM signal PWM C2i ;

[0063] (16) The driving signals of phase A, phase B, and phase C are sent to the corresponding switching devices, realizing active power factor correction of the three-phase rectifier. When the power supply voltage conversion range is large, the input current can also be sinusoided, and balanced control of the output DC capacitor voltage can be achieved at the same time.

[0064] Reference Fig.10 , is the three-phase input current waveform of the three-phase parallel rectifier composed of a bridgeless multi-level rectifier with a common DC bus in an embodiment of the present invention. In the case of unbalanced three-phase current, the control strategy of the present invention can also achieve three-phase input current balance, and the current waveform quality is good and is approximately sinusoidal.

[0065] Reference Fig.11 , is the total output DC side voltage U of the three-phase composed of the bridgeless multi-level rectifier with a common DC bus in the embodiment of the present invention o , the DC side voltage waveform reaches a steady state in a short time, and the DC voltage fluctuation is small.

[0066] Reference Fig.12 , is a five-level voltage waveform on the input side of a three-phase parallel rectifier composed of a bridgeless multi-level rectifier with a common DC bus in an embodiment of the present invention.

[0067] In other embodiments of the application of a bridgeless multi-level rectifier with a common DC bus of the present invention, the three-phase star-connected, delta-connected and three-phase double star-connected rectifiers described, in addition to using the second module unit (N), can also be a combination of different circuits derived from the second module unit (N).

[0068] The described bridgeless multi-level rectifier circuit with a common DC bus can be simplified and applied to high-power power electronic rectification topology. Through appropriate control strategies, the working efficiency of the system can be improved, and the capacitor voltage on the DC side can be stabilized and balanced, providing favorable conditions for subsequent power conversion. It has important application value in medium and high voltage DC transmission, high power power electronic transformers, high power medium and high voltage AC-DC-AC converters and other application fields.

[0069] The embodiments described above are merely descriptions of preferred implementations of the present invention, and are not intended to limit the concept and scope of the present invention. Without departing from the design of the present invention, various modifications and improvements made to the technical solution of the present invention by ordinary engineering technicians in the field should fall within the protection scope of the present invention. The technical contents for which protection is sought in the present invention have all been recorded in the claims.

Claims

1. A control strategy for a bridgeless multilevel rectifier with a common DC bus, characterized in that: The control strategy steps of the bridgeless multilevel rectifier with a common DC bus are as follows: (1) Sampling the output side DC voltage of the bridgeless multi-level rectifier with a common DC bus to obtain the A-phase output side DC voltage signal U Ao , B phase output side DC voltage signal U Bo , C phase output side DC voltage signal U Co ; (2) Sampling the flying capacitor branch voltages of the two bridge arms of the bridgeless multilevel rectifier with a common DC bus to obtain the flying capacitor branch voltage U of the first bridge arm P of phase A A11 , U A12 、······、U A1i , the flying capacitor branch voltage U of the second bridge arm Q of phase A A21 , U A22 、······、U A2i , the flying capacitor branch voltage U of the first bridge arm P of phase B B11 , U B12 、······、U B1i , the flying capacitor branch voltage U of the second bridge arm Q of phase B B21 , U B22 、······、U A2i , the flying capacitor branch voltage U of the first bridge arm P of phase C C11 , U C12 、······、U C1i , the flying capacitor branch voltage U of the second bridge arm Q of phase C C21 , U C22 、······、U C2i ; (3) Replace U in step (1) Ao , U Bo , U Co Respectively with the DC voltage given signal U o * After comparison, it is sent to the PI voltage regulator to obtain the output DC current signal amplitude I of the PI voltage regulator Ad ,I Bd ,I Cd ; (4) For the m-level rectifier, the DC voltage given signal of the i-th flying capacitor branch is U i * =U o *i / (m-1) (where i=1, 2...m-2), the flying capacitor branch DC voltage U of the first bridge arm P of phase A in step (2) A11 , U A12 、······、U A1i Respectively with U1 * 、U2 * 、······、U i * After comparison, it is sent to the PI voltage regulator to obtain the output DC current signal amplitude I Ad11 ,I Ad12 、······、I Ad1i , the flying capacitor branch DC voltage U of the second bridge arm Q of phase A in step (2) A21 , U A22 、······、U A2i Respectively with U1 * 、U2 * 、······、U i * After comparison, it is sent to the PI voltage regulator to obtain the output DC current signal amplitude I Ad21 ,I Ad22 、······、I Ad2i , the flying capacitor branch DC voltage U of the first bridge arm P of phase B in step (2) B11 , U B12 、······、U B1i Respectively with U1 * 、U2 * 、······、U i * After comparison, it is sent to the PI voltage regulator to obtain the output DC current signal amplitude I Bd11 ,I Bd12 、······、I Bd1i , the flying capacitor branch DC voltage U of the second bridge arm Q of phase B in step (2) B21 , U B22 、······、U B2i Respectively with U1 * 、U2 * 、······、U i * After comparison, it is sent to the PI voltage regulator to obtain the output DC current signal amplitude I Bd21 ,I Bd22 、······、I Bd2i , the flying capacitor branch DC voltage U of the first bridge arm P of phase C in step (2) C11 , U C12 、······、U C1i Respectively with U1 * 、U2 * 、······、U i * After comparison, it is sent to the PI voltage regulator to obtain the output DC current signal amplitude I Cd11 ,I Cd12 、······、I Cd1i , the flying capacitor branch DC voltage U of the second bridge arm P of phase C in step (2) C21 , U C22 、······、U C2i Respectively with U1 * 、U2 * 、······、U i * After comparison, it is sent to the PI voltage regulator to obtain the output DC current signal amplitude I Cd21 ,I Cd22 、······、I Cd2i ; (5) Sample the three-phase grid voltage to obtain the input side AC voltage signal u A 、u B 、u C , and take its absolute value to get |U A |、|U B |、|U C |; (6) Sample the three-phase grid current to obtain the input side AC current signal i A 、i B 、i C , and take its absolute value to get |I A |、|I B |、|I C |; (7) The DC current signal amplitude I of the flying capacitor branch of the first bridge arm P of phase A in step (4) is Ad11 ,I Ad12 、······、I Ad1i The result is the same as the DC current signal amplitude I in step (3). Ad The result is the same as the absolute value of the AC voltage |U in step (5) A | multiplied by the absolute value of the alternating current |I in step (6) A | subtract, and the result is sent to the PI regulator to obtain the modulated wave signal G A1 , the DC current signal amplitude I of the flying capacitor branch of the second bridge arm Q of phase A in step (4) Ad21 ,I Ad22 、······、I Ad2i The result is the same as the DC current signal amplitude I in step (3). Ad The result is the same as the absolute value of the AC voltage |U in step (5) A | multiplied by the absolute value of the alternating current |I in step (6) A | subtract, and the result is sent to the PI regulator to obtain the modulated wave signal G A2 ; (8) The DC current signal amplitude I of the flying capacitor branch of the first bridge arm P of phase B in step (4) is Bd11 ,I Bd12 、······、I Bd1i The result is the same as the DC current signal amplitude I in step (3). Bd The result is the same as the absolute value of the AC voltage |U in step (5) B | multiplied by the absolute value of the alternating current |I in step (6) B | subtract, and the result is sent to the PI regulator to obtain the modulated wave signal G B1 , the DC current signal amplitude I of the flying capacitor branch of the second bridge arm Q of phase B in step (4) Bd21 ,I Bd22 、······、I Bd2i The result is the same as the DC current signal amplitude I in step (3). Bd The result is the same as the absolute value of the AC voltage |U in step (5) B | multiplied by the absolute value of the alternating current |I in step (6) B | subtract, and the result is sent to the PI regulator to obtain the modulated wave signal G B2 ; (9) The DC current signal amplitude I of the flying capacitor branch of the first bridge arm P of phase C in step (4) is Cd11 ,I Cd12 、······、I Cd1i The result is the same as the DC current signal amplitude I in step (3). Cd The result is the same as the absolute value of the AC voltage |U in step (5) C | multiplied by the absolute value of the alternating current |I in step (6) C | subtract, and the result is sent to the PI regulator to obtain the modulated wave signal G C1 , the DC current signal amplitude I of the flying capacitor branch of the second bridge arm Q of phase C in step (4) Cd21 ,I Cd22 、······、I Cd2i The result is the same as the DC current signal amplitude I in step (3). Bd The result is the same as the absolute value of the AC voltage |U in step (5) C | multiplied by the absolute value of the alternating current |I in step (6) C | subtract, and the result is sent to the PI regulator to obtain the modulated wave signal G C2 ; (10) The triangular carrier signal is combined with the signal G in step (7) A1 The A-phase switch device S is sent to the comparator for comparison. P1 PWM signal PWM A11 , lag the triangular carrier signal by 360° / (m-1) and compare it with the signal G in step (7) A1 The A-phase switch device S is sent to the comparator for comparison. P2 PWM signal PWM A12 , lag the triangular carrier signal by 360°*2 / (m-1) and add it to the signal G in step (7) A1 The A-phase switch device S is sent to the comparator for comparison. P3 PWM signal PWM A13 , and so on, the triangular carrier signal is delayed by 360°*i / (m-1) (where i=1, 2...m-2) and compared with the signal G in step (7) A1 The A-phase switch device S is sent to the comparator for comparison. Pi PWM signal PWM A1i ; (11) The triangular carrier signal is combined with the signal G in step (7) A2 The A-phase switch device S is sent to the comparator for comparison. Q1 PWM signal PWM A21 , lag the triangular carrier signal by 360° / (m-1) and compare it with the signal G in step (7) A2 The A-phase switch device S is sent to the comparator for comparison. Q2 PWM signal PWM A22 , lag the triangular carrier signal by 360°*2 / (m-1) and add it to the signal G in step (7) A2 The A-phase switch device S is sent to the comparator for comparison. Q3 PWM signal PWM A23 , and so on, the triangular carrier signal is lagged by 360°*i / (m-1) (where i=1, 2...m-2) and the signal G in step (7) is A2 The A-phase switch device S is sent to the comparator for comparison. Qi PWM signal PWM A2i ; (12) The triangular carrier signal is combined with the signal G in step (8) B1 The comparator is used for comparison to obtain the B-phase switch device S P1 PWM signal PWM B11 , lag the triangular carrier signal by 360° / (m-1) and compare it with the signal G in step (8) B1 The comparator is used for comparison to obtain the B-phase switch device S P2 PWM signal PWM B12 , lag the triangular carrier signal by 360°*2 / (m-1) and add it to the signal G in step (8) B1 The comparator is used for comparison to obtain the B-phase switch device S P3 PWM signal PWM B13 , and so on, the triangular carrier signal is delayed by 360°*i / (m-1) (where i=1, 2...m-2) and compared with the signal G in step (8) B1 The comparator is used for comparison to obtain the B-phase switch device S Pi PWM signal PWM B1i ; (13) The triangular carrier signal is combined with the signal G in step (8) B2 The comparator is used for comparison to obtain the B-phase switch device S Q1 PWM signal PWM B21 , lag the triangular carrier signal by 360° / (m-1) and compare it with the signal G in step (8) B2 The comparator is used for comparison to obtain the B-phase switch device S Q2 PWM signal PWM B22 , lag the triangular carrier signal by 360°*2 / (m-1) and add it to the signal G in step (8) B2 The comparator is used for comparison to obtain the B-phase switch device S Q3 PWM signal PWM B23 , and so on, the triangular carrier signal is delayed by 360°*i / (m-1) (where i=1, 2...m-2) and compared with the signal G in step (8) B2 The comparator is used for comparison to obtain the B-phase switch device S Qi PWM signal PWM B2i ; (14) The triangular carrier signal is combined with the signal G in step (9) C1 The C-phase switch device S is sent to the comparator for comparison. P1 PWM signal PWM C11 , lag the triangular carrier signal by 360° / (m-1) and compare it with the signal G in step (9) C1 The C-phase switch device S is sent to the comparator for comparison. P2 PWM signal PWM C12 , lag the triangular carrier signal by 360°*2 / (m-1) and add it to the signal G in step (9) C1 The C-phase switch device S is sent to the comparator for comparison. P3 PWM signal PWM C13 , and so on, the triangular carrier signal is lagged by 360°*i / (m-1) (where i=1, 2...m-2) and compared with the signal G in step (9) C1 The C-phase switch device S is sent to the comparator for comparison. Pi PWM signal PWM C1i ; (15) The triangular carrier signal is combined with the signal G in step (9) C2 The C-phase switch device S is sent to the comparator for comparison. Q1 PWM signal PWM C21 , lag the triangular carrier signal by 360° / (m-1) and compare it with the signal G in step (9) C2 The C-phase switch device S is sent to the comparator for comparison. Q2 PWM signal PWM C22 , lag the triangular carrier signal by 360°*2 / (m-1) and add it to the signal G in step (9) C2 The C-phase switch device S is sent to the comparator for comparison. Q3 PWM signal PWM C23 , and so on, the triangular carrier signal is lagged by 360°*i / (m-1) (where i=1, 2...m-2) and compared with the signal G in step (9) C2 The C-phase switch device S is sent to the comparator for comparison. Qi PWM signal PWM C2i ; (16) The driving signals of phase A, phase B, and phase C are sent to the corresponding switching devices, realizing active power factor correction of the three-phase rectifier. When the power supply voltage conversion range is large, the input current can also be sinusoided, and balanced control of the output DC capacitor voltage can be achieved at the same time.

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